Serial port data fragmentation transmission method, device, medium and product

Abstract

This application relates to the field of electronic technology and discloses a serial port data fragmentation transmission method, device, medium, and product. One method, applied at a receiving end, includes: receiving a first protocol frame containing a data identifier, a first frame sequence number, and a first data fragment; sending a negative acknowledgment frame after a verification failure; receiving and successfully verifying at least one second protocol frame, whose frame sequence number follows the first frame sequence number, and storing the second data fragment in a buffer; receiving and successfully verifying the first protocol frame again, and writing the first data fragment into the buffer; when the sequence numbers of the first and second frames are consecutive, retrieving the data fragment from the buffer and writing it to a storage area. In this embodiment, the writing is performed after determining the continuity of the frame sequence number to avoid data errors or omissions caused by direct writing of out-of-order arrivals, thereby improving the efficiency and accuracy of data transmission.

Description

Technical Field

[0001] This application relates to the field of electronic technology, and in particular to a method, device, medium and product for serial port data fragmentation transmission. Background Technology

[0002] When two devices transmit data via serial port, the serial link is prone to bit errors due to signal interference, electrical noise, and other factors. This can cause the receiving end to fail to verify the protocol frame, triggering a negative acknowledgment frame and a retransmission mechanism. During retransmission, subsequent fragments may arrive at the receiving end before the retransmitted frame, resulting in out-of-order fragment arrival. If the receiving end directly writes the data to its storage area, it will lead to data corruption. If a fragment is missing, subsequent fragments cannot be temporarily stored, forcing the transmission process to be interrupted, and it is difficult to automatically resume transmission after the missing fragments are filled in. Summary of the Invention

[0003] To address the aforementioned technical problems, embodiments of this application provide a serial port data fragmentation transmission method, device, medium, and product, which can improve the efficiency and accuracy of data transmission.

[0004] In a first aspect, this application provides a serial port data fragmentation transmission method applied at a receiving end, comprising: receiving a first protocol frame from a sending end, wherein the first protocol frame is one of a plurality of protocol frames corresponding to data to be transmitted, the first protocol frame including a data identifier of the data to be transmitted, a first frame sequence number, and a first data fragment; verifying the first protocol frame fails and sending a negative acknowledgment frame to the sending end; receiving at least one second protocol frame from the sending end, wherein the at least one second protocol frame belongs to the plurality of protocol frames, each second protocol frame including the data identifier, a second frame sequence number, and a second data fragment, the second frame sequence number being after the first frame sequence number; verifying the at least one second protocol frame successfully and storing at least one second data fragment in a buffer; receiving the first protocol frame from the sending end again; verifying the received first protocol frame successfully and writing the first data fragment into the buffer; determining that the first frame sequence number corresponding to the first data fragment in the buffer is consecutive to the at least one second frame sequence number corresponding to at least one second data fragment, retrieving the first data fragment and the at least one second data fragment from the buffer and writing them into a storage area.

[0005] According to the embodiments of this application, by caching and temporarily storing the subsequent fragments that have been verified, the retransmission of the first protocol frame and the transmission of subsequent fragments are carried out in parallel, avoiding the blocking of subsequent data reception and caching due to waiting for retransmission, and reducing the overall transmission latency; at the same time, by judging the continuity of frame sequence numbers before writing to the storage area, it is ensured that only continuous fragment sequences are written to disk, avoiding data errors or omissions caused by direct writing due to out-of-order fragment arrival, and ensuring the correctness and integrity of data written to disk.

[0006] In one possible implementation of the first aspect, verifying the first protocol frame or the second protocol frame includes: obtaining a first verification value from a verification field in the protocol frame; calculating a second verification value for the protocol frame after removing the verification field; and verifying the protocol frame by comparing the first verification value and the second verification value.

[0007] In one possible implementation of the first aspect, the method further includes: determining that there is a protocol frame corresponding to a missing frame sequence number; and sending a data recovery request to the sending end, the data recovery request including the missing frame sequence number.

[0008] In one possible implementation of the first aspect, the data to be transmitted is the radio frequency profile of the radar chip.

[0009] In one possible implementation of the first aspect, the transmitting end is a field-programmable gate array (FPGA) and the receiving end is an industrial computing platform.

[0010] Secondly, this application provides a serial port data fragmentation transmission method applied at a transmitting end, comprising: splitting data to be transmitted into multiple protocol frames, the multiple protocol frames including a first protocol frame and at least one second protocol frame, the first protocol frame including a data identifier of the data to be transmitted, a first frame sequence number and a first data fragment, the at least one second protocol frame including the data identifier, a second frame sequence number and a second data fragment; transmitting the first protocol frame and at least one second protocol frame to a receiving end; receiving a negative acknowledgment frame from the receiving end, the negative acknowledgment frame indicating that the first protocol frame verification failed; and retransmitting the first protocol frame according to the negative acknowledgment frame.

[0011] According to the embodiments of this application, the sending end can continue to send subsequent protocol frames without waiting for the receiving end to successfully acknowledge the previous protocol frame, which reduces the interaction overhead on the low-speed serial port link and improves the transmission efficiency. At the same time, the sending end only retransmits the target fragment indicated by the negative acknowledgment frame, without retransmitting the entire data to be transmitted or other fragments that have been successfully received, which significantly reduces the amount of invalid transmission and recovery delay.

[0012] In one possible implementation of the second aspect, the transmitting end is a field-programmable gate array (FPGA) and the receiving end is an industrial computing platform.

[0013] In one possible implementation of the second aspect, the data to be transmitted is the radio frequency profile of the radar chip.

[0014] Thirdly, this application provides a serial port data fragmentation transmission system, including a transmitter and a receiver; the transmitter is used to split the data to be transmitted into multiple protocol frames and send the multiple protocol frames to the receiver; the receiver is used to receive a first protocol frame from the transmitter, send a negative acknowledgment frame to the transmitter after the first protocol frame fails to be verified, receive at least one second protocol frame from the transmitter and store at least one second data fragment in a buffer, receive the first protocol frame again and write the first data fragment into the buffer after successful verification, and determine that the first frame sequence number corresponding to the first data fragment in the buffer is consecutive to the at least one second frame sequence number corresponding to at least one second data fragment, and retrieve the first data fragment and the at least one second data fragment from the buffer and write them into a storage area; the transmitter is also used to retransmit the first protocol frame according to the negative acknowledgment frame.

[0015] Fourthly, this application provides an electronic device, including: a memory and a processor; the memory is used to store instructions, and the processor is used to execute the instructions to cause the electronic device to perform the methods provided in the first or second aspect above.

[0016] Fifthly, this application provides a readable storage medium storing instructions that, when executed on an electronic device, cause the electronic device to perform the methods provided in the first or second aspect described above.

[0017] Sixthly, this application provides a computer program product comprising computer instructions that, when executed by an electronic device, cause the methods provided in the first or second aspect to be implemented.

[0018] The beneficial effects of aspects three through six are similar to those of aspects one and two, and will not be elaborated here. Attached Figure Description

[0019] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments of this application will be briefly described below.

[0020] Figure 1 A schematic flowchart of a serial port data fragmentation transmission method provided in an embodiment of this application is shown.

[0021] Figure 2 A schematic flowchart of another serial port data fragmentation transmission method provided in an embodiment of this application is shown.

[0022] Figure 3 A schematic diagram of the structure of an electronic device provided in an embodiment of this application is shown. Detailed Implementation

[0023] The illustrative embodiments of this application include, but are not limited to, a serial port data fragmentation transmission method, device, medium, and product.

[0024] As mentioned before, data transmission between the two devices can be problematic due to issues such as data corruption and interruptions in the transmission process.

[0025] To address the aforementioned issues, this application provides a serial port data fragmentation transmission method applied at the receiving end. The method includes: receiving a first protocol frame from the sending end, wherein the first protocol frame is one of multiple protocol frames corresponding to data to be transmitted, and the first protocol frame includes a data identifier of the data to be transmitted, a first frame sequence number, and a first data fragment; verifying the first protocol frame fails and sending a negative acknowledgment frame to the sending end; receiving at least one second protocol frame from the sending end, wherein the at least one second protocol frame belongs to multiple protocol frames, each second protocol frame including a data identifier, a second frame sequence number, and a second data fragment, the second frame sequence number following the first frame sequence number; verifying the at least one second protocol frame successfully and storing the at least one second data fragment in a buffer; receiving another first protocol frame from the sending end; verifying the second received first protocol frame successfully and writing the first data fragment into the buffer; determining that the first frame sequence number corresponding to the first data fragment in the buffer is consecutive to the at least one second frame sequence number corresponding to the at least one second data fragment, retrieving the first data fragment and the at least one second data fragment from the buffer and writing them into a storage area.

[0026] In this embodiment, the receiving end sends a negative acknowledgment frame to the sending end for the first protocol frame that fails verification. Simultaneously, it continues to receive and cache subsequent successfully verified second data fragments. Upon receiving a retransmitted first protocol frame and successfully verifying it again, it does not directly write it to the storage area. Instead, it first determines that the sequence number of the first frame corresponding to the first data fragment in the cache is consecutive with the sequence number of at least one second frame corresponding to at least one second data fragment. Then, it retrieves the consecutive first data fragments and at least one second data fragment together and writes them to the storage area. On one hand, by temporarily caching subsequent fragments, the retransmission of the first protocol frame and the transmission of subsequent fragments can proceed in parallel, avoiding the blocking of subsequent data reception and caching due to waiting for retransmission, thus reducing overall transmission latency. On the other hand, by determining the continuity of frame sequence numbers before writing to the storage area, it ensures that only consecutive fragment sequences are written to disk, avoiding data errors or omissions caused by out-of-order fragment arrivals, thus guaranteeing the correctness and integrity of data written to disk.

[0027] The following is combined Figure 1 This application provides an exemplary flow of a serial port data fragmentation transmission method according to an embodiment.

[0028] Understandable, Figure 1The exemplary process can be applied to the receiving end, such as an industrial computing platform. This application does not limit the type of receiving end.

[0029] like Figure 1 As shown, the steps include the following.

[0030] S101: The first protocol frame was received from the sender.

[0031] The first protocol frame is one of multiple protocol frames corresponding to the data to be transmitted. The first protocol frame includes the data identifier of the data to be transmitted, the first frame sequence number, and the first data fragment.

[0032] For example, the data to be transmitted is the radio frequency (RF) profile of a radar chip, which is directed to multiple radar chips or channels. The transmitting end is a field-programmable gate array (FPGA), and the receiving end is an industrial computing platform, such as an NVIDIA DRIVE Orin chip. For instance, the Orin side acts as the RF profile requesting end and the file receiving and disk-writing end, while the FPGA side acts as the RF profile transmitting end.

[0033] For example, the FPGA transmitter sends the first protocol frame through the Universal Asynchronous Receiver / Transmitter (UART) serial port, and the Orin receiver continuously reads the byte stream from the serial port address through the UART serial port data receiving thread, and writes the read raw byte stream data into a circular data buffer to isolate the serial port hardware reading from the upper layer parsing and processing.

[0034] For example, the protocol frame parsing thread at the receiving end retrieves data from the circular buffer and processes the byte stream according to the following logic: when the buffer length is insufficient for the protocol frame header, the existing data is retained without parsing, and concatenation is performed after the next serial port read; when a frame header identifier is found but the current total buffer length is insufficient for the total frame length declared in the frame header, the incomplete packet data starting from the frame header is retained, and concatenation into a complete frame is performed after subsequent data arrives; when multiple complete frames exist in the buffer, each frame is cut out according to the total frame length in the frame header and processed sequentially; when there are invalid bytes before the frame header, the frame start point is located by searching the frame header identifier and the invalid bytes are discarded to avoid amplifying parsing misalignment; after each round of parsing, the unprocessed tail data of this round is moved to the head of the processing buffer, and concatenation is performed after the next serial port read.

[0035] For example, each protocol frame contains at least the following fields:

[0036] Table 1 Protocol Frame Field Table

[0037]

[0038] For example, the data identifier in the first protocol frame is composed of chipId and fileId, used to uniquely identify a specific RF profile of a radar chip. For instance, the first frame sequence number is the value of the curPacketNo field in the protocol frame, and the first data fragment is the payload portion in the protocol frame whose length is indicated by the packetDataLength field.

[0039] S102: The verification of the first protocol frame failed, and a negative acknowledgment frame was sent to the sender.

[0040] According to one embodiment, the specific method for verifying the first protocol frame is as follows: obtaining a first verification value from the verification field in the protocol frame; calculating the verification value of the protocol frame after removing the verification field to obtain a second verification value; and verifying the protocol frame by comparing the first verification value and the second verification value.

[0041] For example, the receiving end performs a 32-bit cyclic redundancy check (CRC32 check) on the protocol frame. Specifically, it obtains the first check value calculated by the sending end from the check field crc32Bit in the received protocol frame; temporarily sets the crc32Bit field in the protocol frame to zero; performs a CRC32 check value calculation on the entire frame data after removing the check field to obtain the second check value; compares the first check value and the second check value; if they are inconsistent, the check frame is determined to have failed.

[0042] For example, if the verification fails, the negative acknowledgment (NAK) generation module of the receiving end will construct a negative acknowledgment frame (i.e., a NAK error retransmission frame). The NAK error retransmission frame contains at least the following information: target chip or channel identifier; original service type; target file identifier; target fragment frame sequence number; and optional error reasons, such as CRC check error, length abnormality, or service type mismatch.

[0043] For example, the receiving end enqueues the generated NAK task into a thread-safe transmission queue, which is then independently retrieved by the UART serial port transmission thread and sent to the FPGA transmitting end via the serial port. The receiving end only sends a negative acknowledgment frame when the verification fails, and does not acknowledge frames that have been successfully verified (i.e., it does not send an acknowledgment (ACK)). The transmitting end does not need to wait for any successful acknowledgments to continue sending subsequent protocol frames, thereby reducing the interaction overhead on the low-speed serial port link.

[0044] S103: At least one second protocol frame was received from the sender.

[0045] Among them, at least one second protocol frame belongs to multiple protocol frames, and each second protocol frame includes a data identifier, a second frame sequence number, and a second data fragment, with the second frame sequence number following the first frame sequence number.

[0046] For example, since the sending end does not rely on the ACK confirmation of the preceding frame to send subsequent frames, even if the first protocol frame is not successfully received, the FPGA sending end will still continue to send the second protocol frame after the first protocol frame in sequence. The serial port read thread of the receiving end continuously receives these protocol frames and writes them into a circular buffer for processing by the parsing thread.

[0047] For example, each second protocol frame is the same as the first protocol frame, containing all 10 fields listed in Table 1, wherein the curPacketNo field value of each second protocol frame increases sequentially.

[0048] S104: At least one second protocol frame is successfully verified, and at least one second data fragment is stored in the cache.

[0049] For example, the receiving end performs the same verification process as S102 for each second protocol frame. For instance, it extracts the first verification value calculated and filled in by the sending end from the verification value field of the second protocol frame, clears the verification value field to zero, performs CRC32 calculation on the entire frame data to obtain the second verification value, compares the first verification value and the second verification value, and if the two are consistent, the verification is considered successful.

[0050] For example, after successful verification, the receiving end stores the second data fragment in a data buffer container, ready to be written to disk together after subsequent consecutive frames pass sequence number verification. Specifically, the receiving end extracts the actual payload corresponding to the packetDataLength of the frame, and creates or finds the corresponding data buffer container in memory based on the combined identifier of chipId and fileId. This buffer container pre-allocates a fixed size of space based on totalPacketNo at the beginning of file reception to temporarily store out-of-order fragmented data. The parsing thread parses the filename and fragmented binary data from the payload and stores them in the corresponding index position of the buffer container according to the curPacketNo frame sequence number.

[0051] For example, after successful verification, the receiving end stores the second data fragment into the corresponding position in the data buffer container according to its frame sequence number, so that the fragments in the buffer are arranged by frame sequence number index for subsequent continuity judgment. Specifically, the parsing thread parses the file name and fragment binary data from the payload of the protocol frame, and stores the fragment binary data into the index position in the data buffer container corresponding to the second frame sequence number.

[0052] S105: The first protocol frame is received again from the sender.

[0053] For example, after receiving a NAK error retransmission frame from the receiver, the FPGA transmitter's internal NAK error retransmission module parses the NAK frame, extracting the file identifier and target fragment frame sequence number. Then, based on the file identifier, this module locates the corresponding RF configuration file in local storage, re-invokes the RF configuration file framing and encapsulation module, separately packages the target fragment, and calls the CRC32 generation module to recalculate the CRC32 value of the frame and re-fill it. Finally, the transmitter retransmits only the target fragment via the UART serial port. This mechanism does not roll back the entire file, nor does it retransmit other frames that have been successfully received after the first frame.

[0054] For example, the receiving end retrieves the retransmitted first protocol frame again through the serial port read thread and parsing thread, and writes it into the circular buffer to wait for parsing.

[0055] S106: The first protocol frame received again is successfully verified, and the first data fragment is written to the buffer.

[0056] For example, the receiving end performs a verification on the retransmitted first protocol frame. The verification method is described in the relevant section of S102 above and will not be repeated here. After the verification passes, the first data fragment is stored in the data buffer container at the index position corresponding to the sequence number of the first frame.

[0057] For example, if a fragment with the same frame sequence number already exists in the data cache container, it is determined whether the current frame's curPacketNo is less than the currently maintained expected write sequence number. If so, the duplicate frame is counted and discarded, and not written to the cache.

[0058] S107: Determine that the first frame sequence number corresponding to the first data fragment in the cache is consecutive to the first frame sequence number corresponding to at least one second data fragment, and retrieve the first data fragment and at least one second data fragment from the cache and write them into the storage area.

[0059] For example, the receiving end maintains an expected write sequence number, initially set to 0, to confirm the sequence number of the next fragment frame to be written to the storage area. Each time a new fragment is successfully verified and added to the cache, it checks whether there is fragment data in the cache with a frame sequence number equal to the current cursor value; if so, the fragment data is retrieved and written to the storage area; after writing, the cursor is incremented, and it continues to check whether there is fragment data with the next consecutive sequence number in the cache; if so, writing continues, forming a continuous commit; if there is no fragment corresponding to the current cursor in the cache, the commit stops, and the receiver waits for the retransmission of the missing frame to arrive.

[0060] For example, when the sequence number of the first frame is consecutive to the sequence number of the second frame, the sequential disk write module will take out the first data fragment and all consecutive second data fragments in the cache container in sequence and write them to the storage area to complete the correct disk write of the RF configuration file.

[0061] The above exemplary description illustrates a scenario where the first protocol frame fails to be verified and needs to be retransmitted, but the second protocol frame has already arrived in the buffer. However, the technical solution of this application is not limited to this. In actual operation, the transmission and retransmission of multiple protocol frames may present various situations.

[0062] The first approach is that if all protocol frames are successfully verified, each fragment arrives at the buffer in sequence according to its frame number. The expected frame number is to continuously increase, and the buffer can continuously write to the storage area without waiting for missing frames.

[0063] The second approach is to send multiple missing frame sequence numbers to the negative response frame if two or more consecutive protocol frames fail to be verified. The sending end then retransmits multiple protocol frames in sequence, and the receiving end checks the buffer for the next consecutive frame sequence number after each frame is successfully retransmitted, until the consecutive frame sequence is complete and then writes them into the storage area.

[0064] The third approach is to write the retransmitted frame into the cache after multiple subsequent protocol frames have been successfully verified and stored before the retransmitted frame arrives. The expected frame sequence number will continuously traverse the cached subsequent frames, and the entire sequence of consecutive frames will be written into the storage area at once.

[0065] Fourthly, if the receiving end determines that there is a protocol frame corresponding to a missing frame number by detecting the continuity of frame sequence numbers in the buffer, it sends a data recovery request to the sending end. The data recovery request includes the missing frame number, and the sending end resends the corresponding fragment accordingly.

[0066] Therefore, regardless of whether it is a single frame error, multiple consecutive frame errors, or retransmissions arriving intermittently with subsequent frames, this application can ensure that each fragment is written to the storage area in order by using buffering and determining the continuity of the expected frame sequence number. The above scenarios are exemplary applications of the technical solution of this application and are not intended to limit the scope of protection of this application.

[0067] In this embodiment, the receiving end sends a negative acknowledgment frame to the sending end for the first protocol frame that fails verification. Simultaneously, it continues to receive and cache subsequent successfully verified second data fragments. Upon receiving a retransmitted first protocol frame and successfully verifying it again, it does not directly write it to the storage area. Instead, it first determines that the sequence number of the first frame corresponding to the first data fragment in the cache is consecutive with the sequence number of at least one second frame corresponding to at least one second data fragment. Then, it retrieves the consecutive first data fragments and at least one second data fragment together and writes them to the storage area. On one hand, by temporarily caching subsequent fragments, the retransmission of the first protocol frame and the transmission of subsequent fragments can proceed in parallel, avoiding the blocking of subsequent data reception and caching due to waiting for retransmission, thus reducing overall transmission latency. On the other hand, by determining the continuity of frame sequence numbers before writing to the storage area, it ensures that only consecutive fragment sequences are written to disk, avoiding data errors or omissions caused by out-of-order fragment arrivals, thus guaranteeing the correctness and integrity of data written to disk. Furthermore, the receiving end triggers the sending end to retransmit only the target fragment that failed the verification by using a negative acknowledgment frame. This eliminates the need for the sending end to roll back the entire file or retransmit subsequent fragments that have been successfully received, significantly reducing the amount of invalid transmission and recovery latency, and improving transmission efficiency.

[0068] The following is combined Figure 2 This application provides an exemplary flow of a serial port data fragmentation transmission method according to embodiments of the present application. It is understood that... Figure 2 The exemplary process can be applied to the transmitting end, such as a field-programmable gate array (FPGA), and this application does not limit the type of transmitting end.

[0069] like Figure 2 As shown, the steps include the following.

[0070] S201: Split the data to be transmitted into multiple protocol frames.

[0071] The multiple protocol frames include a first protocol frame and at least one second protocol frame. The first protocol frame includes a data identifier of the data to be transmitted, a first frame sequence number, and a first data fragment. The at least one second protocol frame includes a data identifier, a second frame sequence number, and a second data fragment.

[0072] For example, the transmitting end is an FPGA and the receiving end is the industrial computing platform Orin, and the two communicate via UART serial port.

[0073] The FPGA transmitter includes a UART serial port data receiving thread, a UART serial port data sending thread, a serial port data parsing module, an RF configuration file framing and encapsulation module, a CRC32 generation module, and a NAK error retransmission module. The RF configuration file framing and encapsulation module opens the target configuration file, calculates the total number of frames based on a fixed number of bytes per frame, and encapsulates each frame into a protocol frame. It then calls the CRC32 generation module to calculate and backfill the CRC32 checksum of the entire frame.

[0074] For example, the FPGA transmitting side adopts a three-thread model: the UART serial port data receiving thread is responsible for reading the request frame or NAK error retransmission frame sent from the receiving end from the serial port address; the UART serial port data transmitting thread is responsible for sending the protocol frame and NAK retransmission target frame of the RF profile split and encapsulation; and the serial port data parsing module is responsible for identifying the request frame or NAK error retransmission frame.

[0075] For the field definitions of the protocol frame, please refer to the relevant descriptions in Table 1 above, which will not be repeated here.

[0076] S202: Send a first protocol frame and at least one second protocol frame to the receiving end.

[0077] For example, the sending end sends multiple protocol frames sequentially in ascending order of frame sequence number. The sending end can continue sending subsequent protocol frames without waiting for the receiving end to acknowledge the previous protocol frame. Regarding the behavior of the sending end in sending protocol frames, please refer to the relevant description in S103 above, which will not be repeated here.

[0078] S203: A negative acknowledgment frame was received from the receiving end. The negative acknowledgment frame is used to indicate that the first protocol frame verification failed.

[0079] For example, the negative acknowledgment frame is a NAK error retransmission frame, which contains the target file identifier and the target fragment frame sequence number. For the triggering conditions and frame structure of the negative acknowledgment frame, please refer to the relevant description in S102 above, which will not be repeated here.

[0080] S204: Retransmit the first protocol frame based on the negative response frame.

[0081] For example, the sending end, based on the file identifier and frame sequence number carried in the negative acknowledgment frame, only retransmits the first protocol frame that failed the verification; that is, it only retransmits the target fragment corresponding to the first protocol frame, without retransmitting the entire data to be transmitted (such as the entire RF configuration file) or other fragments that have been successfully received after the first frame. For the specific method by which the sending end responds to the negative acknowledgment frame and retransmits the target fragment, please refer to the relevant description in S105 above, which will not be repeated here.

[0082] In this embodiment, the sending end splits the data to be transmitted into multiple protocol frames and sends them sequentially. When a negative acknowledgment frame is received from the receiving end, the first protocol frame that failed verification is retransmitted based on the negative acknowledgment frame. On the one hand, the sending end can continue to send subsequent protocol frames without waiting for the receiving end to successfully acknowledge the previous protocol frame, reducing the interaction overhead on the low-speed serial port link and improving transmission efficiency. On the other hand, the sending end only retransmits the target fragment indicated by the negative acknowledgment frame, without rolling back the entire file or retransmitting other fragments that have been successfully received, significantly reducing the amount of invalid transmission and recovery latency.

[0083] Accordingly, this application provides a serial port data fragmentation transmission system, including a transmitter and a receiver.

[0084] The sending end is used to split the data to be transmitted into multiple protocol frames and send multiple protocol frames to the receiving end.

[0085] The receiving end is used to receive a first protocol frame from the sending end, send a negative acknowledgment frame to the sending end after the first protocol frame fails to be verified, receive at least one second protocol frame from the sending end and store at least one second data fragment in the buffer, receive the first protocol frame again and write the first data fragment into the buffer after successful verification, and determine that the first frame sequence number corresponding to the first data fragment in the buffer is consecutive to the at least one second frame sequence number corresponding to at least one second data fragment, and retrieve the first data fragment and at least one second data fragment from the buffer and write them into the storage area.

[0086] The sending end is also used to retransmit the first protocol frame based on the negative acknowledgment frame.

[0087] For example, the system is applied to an automotive millimeter-wave radar system, with an FPGA as the transmitter and an Orin industrial computing platform as the receiver. The Orin side serves as the RF profile request end and the file receiving and disk-writing end, while the FPGA side serves as the RF profile transmitter, with the RF profile directed to multiple radar chips or channels.

[0088] For example, taking an FPGA as the transmitting end, the transmitting end includes a UART serial port data receiving thread, a UART serial port data sending thread, a serial port data parsing module, an RF configuration file framing and encapsulation module, a CRC32 generation module, and a NAK error retransmission module.

[0089] The system comprises the following components: a UART serial port data receiving thread for reading request frames or NAK error retransmission frames sent from the Orin terminal from the serial port address; a UART serial port data sending thread for sending protocol frames split and encapsulated from the RF configuration file and NAK retransmission target frames; a serial port data parsing module for identifying request frames or NAK error retransmission frames; an RF configuration file framing and encapsulation module for opening the target configuration file, calculating the total number of frames according to a fixed number of bytes per frame, and encapsulating each frame into a protocol frame; a CRC32 generation module for calculating the CRC32 checksum of the entire frame and backfilling it into the encapsulation frame; and a NAK error retransmission module for extracting the file identifier and frame sequence number of the NAK error retransmission frame and re-calling the RF configuration file framing and encapsulation module to retransmit the protocol frame.

[0090] Taking Orin as the receiving end as an example, the receiving end includes a UART serial port data receiving thread, a UART serial port sending thread, an RF configuration request generation module, a serial port data parsing module, a CRC32 verification module, a NAK generation module, a data fragmentation buffer module, and a sequential disk write module.

[0091] The system comprises the following modules: a UART serial port data receiving thread for reading byte stream data sent by the FPGA from the serial port address and writing it to a circular data buffer; a UART serial port sending thread for sending request frames and NAK error retransmission frames; an RF configuration request generation module for generating RF configuration file request frames; a serial port data parsing module for segmenting the serial data stream into complete frames according to the frame identifier and data length; a CRC32 check module for calculating the CRC32 check value of the received complete frame and verifying whether it matches the CRC32 check value calculated by the sending end; a NAK generation module for locating error frames and enabling the sending end to retransmit error frames; a data fragmentation buffer module for generating a data buffer container based on the total number of frames and storing the segmented complete frames sequentially into the buffer container according to the next frame indicator cursor; and a sequential disk write module for writing the buffer container containing the complete frame sequence to disk and saving it as a file. For example, both the receiving and sending ends employ a three-thread model: the serial port receiving thread is only responsible for serial port reading and writing to the circular buffer; the protocol frame parsing thread is only responsible for frame header positioning, frame cutting, service type identification, CRC check, and task enqueueing; and the serial port sending thread is only responsible for retrieving requests from the thread-safe queue, sending data, or NAK retransmission tasks. This thread boundary ensures that serial port reading will not be blocked for extended periods by file packing, CRC calculation, NAK transmission, or disk write operations.

[0092] further, Figure 3 According to some embodiments of this application, a schematic diagram of the structure of an electronic device 100 (such as an example of a receiver or transmitter) is shown. Figure 3 As shown, the electronic device 100 includes one or more processors 101, system memory 102, non-volatile memory (NVM) 103, communication interface 104, input / output (I / O) device 105, and system control logic 106 for coupling the processor 101, system memory 102, non-volatile memory 103, communication interface 104 and input / output (I / O) device 105.

[0093] Wherein, processor 101 may include one or more processing units, such as processing modules or processing circuits that may include central processing units (CPUs), graphics processing units (GPUs), digital signal processors (DSPs), microprocessors (MCUs), AI (Artificial Intelligence) processors, or programmable logic devices (FPGAs), neural network processing units (NPUs), etc., and may include one or more single-core or multi-core processors. According to some embodiments, the processor is a superscalar processor.

[0094] System memory 102 is volatile memory, such as random-access memory (RAM), double data rate synchronous dynamic random-access memory (DDR SDRAM), etc. System memory is used for temporary storage of data and / or instructions.

[0095] The non-volatile memory 103 may include one or more tangible, non-transitory computer-readable media for storing data and / or instructions. In some embodiments, the non-volatile memory 103 may include any suitable non-volatile memory such as flash memory and / or any suitable non-volatile storage device, such as a hard disk drive (HDD), a compact disc (CD), a digital versatile disc (DVD), a solid-state drive (SSD), etc. In some embodiments, the non-volatile memory 103 may also be a removable storage medium, such as a Secure Digital (SD) memory card, etc.

[0096] Specifically, system memory 102 and non-volatile memory 103 may each include a temporary copy and a permanent copy of instruction 107. Instruction 107 may include, when executed by at least one of processors 101, causing electronic device 100 to implement the data processing methods provided in the embodiments of this application.

[0097] The communication interface 104 may include a transceiver for providing a wired or wireless communication interface for the electronic device 100, thereby enabling communication with any other suitable device via one or more networks. In some embodiments, the communication interface 104 may be integrated into other components of the electronic device 100, for example, the communication interface 104 may be integrated into the processor 101. In some embodiments, the electronic device 100 may communicate with other devices through the communication interface 104.

[0098] Input / output (I / O) device 105 can be an input device such as a keyboard or mouse, and an output device such as a monitor. Users can interact with electronic device 100 through input / output (I / O) device 105, such as inputting a neural network model to be run.

[0099] System control logic 106 may include any suitable interface controller to provide any suitable interface to other modules of electronic device 100. For example, in some embodiments, system control logic 106 may include one or more memory controllers to provide an interface to system memory 102 and non-volatile memory 103.

[0100] In some embodiments, at least one of the processors 101 may be packaged together with the logic of one or more controllers for system control logic 106 to form a system in package (SiP). In other embodiments, at least one of the processors 101 may also be integrated on the same chip with the logic of one or more controllers for system control logic 106 to form a system-on-chip (SoC).

[0101] Understandable. Figure 3 The structure of the electronic device 100 shown is merely an example. In other embodiments, the electronic device 100 may include more or fewer components than illustrated, or combine some components, or split some components, or have different component arrangements. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

[0102] It is understood that electronic device 100 can be any electronic device, including but not limited to mobile phones, wearable devices (such as smartwatches), tablets, desktops, laptops, handheld computers, notebook computers, ultra-mobile personal computers (UMPCs), netbooks, as well as cellular phones, personal digital assistants (PDAs), augmented reality (AR) / virtual reality (VR) devices, etc., which are not limited in the embodiments of this application.

[0103] Various embodiments of the mechanisms disclosed in this application can be implemented in hardware, software, firmware, or combinations of these implementation methods. Embodiments of this application can be implemented as computer programs or program code executable on a programmable system, the programmable system including at least one processor, a storage system (including volatile and non-volatile memory and / or storage elements), at least one input device, and at least one output device.

[0104] Program code can be applied to input instructions to execute the functions described in this application and generate output information. The output information can be applied to one or more output devices in a known manner. For the purposes of this application, the processing system includes any system having a processor such as, for example, a Digital Signal Processor (DSP), a microcontroller, an Application Specific Integrated Circuit (ASIC), or a microprocessor.

[0105] The program code can be implemented using a high-level procedural language or an object-oriented programming language to communicate with the processing system. Assembly language or machine language can also be used when needed. In fact, the mechanisms described in this application are not limited to any particular programming language. In either case, the language can be a compiled language or an interpreted language.

[0106] In some cases, the disclosed embodiments may be implemented in hardware, firmware, software, or any combination thereof. The disclosed embodiments may also be implemented as instructions carried or stored thereon on one or more temporary or non-temporary machine-readable (e.g., computer-readable) storage media, which may be read and executed by one or more processors. For example, the instructions may be distributed via a network or through other computer-readable media. Therefore, machine-readable media may include any mechanism for storing or transmitting information in a machine-readable (e.g., computer-readable) form, including but not limited to floppy disks, optical disks, CD-ROMs, magneto-optical disks, read-only memory (ROM), random access memory (RAM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), magnetic cards or optical cards, flash memory, or tangible machine-readable storage for transmitting information (e.g., carrier waves, infrared signals, digital signals, etc.) using the Internet in the form of electrical, optical, acoustic, or other forms of propagated signals. Therefore, machine-readable media include any type of machine-readable medium suitable for storing or transmitting electronic instructions or information in a machine-readable (e.g., computer-readable) form.

[0107] Accordingly, this application provides an electronic device, including a memory and a processor. The memory is used to store instructions, and the processor is used to execute the instructions to cause the electronic device to perform any of the serial port data fragmentation transmission methods described above.

[0108] Accordingly, this application provides a readable storage medium storing instructions, which, when executed on an electronic device, cause the electronic device to perform any of the above-mentioned serial port data fragmentation transmission methods.

[0109] Accordingly, this application provides a computer program product, which includes computer instructions that, when executed by an electronic device, cause the serial port data fragmentation transmission method described above to be implemented.

[0110] In the accompanying drawings, some structural or methodological features may be shown in a specific arrangement and / or order. However, it should be understood that such a specific arrangement and / or order may not be necessary. Rather, in some embodiments, these features may be arranged in a manner and / or order different from that shown in the illustrative drawings. Furthermore, the inclusion of structural or methodological features in a particular figure does not imply that such features are required in all embodiments, and in some embodiments, these features may be omitted or may be combined with other features.

[0111] It should be noted that all units / modules mentioned in the device embodiments of this application are logical units / modules. Physically, a logical unit / module can be a physical unit / module, a part of a physical unit / module, or a combination of multiple physical units / modules. The physical implementation of these logical units / modules themselves is not the most important factor; the combination of functions implemented by these logical units / modules is the key to solving the technical problems proposed in this application. Furthermore, to highlight the innovative aspects of this application, the above-described device embodiments of this application have not introduced units / modules that are not closely related to solving the technical problems proposed in this application. This does not mean that the above-described device embodiments do not contain other units / modules.

[0112] It should be noted that, in the examples and specification of this patent, the terms "comprising," "including," or any other variations thereof are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one" does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0113] Although this application has been illustrated and described with reference to certain preferred embodiments thereof, those skilled in the art should understand that various changes in form and detail may be made thereto without departing from the spirit and scope of this application.

Claims

1. A method for serial port data fragmentation transmission, characterized in that, Applied to the receiving end, including: A first protocol frame is received from the sending end, wherein the first protocol frame is one of a plurality of protocol frames corresponding to the data to be transmitted, and the first protocol frame includes the data identifier of the data to be transmitted, the first frame sequence number, and the first data fragment; If the verification of the first protocol frame fails, a negative response frame is sent to the sending end. At least one second protocol frame is received from the sending end, wherein the at least one second protocol frame belongs to the plurality of protocol frames, and each second protocol frame includes the data identifier, a second frame sequence number and a second data fragment, wherein the second frame sequence number is after the first frame sequence number; If the verification of at least one second protocol frame is successful, at least one second data fragment is stored in the cache. The first protocol frame is received again from the sender; If the first protocol frame is successfully verified upon being received again, the first data fragment is written into the buffer. If the sequence number of the first frame corresponding to the first data fragment in the cache is determined to be consecutive with the sequence number of at least one second frame corresponding to at least one second data fragment, the first data fragment and the at least one second data fragment in the cache are retrieved and written into the storage area.

2. The serial port data fragmentation transmission method according to claim 1, characterized in that, Verification of the first protocol frame or the second protocol frame includes: Obtain the first checksum value from the checksum field of the protocol frame; The second check value is obtained by calculating the check value of the protocol frame after removing the check field. The protocol frame is verified by comparing the first check value and the second check value.

3. The serial port data fragmentation transmission method according to claim 1, characterized in that, Also includes: Determine if there is a protocol frame corresponding to a missing frame sequence number; A data recovery request is sent to the sending end, the data recovery request including the missing frame sequence number.

4. The serial port data fragmentation transmission method according to claim 1, characterized in that, The data to be transmitted is the radio frequency configuration file of the radar chip.

5. The serial port data fragmentation transmission method according to any one of claims 1 to 4, characterized in that, The transmitting end is a field-programmable gate array (FPGA), and the receiving end is an industrial computing platform.

6. A method for serial port data fragmentation transmission, characterized in that, Applied to the sending end, including: The data to be transmitted is split into multiple protocol frames, the multiple protocol frames including a first protocol frame and at least one second protocol frame. The first protocol frame includes a data identifier of the data to be transmitted, a first frame sequence number and a first data fragment. The at least one second protocol frame includes the data identifier, a second frame sequence number and a second data fragment. Send the first protocol frame and at least one second protocol frame to the receiving end; A negative response frame is received from the receiving end, the negative response frame being used to indicate that the first protocol frame verification failed; The first protocol frame is retransmitted based on the negative response frame.

7. A serial port data fragmentation transmission system, characterized in that, Includes the sending end and the receiving end; The sending end is used to split the data to be transmitted into multiple protocol frames and send the multiple protocol frames to the receiving end. The receiving end is configured to receive a first protocol frame from the sending end, send a negative acknowledgment frame to the sending end after the first protocol frame fails to be verified, receive at least one second protocol frame from the sending end and store at least one second data fragment in a buffer, receive the first protocol frame again and write the first data fragment into the buffer after successful verification, and determine that the first frame sequence number corresponding to the first data fragment in the buffer is consecutive to the at least one second frame sequence number corresponding to at least one second data fragment, and retrieve the first data fragment and the at least one second data fragment from the buffer and write them into the storage area. The sending end is also used to retransmit the first protocol frame according to the negative response frame.

8. An electronic device, characterized in that, include: Memory, processor; The memory is used to store instructions, and the processor is used to execute the instructions to cause the electronic device to perform the method of any one of claims 1 to 6.

9. A readable storage medium, characterized in that, The readable storage medium stores instructions that, when executed on an electronic device, cause the electronic device to perform the method of any one of claims 1 to 6.

10. A computer program product, characterized in that, The computer program product includes computer instructions that, when executed by an electronic device, cause the method of any one of claims 1 to 6 to be implemented.

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