Multi-camera cooperative processing circuit, method

Abstract

The application relates to a multi-camera cooperative processing circuit and method. The circuit comprises a deserializing unit, a master computing power unit and a slave computing power unit, an analog switch unit and a control unit. The deserializing unit comprises a plurality of serial link interfaces, at least part of the serial link interfaces are respectively connected with cameras, two serial interfaces are respectively connected with serial link interfaces of the master computing power unit and the slave computing power unit, circuit bus interfaces of the master computing power unit and the slave computing power unit are connected with passage interfaces of the analog switch unit, serial peripheral interfaces of the master computing power unit and the slave computing power unit are connected with serial peripheral interfaces of the control unit, and selection pins of the analog switch unit are connected with first general-purpose input / output interfaces of the control unit. Through the above-mentioned circuit, hardware-level master-slave computing power unit data link parallel redundancy can be realized, the master computing power unit can be automatically switched to the slave computing power unit when a fault occurs in the master computing power unit, millisecond-level hardware switching can be realized, and the reliability of the circuit is improved.

Description

Technical Field

[0001] This application relates to the field of visual data processing technology, and in particular to multi-camera collaborative processing circuits and methods. Background Technology

[0002] A multi-camera system is an integrated platform composed of multiple cameras and supporting equipment. It is mainly used in fields such as 3D (three-dimensional) reconstruction, motion capture, multi-view video and autonomous driving. The multi-camera system has flexible configuration and supports various construction methods such as dual cameras, 8-camera parallel arrays, 32-camera ring arrays and 64-camera spherical arrays, which are suitable for industrial inspection, automobile manufacturing, film and television production and other scenarios.

[0003] In fields such as autonomous driving and machine vision, multi-camera systems are typically required to process image data. However, these technologies suffer from a single computing power link, meaning that when the main computing unit fails, the secondary computing units cannot automatically take over the data link, leading to system crashes.

[0004] Therefore, it is urgent to design a hardware-level master-slave computing power redundancy switching structure to achieve dynamic backup of data and control links. Summary of the Invention

[0005] To address or partially address the problems existing in related technologies, this application provides a multi-camera collaborative processing circuit and method that can achieve hardware-level parallel redundancy of data links between master and slave computing units, and automatically switch to slave computing units when the master computing unit fails.

[0006] The first aspect of this application provides a multi-camera collaborative processing circuit, comprising a deserialization unit, a master computing unit, slave computing units, an analog switching unit, and a control unit (MCU); wherein: The deserialization unit includes multiple serial link GMSL2 interfaces, at least some of which are connected to cameras respectively, and two serial CSI-2 interfaces are connected to the CSI-2 interface of the main computing unit and the CSI-2 interface of the slave computing unit respectively. The circuit bus IIC interface of the main computing unit and the slave computing unit is connected to the path interface of the analog switch unit, and the serial peripheral SPI interface of the main computing unit and the slave computing unit is connected to the SPI interface of the MCU. The select pin (SEL) of the analog switch unit is connected to the first general purpose input / output (GPIO) interface of the MCU.

[0007] In some implementations, the IIC interface of the deserialization unit is connected to the common port of the analog switch unit.

[0008] In some implementations, multiple multi-function MFP pins of the deserialization unit are respectively connected to multiple second GPIO interfaces of the MCU.

[0009] In some embodiments, the path interface of the analog switch unit includes a first path interface of a first path and a second path interface of a second path. The IIC interface of the main computing unit is connected to the first path interface of the analog switch unit, and the IIC interface of the slave computing unit is connected to the second path interface of the analog switch unit.

[0010] In some implementations, the SPI interface of the MCU includes a first SPI interface and a second SPI interface. The first SPI interface of the MCU is connected to the SPI interface of the main computing unit, and the second SPI interface of the MCU is connected to the SPI interface of the slave computing unit.

[0011] A second aspect of this application provides a multi-camera collaborative processing method. The method is applied to the aforementioned multi-camera collaborative processing circuit, and the method includes: The MCU outputs a low-level signal to the SEL pin of the analog switch unit through the first GPIO interface, connecting the common port of the analog switch unit with the first path interface, so that the deserialization unit can communicate with the main computing unit; The main computing unit sends status data representing the main computing unit to the first SPI interface of the MCU via the SPI interface; the MCU determines the status of the main computing unit based on the status data. When a fault is detected in the main computing unit, the first SPI interface of the MCU is interrupted; The MCU flips the level of the first GPIO interface to connect the common port of the analog switch unit with the second path interface, so that the deserialization unit can communicate with the slave computing unit; The MCU configures the SPI interface of the slave computing unit through the second SPI interface.

[0012] In some embodiments, the method further includes: When the load of the main computing unit is determined, the MCU flips the level of the first GPIO interface to connect the common port of the analog switch unit with the second path interface, so that the deserialization unit can communicate with the slave computing unit. The MCU configures some cameras and the slave computing unit through the second SPI interface.

[0013] In some embodiments, the method further includes: The status data representing the slave computing unit is sent from the SPI interface of the slave computing unit to the second SPI interface of the MCU. The MCU determines the status of the slave computing unit based on the status data.

[0014] In some implementations, the switching logic of the analog switch unit is to disconnect first and then connect.

[0015] In some implementations, the status data includes a fault flag bit and a load flag bit.

[0016] The technical solution provided in this application may include the following beneficial results: This application provides a multi-camera collaborative processing circuit, including a deserialization unit, a master computing unit, a slave computing unit, an analog switch unit, and a control unit (MCU). The deserialization unit includes multiple GMSL2 interfaces, at least some of which are connected to cameras. Two CSI-2 interfaces are connected to the CSI-2 interfaces of the master and slave computing units, respectively. The IIC interfaces of the master and slave computing units are connected to the path interfaces of the analog switch unit, and the SPI interfaces of the master and slave computing units are connected to the SPI interface of the MCU. The SEL pin of the analog switch unit is connected to the first GPIO interface of the MCU. This circuit enables hardware-level parallel redundancy of the master and slave computing unit data links, automatically switching to the slave computing unit when the master computing unit fails, achieving millisecond-level hardware switching and improving circuit reliability.

[0017] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and do not limit this application. Attached Figure Description

[0018] The above and other objects, features and advantages of this application will become more apparent from the more detailed description of exemplary embodiments thereof in conjunction with the accompanying drawings, wherein the same reference numerals generally represent the same components in the exemplary embodiments thereof.

[0019] Figure 1 This is a schematic diagram of the structure of the multi-camera collaborative processing circuit shown in the embodiments of this application; Figure 2 This is a schematic flowchart illustrating a multi-camera collaborative processing method according to an embodiment of this application; Figure 3 This is a schematic diagram of the structure of an electronic device shown in an embodiment of this application. Detailed Implementation

[0020] Embodiments of this application will now be described in more detail with reference to the accompanying drawings. While embodiments of this application are shown in the drawings, it should be understood that this application may be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided to make this application more thorough and complete, and to fully convey the scope of this application to those skilled in the art.

[0021] The terminology used in this application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The singular forms “a,” “the,” and “the” used in this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used herein refers to and includes any or all possible combinations of one or more of the associated listed items.

[0022] It should be understood that although the terms "first," "second," "third," etc., may be used in this application to describe various information, this information should not be limited to these terms. These terms are only used to distinguish information of the same type from one another. For example, without departing from the scope of this application, first information may also be referred to as second information, and similarly, second information may also be referred to as first information. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0023] In fields such as autonomous driving and machine vision, multi-camera systems are typically required to process image data. However, these technologies suffer from a single computing power link; when the main computing unit fails, the slave computing units cannot automatically take over the data link, leading to system crashes. Therefore, there is an urgent need to design a hardware-level master-slave computing power redundancy switching structure to achieve dynamic backup of data and control links.

[0024] To address the aforementioned issues, this application provides a multi-camera collaborative processing circuit that enables hardware-level parallel redundancy of the master-slave computing unit data links, automatically switching to the slave computing unit when the master computing unit fails.

[0025] The technical solutions of the embodiments of this application are described in detail below with reference to the accompanying drawings.

[0026] Figure 1 This is a schematic diagram of the structure of the multi-camera collaborative processing circuit shown in the embodiments of this application.

[0027] See Figure 1 The multi-camera collaborative processing circuit includes a deserialization unit 110, a main computing unit 120, a slave computing unit 130, an analog switching unit 140, and a control unit MCU 150, wherein: The deserialization unit 110 includes multiple serial link GMSL2 interfaces 111, at least some of the serial link GMSL2 interfaces 111 are respectively connected to the camera 160, and two serial CSI-2 interfaces 112 are respectively connected to the CSI-2 interface 121 of the main computing unit 120 and the CSI-2 interface 131 of the slave computing unit 130. The circuit bus IIC interface of the main computing unit 120 and the slave computing unit 130 is connected to the path interface of the analog switch unit 140, and the serial peripheral SPI interface of the main computing unit 120 and the slave computing unit 130 is connected to the SPI interface 151 of the MCU 150. The select SEL pin 141 of the analog switch unit 140 is connected to the first general purpose input / output (GPIO) interface 152 of the MCU 150. To address the issue of a single computing power link in related technologies, this application presents a multi-camera collaborative processing circuit, comprising a deserialization unit 110, a main computing power unit 120, a slave computing power unit 130, an analog switch unit 140, and a control unit MCU 150.

[0028] In specific implementation, the deserialization unit 110 can be equipped with the MAX96712 decoding chip. The MAX96712 decoding chip has four GMSL (Gigabit Multimedia Serial Link) interfaces 111, specifically GMSL2 PORTA, GMSL2 PORTB, GMSL2 PORTC, and GMSL2 PORTD. In one example, GMSL2 PORTA, GMSL2 PORTB, GMSL2 PORTC, and GMSL2 PORTD are respectively connected to four independent cameras 160 with GMSL interfaces, including camera 1, camera 2, camera 3, and camera 4. Cameras 1-4 are connected to the four GMSL2 interfaces 111 of the deserialization unit 110 via GMSL cables, and other signal connections are made via PCB (Printed Circuit Board) traces. It should be noted that although the deserialization unit 110 in this embodiment has 4 GMSL2 interfaces, it can flexibly connect 2 to 4 cameras according to the actual scenario. Unused interfaces can be reserved or left floating to adapt to the configuration requirements of different vehicle models or vision systems. The deserialization unit 110 can fuse the signals of the four independent GMSL2 interfaces into a single CSI-2 (Camera Serial Interface 2, the camera serial interface standard defined by the MIPI Alliance) data stream, and at the same time copy and output the CSI-2 data stream to two physical layer serial CSI-2 interfaces 112. The two physical layer serial CSI-2 interfaces 112 include CSI-2 PORTA and CSI-2 PORTB. CSI-2 PORTA is connected to the CSI-2 interface 121 of the main computing unit as the default channel, and CSI-2 PORTB is connected to the CSI-2 interface 131 of the slave computing unit 130 as a redundant channel. The dual CSI-2 interface outputs of the deserialization unit 110 provide a physical link foundation for hardware redundancy. Through 4 GMSL2 interfaces and 2 CSI-2 interfaces, it can be adapted to multi-camera scenarios, reducing wiring complexity.

[0029] The IIC (Inter-Integrated Circuit) interface of the main computing unit 120 and the slave computing unit 130 is connected to the path interface of the analog switch unit 140, and is connected to the deserialization unit 110 through the channel selection function of the analog switch unit 140 for configuring camera parameters. The SPI (Serial Peripheral Interface) interface of the main computing unit 120 and the slave computing unit 130 is connected to the SPI interface 151 of the MCU 150. The main computing unit 120 and the slave computing unit 130 are designed with a symmetrical structure, both equipped with CSI-2, IIC, and SPI interfaces. The hardware structure is completely reused. Furthermore, both the main and slave computing units 120 and 130 have status feedback functions, feeding back their own status, such as load and fault signals, to the MCU 150 via the SPI interface. Both the main and slave computing units integrate status registers (such as the built-in fault flag in a GPU), outputting 8-bit status data to the MCU 150 via the SPI interface. Bit 0 reflects the fault condition, and bit 1 reflects the overload condition. The main computing unit 120 and slave computing unit 130 can be constructed using an ORIN (an autonomous driving chip) computing system.

[0030] The analog switch unit 140 can be equipped with a TMUX121 chip to switch the IIC channel selection between the master computing unit 120, the slave computing unit 130, and the deserialization unit 110. The internal channel design prioritizes disconnection before connection to prevent simultaneous conduction of master and slave control channels. The SEL (Select) pin 141 of the analog switch unit 140 is connected to the first general-purpose input / output (GPIO) interface (GPIO5) 152 of the MCU 150. When the first GPIO interface 152 outputs a low level, the master computing unit 120 is connected to the deserialization unit 110; when the first GPIO interface 152 outputs a high level, the slave computing unit 130 is connected to the deserialization unit 110. The MCU 150 can be equipped with a TC397 chip to monitor the status data of the master / slave computing units in real time. The first GPIO interface 152 is configured in hardware-triggered mode, controlling the SEL pin 141 of the analog switch unit 140. Upon detecting a fault in the main computing unit, it immediately toggles the level, triggering a switchover. The switching logic of the analog switch unit 140 is a break-before-make logic. The analog switch unit 140 is designed with level triggering and break-before-make logic to ensure no signal conflicts during link switching. The master / slave computing units are connected to the deserialization unit 110 and MCU150 via CSI-2, IIC, and SPI interfaces. Working in conjunction with the level-controlled switching structure of the analog switch unit 140, dynamic scheduling of computing links is achieved, realizing dynamic load redundancy. The MCU150 performs unified control via the GPIO and SPI interfaces, simplifying the SEL pin level switching logic of the analog switch unit 140 and reducing software dependency.

[0031] In an optional embodiment of this application, the IIC interface 113 of the deserialization unit 110 is connected to the common port 142 of the analog switch unit 140.

[0032] The IIC interface 113 of the deserialization unit 110 is connected to the common port 142 of the analog switch unit 140. Specifically, the IIC interface 113 of the deserialization unit 110 includes an SDA (Serial Data Line) signal interface and an SCL (Serial Clock Line) signal interface. The common port 142 of the analog switch unit 140 includes a D1 port and a D2 port. The SDA signal interface and the SCL signal interface of the deserialization unit 110 are connected to the D1 port and the D2 port, respectively.

[0033] In an optional embodiment of this application, the multiple multi-function MFP pins 114 of the deserialization unit 110 are respectively connected to the multiple second GPIO interfaces 153 of the MCU 150.

[0034] The deserialization unit 110 also has multiple multi-function pins 114. In one example, there are four MFP pins 114: MFP0, MFP1, MFP2, and MFP3. The MCU 150 also has multiple second GPIO interfaces 153. In one example, there are four second GPIO interfaces 153: GPIO1, GPIO2, GPIO3, and GPIO4. The multiple multi-function pins 114 of the deserialization unit 110 are connected one-to-one with the multiple second GPIO interfaces 153 of the MCU 150. The signals output from the multiple second GPIO interfaces 153 of the MCU 150 can be used as exposure trigger synchronization signals for multiple cameras.

[0035] In an optional embodiment of this application, the analog switch unit 140 has a first channel interface 143 and a second channel interface 144. The IIC interface 122 of the main computing unit 120 is connected to the first channel interface 143 of the analog switch unit 140, and the IIC interface 132 of the slave computing unit 130 is connected to the second channel interface 144 of the analog switch unit 140.

[0036] The analog switch unit 140 has two paths: a first path and a second path. The path interfaces include a first path interface 143 (S1A / S2A) for the first path and a second path interface 144 (S1B / S2B) for the second path. The IIC interface 122 of the main computing unit 120 includes an SDA signal interface and an SCL signal interface. S1A and S2A in the first path interface 143 are connected to the SDA signal interface and SCL signal interface in the IIC interface 122 of the main computing unit 120, respectively. The IIC interface 132 of the slave computing unit 130 includes an SDA signal interface and an SCL signal interface. S1B and S2B in the second path interface 144 are connected to the SDA signal interface and SCL signal interface in the IIC interface 132 of the slave computing unit 130, respectively.

[0037] In an optional embodiment of this application, the SPI interface of the MCU150 includes a first SPI interface 154 and a second SPI interface 155. The first SPI interface 154 of the MCU150 is connected to the SPI interface 123 of the main computing unit 120, and the second SPI interface 155 of the MCU is connected to the SPI interface 133 of the slave computing unit 130.

[0038] The SPI interface of MCU150 includes a first SPI interface 154 and a second SPI interface 155. The first SPI interface 154 of MCU150 is connected to the SPI interface 123 of the master computing unit 120, and the second SPI interface 155 of MCU150 is connected to the SPI interface 133 of the slave computing unit 130. By default, the second SPI interface 155 of MCU150 is configured to interrupt. MCU150 can receive status data from the master computing unit 120 and the slave computing unit 130 respectively through the first SPI interface 154 and the second SPI interface 155, and monitor the status of the master computing unit 120 and the slave computing unit 130, such as hardware-level signals like load and fault. Both the master computing unit 120 and the slave computing unit 130 integrate status registers (such as the built-in fault flag bit of the GPU), and output 8-bit status data to MCU150 through the SPI interface, where bit 0 reflects the fault condition and bit 1 reflects the overload condition. The MCU150 can directly read the status data of the master computing unit 120 and the slave computing unit through the SPI interface without polling, which can reduce the fault response delay to less than 1ms.

[0039] This application provides a multi-camera collaborative processing circuit, including a deserialization unit, a master computing unit, a slave computing unit, an analog switch unit, and a control unit (MCU). The deserialization unit includes multiple GMSL2 interfaces, at least some of which are connected to cameras. Two CSI-2 interfaces are connected to the CSI-2 interfaces of the master and slave computing units, respectively. The IIC interfaces of the master and slave computing units are connected to the path interfaces of the analog switch unit, and the SPI interfaces of the master and slave computing units are connected to the SPI interface of the MCU. The SEL pin of the analog switch unit is connected to the first GPIO interface of the MCU. This circuit enables hardware-level parallel redundancy of the master and slave computing unit data links, automatically switching to the slave computing unit when the master unit fails, achieving millisecond-level hardware switching and improving circuit reliability.

[0040] Corresponding to the aforementioned circuit embodiments, this application also provides a multi-camera collaborative processing method, an electronic device, and corresponding embodiments.

[0041] Figure 2 This is a flowchart illustrating a multi-camera collaborative processing method according to an embodiment of this application.

[0042] See Figure 2 The multi-camera collaborative processing method is applied to a multi-camera collaborative processing circuit, and the method includes: Step 210: The MCU outputs a low-level signal to the SEL pin of the analog switch unit through the first GPIO interface, connecting the common port of the analog switch unit with the first path interface, so that the deserialization unit can communicate with the main computing unit.

[0043] The multi-camera collaborative processing method provided in this application is applied to a multi-camera collaborative processing circuit, which includes: a deserialization unit, a master computing unit, a slave computing unit, an analog switching unit, and a control unit (MCU). The deserialization unit includes multiple serial link GMSL2 interfaces, at least some of which are connected to cameras. Two serial CSI-2 interfaces are connected to the CSI-2 interfaces of the master and slave computing units, respectively. The IIC interfaces of the master and slave computing units are connected to the path interfaces of the analog switching unit. The SPI interfaces of the master and slave computing units are connected to the SPI interface of the MCU. The SEL pin of the analog switching unit is connected to the first general-purpose input / output (GPIO) interface of the MCU. The IIC interface of the deserialization unit is connected to the common port of the analog switching unit. Multiple multi-function MFP pins of the deserialization unit are connected to multiple second GPIO interfaces of the MCU. The analog switch unit has several interfaces, including a first-path interface for the first path and a second-path interface for the second path. The IIC interface of the main computing unit is connected to the first-path interface of the analog switch unit, and the IIC interface of the slave computing unit is connected to the second-path interface of the analog switch unit. The MCU's SPI interface includes a first SPI interface and a second SPI interface. The first SPI interface of the MCU is connected to the SPI interface of the main computing unit, and the second SPI interface of the MCU is connected to the SPI interface of the slave computing unit.

[0044] When the multi-camera collaborative processing circuit is working normally, the MCU controls the main computing unit to work. The MCU outputs a low-level signal to the SEL pin of the analog switch unit through the first GPIO interface, SEL=0, connecting the common port of the analog switch unit with the first path interface, thus turning on the first path. The first path interface of the analog switch unit is connected to the IIC interface of the main computing unit. The main computing unit receives data through the CSI-2 interface (CSI-2 PORTA) of the deserialization unit, so that the deserialization unit can communicate with the main computing unit.

[0045] Step 220: Send status data representing the main computing unit to the first SPI interface of the MCU through the SPI interface of the main computing unit; the MCU determines the status of the main computing unit through the status data.

[0046] The SPI interface of the main computing unit sends status data representing the main computing unit to the first SPI interface of the MCU. The MCU determines the status of the main computing unit, such as normal, fault, or load, based on the status data.

[0047] In an optional embodiment of this application, the status data includes a fault flag bit and a load flag bit.

[0048] The status data is 8 bits, including a fault flag and a load flag. Bit 0 reflects the fault status, and bit 1 reflects the overload status. For example, if bit 0 = 0, it can be confirmed that the main computing unit is in a normal state; if bit 0 = 1, it can be confirmed that the main computing unit is in a fault state; if bit 1 = 1, it can be confirmed that the main computing unit is in a load state.

[0049] Step 230: When it is determined that the main computing unit has failed, the first SPI interface of the MCU is interrupted.

[0050] If a fault is detected in the main computing unit, i.e., bit 0=1 in the status data, then the first SPI interface of the MCU is interrupted.

[0051] Step 240: The MCU flips the level of the first GPIO interface to connect the common port of the analog switch unit with the second path interface, so that the deserialization unit can communicate with the slave computing unit.

[0052] The MCU flips the level of the first GPIO interface, causing the first GPIO interface to output a high-level signal. The SEL pin of the analog switch unit also becomes high, SEL=1, connecting the common port of the analog switch unit with the second path interface, thus turning on the second path. The second path interface of the analog switch unit is connected to the IIC interface of the slave computing unit. The slave computing unit receives data through the CSI-2 interface (CSI-2 PORTB) of the deserialization unit, enabling the deserialization unit to communicate with the slave computing unit.

[0053] In an optional embodiment of this application, the switching logic of the analog switch unit is to disconnect first and then connect.

[0054] The analog switch unit is designed with level triggering and a break-before-make mechanism to ensure no signal conflict when switching links.

[0055] Step 250: The MCU configures the SPI interface of the computing unit through the second SPI interface.

[0056] The MCU configures the SPI interface of the computing unit through the second SPI interface.

[0057] In an optional embodiment of this application, the method further includes: By sending status data representing the computing unit from the computing unit's SPI interface to the MCU's second SPI interface, The MCU determines the status of the computing unit by using status data.

[0058] The slave computing unit can also send its status data to the MCU via the SPI interface. The MCU uses this status data to determine the slave computing unit's status, such as normal, fault, or load. The deserialization unit maintains dual-channel output via the CSI-2 interface, ensuring that the slave computing unit can read data from the second channel in real time.

[0059] In an optional embodiment of this application, the method further includes: When the load of the main computing unit is determined, the MCU flips the level of the first GPIO interface to connect the common port of the analog switch unit with the second path interface, so that the deserialization unit can communicate with the slave computing unit. The MCU configures some cameras and slave computing units through the second SPI interface.

[0060] If the load of the main computing unit is determined, i.e., bit1=1 in the status data, the MCU actively toggles the level of the first GPIO interface, causing the first GPIO interface to output a high-level signal. The SEL pin of the analog switch unit also becomes high, SEL=1, connecting the common port of the analog switch unit with the second path interface, thus opening the second path. The second path interface of the analog switch unit is then connected to the IIC interface of the slave computing unit.

[0061] The MCU configures some cameras and slave computing units through the second SPI interface. In one example, cameras 1 and 2 can be processed by the master computing unit and cameras 3 and 4 can be processed by the slave computing unit. Alternatively, cameras 1-4 can all be processed by the slave computing unit, thereby achieving dynamic load redundancy between the master and slave computing units.

[0062] This application provides a multi-camera collaborative processing method, including: an MCU outputting a low-level signal to the SEL pin of an analog switch unit via a first GPIO interface, connecting the common port of the analog switch unit with a first path interface to enable communication between the deserialization unit and the master computing unit; sending status data representing the master computing unit to the first SPI interface of the MCU via the SPI interface of the master computing unit; the MCU determining the status of the master computing unit based on the status data; when a fault is detected in the master computing unit, interrupting the first SPI interface of the MCU toggling the level of the first GPIO interface, connecting the common port of the analog switch unit with a second path interface to enable communication between the deserialization unit and the slave computing unit; and the MCU configuring the SPI interface of the slave computing unit via a second SPI interface. This method enables hardware-level parallel redundancy of the master and slave computing unit data links, automatically switching to the slave computing unit when the master computing unit fails, achieving millisecond-level hardware switching and improving circuit reliability.

[0063] Figure 3 This is a schematic diagram of the structure of an electronic device shown in an embodiment of this application.

[0064] See Figure 3 The electronic device 300 includes a memory 310 and a processor 320.

[0065] The processor 320 can be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or any conventional processor. Memory 310 may include various types of storage units, such as system memory, read-only memory (ROM), and permanent storage devices. ROM may store static data or instructions required by processor 320 or other modules of the computer. Permanent storage devices may be read-write storage devices. Permanent storage devices may be non-volatile storage devices that retain stored instructions and data even when the computer is powered off. In some embodiments, permanent storage devices use mass storage devices (e.g., magnetic or optical disks, flash memory) as permanent storage devices. In other embodiments, permanent storage devices may be removable storage devices (e.g., floppy disks, optical drives). System memory may be a read-write storage device or a volatile read-write storage device, such as dynamic random access memory. System memory may store some or all of the instructions and data required by the processor during operation. Furthermore, memory 310 may include any combination of computer-readable storage media, including various types of semiconductor memory chips (e.g., DRAM, SRAM, SDRAM, flash memory, programmable read-only memory), and disks and / or optical disks may also be used. In some embodiments, memory 310 may include a removable storage device that is readable and / or writable, such as a laser disc (CD), a read-only digital multifunction optical disc (e.g., DVD-ROM, dual-layer DVD-ROM), a read-only Blu-ray disc, an ultra-high density optical disc, a flash memory card (e.g., SD card, mini SD card, Micro-SD card, etc.), a magnetic floppy disk, etc. Computer-readable storage media do not contain carrier waves or transient electronic signals transmitted wirelessly or via wired connections.

[0066] The memory 310 stores executable code, which, when processed by the processor 320, can cause the processor 320 to execute part or all of the methods described above.

[0067] Furthermore, the method according to this application can also be implemented as a computer program or computer program product, which includes computer program code instructions for performing some or all of the steps in the method described above.

[0068] Alternatively, this application may be implemented as a computer-readable storage medium (or a non-transitory machine-readable storage medium or a machine-readable storage medium) storing executable code (or computer program or computer instruction code) that, when executed by a processor of an electronic device (or server, etc.), causes the processor to perform part or all of the steps of the methods described above according to this application.

[0069] This application also provides a computer program product, which includes computer instructions that, when executed by a processor, implement the method described above.

[0070] The various embodiments of this application have been described above. These descriptions are exemplary and not exhaustive, nor are they limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is chosen to best explain the principles, practical application, or improvement of the technology in the market, or to enable others skilled in the art to understand the embodiments disclosed herein.

Claims

1. A multi-camera collaborative processing circuit, characterized in that, The multi-camera collaborative processing circuit includes a deserialization unit, a main computing unit, a slave computing unit, an analog switching unit, and a control unit (MCU); wherein: The deserialization unit includes multiple serial link GMSL2 interfaces, at least some of which are connected to cameras, and two serial CSI-2 interfaces are connected to the CSI-2 interface of the main computing unit and the CSI-2 interface of the slave computing unit, respectively. The circuit bus IIC interface of the main computing unit and the slave computing unit is connected to the path interface of the analog switch unit, and the serial peripheral SPI interface of the main computing unit and the slave computing unit is connected to the SPI interface of the MCU. The select pin (SEL) of the analog switch unit is connected to the first general purpose input / output (GPIO) interface of the MCU.

2. The multi-camera collaborative processing circuit according to claim 1, characterized in that, The IIC interface of the deserialization unit is connected to the common port of the analog switch unit.

3. The multi-camera collaborative processing circuit according to claim 1, characterized in that, The multiple multi-function MFP pins of the deserialization unit are respectively connected to the multiple second GPIO interfaces of the MCU.

4. The multi-camera collaborative processing circuit according to claim 1, characterized in that, The analog switch unit has a path interface including a first path interface for a first path and a second path interface for a second path. The IIC interface of the main computing unit is connected to the first path interface of the analog switch unit, and the IIC interface of the slave computing unit is connected to the second path interface of the analog switch unit.

5. The multi-camera collaborative processing circuit according to claim 1, characterized in that, The SPI interface of the MCU includes a first SPI interface and a second SPI interface. The first SPI interface of the MCU is connected to the SPI interface of the main computing unit, and the second SPI interface of the MCU is connected to the SPI interface of the slave computing unit.

6. A multi-camera collaborative processing method, characterized in that, The method is applied to the multi-camera collaborative processing circuit according to any one of claims 1-5, and the method includes: The MCU outputs a low-level signal to the SEL pin of the analog switch unit through the first GPIO interface, connecting the common port of the analog switch unit with the first path interface, so that the deserialization unit can communicate with the main computing unit; The main computing unit sends status data representing the main computing unit to the first SPI interface of the MCU via the SPI interface; the MCU determines the status of the main computing unit based on the status data. When a fault is detected in the main computing unit, the first SPI interface of the MCU is interrupted; The MCU flips the level of the first GPIO interface to connect the common port of the analog switch unit with the second path interface, so that the deserialization unit can communicate with the slave computing unit; The MCU configures the SPI interface of the slave computing unit through the second SPI interface.

7. The method according to claim 6, characterized in that, The method further includes: When the load of the main computing unit is determined, the MCU flips the level of the first GPIO interface to connect the common port of the analog switch unit with the second path interface, so that the deserialization unit can communicate with the slave computing unit. The MCU configures some cameras and the slave computing unit through the second SPI interface.

8. The method according to claim 6, characterized in that, The method further includes: The status data representing the slave computing unit is sent from the SPI interface of the slave computing unit to the second SPI interface of the MCU. The MCU determines the status of the slave computing unit based on the status data.

9. The method according to claim 6, characterized in that, The switching logic of the analog switch unit is to disconnect first and then connect.

10. The method according to claim 6, characterized in that, The status data includes fault flag bits and load flag bits.

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