Embedded ceramic substrate, circuit board and method for manufacturing the same

Abstract

The application discloses an embedded ceramic substrate, a circuit board and a preparation method thereof, and belongs to the technical field of semiconductors. The embedded ceramic substrate is prepared by the following steps: providing a substrate mother board, the substrate mother board comprising a ceramic layer and conductive layers arranged on both sides of the ceramic layer in the thickness direction, and the ceramic layer having an exposed area exposed to the conductive layers; and processing the exposed area of the ceramic layer to form a chamfer at the edge of the ceramic layer to form the embedded ceramic substrate. The preparation method of the embedded ceramic substrate processes the exposed area of the ceramic layer to form a chamfer at the edge of the ceramic layer to form the embedded ceramic substrate, so that when the embedded ceramic substrate is used, the chamfer provides a smooth stress transition area, and stress originally concentrated at a point is converted into stress distributed on the chamfer surface, thereby effectively avoiding the risk that cracks are generated in the insulating matrix of the circuit board due to excessive local stress.

Description

Technical Field

[0001] This invention relates to the field of semiconductor measurement, and more particularly to embedded ceramic substrates, circuit boards, and methods for their fabrication. Background Technology

[0002] As power semiconductors move towards higher integration, embedded chip technology is being widely used. Embedding technology refers to embedding a ceramic substrate into an insulating matrix.

[0003] Due to the significant difference in the coefficients of thermal expansion (CTE) between the ceramic material and the insulating substrate, enormous thermal stress is generated at the interface under temperature cycling or thermal shock conditions. This stress is particularly concentrated at the right-angled edges of the ceramic substrate. From a mechanical perspective, the sharp right-angled edges of the extremely hard ceramic substrate create a wedge-like effect on the relatively soft insulating substrate material during temperature cycling. This effect generates enormous localized shear and tensile stresses within the insulating substrate, which can easily exceed the bonding strength of the insulating substrate, thus inducing cracking in the insulating substrate and severely impacting the long-term reliability of the power module. Summary of the Invention

[0004] In order to overcome the shortcomings of the prior art, one of the objectives of this invention is to provide a method for preparing an embedded ceramic substrate. After the embedded ceramic substrate prepared by this method is embedded in an insulating substrate, the insulating substrate is not easy to crack, thereby improving the long-term reliability of the power module.

[0005] To overcome the shortcomings of the prior art, the second objective of this invention is to provide an embedded ceramic substrate. By setting a chamfer at the edge of the embedded ceramic substrate, the thermal stress at the edge is reduced, so that after the embedded ceramic substrate is embedded in the insulating substrate, the insulating substrate is not easy to crack, thereby improving the long-term reliability of the power module.

[0006] To overcome the shortcomings of the prior art, a third objective of this invention is to provide a circuit board that reduces thermal stress at the edge by setting a chamfer on the edge of the embedded ceramic substrate, so that the insulating substrate is less prone to cracking after the embedded ceramic substrate is embedded in the insulating substrate, thereby improving the long-term reliability of the circuit board.

[0007] One of the objectives of this application is achieved through the following technical solution: An embedded ceramic substrate preparation method includes the following steps: providing a substrate mother plate, the substrate mother plate including a ceramic layer and conductive layers disposed on both sides of the ceramic layer in the thickness direction, the ceramic layer having exposed areas exposed to the conductive layers; processing the exposed areas of the ceramic layer to form chamfers at the edges of the ceramic layer to form an embedded ceramic substrate.

[0008] Furthermore, a laser is used to process the edges of the ceramic layer to form a chamfer.

[0009] Furthermore, the laser spot diameter of the laser is 75μm~150μm.

[0010] Furthermore, the number of lasers is at least two, and the at least two lasers are located on both sides of the exposed area of ​​the ceramic layer in the thickness direction and their optical axes coincide, and the at least two lasers process the exposed area simultaneously.

[0011] Furthermore, the number of conductive layers on the same side of the ceramic layer thickness direction is multiple, and the multiple conductive layers are spaced apart. At least part of the exposed area is located between two adjacent conductive layers. After laser processing of the exposed area of ​​the ceramic layer, the substrate mother plate forms multiple embedded ceramic substrates.

[0012] Furthermore, the laser is used to process grooves at the edge of the ceramic layer, and the substrate mother plate is divided along the grooves to form multiple embedded ceramic substrates, with the groove walls forming the chamfer.

[0013] Furthermore, the method for preparing the embedded ceramic substrate further includes forming a circuit pattern on the conductive layer, wherein the step of forming the circuit pattern on the conductive layer is located before the step of providing a substrate motherboard or after the step of forming a chamfer.

[0014] Furthermore, the conductive layer is a copper layer.

[0015] Furthermore, the ceramic layer material is silicon nitride.

[0016] Furthermore, the edge of the embedded ceramic substrate is C-shaped.

[0017] The second objective of this application is achieved through the following technical solution: An embedded ceramic substrate includes a ceramic layer and two conductive layers. The two conductive layers are disposed on both sides of the ceramic layer in the thickness direction. The edges of the ceramic layer extend from the conductive layers and are chamfered.

[0018] Furthermore, the edge of the ceramic layer includes a main body and a chamfer located in the thickness direction of the main body, and the ratio of the length of the main body to the length of the chamfer along the thickness direction of the ceramic layer is 5 to 1.

[0019] Furthermore, the cross-section of the chamfer is an inclined plane, and the inclined plane is tilted toward the conductive layer.

[0020] The third objective of this application is achieved using the following technical solution: A circuit board includes an insulating substrate and any one of the above-mentioned embedded ceramic substrates, wherein the embedded ceramic substrate is embedded in the insulating substrate.

[0021] Compared with the prior art, the present invention has the following advantages: (1) The exposed area of ​​the ceramic layer is processed to form a chamfer at the edge of the ceramic layer to form an embedded ceramic substrate. When the embedded ceramic substrate is used, the chamfer provides a smooth stress transition area, which transforms the stress that was originally concentrated at one point into pressure distributed on the chamfer surface, effectively avoiding the risk of cracks in the insulating substrate of the circuit board due to excessive local stress. (2) Laser processing is a non-contact processing method. Compared with mechanical grinding, there is no mechanical contact stress acting on the ceramic layer, which avoids the chipping and micro-cracks at the edges of the ceramic layer and ensures the insulation performance and structural integrity of the embedded ceramic substrate. At the same time, the laser thermal effect causes the cut edges to melt and form naturally, resulting in a smooth chamfered surface; (3) The dual-laser synchronous laser cutting technology is adopted, which uses two lasers to cut both sides of the embedded ceramic substrate at the same time, avoiding the alignment deviation caused by the traditional single-head double flipping cutting. The processing accuracy is greatly improved from ±50μm of the traditional mechanical grinding process to within ±5μm, ensuring the symmetry and consistency of the chamfer structure, which is particularly suitable for the strict accuracy requirements of high-density packaging scenarios. Attached Figure Description

[0022] Figure 1 This is a flowchart of the method for preparing the embedded ceramic substrate in this application; Figure 2 This is a schematic diagram of the fabrication process of the embedded ceramic substrate in this application; Figure 3 This is a schematic diagram of the circuit board structure of this application.

[0023] In the picture: 100. Circuit board; 10. Embedded ceramic substrate; 11. Ceramic layer; 110. Main body; 111. Chamfer; 112. Exposed area; 12. Conductive layer; 20. Conductive connection layer; 30. Chip; 40. Insulating substrate; 50. Substrate motherboard; 60. Groove; 200. Laser. Detailed Implementation

[0024] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0025] It should be noted that when a component is said to be "fixed to" another component, it can be directly on the other component or it can be fixed through another intermediate component. When a component is said to be "connected to" another component, it can be directly connected to the other component or it may be fixed through another intermediate component. When a component is said to be "set on" another component, it can be set directly on the other component or it may be set through another intermediate component. The terms "vertical," "horizontal," "left," "right," and similar expressions used in this document are for illustrative purposes only.

[0026] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the specification of this invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0027] Please see Figures 1 to 2 This application discloses a method for preparing an embedded ceramic substrate, comprising the following steps: providing a substrate mother plate 50, the substrate mother plate 50 including a ceramic layer 11 and conductive layers 12 disposed on both sides of the thickness direction of the ceramic layer 11, the ceramic layer 11 having an exposed area 112 exposed to the conductive layer 12; processing the exposed area 112 of the ceramic layer 11 to form a chamfer 111 at the edge of the ceramic layer 11 to form an embedded ceramic substrate 10.

[0028] The exposed area 112 indicates that the ceramic layer 11 at the exposed area 112 is not covered by the conductive layer 12.

[0029] In this embodiment, the ceramic layer 11 is made of silicon nitride (SiN). It has a thermal conductivity greater than 80 W / m·K and a bending strength greater than 650 MPa, exhibiting excellent insulation and thermal shock resistance.

[0030] The conductive layer 12 is made of copper foil, which is firmly bonded to the ceramic layer 11 in a high-temperature vacuum environment through active metal brazing (AMB) process.

[0031] In some implementations, a laser 200 is used to process the exposed area 112 of the ceramic layer 11. Laser processing is a non-contact process; compared to mechanical grinding, no mechanical contact stress is applied to the ceramic layer 11, avoiding edge chipping and microcracks, and ensuring the insulation performance and structural integrity of the embedded ceramic substrate 10. Simultaneously, the laser thermal effect causes the cut edges to naturally melt and solidify, resulting in a smooth chamfered surface 111.

[0032] The laser spot diameter of laser 200 is set to 75μm~150μm. By adjusting the output power, pulse frequency, scanning speed and defocusing amount of laser 200, the laser performs micro-melting treatment on the cut edge using thermal effect while cutting ceramic layer 11, naturally forming a C-shaped arc chamfer 111.

[0033] In some implementations, at least two lasers 200 are used, positioned on opposite sides of the ceramic layer 11 along its thickness direction, with their optical axes coinciding. Both lasers 200 simultaneously process the exposed area 112, meaning the two lasers feed synchronously from both sides of the ceramic layer 11. Because the optical axes of the two lasers 200 coincide and they process synchronously, the chamfer 111 is symmetrically formed on both sides of the ceramic layer 11 along its thickness direction, achieving a processing accuracy within ±5μm, thus avoiding the cumulative alignment deviations caused by traditional single-head flipping cutting.

[0034] The embedded ceramic substrate 10 can be manufactured as a single plate or as a panel.

[0035] In single-plate manufacturing, the size of the substrate mother plate 50 is the same as the size of the embedded ceramic substrate 10. The exposed area 112 of the ceramic layer 11 is processed, that is, the edge of the substrate mother plate 50 is processed.

[0036] In panel manufacturing, the size of the substrate mother plate 50 is the sum of the sizes of multiple embedded ceramic substrates 10. The exposed areas 112 of the ceramic layers 11 are processed, including processing the edges of the substrate mother plate 50 and processing the ceramic layers 11 between two adjacent conductive layers 12. After processing, the substrate mother plate 50 is separated to form multiple embedded ceramic substrates 10.

[0037] In panel manufacturing, the structure of the substrate motherboard 50 is as follows: there are multiple conductive layers 12 on the same side of the thickness direction of the ceramic layer 11, the multiple conductive layers 12 are spaced apart, and an exposed area 112 is formed between two adjacent conductive layers 12.

[0038] In panel manufacturing, the ceramic layer 11 between two adjacent conductive layers 12 is processed as follows: a laser 200 is used to process a groove 60 in the exposed area 112 of the ceramic layer 11, and the groove 60 is V-shaped. The groove wall of the groove 60 is treated with laser thermal effect micro-melting to naturally form a chamfered arc surface 111. After the groove 60 is processed, the substrate mother plate 50 is cleaned, and the cleaned substrate mother plate 50 is separated along the groove 60 (for example, by breaking along the bottom of the groove 60 or by secondary cutting), so that the substrate mother plate 50 is separated into multiple independent embedded ceramic substrates 10. After separation, the chamfered groove wall of the groove 60 is exposed as the edge chamfer 111 of the embedded ceramic substrate 10. This method of first slotting and then separating is particularly suitable for cases where the ceramic layer 11 is thick. The laser does not need to completely cut through the entire ceramic layer; it only needs to process the groove 60 with chamfered walls at the separation position, and then separate it mechanically. This ensures the chamfer quality and reduces the laser processing time.

[0039] The method for fabricating an embedded ceramic substrate also includes the step of forming a circuit pattern on the conductive layer 12. This step can be performed before providing the substrate motherboard 50 or after forming the chamfer 111.

[0040] For example, before providing the substrate motherboard 50, a preset circuit pattern is first formed on the surface of the conductive layer 12 using a wet etching process, and the conductive layer 12 is then surface-treated (e.g., silver plating) to protect the copper surface and improve the solderability of subsequent chip soldering. The conductive layer 12 with the circuit pattern is then combined with the ceramic layer 11 to form the substrate motherboard 50, which is then processed by laser and separated.

[0041] Alternatively, laser chamfering and board separation can be completed first to obtain the embedded ceramic substrate 10, and then circuit patterns can be fabricated on its conductive layer 12 using a patterning process. The two sequences can be flexibly selected according to the production line layout.

[0042] The method for preparing embedded ceramic substrates also includes an appearance inspection step to improve the quality of the finished product.

[0043] Please see Figure 2 This application also discloses an embedded ceramic substrate 10, which includes a ceramic layer 11 and two conductive layers 12 disposed on both sides of the ceramic layer 11 in the thickness direction. The edge of the ceramic layer 11 extends outward from the conductive layers 12. The edge of the ceramic layer 11 includes a body 110 and a chamfer 111 located in the thickness direction of the body 110. Along the thickness direction of the ceramic layer 11, the ratio of the length of the body 110 to the length of the chamfer 111 is between 5 and 1.

[0044] The ratio of the length of the main body 110 to the length of the chamfer 111 is between 5 and 1. This means that the ratio of the length of the main body 110 to the length of the chamfer 111 can be any value in the above range, such as 5, 4, 3, 2 or 1.

[0045] When the chamfer 111 is provided on only one side, the ratio of the length of the main body 110 to the length of the chamfer 111 represents the ratio of the length of the main body 110 to the length of the chamfer 111 on one side. When the chamfer 111 is provided on both sides of the main body 110, the ratio of the length of the main body 110 to the length of the chamfer 111 represents the ratio of the length of the main body 110 to the sum of the lengths of the chamfers 111 on both sides. In some embodiments, this ratio is between 3 and 1.5, such that the chamfer 111 provides a sufficient stress transition area without significantly reducing the main body thickness of the ceramic layer 11, thereby affecting the structural strength.

[0046] The cross-section of chamfer 111 is C-shaped, meaning the chamfer surface is a smooth, concave arc. The cross-section of chamfer 111 is an inclined plane, which slopes towards the conductive layer 12. This structure can transform the concentrated stress caused by the difference in thermal expansion coefficients between the edge of the ceramic layer 11 and the insulating substrate 40 into compressive stress distributed on the inclined plane, effectively avoiding stress concentration.

[0047] In this embodiment, the ceramic layer 11 is made of silicon nitride, and the conductive layer 12 is made of copper. It is understood that the ceramic layer 11 can also be made of alumina, aluminum nitride, or other ceramic materials, and the conductive layer 12 can also be made of other metallic conductive materials.

[0048] Please see Figure 3 This application also provides a circuit board 100. The circuit board 100 includes an insulating substrate 40 and the aforementioned embedded ceramic substrate 10 embedded in the insulating substrate 40.

[0049] Specifically, the ceramic layer 11 of the embedded ceramic substrate 10 has a chamfer 111 at its edge, and a smooth stress transition zone is formed between the chamfer 111 and the insulating substrate 40.

[0050] The circuit board 100 also includes a conductive connection layer 20 and a chip 30. The conductive connection layer 20 is disposed on the conductive layer 12 of the embedded ceramic substrate 10. The conductive connection layer 20 is sintered silver. The chip 30 is electrically connected to the conductive layer 12 through the conductive connection layer 20. An insulating substrate 40 covers the embedded ceramic substrate 10, the conductive connection layer 20, and the chip 30 to achieve overall encapsulation.

[0051] The material of the insulating substrate 40 is preferably FR4 (glass fiber reinforced epoxy resin), but other organic encapsulation materials can also be used. Under temperature cycling (e.g. -40℃ to +150℃) or thermal shock environments, the chamfer 111 of the ceramic layer 11 provides a smooth mechanical interface between the ceramic layer 11 and the FR4 insulating substrate 40, avoiding the cracking problem of the insulating substrate 40 caused by stress concentration at conventional right-angle edges.

[0052] Verification through finite element simulation and temperature cycling test (-40℃~+150℃, 1000 cycles) showed that after adopting chamfer 111, the stress concentration in the edge area of ​​ceramic layer 11 was reduced by about 50% compared with the right-angle edge. No cracks or other failure phenomena were observed in the insulating substrate 40 during the test.

[0053] The above embodiments merely illustrate several implementation methods of the present invention, and their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of the invention patent. It should be noted that, for those skilled in the art, several modifications and improvements can be made without departing from the concept of the present invention. These are all equivalent modifications and improvements made to the above embodiments based on the essential technology of the present invention, and all of these fall within the protection scope of the present invention.

Claims

1. A method for preparing an embedded ceramic substrate, characterized in that, Includes the following steps: A substrate motherboard is provided, the substrate motherboard including a ceramic layer and conductive layers disposed on both sides of the ceramic layer in the thickness direction, the ceramic layer having exposed areas exposed to the conductive layers; The exposed area of ​​the ceramic layer is processed to form a chamfer at the edge of the ceramic layer to form an embedded ceramic substrate.

2. The method for preparing an embedded ceramic substrate according to claim 1, characterized in that: A laser is used to process the edges of the ceramic layer to form a chamfer.

3. The method for preparing an embedded ceramic substrate according to claim 2, characterized in that: The laser spot diameter of the laser is 75μm~150μm; And / or, the number of lasers is at least two, the at least two lasers are located on both sides of the exposed area of ​​the ceramic layer in the thickness direction and their optical axes coincide, and the at least two lasers process the exposed area simultaneously.

4. The method for preparing an embedded ceramic substrate according to claim 2, characterized in that: The number of conductive layers on the same side of the thickness direction of the ceramic layer is multiple, and the multiple conductive layers are spaced apart. At least part of the exposed area is located between two adjacent conductive layers. After laser processing of the exposed area of ​​the ceramic layer, the substrate mother plate forms multiple embedded ceramic substrates.

5. The method for preparing an embedded ceramic substrate according to claim 4, characterized in that: The laser is used to process grooves at the edge of the ceramic layer, and the substrate mother plate is divided along the grooves to form multiple embedded ceramic substrates, with the groove walls forming the chamfer.

6. The method for preparing an embedded ceramic substrate according to claim 4, characterized in that: The method for preparing an embedded ceramic substrate further includes forming a circuit pattern on the conductive layer, wherein the step of forming the circuit pattern on the conductive layer is located before the step of providing a substrate motherboard or after the step of forming a chamfer.

7. The method for preparing an embedded ceramic substrate according to any one of claims 1-6, characterized in that: The conductive layer is a copper layer; And / or, the ceramic layer material is silicon nitride; And / or, the edge of the embedded ceramic substrate is C-shaped.

8. An embedded ceramic substrate, comprising a ceramic layer, characterized in that: The embedded ceramic substrate further includes two conductive layers, which are disposed on both sides of the ceramic layer in the thickness direction. The edges of the ceramic layer extend from the conductive layers and are chamfered.

9. The embedded ceramic substrate according to claim 8, characterized in that: The edge of the ceramic layer includes a main body and a chamfer located in the thickness direction of the main body. Along the thickness direction of the ceramic layer, the ratio of the length of the main body to the length of the chamfer is 5 to 1. And / or, the cross-section of the chamfer is a bevel, and the bevel is inclined toward the conductive layer.

10. A circuit board, comprising an insulating substrate, characterized in that: It also includes an embedded ceramic substrate according to any one of claims 8-9, wherein the embedded ceramic substrate is embedded in the insulating substrate.

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