A method for manufacturing a PCB embedded copper block

Abstract

The application discloses a preparation method of a PCB embedded copper block, which comprises the following steps: adopting a double-wavelength femtosecond laser layer-by-layer etching technology to construct a gradient micro-nano texture structure of a micron-level groove array and a sub-micron-level convex nest on the surface of the copper block; performing interface nano-alloying treatment under a vacuum protective atmosphere to form a nano-level alloy layer in situ on the surface of the copper block; processing a blind hole in the inner wall of a copper embedding groove of a PCB substrate and performing plasma activation; embedding and pressing the copper block by using modified epoxy resin; and performing three-stage gradient curing. Through synergistic enhancement of multi-scale mechanical anchoring and interface chemical bonding, the interface bonding strength of the copper block and the PCB substrate is improved to 30-35 MPa, the interface thermal resistance is reduced by 30-40%, the method is suitable for various substrates such as FR-4 and ceramics, and the reliability and heat dissipation performance of the PCB are remarkably improved.

Description

Technical Field

[0001] This invention relates to the field of printed circuit board (PCB) manufacturing technology, and specifically to a method for preparing embedded copper blocks for PCBs. Background Technology

[0002] With the rapid development of 5G communication, artificial intelligence, new energy vehicles, and aerospace, the integration and power density of electronic devices are constantly increasing. As the core interconnect and load-bearing component of electronic systems, the heat dissipation performance and structural reliability of PCBs have become key bottlenecks restricting the overall performance and lifespan of the device. Embedded copper block technology (also known as copper embedding technology) involves embedding highly thermally conductive copper blocks into the PCB substrate, utilizing copper's high thermal conductivity to form efficient heat dissipation channels, and has become the mainstream technology direction for high-power PCB manufacturing. However, existing embedded copper block technologies still face the following technical challenges that urgently need to be overcome:

[0003] (i) The interfacial bonding strength between the copper block and the substrate is insufficient, making it difficult to meet the requirements of harsh service conditions.

[0004] In existing copper embedding processes, the bonding between the copper block and the PCB substrate mainly relies on the physical adhesion of the resin. Traditional processes often involve smooth copper blocks or simple sandblasting and chemical roughening, resulting in limited effective contact area with the resin and a lack of multi-level mechanical anchoring structures. Some existing technologies use frustum-shaped copper blocks to improve the connection; others reduce the risk of copper block displacement by 15% by precisely controlling the slot accuracy on a marble platform, combined with vacuum resin plugging and vertical baking plates. Still others attempt to increase the resin bonding channels by micro-etching the copper block surface to create filling recesses. However, the surface structures constructed by these methods range in size from millimeters to tens of micrometers, making it difficult to achieve sufficient bonding between the copper block and resin at the nanometer to submicrometer scale. Numerous microscopic voids remain at the interface, making it prone to delamination and loosening under complex conditions such as temperature cycling (-40℃~125℃) and high-frequency vibration.

[0005] (ii) The interface thermal resistance is high, making it difficult to fully utilize the heat dissipation performance.

[0006] The core advantage of the embedded copper block process lies in utilizing copper's high thermal conductivity to rapidly dissipate heat. However, in existing processes, microscopic gaps inevitably exist between the copper block and the substrate. Under the high temperature and pressure environment of lamination, the significant difference in thermal expansion coefficients between the copper block and the surrounding resin substrate easily leads to interface separation or voids. The thermal conductivity of the filling resin is much lower than that of metallic copper, and the interfacial contact thermal resistance between the resin and the copper block severely hinders heat transfer. Some solutions improve the thermal conductivity of the resin by adding thermally conductive fillers such as alumina, but the contact thermal resistance at the interface remains high, and the actual heat dissipation efficiency is far lower than the theoretical value.

[0007] (iii) Poor process compatibility, introducing additional process risks and costs.

[0008] Some existing technologies employ chemical methods such as browning treatment on the copper block surface to form an organometallic conversion film, thereby enhancing the adhesion between the copper block and the epoxy resin, in order to improve the bonding strength between the copper block and the substrate. However, such chemical treatments easily introduce impurity ions, resulting in a relatively simple and thin organometallic film. Furthermore, the film may absorb water, leading to board breakage, and requires lamination within a specified time. Another approach involves multiple processes after the copper block is embedded, including glue filling, drilling, and staged lamination, resulting in a long process chain and high control difficulty.

[0009] (iv) Existing femtosecond laser application solutions have technical limitations.

[0010] In the application of femtosecond lasers to metal surface modification, existing research has utilized femtosecond lasers to fabricate micro / nano structures on copper surfaces to enhance the shear strength of the copper interface, primarily in the field of copper-copper interconnect packaging. However, there are no reports on the systematic combination of these techniques with interface alloying treatment and their application in PCB embedded copper block processes to address the issue of synergistic optimization of interface bonding strength and interface thermal resistance in copper embedding processes.

[0011] In summary, there is an urgent need to develop a new PCB copper embedding process that can simultaneously achieve efficient mechanical anchoring and chemical bonding between copper blocks and resin at cross-scale levels, reduce interfacial thermal resistance, and has good process compatibility. Summary of the Invention

[0012] The purpose of this invention is to provide a method for preparing embedded copper blocks in PCBs, which systematically integrates the enhancement mechanisms of "multi-scale mechanical anchoring" and "interfacial chemical bonding", effectively solving the prominent problems of low interfacial bonding strength between copper blocks and PCB substrates, high interfacial thermal resistance, and poor process compatibility in existing copper embedding processes.

[0013] The technical solution of this invention is:

[0014] A method for preparing a PCB embedded copper block includes the following steps:

[0015] Step S1: Using dual-wavelength femtosecond laser layer etching technology, a gradient micro-nano texture structure is constructed on the copper block surface to be bonded. The gradient micro-nano texture structure includes a micron-level groove array and a submicron-level protrusion structure. The submicron-level protrusion structure is formed inside each micron-level groove in the micron-level groove array and on the remaining surface of the copper block surface other than the micron-level grooves.

[0016] Step S2: Place the copper block after laser etching in a vacuum heat treatment furnace and perform interface nano-alloying treatment under a vacuum protective atmosphere to form a nano-alloy layer on the surface of the copper block in situ.

[0017] Step S3: A copper embedding channel is processed on the PCB substrate, blind holes are processed on the inner wall of the copper embedding channel, and the inner wall of the copper embedding channel is subjected to plasma activation treatment.

[0018] Step S4: Apply modified epoxy resin to the copper embedding groove, embed the copper block treated in steps S1 and S2 into the copper embedding groove and press it together.

[0019] Step S5 involves using a three-stage gradient curing process for curing, which includes a low-temperature pre-curing stage, a high-temperature main curing stage, and a medium-temperature stress release stage.

[0020] Further, in step S1, the micron-level grooves in the micron-level groove array are arranged in an alternating manner. The depth of the micron-level grooves is 8~12μm, the width is 20~30μm, and the spacing is 50~70μm. The micron-level grooves are arranged in an alternating manner.

[0021] The submicron-level protrusions have a diameter of 300-500 nm, a height of 100-200 nm, and a spacing of 200-400 nm between them.

[0022] Further, in step S1, the dual-wavelength femtosecond laser layer etching technique includes:

[0023] The micron-scale groove array was constructed using femtosecond laser etching with a wavelength of 1064 nm, a pulse width of 300 fs, a repetition frequency of 100 kHz, and a scanning speed of 400~600 mm / s.

[0024] The submicron-scale protrusion structure was constructed using femtosecond laser etching with a wavelength of 532 nm, a pulse width of 200 fs, a repetition frequency of 200 kHz, and a scanning speed of 800~1000 mm / s.

[0025] Further, in step S2, the nanoscale alloy layer is a copper-titanium alloy layer or a copper-zirconium alloy layer, and the thickness of the nanoscale alloy layer is 50~100nm.

[0026] Furthermore, the conditions for the interface nano-alloying treatment are: vacuum degree ≤1×10⁻³Pa, protective atmosphere is high-purity argon, heat treatment temperature is 400~450℃, holding time is 30~60 minutes, and after holding, cooling to room temperature at a rate of 5~10℃ / min.

[0027] Further, in step S3, the depth of the copper embedding groove is 0.1~0.2mm less than the thickness of the copper block, and the width is 0.05~0.1mm greater than the copper block; the diameter of the blind hole is 0.3~0.5mm, and the depth is 0.5~1mm.

[0028] Further, in step S4, the modified epoxy resin comprises the following components by weight percentage:

[0029] 70-80 wt% epoxy resin, 15-20 wt% α-alumina nanoparticles, 2-5 wt% silane coupling agent, and 5-10 wt% curing agent.

[0030] Furthermore, the epoxy resin is E-51 type bisphenol A type epoxy resin, the particle size of the α-alumina nanoparticles is 50~100nm, the silane coupling agent is KH560, and the curing agent is methyltetrahydrophthalic anhydride.

[0031] Furthermore, in step S4, the pressing pressure is 0.5~1MPa, and the holding time is 5~10 minutes.

[0032] Furthermore, in step S5, the three-stage gradient curing process is as follows:

[0033] The first stage involves holding the temperature at 58-65℃ for 1-2 hours; the second stage involves holding the temperature at 115-125℃ for 2-3 hours; the third stage involves holding the temperature at 75-85℃ for 1-2 hours; then cooling to room temperature at a rate not exceeding 5℃ / min.

[0034] Compared with the prior art, the PCB embedded copper block preparation method provided by the present invention has the following advantages:

[0035] The PCB embedded copper block preparation method of this invention systematically integrates two enhancement mechanisms: "multi-scale mechanical anchoring" and "interfacial chemical bonding." Physical anchoring is achieved by constructing a multi-scale (micrometer to submicrometer) gradient micro-nano texture structure on the copper block surface, while chemical bonding is achieved by forming a highly chemically active alloy layer on the copper block surface through interfacial nano-alloying treatment. These two mechanisms create a synergistic enhancement effect at the interface. This method increases the interfacial bonding strength between the copper block and the PCB substrate from 5-8 MPa in traditional processes to 30-35 MPa. In rigorous reliability verification, after 1000 temperature cycles (-40℃ to 125℃) and broadband random vibration tests (10-2000 Hz, acceleration 15g), the copper block showed no loosening, delamination, or interfacial cracking.

[0036] II. The method for preparing the PCB embedded copper block of the present invention utilizes a gradient micro-nano textured structure to increase the effective contact area between the resin and the copper block by more than 300% compared to a smooth interface; the introduction of a nano-alloying layer establishes a "chemical bridge" between the copper block and the resin; and the thermally conductive network of alumina nanoparticles in the modified epoxy resin constructs a continuous heat dissipation path. The method of the present invention reduces the interfacial thermal resistance by 30-40% compared to traditional processes, corresponding to an increase in equivalent heat dissipation efficiency of 25-35%.

[0037] III. The PCB embedded copper block preparation method of the present invention adopts a completely dry physical processing technology route, including femtosecond laser etching (no chemical waste liquid), vacuum heat treatment (no waste gas emission), and plasma treatment (no harmful by-products). The amount of chemical reagents used is reduced by more than 80% compared with the prior art, and the production cycle is shortened by about 25%. At the same time, it avoids the negative impact of residual metal ions on the electrical insulation performance of PCB. The method of the present invention eliminates the use of large amounts of strong acids, strong alkalis, and metal salt solutions in traditional processes, significantly reducing pollutant emissions.

[0038] Fourth, the method for preparing PCB embedded copper blocks of the present invention is not only applicable to conventional organic resin substrates such as FR-4, but also to high thermal conductivity substrate materials such as aluminum nitride ceramic substrates and metal substrates, and can achieve significant technical effects under different substrate systems. Attached Figure Description

[0039] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0040] Figure 1 This is a schematic diagram of the gradient micro / nano texture structure in this invention;

[0041] Figure 2 yes Figure 1 This is a schematic diagram of the gradient micro / nano texture structure from another angle. Detailed Implementation

[0042] To enable those skilled in the art to better understand the technical solutions in the embodiments of the present invention, and to make the above-mentioned objectives, features and advantages of the present invention more apparent and understandable, the specific embodiments of the present invention will be further described below.

[0043] The endpoints and any values ​​of the ranges disclosed herein are not limited to the precise ranges or values, and these ranges or values ​​should be understood to include values ​​close to these ranges or values. For numerical ranges, the endpoint values ​​of the various ranges, the endpoint values ​​of the various ranges and individual point values, and individual point values ​​can be combined with each other to obtain one or more new numerical ranges, which should be considered as specifically disclosed herein.

[0044] A method for preparing a PCB embedded copper block includes the following steps:

[0045] Step S1: Fabrication of gradient micro / nano textures on the surface of the copper block

[0046] A gradient micro / nano texture structure is constructed on the bonding surface of a copper block using dual-wavelength femtosecond laser layer etching technology. The ultrashort pulse characteristics of femtosecond lasers result in an extremely small heat-affected zone (typically less than 100 nm) in the processing area, avoiding defects such as material melting, resolidification, and microcracks caused by thermal effects in traditional nanosecond laser processing. The specific steps include:

[0047] Step S11, Construction of micron-scale texture

[0048] A femtosecond laser is used to etch a micrometer-scale array of grooves on the surface of a copper block, forming a macroscopically rough structure. The micrometer-scale groove array consists of several staggered micrometer-scale grooves (staggered arrangement such as a rhomboid staggered arrangement or a honeycomb arrangement), each groove having a depth of 8–12 μm, a width of 20–30 μm, and a spacing of 50–70 μm. The femtosecond laser parameters are: wavelength 1064 nm, pulse width 300 fs, repetition rate 100 kHz, and scanning speed 400–600 mm / s.

[0049] Step S12, Construction of submicron-level texture

[0050] Within the established micrometer-scale groove array, submicrometer-scale protrusions are further etched onto the interior of each micrometer-scale groove and the remaining surface of the copper block, excluding the micrometer-scale grooves, to form a high-density micro-rough structure. The protrusions have a diameter of 300–500 nm, a height of 100–200 nm, and a spacing of 200–400 nm between them. The femtosecond laser parameters are: wavelength 532 nm, pulse width 200 fs, repetition rate 200 kHz, and scanning speed 800–1000 mm / s.

[0051] A schematic diagram of the gradient micro / nano texture structure constructed in step S1 is shown below. Figure 1 As shown, a gradient micro / nano texture structure is formed on the surface 1 of a copper block, comprising a micrometer-level groove array 2 and a submicrometer-level protrusion structure 3. The submicrometer-level protrusion structure 3 is distributed within the micrometer-level grooves in the micrometer-level groove array and on the remaining surface of the copper block excluding the micrometer-level grooves. The method of this invention employs dual-wavelength femtosecond laser layer etching. First, a 1064nm infrared femtosecond laser is used for high-removal-rate micrometer-level trench processing, and then a 532nm green femtosecond laser is used for high-precision submicrometer structure modification, overcoming the limitation of a single wavelength in achieving both processing efficiency and precision. More importantly, the micrometer-level grooves and submicrometer protrusions are spatially nested, creating a synergistic anchoring effect after resin filling: the micrometer-level grooves provide macroscopic mechanical interlocking, while the submicrometer protrusions generate micro-compressive stress due to thermal shrinkage during resin curing, further enhancing interfacial bonding.

[0052] Step S2, interfacial nano-alloying treatment of the copper block surface

[0053] The copper block, after laser etching, is placed in a vacuum heat treatment furnace for interface nano-alloying treatment. The specific steps include:

[0054] Step S21: Evacuate the vacuum heat treatment furnace to below 1×10⁻³ Pa and introduce high-purity argon gas (purity ≥99.999%) as a protective gas to prevent the copper block from oxidizing at high temperature.

[0055] Step S22: Heat to 400~450℃ and hold for 30~60 minutes. Under this temperature condition, the copper atoms on the surface of the copper block obtain sufficient thermal activation energy and undergo interfacial diffusion reaction with trace amounts of titanium or zirconium atoms volatilized from the titanium or zirconium source (usually placed in a specific position in the furnace in the form of metal foil or metal wire) set in the furnace, forming a copper-titanium (Cu-Ti) alloy layer or copper-zirconium (Cu-Zr) alloy layer with a thickness of 50~100nm on the surface of the copper block in situ.

[0056] Step S23: After the heat preservation is completed, slowly cool down to room temperature at a rate of 5~10℃ / min. The purpose of slow cooling is to avoid residual thermal stress caused by the difference in the coefficient of thermal expansion.

[0057] The fundamental difference between the interface nano-alloying treatment of this invention and existing technologies lies in the following: Existing copper surface alloying typically involves a relatively thick alloy layer (micrometer-level), requiring pre-deposition of other metals through electroplating or chemical plating followed by heat treatment. This process is complex, and a clear interface exists between the alloy layer and the substrate. In contrast, this invention utilizes gas-solid interface atomic diffusion reactions under vacuum conditions to form an ultra-thin alloy layer with a thickness of only nanometers on the surface of the copper block. The core function of this nano-scale alloy layer is:

[0058] (1) The titanium or zirconium atoms in the alloy can form strong chemical bonds with the polar functional groups in the subsequent filling resin, thus achieving a leap from simple physical adsorption to chemical bonding.

[0059] (2) The nanometer-scale thickness ensures that the negative impact of the alloy layer on the thermal conductivity of the copper block is negligible;

[0060] (3) Both Ti and Zr have stronger oxygen affinity than Cu. During the alloying process, they can preferentially capture the trace oxygen remaining on the surface of the copper block to form a dense oxide barrier layer.

[0061] Step S3, PCB substrate copper embedding process

[0062] Based on the dimensions and specifications of the copper block, copper embedding grooves are machined at designated locations on the PCB substrate. The machining of these copper embedding grooves employs a combination of high-precision CNC milling for rough machining and laser finishing, specifically including the following steps:

[0063] Step S31, copper embedding groove size design: The depth of the copper embedding groove is 0.1~0.2mm less than the thickness of the copper block, and the width is 0.05~0.1mm larger than the copper block. This size design ensures that the copper block can be smoothly embedded in the groove, while reserving sufficient gap space for resin filling.

[0064] Step S32, Blind Hole Design: Several blind holes with a diameter of 0.3~0.5mm and a depth of 0.5~1mm are machined on the inner wall of the copper embedding groove. The functions of these blind holes include:

[0065] (1) As a "resin storage tank", it can store excess resin during the pressing process to prevent resin overflow and cause resin pollution.

[0066] (2) The cured resin forms a mechanical locking structure similar to an "anchor" in the blind hole;

[0067] (3) Blind holes can break the continuous stress concentration path of the inner wall of the copper inlay channel, reducing the risk of interface peeling caused by the mismatch of thermal expansion coefficients during thermal cycling.

[0068] Step S33, Plasma Activation Treatment: The inner wall of the processed copper embedding tank is subjected to plasma treatment. Oxygen or argon-oxygen mixed plasma is used, and the treatment time is 3-8 minutes. Plasma treatment can remove dust, oil and other contaminants remaining on the inner wall of the copper embedding tank due to machining, and at the same time introduce polar functional groups such as hydroxyl and carboxyl groups on the substrate surface, significantly improving the surface energy.

[0069] Step S4: Preparation of modified epoxy resin and embedding of copper block

[0070] The method of the present invention uses a modified epoxy resin as a filler material, which contains the following components by weight percentage:

[0071] 70-80 wt% epoxy resin, 15-20 wt% α-alumina nanoparticles, 2-5 wt% silane coupling agent, and 5-10 wt% curing agent.

[0072] In this system, epoxy resin serves as the matrix resin, providing the adhesive framework; α-alumina nanoparticles improve the resin's thermal conductivity and reduce the filler interface thermal resistance; a silane coupling agent enhances the chemical bond between the resin and the copper block / substrate; and a curing agent is used for cross-linking and curing to form a three-dimensional network structure. Preferably, the epoxy resin is E-51 type bisphenol A epoxy resin, the α-alumina nanoparticles have a particle size of 50-100 nm, the silane coupling agent is KH560, and the curing agent is methyltetrahydrophthalic anhydride.

[0073] Step S41, Preparation of modified epoxy resin

[0074] Mix the above components according to the formula ratio, heat to 80~90℃ and stir at 200~400rpm for 30~60 minutes.

[0075] Step S42, resin coating

[0076] The prepared modified epoxy resin is evenly coated onto the bottom and inner wall of the copper embedding tank using an automatic dispensing device, with the coating thickness controlled at 0.1~0.2mm.

[0077] Step S43, copper block embedding and pressing

[0078] A copper block, after gradient micro / nano texturing and interface nano-alloying treatment, is aligned and embedded into a copper embedding groove. A pressure of 0.5–1 MPa is applied using a flatbed press and maintained for 5–10 minutes. Under pressure, the flowing resin is forced into the micron-level grooves and submicron-level protrusions on the surface of the copper block, achieving full contact and filling of the resin with the copper block at the microscale. Simultaneously, a release film is applied to the surface of the copper block to prevent resin adhesion.

[0079] Step S5, Gradient Curing and Post-treatment

[0080] Step S51: Place the PCB substrate that has been embedded and laminated into a precision temperature-controlled oven and use a three-stage gradient curing process.

[0081] First stage (low-temperature pre-curing): Hold at 58-65℃ for 1-2 hours. During this stage, the resin viscosity decreases, volatile small molecules are fully released, and the resin begins to cross-link initially.

[0082] Second stage (high-temperature primary curing): Hold at 115-125℃ for 2-3 hours. The epoxy groups in the resin undergo a ring-opening cross-linking reaction with the acid anhydride curing agent, forming a high-density three-dimensional cross-linked network.

[0083] The third stage (medium-temperature slow cooling and stress release): After holding at 75-85℃ for 1-2 hours, slowly cool to room temperature at a rate not exceeding 5℃ / min. In this stage, by holding at a temperature near the glass transition temperature, the molecular chains in the resin cross-linking network are given sufficient relaxation time to release the internal stress caused by uneven thermal shrinkage.

[0084] Step S52: After curing, remove the release film from the surface of the copper block. Precision polish the PCB surface to ensure the copper block surface is flush with the PCB substrate surface, facilitating subsequent circuit pattern fabrication. Then, proceed with standard PCB manufacturing processes including drilling, electroplating, solder masking, surface treatment, and silkscreen printing.

[0085] The following detailed description of the preparation method of the PCB embedded copper block of the present invention is illustrated through specific embodiments.

[0086] Example 1: Copper Embedding Process for FR-4 Substrate (Suitable for High-Power Servers, Communication Base Stations, etc.)

[0087] A method for preparing a PCB embedded copper block includes the following steps:

[0088] Step S1: Copper block pretreatment and preparation of gradient micro / nano textures on the copper block surface

[0089] (1) Copper block preparation: Oxygen-free copper material with a purity of 99.9% was selected and square copper blocks with dimensions of 25mm×25mm×2.5mm were prepared by CNC milling. The surfaces to be bonded (bottom and four sides) of the copper blocks were ultrasonically cleaned (using anhydrous ethanol + deionized water for step-by-step cleaning, 10 minutes each) to remove processing grease and dust, and then dried for use.

[0090] (2) Preparation of the first layer of micron-level texture: A femtosecond laser processing system (wavelength 1064nm, pulse width 300fs, repetition frequency 100kHz) was used to etch a micron-level groove array on the bottom and side areas of the copper block. Processing parameters: scanning speed 500mm / s, laser energy density approximately 8J / cm². Groove depth 10μm, width 25μm, groove spacing 60μm, and the grooves are arranged in a 45° rhomboid staggered pattern.

[0091] (3) Preparation of the second submicron texture: By switching the femtosecond laser parameters (wavelength 532nm, pulse width 200fs, repetition rate 200kHz, scanning speed 900mm / s, laser energy density approximately 3J / cm²), a second scan was performed on the inner bottom surface, sidewalls, and remaining smooth surface of the copper block of the micron-groove to form a submicron-level protrusion structure. The protrusion diameter is 400nm, the height is 150nm, and the protrusion spacing is approximately 300nm.

[0092] The overall texture processing area should cover no less than 95% of the area of ​​the copper block to be bonded.

[0093] Step S2, interfacial nano-alloying treatment of the copper block surface

[0094] The etched copper block was placed in a vacuum heat treatment furnace, with pure titanium foil (0.1 mm thick, 99.95% purity) placed inside as the titanium source. A vacuum of 5 × 10⁻⁻⁻⁶ was then applied. 4 After Pa, high-purity argon gas (flow rate 200 sccm) was introduced, and the temperature was raised to 420℃ and held for 45 minutes. After the holding period, the temperature was lowered to room temperature at a rate of 8℃ / min. X-ray photoelectron spectroscopy analysis confirmed the formation of a Cu-Ti alloy layer with a thickness of approximately 75 nm on the surface of the treated copper block.

[0095] Step S3, PCB substrate copper embedding process

[0096] A 2.0mm thick FR-4 copper-clad laminate (TG≥170℃, copper foil thickness 1oz) was selected. After removing the copper foil from the surface of the copper-embedded area, a high-precision CNC milling machine was used to machine the copper-embedded groove. The groove dimensions were 25.08mm × 25.08mm × 2.3mm (i.e., the depth was 0.2mm thinner than the copper block thickness, and the width was reserved at 0.04mm on each side). A total of 15 blind holes (8 on the sidewalls and 7 on the bottom) with a diameter of 0.4mm and a depth of 0.8mm were machined on the four inner sidewalls and the bottom of the copper-embedded groove. After the blind holes were machined, plasma treatment was performed: an oxygen / argon mixed plasma (gas flow rate O2:Ar=1:3), a radio frequency power of 300W, a chamber pressure of 30Pa, and a treatment time of 5 minutes were used.

[0097] Step S4: Preparation of modified epoxy resin and embedding of copper block

[0098] (1) Preparation of modified epoxy resin: 75 wt% E-51 epoxy resin, 18 wt% α-alumina nanoparticles (average particle size 75 nm, purity 99.9%), 3 wt% KH560 silane coupling agent, and 4 wt% methyltetrahydrophthalic anhydride curing agent were weighed according to the following mass percentages. The components were stirred at 300 rpm for 45 minutes under water bath heating at 85℃ to obtain a uniform milky white flowing resin.

[0099] (2) Coating and embedding: The prepared resin is uniformly coated on the bottom and inner wall of the copper embedding groove using an automatic dispensing machine, with a coating thickness of 0.15 mm. The copper block treated with interface nano-alloying is embedded into the copper embedding groove, and a uniform pressure of 0.8 MPa is applied and held for 8 minutes. During the embedding process, the surface of the copper block is covered with a double layer of polyimide release film.

[0100] Step S5, Gradient Curing and Post-treatment

[0101] Gradient curing: Place the assembled PCB substrate into a precision oven and cure it according to the following procedure: 60℃ for 1.5 hours → 120℃ for 2.5 hours → 80℃ for 1.5 hours → cool down to room temperature at 3℃ / min.

[0102] (2) Post-processing: Remove the release film and polish the copper block with a ceramic grinding disc and a precision surface grinder to make the surface of the copper block flush with the surface of the FR-4 substrate (the height difference is controlled within ±10μm). Then, perform routine PCB manufacturing processes such as drilling, desmearing, chemical copper plating / electroplating, solder masking, and surface treatment.

[0103] The PCB board prepared in Example 1 was subjected to performance testing, and the test results are as follows:

[0104] Bond strength test: According to the shear strength test method in IPC-TM-650, the average bond strength between the copper block and the FR-4 substrate reached 30.5 MPa.

[0105] Interface thermal resistance test: Using a transient thermal resistance tester, the thermal resistance of the copper block / resin interface was measured to be 0.32 K·cm² / W, which is about 37% lower than that of the traditional process (0.51 K·cm² / W).

[0106] Temperature cycling reliability: After 1000 temperature cycles from -40℃ to 125℃, ultrasonic scanning microscopy showed no interface delamination and the bonding strength remained above 28MPa.

[0107] It should be noted that for the application of FR-4 substrates in high-power servers, communication base stations, and other scenarios, interface thermal resistance and temperature cycling reliability are key indicators determining long-term stability. Therefore, the above performance parameters are the focus of testing. Heat dissipation efficiency is physically related to interface thermal resistance; the equivalent improvement in heat dissipation efficiency can be indirectly calculated based on the measured interface thermal resistance.

[0108] Example 2: Copper embedding process on aluminum nitride ceramic substrate (suitable for aerospace, high-power LEDs, etc.)

[0109] A method for preparing a PCB embedded copper block includes the following steps:

[0110] Step S1: Copper block pretreatment and preparation of gradient micro / nano textures on the copper block surface

[0111] (1) Copper block preparation: High-purity oxygen-free copper with a purity of 99.95% was selected and processed into copper blocks with dimensions of 18mm×18mm×1.8mm. Surface cleaning was the same as in Example 1.

[0112] (2) Preparation of the first layer of micron-level texture:

[0113] Femtosecond laser parameters: wavelength 1064nm, pulse width 300fs, repetition rate 100kHz, scanning speed 400mm / s. Groove depth 8μm, width 20μm, spacing 50μm, grooves arranged in a square grid pattern.

[0114] (3) Preparation of the second submicron texture:

[0115] Femtosecond laser parameters: wavelength 532nm, pulse width 200fs, repetition rate 200kHz, scan speed 800mm / s. Protrusion diameter 300nm, height 100nm, spacing 250nm.

[0116] Step S2, interfacial nano-alloying treatment of the copper block surface

[0117] Zirconium foil (99.9% purity) was placed inside the vacuum heat treatment furnace as a zirconium source, and the furnace was evacuated to a vacuum level of 3×10⁻⁻⁻⁶. 4The temperature was increased to 400℃ and held for 30 minutes, then cooled to room temperature at a rate of 5℃ / min. This formed a Cu-Zr alloy layer with a thickness of approximately 55 nm.

[0118] Step S3, PCB substrate copper embedding process

[0119] Aluminum nitride ceramic substrate with a thickness of 1.6 mm was selected. The copper embedding groove dimensions were 18.05 mm × 18.05 mm × 1.6 mm. Ten blind holes with a diameter of 0.3 mm and a depth of 0.5 mm were machined on the inner wall of the copper embedding groove, and the plasma treatment time was 3 minutes.

[0120] Step S4: Preparation of modified epoxy resin and embedding of copper block

[0121] Modified epoxy resin formulation: 70 wt% E-51 epoxy resin, 20 wt% α-alumina nanoparticles, 4 wt% KH560 silane coupling agent, and 6 wt% methyltetrahydrophthalic anhydride curing agent.

[0122] Coating and embedding: The resin is heated to 90℃ and then coated to a thickness of 0.1mm. The copper block is embedded under a pressure of 1MPa for 6 minutes.

[0123] Step S5, Gradient Curing and Post-treatment

[0124] Gradient curing: 60℃ for 1 hour → 120℃ for 2 hours → 80℃ for 1 hour → cool to room temperature.

[0125] The remaining processes are the same as in Example 1.

[0126] The PCB board prepared in Example 2 was subjected to performance testing, and the test results are as follows:

[0127] Bonding strength: Using the same test method as in Example 1, the average bonding strength between the copper block and the aluminum nitride ceramic substrate reached 35.2 MPa.

[0128] Heat dissipation efficiency: Under the same heat source power, the surface temperature of the copper block is reduced by about 12°C compared with the traditional process, and the equivalent heat dissipation efficiency is improved by 30%.

[0129] It should be noted that for the application of aluminum nitride ceramic substrates in aerospace, high-power LEDs, and other scenarios, heat dissipation efficiency is the most direct performance indicator. Therefore, the focus of testing this performance parameter is on heat dissipation efficiency. Based on the interface enhancement mechanism of this invention, the ceramic substrate system can also be expected to achieve the technical effects of reduced interface thermal resistance and improved temperature cycling reliability. The measured values ​​of its interface bonding strength have indirectly verified the effectiveness of the interface enhancement effect.

[0130] In the above embodiments, based on the performance evaluation focus of different substrate materials and application scenarios, core indicators such as bonding strength, interfacial thermal resistance, temperature cycling reliability, and heat dissipation efficiency were selected for testing and verification. The test data of each embodiment can independently prove that the present invention has indeed achieved a significant improvement in interfacial bonding strength; interfacial thermal resistance and heat dissipation efficiency are different dimensions of the same physical problem, and the two have inherent consistency. Those skilled in the art can reasonably expect the simultaneous optimization of the other indicator based on the improvement of one indicator.

[0131] The method for preparing embedded copper blocks in PCBs of the present invention generates a synergistic enhancement effect through gradient micro-nano texture and interface nano-alloying. The interface bonding strength between the copper block and the PCB substrate is increased by 4 to 6 times (up to 30 to 35 MPa) compared with the traditional process. After 1,000 extreme temperature cycles and 15g acceleration vibration tests, the copper block does not loosen or delaminate, and the product reliability and service life are greatly improved.

[0132] The method for preparing embedded copper blocks in PCBs of this invention utilizes the three-dimensional interlocking effect of multi-level textured interfaces to reduce interfacial gaps, the chemical bridging effect of the alloying layer to reduce phonon scattering at the interface, and the addition of alumina nanoparticles to the modified epoxy resin to construct a continuous thermally conductive network. The interfacial thermal resistance is reduced by 30-40% compared to traditional processes, and the heat dissipation efficiency is improved by 25-35%.

[0133] The method for preparing PCB embedded copper blocks of the present invention can be widely used in the PCB manufacturing of high-power, high-reliability electronic products such as 5G communication base station power amplifiers, high-performance server CPU / GPU heat dissipation modules, new energy vehicle power control units (PCUs), aerospace electronic equipment, and high-power LED lighting systems, and has significant economic and social benefits.

[0134] The embodiments of the present invention have been described in detail above, but the present invention is not limited to the described embodiments. For those skilled in the art, various changes, modifications, substitutions, and variations made to these embodiments without departing from the principles and spirit of the present invention still fall within the protection scope of the present invention.

Claims

1. A method for preparing a PCB embedded copper block, characterized in that, Includes the following steps: Step S1: Using dual-wavelength femtosecond laser layer etching technology, a gradient micro-nano texture structure is constructed on the copper block surface to be bonded. The gradient micro-nano texture structure includes a micron-level groove array and a submicron-level protrusion structure. The submicron-level protrusion structure is formed inside each micron-level groove in the micron-level groove array and on the remaining surface of the copper block surface other than the micron-level grooves. Step S2: Place the copper block after laser etching in a vacuum heat treatment furnace and perform interface nano-alloying treatment under a vacuum protective atmosphere to form a nano-alloy layer on the surface of the copper block in situ. Step S3: A copper embedding channel is processed on the PCB substrate, blind holes are processed on the inner wall of the copper embedding channel, and the inner wall of the copper embedding channel is subjected to plasma activation treatment. Step S4: Apply modified epoxy resin to the copper embedding groove, embed the copper block treated in steps S1 and S2 into the copper embedding groove and press it together. Step S5 involves using a three-stage gradient curing process for curing, which includes a low-temperature pre-curing stage, a high-temperature main curing stage, and a medium-temperature stress release stage.

2. The method for preparing PCB embedded copper blocks according to claim 1, characterized in that, In step S1, the micron-level grooves in the micron-level groove array are arranged in an alternating manner. The depth of the micron-level grooves is 8~12μm, the width is 20~30μm, and the spacing is 50~70μm. The submicron-level protrusions have a diameter of 300-500 nm, a height of 100-200 nm, and a spacing of 200-400 nm between them.

3. The method for preparing a PCB embedded copper block according to claim 1, characterized in that, In step S1, the dual-wavelength femtosecond laser layer etching technique includes: The micron-scale groove array was constructed using femtosecond laser etching with a wavelength of 1064 nm, a pulse width of 300 fs, a repetition frequency of 100 kHz, and a scanning speed of 400~600 mm / s. The submicron-scale protrusion structure was constructed using femtosecond laser etching with a wavelength of 532 nm, a pulse width of 200 fs, a repetition frequency of 200 kHz, and a scanning speed of 800~1000 mm / s.

4. The method for preparing a PCB embedded copper block according to claim 1, characterized in that, In step S2, the nanoscale alloy layer is a copper-titanium alloy layer or a copper-zirconium alloy layer, and the thickness of the nanoscale alloy layer is 50~100nm.

5. The method for preparing a PCB embedded copper block according to claim 4, characterized in that, The conditions for the interface nano-alloying treatment are: vacuum degree ≤1×10⁻³Pa, protective atmosphere is high-purity argon, heat treatment temperature is 400~450℃, holding time is 30~60 minutes, and after holding, cooling to room temperature at a rate of 5~10℃ / min.

6. The method for preparing a PCB embedded copper block according to claim 1, characterized in that, In step S3, the depth of the copper embedding groove is 0.1~0.2mm less than the thickness of the copper block, and the width is 0.05~0.1mm greater than the copper block; the diameter of the blind hole is 0.3~0.5mm, and the depth is 0.5~1mm.

7. The method for preparing a PCB embedded copper block according to claim 1, characterized in that, In step S4, the modified epoxy resin comprises the following components by weight percentage: 70-80 wt% epoxy resin, 15-20 wt% α-alumina nanoparticles, 2-5 wt% silane coupling agent, and 5-10 wt% curing agent.

8. The method for preparing a PCB embedded copper block according to claim 7, characterized in that, The epoxy resin is E-51 type bisphenol A type epoxy resin, the particle size of the α-alumina nanoparticles is 50~100nm, the silane coupling agent is KH560, and the curing agent is methyltetrahydrophthalic anhydride.

9. The method for preparing a PCB embedded copper block according to claim 1, characterized in that, In step S4, the pressing pressure is 0.5~1MPa, and the holding time is 5~10 minutes.

10. The method for preparing a PCB embedded copper block according to claim 1, characterized in that, In step S5, the three-stage gradient curing process is as follows: The first stage involves holding the temperature at 58-65℃ for 1-2 hours; the second stage involves holding the temperature at 115-125℃ for 2-3 hours; the third stage involves holding the temperature at 75-85℃ for 1-2 hours; and then cooling the temperature to room temperature at a rate not exceeding 5℃ / min.

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