A method for manufacturing a circuit board having a ground fence hole

Abstract

The application discloses a circuit board manufacturing method containing ground fence holes, and comprises the following steps: providing at least one sub-board, and manufacturing an isolation disc in the inner layer of the sub-board at a position corresponding to a preset signal hole, wherein the outer diameter of the isolation disc is larger than that of the signal hole; drilling a plurality of first ground fence holes arranged in an array on the sub-board, and then performing a black shadow process or a chemical copper deposition process on the hole wall of the first ground fence hole; manufacturing an outer layer circuit on the sub-board by adopting a negative film process; pressing the at least one sub-board and an outer layer core plate or an outer layer copper foil to form a production board by a prepreg, wherein the outer layer core plate has been manufactured with an inner layer circuit before being pressed; drilling a signal hole on the production board at a position corresponding to a preset signal hole, and performing sectional metalization on the signal hole by a through hole isolation process. In the application, the ground fence hole and the signal hole adopt different metalization processes, which not only meets the strict requirement of the signal hole on reliability, but also reduces the processing cost of the ground fence hole.

Description

Technical Field

[0001] This invention relates to the field of printed circuit board technology, and specifically to a method for manufacturing a circuit board containing a grounding fence hole. Background Technology

[0002] Grounding vias (also known as grounding fence vias) play a crucial role in microwave and high-frequency / high-speed circuit boards. Their main uses include: 1. Suppressing resonance and improving signal integrity: In transmission line structures such as grounded coplanar waveguides (GCPWs), a resonant cavity is easily formed between the center conductor and the ground wires on both sides, causing resonance at a specific frequency and severely affecting signal transmission quality. By densely arranging grounding fence holes on both sides of the transmission line, the resonance phenomenon can be effectively suppressed, pushing the resonant frequency to a higher frequency band, thereby ensuring the stable performance of the circuit within the target operating frequency band.

[0003] 2. Enhanced electromagnetic shielding and improved isolation: The grounding fence holes form an "electromagnetic wall," confining the electromagnetic field generated by the signal lines to the vicinity of the transmission lines, preventing it from radiating to other areas of the circuit board, and blocking external noise interference. This greatly improves the isolation between signal lines and reduces crosstalk, which is especially important for high-density integrated microwave circuits.

[0004] 3. Provide a low-impedance grounding loop: Provide the shortest and lowest impedance return path for high-frequency signals to ensure the integrity of the signal loop, which is crucial for maintaining signal quality.

[0005] Compared to conventional electrical interconnect holes, grounding fence holes have the following significant characteristics: 1. High-density array arrangement: To achieve effective electromagnetic shielding and resonance suppression, grounding fence vias are typically arranged in rows or arrays with extremely small spacing (such as 0.1mm, 0.2mm, etc.). Studies have shown that the smaller the via spacing, the better the high-frequency performance and the higher the upper limit of the effective operating frequency.

[0006] 2. Simple electrical function: Its core function is to provide a grounding connection, rather than to transmit complex high-speed signals. Therefore, the design focus is on ensuring a dense connection with the ground layer, and the accuracy requirements for impedance control are much lower than those for signal vias.

[0007] 3. Sensitive to spacing: The performance of grounding fence vias is closely related to their spacing (d) and transmission line slot width (S). When the via spacing is too large, its shielding and resonance suppression effects will be significantly weakened.

[0008] Grounding fence holes and signal holes differ fundamentally in function and performance, which directly leads to different manufacturing process requirements, as shown in the table below: On the same circuit board, there must be signal vias along with grounding vias. Existing traditional processes usually process grounding vias and signal vias simultaneously in the same process. However, using the same complex and expensive processes (such as via-filling plating or pattern plating) for the inner-layer grounding vias as for the signal vias would result in unnecessary cost waste. Conversely, if the same simple metallization process is used for the signal vias as for the grounding vias, it would not meet their stringent signal integrity and reliability requirements. Summary of the Invention

[0009] In view of the above-mentioned technical defects, the present invention provides a method for manufacturing a circuit board with grounding fence holes, which not only meets the stringent reliability requirements of signal holes, but also reduces the processing cost of grounding fence holes.

[0010] To solve the above-mentioned technical problems, the present invention provides a method for manufacturing a circuit board containing grounding fence holes, comprising the following steps: S1. Provide at least one sub-board with three or four circuit layers, wherein the inner layer of the sub-board has been fabricated with inner layer circuitry, and an isolation disk formed of alkali-soluble photocurable ink is fabricated in the inner layer of the sub-board at a position corresponding to a preset signal hole, wherein the outer diameter of the isolation disk is larger than the outer diameter of the signal hole. S2. Drill several first grounding grid holes in an array at a preset position on the sub-board, and then use a black shadow process or chemical copper plating process to metallize the hole walls of the first grounding grid holes. S3. Use negative film technology to fabricate the outer layer circuitry on the daughterboard; S4. At least one sub-board is laminated with an outer core board or an outer copper foil using a prepreg to form a production board. At least two isolation disks are provided in the inner layer of the production board at the positions corresponding to the signal holes. The outer core board has its inner layer circuitry fabricated before lamination. S5. Drill through-hole-shaped signal holes at the preset signal hole positions on the production board to expose the inner layer isolation disk on the inner wall of the signal hole; and drill several second grounding fence holes arranged in an array at the preset positions on the production board. S6. The signal hole is segmented and metallized by a through-hole isolation process to isolate the inside of the through hole into a signal hole with at least two conductive sections, while the second grounding fence hole is metallized.

[0011] Furthermore, in step S1, when fabricating the inner layer circuitry on the inner layer of the sub-board, the copper layer at the corresponding second drilling position is also removed; in step S2, the first grounding fence hole is drilled using laser drilling, and the first grounding fence hole is a blind hole or a through hole.

[0012] Furthermore, the following steps are included before step S1: S01. An inner layer circuit is fabricated on an inner core board, and a first signal line and a first grounding copper foil surrounding the first signal line are fabricated on one surface, and a first coplanar grounding copper foil is fabricated on the other surface; a copper disk or hole ring is also fabricated on at least one surface of the inner core board at a position corresponding to a preset signal hole; the outer diameter of the copper disk or hole ring is larger than the outer diameter of the signal hole. S02. Coat the surface of the copper disk or hole ring with an alkali-soluble photocurable ink with an outer diameter larger than that of the signal hole, and expose and cure the alkali-soluble photocurable ink with UV light to form an isolation disk. S03. The inner core board and the outer copper foil are pressed together using a prepreg to form a three- or four-layer sub-board.

[0013] Furthermore, the first grounding fence holes are arranged on both sides of the first signal line and located inside the first grounding copper foil, so that the first grounding copper foil is connected to the two outer layers of the sub-board.

[0014] Furthermore, in step S3, when fabricating the outer layer circuit, a second signal line and a second grounding copper strip surrounding the second signal line are fabricated on one surface of the sub-board, and a second coplanar grounding copper strip is fabricated on the other surface of the sub-board. The first grounding fence holes are arranged on both sides of the second signal line and are connected to the second grounding copper strip and the second coplanar grounding copper strip. The first signal line and the second signal line are vertically aligned, and the first coplanar grounding copper strip is located between the second signal line and the first signal line. The first signal line and the second coplanar grounding copper strip are arranged adjacent to each other internally and externally, and the first grounding fence holes are connected vertically to the second grounding copper strip, the first coplanar grounding copper strip, the first grounding copper strip, and the second coplanar grounding copper strip in sequence.

[0015] Furthermore, in step S3, when fabricating the outer layer circuit, a copper disk or hole ring is fabricated on at least one surface of the sub-board at the position corresponding to the preset signal hole. The outer diameter of the copper disk or hole ring is larger than the outer diameter of the signal hole. Then, an alkali-soluble photocurable ink with an outer diameter larger than the outer diameter of the signal hole is coated on the surface of the copper disk or hole ring, and the alkali-soluble photocurable ink is exposed and cured by UV light to form an isolation disk.

[0016] Furthermore, the through-hole partitioning process in step S6 specifically includes the following steps: S61. The isolation disk inside the signal hole is removed by etching to form an etched position, and an isolation band is formed between every two etched positions; the ratio between the depth and thickness of the etched position is ≥3:1. S62. The production board is subjected to copper plating and DC flash plating in sequence. A copper layer is plated on the hole walls of the second grounding fence hole and the signal hole, while no copper layer is plated on the etched position. S63. Finally, pulse electroplating is performed on the production board to remove the copper layer on the hole wall of the isolation strip, forming an interlayer electrical isolation through-hole isolation structure so that the signal hole can be used as an isolation through-hole for high-frequency signal transmission.

[0017] Furthermore, in step S61, during etching, the production board is immersed in a sodium hydroxide solution at 60 degrees Celsius for 30-120 minutes to dissolve and remove the alkali-soluble UV curing ink; and the mass percentage of the solute in the sodium hydroxide solution is 10%.

[0018] Furthermore, the current density during DC flash plating is 0.8-1.5 ASD, and the time is 3-6 min; the copper layer thickness on the hole wall is plated to 1-2 μm during DC flash plating; the total time for pulse plating is 6 min, and the current density for forward pulse plating in each cycle is 3 ASD, and the time is 10 ms, while the current density for reverse pulse plating is 9 ASD, and the time is ≥10 ms.

[0019] Furthermore, in step S4, a third signal line is fabricated on the inner layer of the outer core board and / or the outer layer of the production board; in step S5, the second grounding fence holes are arranged on both sides of the third signal line, and the second grounding fence holes are blind holes.

[0020] Furthermore, after step S6, the following steps are also included: S7. Fabricate the outer layer circuit on the production board, and fabricate the third signal line located on the outer layer and the third grounding copper foil surrounding the third signal line. The second grounding fence hole is connected to the third grounding copper foil.

[0021] Compared with the prior art, the present invention has the following beneficial effects: In this invention, the inner grounding fence holes and signal holes employ different metallization processes. The inner grounding fence holes are metallized using only a low-cost, simple black shadow process or chemical copper plating process, eliminating the need for costly and complex processes such as via-filling electroplating and pattern electroplating. The inner grounding fence holes only need to meet the basic grounding conductivity and electromagnetic shielding requirements, significantly reducing the processing cost of mass production, simplifying the production process, and improving processing efficiency. The signal holes are metallized using a through-hole isolation process, achieving segmented metallization of the signal holes, precisely eliminating signal pins, and strictly controlling the thickness and uniformity of the copper in the holes, thoroughly meeting the stringent requirements of high-frequency signal transmission for impedance stability, signal integrity, and interlayer insulation reliability. Therefore, this invention not only meets the stringent reliability requirements of signal holes but also reduces the processing cost of grounding fence holes. Through refined process segmentation, it balances the high-frequency operating performance of the circuit board with production economy, solving the problem of insufficient performance or cost waste caused by the traditional "one-size-fits-all" processing. It is suitable for the large-scale production of high-density, high-frequency, and high-speed circuit boards, with strong process stability and high cost-effectiveness.

[0022] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and will become apparent from the description or may be learned by practice of the invention. Attached Figure Description

[0023] Figure 1 This is a schematic diagram of the first core board after the isolation disk has been fabricated in the embodiment; Figure 2 This is a schematic diagram of the second core board after the isolation disk has been fabricated in the embodiment; Figure 3 This is a schematic diagram showing the inner layer circuitry fabricated on the third core board in the embodiment. Figure 4 This is a schematic diagram showing the first grounding fence hole in the form of a blind hole drilled on the sub-board in the embodiment. Figure 5 This is a schematic diagram of the first grounding fence hole in the form of a through hole drilled in another embodiment; Figure 6 for Figure 5 A schematic diagram of the sub-board after hole metallization and inner layer circuitry fabrication; Figure 7 This is a schematic diagram of the production board in Example 1; Figure 8 This is a schematic diagram showing the second grounding fence hole and signal hole drilled on the production board in Example 1; Figure 9 This is a schematic diagram of the production board in Example 1 after hole metallization and pulse electroplating treatment; Figure 10 This is a schematic diagram of the production board in Example 1 after the outer layer circuitry has been fabricated. Detailed Implementation

[0024] The technical solutions of the present invention will be clearly and completely described below with reference to the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0025] It should be understood that, when used in this specification and the appended claims, the terms "comprising" and "including" indicate the presence of the described features, integrals, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or collections thereof.

[0026] It should also be understood that the terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the invention. As used in this specification and the appended claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms unless the context clearly indicates otherwise.

[0027] It should also be further understood that the term "and / or" as used in this specification and the appended claims refers to any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.

[0028] Example 1 The method for manufacturing a circuit board with a grounding fence hole shown in this embodiment includes the following processing steps in sequence: (1) Cutting: Cut the first core board, the second core board and the third core board according to the panel size of 520mm×620mm. The first core board is used as the inner core board, and the second and third core boards are used as the outer core boards. The thickness of all core boards is 0.5mm, and the copper layer thickness on both surfaces of the core board is 0.5oz.

[0029] The first core board, the second core board, and the third core board are all provided with a first drilling position (i.e., a preset signal hole position). The first core board is also provided with several arranged second drilling positions (i.e., preset first grounding fence hole positions). The second core board and the third core board are also provided with several arranged third drilling positions (i.e., preset second grounding fence hole positions). The drilling positions are the positions where drilling is required in subsequent processing.

[0030] Specifically, all holes other than grounding fence holes are collectively referred to as signal holes.

[0031] (2) Inner layer circuit fabrication (negative film process): Inner layer pattern transfer, photosensitive film is coated using a vertical coating machine, and the film thickness of the photosensitive film is controlled at 8μm. A fully automatic exposure machine is used, and the inner layer circuit is exposed on the first core board, the second core board, and the third core board respectively with 5-6 exposure rulers (21 exposure rulers). After development, the inner layer circuit pattern is formed; Inner layer etching, the inner layer circuit is etched on the three core boards after exposure and development. The inner layer line width is measured to be 3mil; Inner layer AOI, and then the inner layer circuit is checked for defects such as open circuits, short circuits, line gaps, and line pinholes. Defective products are scrapped, and defect-free products are sent to the next process.

[0032] In one embodiment, such as Figure 1 As shown, when fabricating the inner layer circuit on the first core board, the copper layer corresponding to the second drill hole position is etched away, and a first signal line 1 and a first ground copper foil 2 surrounding the first signal line 1 are fabricated on one surface of the first core board, and a first coplanar ground copper foil 3 is fabricated on the other surface of the first core board.

[0033] In one embodiment, such as Figure 2 As shown, when fabricating inner layer circuitry on the second core board, a third coplanar ground copper foil 11 is also fabricated on one surface of the second core board.

[0034] In one embodiment, such as Figure 3 As shown, when fabricating the inner layer circuitry on the third core board, a third signal line 4 and a third grounding copper foil 5 surrounding the third signal line 4 are also fabricated on one surface of the third core board.

[0035] In one embodiment, such as Figure 1 and Figure 2 As shown, when the inner layer circuits are fabricated on the first core board and the second core board, a copper disk or hole ring 6 is fabricated on at least one surface of both at the corresponding first drill hole position. The outer diameter of the copper disk or hole ring 6 is more than 300 μm larger than the outer diameter of the first drill hole position. Preferably, the copper disk or hole ring is fabricated on only one surface of the first core board and the second core board, and the third coplanar ground copper foil and the copper disk or hole ring on the second core board are located on the same side.

[0036] (3) Coating the isolation layer: A layer of alkali-soluble photocurable ink with an outer diameter larger than the outer diameter of the drilled hole is coated on the surface of the copper disk or hole ring 6, and the alkali-soluble photocurable ink is exposed and cured by UV light to form the isolation disk 7 (e.g. Figure 1 and Figure 2 (As shown).

[0037] In one embodiment, the outer diameter of the isolation disk is 0.14-0.3 mm larger than the outer diameter of the first drilled hole, and the thickness of the isolation disk is 5-50 μm. It is only necessary to ensure that the ratio between the radius of the isolation disk minus the radius of the first drilled hole (i.e., the ring width of the isolation disk after removing the first drilled hole portion) and the thickness of the isolation disk is controlled at ≥3:1. The conductivity at the etched position is very poor under this ratio, which can ensure that no copper layer will be deposited at the etched position during the subsequent chemical copper deposition.

[0038] Preferably, the outer diameter of the isolation disk is 0.14 mm larger than the outer diameter of the first drilled hole, and the thickness is 20 μm. That is, the circumference width of the isolation disk after removing the portion at the first drilled hole is 70 μm.

[0039] (4) Lamination: The browning speed is based on the thickness of the bottom copper. The outer copper foil, prepreg, first core board, prepreg and outer copper foil are stacked in sequence. Then, according to the Tg of the board material, appropriate lamination conditions are selected to press the laminated board to form a four-layer sub-board.

[0040] (5) Drilling: Using laser drilling, through-hole-shaped first grounding fence holes 12 are drilled at the corresponding second drilling positions on the sub-board (e.g., Figure 5 As shown), it is used to connect the upper and lower surfaces of the sub-board, serving as a grounding fence hole for the inner layer.

[0041] The first grounding fence holes are arranged on both sides of the first signal line and located inside the first grounding copper foil. That is, at least one row of first grounding fence holes is provided on both sides of the first signal line, and several first grounding fence holes in each row are distributed at intervals along the extension direction of the first signal line.

[0042] In one embodiment, the spacing between two adjacent first grounding fence holes in the same row is preferably 0.1-0.2 mm.

[0043] In another different embodiment, blind-hole-shaped first grounding fence holes 12 can also be drilled at the corresponding second drill hole positions on the sub-board (e.g., Figure 4 As shown in the figure, the first grounding grid hole is changed to a blind hole, so that the first grounding grid hole extends to the bottom outer copper foil.

[0044] (6) Hole metallization: For the blind hole structure, the hole wall of the first grounding fence hole is metallized by using the black shadow process, and the two outer copper foils of the upper and lower connecting sub-board and the inner first grounding copper foil and the first coplanar grounding copper foil are used to form a fully enclosed electromagnetic shielding fence structure around the first signal line.

[0045] In another different embodiment, for a through-hole structure, the hole wall of the first through-hole can be metallized using a black shadow process or a chemical copper plating process.

[0046] (7) Outer layer circuit fabrication (negative film process): outer layer pattern transfer, photosensitive film is coated with a vertical coating machine, the film thickness of the photosensitive film is controlled at 8μm, a fully automatic exposure machine is used, and the outer layer circuit is exposed on the daughter board with 5-6 exposure rulers (21 exposure rulers), and the outer layer circuit pattern is formed after development; outer layer etching, the outer layer circuit is etched on the exposed and developed daughter board, and the outer layer line width is measured to be 3mil; outer layer AOI, and then check the outer layer circuit for open and short circuits, line gaps, line pinholes and other defects. Defective products are scrapped, and defect-free products are sent to the next process.

[0047] In one embodiment, such as Figure 6 As shown, when fabricating the outer layer circuitry on the daughterboard, a second signal line 8 and a second grounding copper foil 9 surrounding the second signal line 8 are fabricated on the surface of the daughterboard away from the first signal line 1, so that the first coplanar grounding copper foil 3 is located between the second signal line 8 and the first signal line 1, and the second signal line 8 and the first signal line 1 are vertically aligned. The first grounding fence holes are all located within the second grounding copper foil 9. On another surface of the daughterboard, a second coplanar grounding copper foil 10 is fabricated to cover the first signal line and the second drilled hole, so that the metallized first grounding fence holes are sequentially connected vertically to the second grounding copper foil 9, the first coplanar grounding copper foil 3, the first grounding copper foil 2, and the second coplanar grounding copper foil 10.

[0048] In one embodiment, depending on actual needs, when fabricating inner layer circuitry on the sub-board, a copper disk or hole ring can be fabricated at a first drilled hole position on at least one surface of the sub-board. The outer diameter of the copper disk or hole ring is more than 300 μm larger than the outer diameter of the first drilled hole position. An alkali-soluble photocurable ink with an outer diameter larger than the outer diameter of the drilled hole position is coated on the surface of the copper disk or hole ring. The alkali-soluble photocurable ink is then exposed and cured by UV light to form an isolation disk.

[0049] (8) Lamination: The browning speed is based on the thickness of the bottom copper layer. The second core board, prepreg, sub-board, prepreg and third core board are stacked in sequence. Then, according to the Tg of the board material, appropriate lamination conditions are selected to laminate the stacked boards to form an eight-layer production board (e.g. Figure 7 (as shown); wherein, the third signal line in the third core board is located on the inner side and is adjacent to the second coplanar copper foil in the sub-board, the side of the second core board with the copper disk or hole ring is located on the inner side, and the third signal line and the first signal line are staggered.

[0050] (9) Drilling: such as Figure 8 As shown, the third core board in the production board is positioned with one side facing down. Using laser drilling, second grounding gate holes 14 are drilled on one side of the second core board at the corresponding third drill hole positions, connecting to the outermost layer circuitry (i.e., the inner third coplanar ground copper foil 11). These second grounding gate holes 14 are blind holes, used to connect the inner and outer layers of the second core board. After flipping the production board, second grounding gate holes 14 are drilled on one side of the third core board at the corresponding third drill hole positions, connecting to the second coplanar ground copper foil. These second grounding gate holes 14 are also blind holes, serving as the outer layer grounding gate. Ground fence holes; finally, signal holes 15 are drilled at the corresponding first drill hole position using laser drilling or mechanical drilling. The signal holes penetrate the inner layer isolation disk and the middle of the copper disk or hole ring, so that the isolation disk is exposed on the wall of the signal hole. The ratio of the remaining ring width (70μm) to the thickness (20μm) of the isolation disk is 3.5:1. And by setting up isolation disks in pairs, the purpose of segmented isolation is achieved by cooperating with each pair. Thus, the isolation zone between every two adjacent isolation disks in the same signal hole can be designed, that is, the isolation zone between two isolation disks in the same group can be designed.

[0051] In the above, at least one row of second grounding fence holes is provided on both sides of the third signal line, and several second grounding fence holes in each row are distributed at intervals along the extension direction of the third signal line.

[0052] (10) Concave etching: Immerse the production plate in a sodium hydroxide solution at 60 degrees Celsius for 30 minutes to remove the isolation pads on the hole walls by concave etching, forming concave etched sites 16 (e.g. Figure 9As shown), the ratio between the depth and thickness of the etched position 16 is 3.5:1. The conductivity at the etched position is very poor under this ratio, which can ensure that the copper layer at the etched position is very thin or even not plated at all during subsequent chemical copper plating and copper plating.

[0053] In one embodiment, the concentration of the sodium hydroxide solution is 10%, meaning that the mass percentage of the solute (i.e., sodium hydroxide) in the sodium hydroxide solution is 10%, and the remainder is water.

[0054] (11) Copper plating: A thin layer of copper is deposited on the board surface and hole walls using chemical copper plating to metallize the second grounding fence hole and signal hole. The backlight test is level 10, and the copper plating thickness in the hole is 0.5 micrometers. No copper layer is deposited at the 16 etched positions to maintain insulation properties.

[0055] (12) DC flash plating: According to the design requirements, DC flash plating is performed on the production board. The current density during DC flash plating is 1.2ASD and the time is 4min, thereby thickening the copper in the hole to 1-2μm, preferably to 1.5μm. Due to poor conductivity, the etched position 16 has no copper layer or the copper layer is very thin (generally <1μm), resulting in poor conductivity or even no conductivity of the copper layer on the hole wall between two adjacent etched positions (i.e., etched positions in the same group). Therefore, the copper layer on the hole wall in this isolation section is not thickened during DC flash plating.

[0056] (13) Pulse plating: Periodic forward and reverse pulse plating is used to plate the production board. Because no copper layer is deposited at the etched positions, the copper layer on the hole wall between two adjacent etched positions has very poor conductivity, or even no conductivity. During forward and reverse pulse plating, the copper layer on the hole wall of the isolation band will dissolve into the plating solution to form a copper-free isolation band 17 (e.g. Figure 9 As shown in the figure, the copper layer on the hole wall where current is conducted will be thickened by electroplating.

[0057] In one embodiment, the total pulse electroplating time is 6 minutes, and the current density of the forward pulse electroplating in each cycle is 3 ASD and the time is 10 ms, while the current density of the reverse pulse electroplating is 9 ASD and the time is ≥10 ms, preferably 12 ms.

[0058] (14) Fabrication of outer layer circuits (negative film process): outer layer pattern transfer, using a fully automatic exposure machine and negative circuit film, the outer layer circuit is exposed with 5 to 7 exposure rulers (21 exposure rulers), and after development, the outer layer circuit pattern is formed on the production board; outer layer etching, the outer layer circuit is etched out on the exposed and developed production board; outer layer AOI, using an automatic optical inspection system, by comparing with CAM data, to detect whether there are defects such as open circuits, gaps, incomplete etching, and short circuits in the outer layer circuit.

[0059] Specifically, such as Figure 10As shown, when manufacturing the outer layer circuit, a third signal line 4 and a third grounding copper foil 5 surrounding the third signal line 4 are manufactured together on the outer side of the second core board in the production board. The second grounding fence hole connects the third grounding copper foil 5 and the third coplanar grounding copper foil 11 on its inner side. On the outer side of the third core board in the production board, a third coplanar grounding copper foil 11 covering the inner side of the third signal line 4 and the second grounding fence hole 14 is manufactured. Thus, the third signal line 4 located in the sub-outer layer and the outer layer are manufactured on both sides of the production board, and a fully enclosed fence is formed around the third signal line in the sub-outer layer, while a semi-enclosed fence is formed around the third signal line in the outer layer.

[0060] In one specific embodiment, after completing the above step (14), other post-processing is carried out sequentially on the production board according to the prior art, such as making solder mask layer, surface treatment, molding, electrical testing, FQC, FQA and packaging, etc., and finally the required circuit board is obtained.

[0061] In other embodiments, the third signal line and the third grounding copper foil may not be fabricated on the outer and second outer layers of the production board, that is, the grounding fence hole of the outer layer may not be fabricated on the production board.

[0062] Example 2 The method for manufacturing a circuit board with a grounding fence hole shown in this embodiment is basically the same as that in Embodiment 1, except for step (8), which is as follows: (8) Lamination: The browning speed is based on the thickness of the bottom copper layer. The outer copper foil, prepreg, sub-board, prepreg and outer copper foil are stacked in sequence. Then, according to the Tg of the board material, the appropriate lamination conditions are selected to press the stacked board to form a six-layer production board.

[0063] In subsequent steps, according to the scheme of Example 1, a third signal line and a third ground copper foil can be fabricated at least one outer layer of the production board; of course, it is also possible not to fabricate the third signal line and the third ground copper foil on the outer layer, that is, not to fabricate the grounding fence hole on the outer layer of the production board.

[0064] The technical solutions provided by the embodiments of the present invention have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of the embodiments of the present invention. The descriptions of the embodiments above are only for helping to understand the principles of the embodiments of the present invention. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the embodiments of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.

Claims

1. A method for manufacturing a circuit board containing grounding fence holes, characterized in that, Includes the following steps: S1. Provide at least one sub-board with three or four circuit layers, wherein the inner layer of the sub-board has been fabricated with inner layer circuitry, and an isolation disk formed of alkali-soluble photocurable ink is fabricated in the inner layer of the sub-board at a position corresponding to a preset signal hole, wherein the outer diameter of the isolation disk is larger than the outer diameter of the signal hole. S2. Drill several first grounding grid holes in an array at a preset position on the sub-board, and then use a black shadow process or chemical copper plating process to metallize the hole walls of the first grounding grid holes. S3. Use negative film technology to fabricate the outer layer circuitry on the daughterboard; S4. At least one sub-board is laminated with an outer core board or an outer copper foil using a prepreg to form a production board. At least two isolation disks are provided in the inner layer of the production board at the positions corresponding to the signal holes. The outer core board has its inner layer circuitry fabricated before lamination. S5. Drill through-hole-shaped signal holes at the preset signal hole positions on the production board to expose the inner layer isolation disk on the inner wall of the signal hole; and drill several second grounding fence holes arranged in an array at the preset positions on the production board. S6. The signal hole is segmented and metallized by a through-hole isolation process to isolate the inside of the through hole into a signal hole with at least two conductive sections, while the second grounding fence hole is metallized.

2. The method for manufacturing a circuit board with grounding fence holes according to claim 1, characterized in that, In step S1, when fabricating the inner layer circuitry on the inner layer of the sub-board, the copper layer at the corresponding second drill hole position is removed at the same time; in step S2, the first grounding fence hole is drilled by laser drilling, and the first grounding fence hole is a blind hole or a through hole.

3. The method for manufacturing a circuit board with grounding fence holes according to claim 1, characterized in that, The following steps are included before step S1: S01. An inner layer circuit is fabricated on an inner core board, and a first signal line and a first grounding copper foil surrounding the first signal line are fabricated on one surface, and a first coplanar grounding copper foil is fabricated on the other surface; a copper disk or hole ring is also fabricated on at least one surface of the inner core board at a position corresponding to a preset signal hole; the outer diameter of the copper disk or hole ring is larger than the outer diameter of the signal hole. S02. Coat the surface of the copper disk or hole ring with an alkali-soluble photocurable ink with an outer diameter larger than that of the signal hole, and expose and cure the alkali-soluble photocurable ink with UV light to form an isolation disk. S03. The inner core board and the outer copper foil are pressed together using a prepreg to form a three- or four-layer sub-board.

4. The method for manufacturing a circuit board with grounding fence holes according to claim 3, characterized in that, The first grounding fence holes are arranged on both sides of the first signal line and located inside the first grounding copper foil, so that the first grounding copper foil is connected to the two outer layers of the sub-board.

5. The method for manufacturing a circuit board with grounding fence holes according to claim 4, characterized in that, In step S3, when fabricating the outer layer circuit, a second signal line and a second grounding copper strip surrounding the second signal line are fabricated on one surface of the sub-board. A second coplanar grounding copper strip is fabricated on the other surface of the sub-board. The first grounding fence holes are arranged on both sides of the second signal line and are connected to the second grounding copper strip and the second coplanar grounding copper strip. The first signal line and the second signal line are vertically aligned, and the first coplanar grounding copper strip is located between the second signal line and the first signal line. The first signal line and the second coplanar grounding copper strip are arranged adjacent to each other internally and externally. The first grounding fence holes are connected vertically to the second grounding copper strip, the first coplanar grounding copper strip, the first grounding copper strip, and the second coplanar grounding copper strip in sequence.

6. The method for manufacturing a circuit board with grounding fence holes according to claim 5, characterized in that, In step S3, when fabricating the outer layer circuit, a copper disk or hole ring is fabricated on at least one surface of the sub-board at the position corresponding to the preset signal hole. The outer diameter of the copper disk or hole ring is larger than the outer diameter of the signal hole. Then, an alkali-soluble photocurable ink with an outer diameter larger than the outer diameter of the signal hole is coated on the surface of the copper disk or hole ring, and the alkali-soluble photocurable ink is exposed and cured by UV light to form an isolation disk.

7. The method for manufacturing a circuit board containing a grounding fence hole according to any one of claims 1-6, characterized in that, The through-hole partitioning process in step S6 specifically includes the following steps: S61. The isolation disk inside the signal hole is removed by etching to form an etched position, and an isolation band is formed between every two etched positions; the ratio between the depth and thickness of the etched position is ≥3:

1. S62. The production board is subjected to copper plating and DC flash plating in sequence. A copper layer is plated on the hole walls of the second grounding fence hole and the signal hole, while no copper layer is plated on the etched position. S63. Finally, pulse electroplating is performed on the production board to remove the copper layer on the hole wall of the isolation strip, forming an interlayer electrical isolation through-hole isolation structure so that the signal hole can be used as an isolation through-hole for high-frequency signal transmission.

8. The method for manufacturing a circuit board with grounding fence holes according to claim 7, characterized in that, In step S61, during etching, the production board is immersed in a sodium hydroxide solution at 60 degrees Celsius for 30-120 minutes to dissolve and remove the alkali-soluble UV curing ink; and the mass percentage of the solute in the sodium hydroxide solution is 10%.

9. The method for manufacturing a circuit board with grounding fence holes according to claim 7, characterized in that, The current density for DC flash plating is 0.8-1.5 ASD, and the time is 3-6 min. The copper layer thickness on the hole wall is 1-2 μm during DC flash plating. The total time for pulse plating is 6 min, and the current density for forward pulse plating in each cycle is 3 ASD, and the time is 10 ms. The current density for reverse pulse plating is 9 ASD, and the time is ≥10 ms.

10. The method for manufacturing a circuit board with grounding fence holes according to claim 1, characterized in that, In step S4, a third signal line is fabricated on the inner layer of the outer core board and / or the outer layer of the production board; in step S5, the second grounding fence holes are arranged on both sides of the third signal line, and the second grounding fence holes are blind holes.

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