storage device

Abstract

The embodiment relates to a storage device. A semiconductor extends along a first surface including intersecting first and second directions, having an annular shape, having a first portion on the first direction side and a second portion on the side opposite to the first direction. A second insulator is located on the first portion of the semiconductor. A second insulator is located on the second portion of the semiconductor. A first conductor has a first portion disposed on the second insulator and in a third direction intersecting the first and second directions, separating the second insulator from the first portion of the semiconductor. The second conductor is in contact with the first conductor. A third conductor is in contact with the first portion of the semiconductor. The third insulator and the first portion of the semiconductor together sandwich the third conductor. A fourth conductor and the third conductor together sandwich the third insulator.

Description

Technical Field

[0001] The implementation generally relates to a storage device. Background Technology

[0002] To improve the integration of storage cells, a storage device containing storage cells arranged in three dimensions is known. Summary of the Invention

[0003] A storage device with high performance is provided.

[0004] A storage device according to one embodiment includes a semiconductor, a second insulator, a first conductor, a third conductor, a fourth conductor, and a fifth conductor. The semiconductor extends along a first surface including intersecting first and second directions, has an annular shape, has a first portion on the first direction side, and a second portion on the side opposite to the first direction. The second insulator is located on the first portion of the semiconductor. The first conductor has a first portion disposed on the second insulator and in a third direction intersecting the first and second directions further than the second insulator, separating the first portion of the semiconductor facing the second insulator. The second conductor is in contact with the first conductor. The third conductor is in contact with the first portion of the semiconductor. The third insulator, together with the first portion of the semiconductor, sandwiches the third conductor. The fourth conductor sandwiches the third insulator together with the third conductor. Attached Figure Description

[0005] Figure 1 This section shows the components of the storage device according to the first embodiment and the connections between them.

[0006] Figure 2 This describes the constituent elements of the storage unit of the storage device according to the first embodiment and the connection of the constituent elements.

[0007] Figure 3 The diagram schematically shows a portion of the cross-sectional structure of the storage device according to the first embodiment.

[0008] Figure 4 The diagram schematically shows a portion of the cross-sectional structure of the storage device according to the first embodiment.

[0009] Figure 5 This shows a partial cross-sectional view of the storage device according to the first embodiment.

[0010] Figure 6 The structure shows a partial cross-section of the storage device according to the first embodiment.

[0011] Figure 7 This shows a partial cross-sectional view of the storage device according to the first embodiment.

[0012] Figure 8 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0013] Figure 9 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0014] Figure 10 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0015] Figure 11 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0016] Figure 12 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0017] Figure 13 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0018] Figure 14 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0019] Figure 15 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0020] Figure 16 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0021] Figure 17 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0022] Figure 18 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0023] Figure 19 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0024] Figure 20 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0025] Figure 21A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0026] Figure 22 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0027] Figure 23 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0028] Figure 24 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0029] Figure 25 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0030] Figure 26 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0031] Figure 27 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0032] Figure 28 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0033] Figure 29 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0034] Figure 30 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0035] Figure 31 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0036] Figure 32 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0037] Figure 33 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0038] Figure 34 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0039] Figure 35 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0040] Figure 36 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0041] Figure 37 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0042] Figure 38 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0043] Figure 39 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0044] Figure 40 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0045] Figure 41 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0046] Figure 42 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0047] Figure 43 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0048] Figure 44 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0049] Figure 45 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0050] Figure 46 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0051] Figure 47 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0052] Figure 48 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0053] Figure 49 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0054] Figure 50A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0055] Figure 51 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0056] Figure 52 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0057] Figure 53 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0058] Figure 54 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0059] Figure 55 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0060] Figure 56 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0061] Figure 57 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0062] Figure 58 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0063] Figure 59 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0064] Figure 60 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0065] Figure 61 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0066] Figure 62 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0067] Figure 63 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0068] Figure 64 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0069] Figure 65 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0070] Figure 66 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0071] Figure 67 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0072] Figure 68 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0073] Figure 69 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0074] Figure 70 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0075] Figure 71 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0076] Figure 72 This shows a partial cross-sectional view of the storage device according to the second embodiment.

[0077] Figure 73 This shows a partial cross-sectional view of the storage device according to the second embodiment.

[0078] Figure 74 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the second embodiment.

[0079] Figure 75 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the second embodiment.

[0080] Figure 76 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the second embodiment.

[0081] Figure 77 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the second embodiment.

[0082] Figure 78 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the second embodiment.

[0083] Figure 79A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the second embodiment.

[0084] Figure 80 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the second embodiment.

[0085] Figure 81 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the second embodiment.

[0086] Figure 82 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the second embodiment.

[0087] Figure 83 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the second embodiment. Detailed Implementation

[0088] Hereinafter, embodiments are described with reference to the accompanying drawings. To distinguish between multiple components having substantially the same function and structure in a particular embodiment or different embodiments, numbers or words may be added to the end of the reference numerals. In embodiments following a previously described embodiment, the differences from the previously described embodiment are mainly described. All descriptions related to a particular embodiment, unless explicitly or clearly excluded, also apply to the descriptions of other embodiments.

[0089] The accompanying drawings are illustrative, and the relationship between thickness and planar dimensions, the ratio of thickness of each layer, etc., may differ from reality. In addition, the drawings may also contain parts with different dimensional relationships, arrangements, and / or ratios.

[0090] Within the scope of this specification and the claims, a first element being "connected to" another second element includes the first element being connected to the second element directly or via an element that is always or selectively conductive.

[0091] 1. First Implementation Method

[0092] 1.1. Composition (Structure)

[0093] Figure 1 The diagram illustrates the components and connections of the storage device according to the first embodiment. The storage device 1 is a device for storing data. The storage device 1 includes a storage cell array 11, an input / output circuit 12, a control circuit 13, a voltage generation circuit 14, a row selection circuit 15, a column selection circuit 16, a write circuit 17, a readout circuit 18, and a sense amplifier 19.

[0094] The storage cell array 11 is a component for storing data. The storage cell array 11 includes multiple storage cells MC. Each storage cell MC can store 1 bit of data. The storage cell array 11 also includes word lines WL and bit lines BL, etc. Each storage cell MC is connected to one bit line BL and one word line WL. The storage cell MC is connected between the bit line BL and the board line PL (not shown).

[0095] Input / output circuit 12 is a circuit for inputting and outputting data and signals. Input / output circuit 12 receives control signal CNT, instruction CMD, address signal ADD, and data DAT from outside the storage device 1. Input / output circuit 12 outputs data DAT.

[0096] The control circuit 13 is a circuit that controls the operation of the storage device 1. The control circuit 13 receives the instruction CMD and the control signal CNT from the input / output circuit 12. Based on the control indicated by the instruction CMD and the control signal CNT, the control circuit 13 controls the write circuit 17 and the read circuit 18.

[0097] The voltage generation circuit 14 is a circuit that generates various voltages used in the storage device 1. Based on the control of the control circuit 13, the voltage generation circuit 14 generates multiple voltages of different magnitudes. The voltage generation circuit 14 supplies the generated voltages to the storage cell array 11, the write circuit 17, the read circuit 18, and the sense amplifier 19.

[0098] Row selection circuit 15 is a circuit that selects the row of memory cell MC. Row selection circuit 15 receives address signal ADD from input / output circuit 12. Row selection circuit 15 uses the voltage received from voltage generation circuit 14 to set one word line WL associated with the row determined by the received address signal ADD to the selected state.

[0099] Column selection circuit 16 is a circuit that selects the column of memory cell MC. Column selection circuit 16 receives address signal ADD from input / output circuit 12. Column selection circuit 16 uses the voltage received from voltage generation circuit 14 to set the bit line BL associated with the column determined by the received address signal ADD to the selected state.

[0100] The write circuit 17 is a circuit that processes and controls the writing of data to the memory cell MC. Based on the control of the control circuit 13 and the data to be written, the write circuit 17 supplies the voltage received from the voltage generation circuit 14 to the column selection circuit 16.

[0101] The readout circuit 18 is a circuit that processes and controls the reading of data from the memory cell MC. Based on the control of the control circuit 13, the readout circuit 18 supplies the voltage received from the voltage generation circuit 14 to the column selection circuit 16. The readout circuit 18 supplies multiple control signals to the sense amplifier 19 for data readout.

[0102] Sensing amplifier 19 is a circuit used to determine the data stored in the storage unit MC. Sensing amplifier 19 includes multiple sensing amplifier circuits SAC (not shown). Sensing amplifier 19 receives multiple voltages from voltage generation circuit 14 and operates using the received voltages.

[0103] Figure 2 This describes the structural components of the storage cell in the storage device of the first embodiment and the connections between these components. Hereinafter, one of the source and drain terminals of a transistor will be referred to as one end of the transistor, and the other as the other end.

[0104] like Figure 2 As shown, each memory cell MC includes a cell capacitor CC and an n-type MOSFET (Metal Oxide Semiconductor Field Effect Transistor) CT. The cell capacitor CC is connected at one end to the board line PL and at the other end to one end of the transistor CT. The cell capacitor CC uses the charge accumulated in the node connected to the transistor CT to store data.

[0105] The state of whether the storage node SN has accumulated charge is established to correspond with the state of the storage cell MC storing "1" data or storing "0" data.

[0106] The transistor CT is connected to a bit line BL at one end and to a word line WL at the gate.

[0107] Figure 3 The diagram schematically shows a portion of the cross-sectional structure of the storage device according to the first embodiment. Figure 3 This represents a cross-section along the XY plane. The XY plane includes the x-axis and y-axis, which are orthogonal to and mutually perpendicular to the z-axis. The x-axis extends in the X direction, and the y-axis extends in the Y direction. The direction opposite to the X direction is called the -X direction. The direction opposite to the Y direction is called the -Y direction. The direction opposite to the Z direction is called the -Z direction. The Z direction can be represented by the direction indicated by "up" and related terms. The -Z direction can be represented by the direction indicated by "down" and related terms. Figure 3 This refers to the memory layer ML, which will be discussed later. Figure 3 The structure shown has a symmetrical structure with respect to an imaginary straight line extending in the Y direction through the center in the X direction.

[0108] like Figure 3 As shown, it includes insulators 41 and 44, a vertical structure 61, conductors 21, 29 and 63, a semiconductor 65, and a multilayer film CPF. The conductors also include semiconductors that are conductive by containing dopants.

[0109] Each insulator 41 extends in the X direction and is arranged at intervals in the X and Y directions. The insulator 41 has the shape of a plate extending along the XZ plane. In one example, the insulator 41 comprises silicon oxide. The insulator 41 is separated from the constituent elements (e.g., the semiconductor 65 described later) arranged in the Y direction and sandwiched between the insulator 41.

[0110] Each longitudinal structure 61 is arranged along the X and Y directions. The longitudinal structure 61 is circular along the XY plane. The longitudinal structure 61 includes space and / or insulator.

[0111] Each conductor 63 surrounds a vertical structure 61 along the XY plane and has an annular shape. The conductor 63 functions as at least a part of a bit line BL. In one example, the conductor 63 contains more than one of tungsten (W), molybdenum (Mo), and ruthenium (Ru).

[0112] Semiconductor 65 surrounds a conductor 63 along the XY plane, having a ring-shaped portion of which is removed by insulator 41. Semiconductor 65, arranged in the Y direction, is insulated by insulator 41. Semiconductor 65 functions as a region forming a channel for a transistor CT. In one example, semiconductor 65 comprises an oxide semiconductor. Examples of oxide semiconductors include oxides having one or more of indium (In), gallium (Ga), zinc (Zn), tin (Sn), titanium (Ti), tungsten, and molybdenum. More specific examples of oxide semiconductors include In-O, Ga-O, Zn-O, Sn-O, ITO (Indium Tin Oxide), In-Ga-Zn-O, Ti-O, WO, and Mo-O.

[0113] Conductor 29 extends along the YZ plane and extends in the Y direction. Conductor 29 is located between two semiconductors 65 arranged in the X direction. Conductor 29 functions as at least a part of plate line PL and at least a part of unit capacitor CC. Conductor 29 protrudes in the X and -X directions in the region between insulators 41. Conductor 31 faces semiconductor 65 in the protruding portion.

[0114] The multilayer film CPF covers the conductor 31 and is connected to the conductor 31 and the semiconductor 65. The multilayer film CPF has a multilayer structure of conductor and insulator, and in each of the multiple parts, it functions as a unit capacitor CC.

[0115] Conductor 21 extends along the XY plane and extends in the Y direction. Conductor 21 protrudes into semiconductor 65. In the protruding portion, conductor 21, together with conductor 31, sandwiches semiconductor 65. Conductor 21 functions as at least a portion of word line WL. Conductor 21 also functions as at least a portion of gate electrode of transistor CT. In one example, conductor 21 comprises more than one of tungsten, molybdenum, and ruthenium.

[0116] Each insulator 44 is located between a semiconductor 65 and a conductor 21. In one example, the insulator 44 comprises silicon nitride.

[0117] Figure 4 The diagram schematically shows a portion of the cross-sectional structure of the storage device according to the first embodiment. Figure 4 This represents a cross-section along the XY plane. Figure 4 Indicates along Figure 3 The construction of the IV-IV line. For example... Figure 4 As shown, the storage device 1 also includes insulators 55, 57, 42 and 46, and conductor 23.

[0118] The substrate 51 extends along the XY plane. In one example, the substrate 51 contains silicon.

[0119] Insulator 53 is located on the upper surface of substrate 51. Insulator 53 extends along the XY plane. In one example, insulator 53 comprises silicon oxide.

[0120] Insulator 42 is arranged at intervals in the Z direction above the upper surface of insulator 53. Insulator 42 extends along the XY plane and has a plate shape. In one example, insulator 42 comprises silicon oxide. The layer containing insulator 42 is called layer IL. The layers between layers IL and the layers adjacent to layers IL are called memory layers ML. Memory layers ML are layers containing memory cells MC. Figure 4 This represents 5 memory layers ML, as an example. Storage device 1 may contain 4 or fewer or 6 or more memory layers ML.

[0121] The vertical structure 61 extends in the Z direction and has a column shape. In one example, the lower surface of the vertical structure 61 is located in the substrate 51.

[0122] The conductor 63 extends in the Z direction and has a cylindrical shape. The conductor 63 covers the sides of the longitudinal structure 61. In one example, the lower surface of the conductor 63 is located in the substrate 51.

[0123] Semiconductor 65 extends in the Z direction and has a cylindrical shape. Within the memory layer ML, semiconductor 65 protrudes in a direction away from the center of the vertical structure 61, and in the protruding portion has a cylindrical shape larger than its radius. Semiconductor 65 covers the sides of conductor 63. In one example, the lower surface of semiconductor 65 lies within substrate 51.

[0124] Insulator 55 is located on the layer above the topmost memory layer ML. Insulator 55 extends along the XY plane and has a plate shape. In one example, insulator 55 comprises silicon oxide.

[0125] Insulator 57 covers a portion of the substrate 51 in the vertical structure 61, conductor 63, and semiconductor 65. In one example, insulator 57 comprises silicon oxide.

[0126] Insulator 44 is located in memory layer ML. Each insulator 44 covers the portion of semiconductor 65 that protrudes on the conductor 21 side.

[0127] Each conductor 23 is located in the memory layer ML. Each conductor 23 functions as at least part of the gate electrode of a transistor CT. Each conductor 23 faces the portion of the semiconductor 65 that protrudes on the conductor 31 side. Each of the plurality of conductors 23 is located on the upper or lower surface of the insulator 42. Other conductors 23 are located on the upper surface of the insulator 53. In addition, other conductors 23 are located on the lower surface of the insulator 55. In one example, the conductor 23 comprises titanium nitride.

[0128] Each insulator 46 is located in the memory layer ML. Each insulator 46 functions as at least part of the gate insulator of a transistor CT. Each insulator 46 covers the surface of a conductor 23. In one example, the insulator 46 comprises silicon nitride. Each insulator 46 is connected to a conductor 23 and a semiconductor 65.

[0129] Conductor 21 extends in the Z direction. Conductor 21 protrudes into semiconductor 65 in each memory layer ML. Conductor 21 functions as at least part of word line WL.

[0130] Conductor 29 extends in the Z direction. Conductor 31 protrudes into semiconductor 65 in each memory layer ML.

[0131] A multilayer film CPF covers the surface of conductor 31. The multilayer film CPF is connected to semiconductor 65 in each memory layer ML. The multilayer film CPF functions as at least a part of the unit capacitor CC.

[0132] Figure 5 , Figure 6 ,and Figure 7 This shows a partial cross-sectional view of the storage device according to the first embodiment. Figure 5 Will Figure 3 A portion of the enlarged representation indicates that along Figure 6 The construction of the VV line. Figure 6 Will Figure 4 A portion of it is enlarged. Figure 7 In the diagram, the region along the XY plane is represented as... Figure 5 The areas shown are the same as those in the region and are more than the region shown in the region. Figure 5 The area shown is closer to the Z-axis, indicating the region along... Figure 6 The construction of line VII-VII. Below, there will be cases where the shape of a component in the XY plane, or its shape when viewed from the Z direction, is referred to as the XY plane shape.

[0133] like Figure 5 , Figure 6 and Figure 7 As shown, the storage device 1 also includes a conductor 25 and an insulator 43.

[0134] Semiconductor 65 includes a first portion 65a and a plurality of second portions 65b. The first portion 65a extends in the Z direction and has a cylindrical shape. The first portion 65a surrounds the vertical structure 61 along the XY plane. The first portion 65a is connected to the conductor 63 along the Z direction. A portion of the first portion 65a in layer IL is connected to the insulator 42.

[0135] Each second portion 65b has a cylindrical shape. The second portion 65b is located in the memory layer ML. The second portion 65b is connected to the first portion 65a on its inner side. The second portion 65b has an XY plane shape larger than that of the first portion 65a. In one example, the second portion 65b has a radius along the XY plane larger than the radius of the first portion 65a along the XY plane. The second portion 65b is partially located between two insulators 42 arranged in the Z direction. The second portion 65b functions as a region forming a channel for a transistor CT.

[0136] Insulator 44 includes a first portion 44a, a second portion 44b, and a third portion 44c. The first portion 44a and the second portion 44b extend along the XY plane. The first portion 44a and the second portion 44b are curved. The XY plane shape of the first portion 44a and the second portion 44b follows the XY plane shape of the second portion 65b of semiconductor 65. One first portion 44a and one second portion 44b sandwich one second portion 65b of semiconductor 64.

[0137] The first part 44a is located on the Z-direction side of the second part 65b of the semiconductor 65 and is connected to the second part 65b. The first part 44a faces an insulator 42 on the Z-direction side. The first part 44a has a portion extending in the Z-direction at the end closer to the vertical structure 61.

[0138] The second portion 44b is located on the -Z direction side of the second portion 65b of the semiconductor 65 and is connected to the second portion 65b. On the -Z direction side, the second portion 44b faces an insulator 42. At the end of the second portion 44b closer to the vertical structure 61, there is a portion extending in the -Z direction.

[0139] Part 3, 44c, is located further away from the vertical structure 61 than Part 1, 44a, and Part 2, 44b. Part 3, 44c connects to Part 1, 44a, and Part 2, 44b at its end closer to the vertical structure 61. The XY plane shape of Part 3, 44c curves along the XY plane shape of Part 2, 65b, of semiconductor 65. Part 3, 44c connects to Part 2, 65b, of semiconductor 65 at its end closer to the vertical structure 61.

[0140] Conductor 23 includes conductors 23a and 23b. Conductor 23a is located on the upper surface of insulator 42 below memory layer ML. Conductor 23a is located between the lower insulator 42 and the second portion 65b of semiconductor 65.

[0141] Conductor 23b is located on the lower surface of insulator 42 above memory layer ML. Conductor 23b is located between the upper insulator 42 and the second portion 65b of semiconductor 65. The XY plane shape of conductor 23b is substantially the same as that of conductor 23a. Although the description that one shape is substantially the same as another shape means that the two shapes are identical, due to manufacturing limitations, it also includes instances where the two shapes are not exactly the same.

[0142] The XY plane shape of conductor 23 follows the XY plane shape of the second part 65b of semiconductor 65.

[0143] Insulator 46 includes insulators 46a and 46b. Insulator 46a covers the lower surface and side surface of conductor 23a and is in contact with the lower surface and side surface of conductor 23a. Insulator 46b covers the upper surface and side surface of conductor 23b and is in contact with the upper surface and side surface of conductor 23b.

[0144] Insulator 46 and insulator 44 are integral. That is, insulator 44 and insulator 46 are different parts of an insulator. As described later, insulators 46 and 44 are integrally formed by a common (one) process. The group of insulators 44 and 46 has an annular shape along the XY plane, surrounding the structure of the first portion 65a of the longitudinal structure 61, conductor 63, and semiconductor 65 along the XY plane. Insulator 46a and the first portion 44a of insulator 44 are arranged in the -X direction. Insulator 46b and the second portion 44b of insulator 44 are arranged in the -X direction.

[0145] The conductor 21 includes a first part 21a and a second part 21b. The first part 21a extends in the Y direction.

[0146] Part 21b connects to Part 121a at the end further from the longitudinal structure 61. Part 21b extends along the XY plane. The surfaces of Part 21b on the Y-direction side and the -Y-direction side have a shape that follows the shape of the insulator 41. The XY plane shape of Part 21b curves along the XY plane shape of Part 324c of the insulator 44 on the surface closer to the longitudinal structure 61.

[0147] Insulator 43 extends along the YZ plane. At the end of insulator 43 closer to the longitudinal configuration 61, it is connected to conductor 21. In one example, insulator 43 comprises silicon oxide.

[0148] The conductor 25 includes a first part 25a, a second part 25b and a third part 25c.

[0149] Part 1, 25a, is the uppermost portion of conductor 25. Part 1, 25a extends across the space between the upper insulator 42 and the second portion 21b of conductor 21, and between the upper insulator 42 and the second portion 65b of semiconductor 65. Part 1, 25a, is in contact with the upper insulator 42, the second portion 21b of conductor 21, and the first portion 44a of insulator 44.

[0150] Part 25b is the lowermost portion of conductor 25. Part 25b extends between the lower insulator 42 and the second portion 21b of conductor 21, and between the lower insulator 42 and the second portion 65b of semiconductor 65. Part 25b is in contact with the lower insulator 42, the second portion 21b of conductor 21, and the second portion 44b of insulator 44. The XY plane shape of part 25b follows the XY plane shape of part 1 25a, and in one example, has a shape substantially the same as the XY plane shape of part 1 25a.

[0151] Part 3, 25c, is located on the same layer as part 2, 65b of semiconductor 65. Part 3, 25c is located between and connected to parts 1, 25a and 25b. Part 3, 25c is located between part 2, 21b of conductor 21 and part 3, 44c of insulator 44. Part 3, 25c is in contact with part 2, 21b of conductor 21 and part 3, 44c of insulator 44. Part 3, 25c has a layered shape along the XY plane. Part 3, 25c extends along insulator 41 in the regions at its Y-direction and -Y-direction ends. The XY plane shape of part 3, 25c bends along the XY plane shape of part 44c of insulator 44 in the region closer to the vertical structure 61.

[0152] Conductor 25 functions as at least a part of word line WL. Conductor 25 comprises titanium nitride.

[0153] Conductor 25 and conductor 23 are integrated. That is, conductor 25 and conductor 23 are different parts of a conductor. The first part 25a of conductor 25 is connected to conductor 23a. The second part 25b of conductor 25 is connected to conductor 23b. The group of the first part 25a and conductor 23a of conductor 25 surrounds the group of the first part 65a of the vertical structure 61, conductor 63, and semiconductor 65 along the XY plane. The group of the second part 25b and conductor 23b of conductor 25 surrounds the group of the first part 65a of the vertical structure 61, conductor 63, and semiconductor 65 along the XY plane.

[0154] As described below, conductor 25 and conductor 23 are integrally formed using a common (single) process. Because conductor 25 and conductor 23 are integrally formed, in one example, the conductors that function as conductors 25 and 23 do not include seams that would occur if conductors 25 and 23 were formed using different processes. Furthermore, because conductor 25 and conductor 23 are integrally formed, in one example, the conductors that function as conductors 25 and 23 have a common crystal orientation, and do not have the different crystal orientations that would occur if conductors 25 and 23 were formed using different processes.

[0155] Conductor 29 includes conductor 31 and conductor 33. Conductor 31 includes a first part 31a and a second part 31b. The first part 31a extends along the YZ plane and has a plate shape.

[0156] Part 2 31b extends along the XY plane. Part 2 31b connects to Part 1 31a at the end furthest from the vertical configuration 61. At the Y-direction side, Part 2 31b faces the insulator 41 located on the Y-direction side. At the -Y-direction side, Part 2 31b faces the insulator 41 located on the -Y-direction side. The shape of Part 2 31b along the XY plane curves at the end closer to the vertical configuration 61, and this shape follows the XY plane of the outer shape of Part 65b of the semiconductor 65.

[0157] The conductor 31 comprises titanium nitride and / or tungsten. In one example, the conductor 31 has a structure with a titanium nitride layer and a tungsten layer stacked on top of each other.

[0158] Conductor 33 covers the surface of conductor 31. Conductor 33 is partially located between the upper insulator 42 and the second portion 31b of conductor 31. Conductor 33 is partially located between the lower insulator 42 and the second portion 31b of conductor 31. Conductor 33 is partially located between the second portion 65b of semiconductor 65 and conductor 33. The local XY plane shape between the second portion 65b of semiconductor 65 and the second portion 31b of conductor 33 is along the XY plane shape of insulator 41 on the Y-direction side and the XY plane shape of insulator 41 on the -Y-direction side. The local XY plane shape between the second portion 65b of semiconductor 65 and the second portion 31b of conductor 33 is curved along the XY plane shape of the outer shape of the second portion 65b of semiconductor 65.

[0159] Conductor 33 functions as an electrode on the plate line PL side of the two electrodes of the unit capacitor CC. In one example, conductor 33 comprises titanium nitride and / or tungsten.

[0160] The laminated film CPF comprises an insulator 48 and a conductor 35.

[0161] Insulator 48 covers the surface of conductor 33. Insulator 48 is partially located between the upper insulator 42 and the second portion 31b of conductor 31. Insulator 48 is partially located between the lower insulator 42 and the second portion 31b of conductor 31. Insulator 48 is partially located between the second portion 65b of semiconductor 65 and the second portion 31b of conductor 31. The local XY plane shape between the second portion 65b of semiconductor 65 and the second portion 31b of conductor 31 in insulator 48 is along the XY plane shape of insulator 41 on the Y-direction side and the XY plane shape of insulator 41 on the -Y-direction side. The local XY plane shape between the second portion 65b of semiconductor 65 and the second portion 31b of conductor 31 insulator 48 is curved along the XY plane shape of the outer shape of the second portion 65b of semiconductor 65.

[0162] Insulator 48 functions as an insulator for unit capacitor CC. In one example, insulator 48 comprises one or more of zirconium oxide (zirconia) and aluminum oxide (alumina). In another example, insulator 48 has a laminated structure of zirconium oxide layer and aluminum oxide layer.

[0163] Conductor 35 covers the surface of insulator 48. The XY plane shape of conductor 35 follows the XY plane shape of insulator 48. The XY plane shape of conductor 35 curves along the XY plane shape of the outline of the second portion 65b of semiconductor 65. Conductor 35 is insulated from conductor 33 by insulator 48. Conductor 35 functions as an electrode on the CT side of transistor of unit capacitor CC. In one example, conductor 35 comprises a conductive oxide. An example of a conductive oxide includes indium tin oxide (ITO).

[0164] 1.2. Manufacturing Method

[0165] Figures 8 to 71 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the first embodiment.

[0166] Figure 8 , Figure 10 , Figure 12 , Figure 14 , Figure 16 , Figure 19 , Figure 21 , Figure 23 , Figure 25 , Figure 27 , Figure 29 , Figure 31 , Figure 33 , Figure 35 , Figure 38 , Figure 40 , Figure 42 , Figure 44 , Figure 46 , Figure 48 , Figure 50 , Figure 52 , Figure 54 , Figure 56 , Figure 58 , Figure 60 , Figure 62 , Figure 64 , Figure 66 , Figure 68 ,and Figure 70 express Figure 5 The area shown.

[0167] Figure 9 , Figure 11 , Figure 13 , Figure 15 , Figure 17 , Figure 20 , Figure 22 , Figure 24 , Figure 26 , Figure 28 , Figure 30 , Figure 32 , Figure 34 , Figure 36 , Figure 39 , Figure 41 , Figure 43 , Figure 45 , Figure 47 , Figure 49 , Figure 51 , Figure 53 , Figure 55 , Figure 57 , Figure 59 , Figure 61 , Figure 63 , Figure 65 , Figure 67 , Figure 69 , Figure 71 express Figure 6 The area shown.

[0168] Figure 18 and Figure 37 express Figure 7 The area shown.

[0169] like Figure 8 and Figure 9 As shown, an insulator 42A and a sacrificial material 71 are alternately deposited over a substrate 51 (not shown). The insulator 42A is a constituent element of the insulator 42, fabricated in subsequent steps, and comprises the same material as the insulator 42. The sacrificial material 71 is located in a region of the memory layer ML. The sacrificial material 71 comprises a different material than the insulator 42, and in one example, contains silicon nitride. Examples of deposition methods include chemical vapor deposition (CVD).

[0170] Insulator 41 is formed. That is, firstly, a slit is formed in the area where insulator 41 is to be formed. The slit penetrates in the Z direction through insulator 42A and sacrificial material 71. The method for forming the slit includes a photolithography step and an anisotropic etching process. An example of anisotropic etching includes RIE (Reactive Ion Etching).

[0171] like Figure 10 and Figure 11 As shown, a hole HL is formed. The hole HL is located in the region where a longitudinal structure 61 is to be formed, penetrating the insulator 42A and the sacrificial material 71 in the Z direction. Examples of methods for forming the hole HL include photolithography and anisotropic etching such as RIE.

[0172] like Figure 12 and Figure 13 As shown, a space SP1 is formed in the removed area by locally removing the sacrificial material 71. The space SP1 extends along the XY plane from the center of the hole HL. The space SP1 is located in the region where the second portion 65b of the semiconductor 65 is to be formed. The insulator 41 is exposed in the space SP1. An example of a method for forming the space SP1 includes wet etching.

[0173] like Figure 14 and Figure 15 As shown, sacrificial material 72 is deposited. Sacrificial material 72 is deposited on the portion of sacrificial material 71 exposed at space SP1. Sacrificial material 72 has a ring-shaped shape along the XY plane. In one example, sacrificial material 72 is formed by free radical oxidation of the surface of sacrificial material 71, in which case it contains silicon nitride oxide.

[0174] like Figure 16 , Figure 17 and Figure 18 As shown, a sacrificial material 73 is deposited. The sacrificial material 73 is located on the surface of the constituent elements defining the aperture HL and space SP1. That is, the sacrificial material 73 is located on the portion of the insulator 42A exposed at the aperture HL and space SP1. Additionally, the sacrificial material 73 is located on the portion of the sacrificial material 72 exposed at space SP1. The sacrificial material 73 has an annular shape along the XY plane. In one example, the sacrificial material 73 comprises silicon nitride. Examples of volumetric methods include CVD under low-pressure conditions.

[0175] like Figure 19 and Figure 20 As shown, sacrificial material 74 is deposited. Sacrificial material 74 is embedded in space SP1. Furthermore, sacrificial material 74 is located on the surface of a component defining the via HL. That is, sacrificial material 74 is located on the portion of sacrificial material 73 exposed at the via HL. Sacrificial material 74 has an annular shape along the XY plane. Sacrificial material 74 is not embedded in the via HL; the via HL is partially preserved. In one example, sacrificial material 74 comprises amorphous silicon. Examples of methods for depositing sacrificial material 74 include CVD under low-pressure conditions.

[0176] like Figure 21 and Figure 22As shown, the sacrificial material 74 is partially removed in a manner that removes it from the hole HL and retains it in the space SP1. By removing a portion of the sacrificial material 74 from the hole HL (that is, a portion of the sacrificial material 73 from the hole HL), sacrificial material 74A is formed in each space SP1 by the sacrificial material 74. The sacrificial material 74A has an annular shape along the XY plane. The sacrificial material 74 is partially removed from the center of the hole HL toward the space SP1. Therefore, the XY plane shape of the inner surface of the sacrificial material 74A is larger than the XY plane shape of the hole HL, and the space SP1 is locally formed again in the region connected to the hole HL. An example of a method for partially removing the sacrificial material 74 includes wet etching.

[0177] like Figure 23 and Figure 24 As shown, the sacrificial material 73 is partially removed in a manner that removes it from the hole HL and retains it in the space SP1. Sacrificial material 73A is formed in each space SP1 by removing a portion of the sacrificial material 73 from the hole HL (i.e., a portion of the portion of the insulator 42A from the hole HL). The sacrificial material 73A has an annular shape along the XY plane. The sacrificial material 73A has a U-shaped form, with a portion between the upper insulator 42A and sacrificial material 74A, a portion between sacrificial material 71 and sacrificial material 74A, and a portion between the lower insulator 42A and sacrificial material 74A. The sacrificial material 73 is partially removed from the center of the hole HL toward the space SP1. Therefore, the end of the sacrificial material 73A is located further outward than the edge of the hole HL. An example of a method for partially removing the sacrificial material 73 includes wet etching.

[0178] like Figure 25 and Figure 26 As shown, sacrificial material 74A is removed. Through removal, space SP1 is locally formed again. An example of a method for removing sacrificial material 74A includes wet etching.

[0179] like Figure 27 and Figure 28 As shown, the portion retained in the aperture HL and space SP1 is embedded by a sacrificial material 75. In one example, the sacrificial material 75 comprises amorphous silicon. Examples of methods for embedding the sacrificial material 75 include CVD under low-pressure conditions.

[0180] like Figure 29 and Figure 30As shown, a slit SL1 is formed in insulators 42A and 41 and sacrificial material 71. The slit SL1 extends along the YZ plane, penetrating insulators 42A and 41 and sacrificial material 71. The slit SL1 is located in the regions where the first portion 31a of the conductor 31 is predetermined to be formed, the portion between insulator 42 and the first portion 31a of the conductor 31 in the conductor 33, the portion between insulator 42 and the first portion 31a of the conductor 31 in the insulator 48, and the portion between insulator 42 and the first portion 31a of the conductor 31 in the conductor 35. Examples of methods for forming the slit SL1 include photolithography and anisotropic etching such as RIE.

[0181] like Figure 31 and Figure 32 As shown, the portion of sacrificial material 71 facing the slit SL1 is removed. Sacrificial material 71 is partially removed from the slit SL1 side until sacrificial material 72 is exposed. This removal creates a space SP2 in the area where the removed portion of sacrificial material 71 is located. An example of a method for partially removing sacrificial material 71 includes wet etching.

[0182] like Figure 33 and Figure 34 As shown, the portion of sacrificial material 72 exposed at space SP2 is removed. Through this removal, sacrificial material 73A is exposed at space SP2. An example of the removal method includes wet etching.

[0183] like Figure 35 , Figure 36 and Figure 37 As shown, the portion of sacrificial material 73A exposed at space SP2 is removed. Only the portion of sacrificial material 73A containing the slit SL1 side is removed, which is the portion of sacrificial material 75 on the slit SL1 side. Thus, the portion of the lower surface of the upper insulator 42A in sacrificial material 73A further from the slit SL1 side than sacrificial material 75 is separated from the portion of the upper surface of the lower insulator 42A in sacrificial material 73A. (See reference...) Figure 16 , Figure 17 and Figure 18As described above, the sacrificial material 73 has an annular shape along the XY plane. Therefore, the portion on the lower surface of the upper insulator 42A in the sacrificial material 73A is connected to the portion closer to the sacrificial material 71 than the sacrificial material 75, and still has an annular shape. Similarly, the portion on the upper surface of the lower insulator 42A in the sacrificial material 73A is connected to the portion closer to the sacrificial material 71 than the sacrificial material 75, and still has an annular shape. An example of a method for partially removing the sacrificial material 73A includes wet etching. Hereinafter, the portion on the lower surface of the upper insulator 42A that is closer to the sacrificial material 71 than the sacrificial material 75 and the portion on the upper surface of the lower insulator 42A that is closer to the sacrificial material 71 than the sacrificial material 75 in the sacrificial material 73A will be referred to as sacrificial material 73B.

[0184] By partially removing the sacrificial material 73A, the space SP2 is expanded, and the sacrificial material 75 is exposed in the space SP2.

[0185] like Figure 38 and Figure 39 As shown, sacrificial material 75 is removed. Through removal, the hole HL is re-formed, and space SP1 is locally formed again. Spaces SP1 and SP2 are connected. An example of a method for removing sacrificial material 75 includes wet etching.

[0186] like Figure 40 and Figure 41 As shown, stacked insulators 44 and 46. (See reference...) Figure 5 , Figure 6 and Figure 7 As described above, insulators 44 and 46 are different portions of a single insulator, and the insulators that function as insulators 44 and 46 are deposited on the surfaces of sacrificial materials 73A and 73B. The deposition method includes depositing silicon nitrides on the surfaces of insulators 44 and 46, and subsequent free radical oxidation of the silicon nitrides.

[0187] like Figure 42 and Figure 43 As shown, sacrificial material 78 is deposited on the surfaces of the defined holes HL, and spaces SP1 and SP2. Sacrificial material 78 is deposited on the exposed portions of insulator 42A at holes HL1, spaces SP1, and spaces SP2, and on the surfaces of insulators 44 and 46. The area in space SP1 surrounded by insulator 44 is embedded by sacrificial material 78. The area between the two insulators 46 in space SP1 is also embedded by sacrificial material 78 because the distance between the insulators 46 is small. On the other hand, space SP2 is not embedded but partially retained. In one example, sacrificial material 78 comprises titanium nitride. Examples of methods for depositing sacrificial material 78 include CVD.

[0188] like Figure 44 and Figure 45As shown, slit SL1 and space SP2 are embedded by sacrificial material 79. In one example, sacrificial material 79 comprises amorphous silicon. Examples of methods for stacking sacrificial material 79 include CVD.

[0189] A slit SL2 is formed in insulator 42A and sacrificial material 71. The slit SL2 extends along the YZ plane, penetrating insulator 42A and sacrificial material 71. The slit SL2 is located in the region where the first portion 21a of conductor 21 is to be formed and insulator 43 is to be formed. Examples of methods for forming the slit SL2 include photolithography and anisotropic etching such as RIE. Insulator 42 is formed from insulator 42A through the formation of the slit SL2.

[0190] like Figure 46 and Figure 47 As shown, sacrificial material 71 is removed. This removal creates a space SP3 in the area where sacrificial material 71 was located. Sacrificial material 72 is exposed in the space SP3. An example of a method for removing sacrificial material 71 includes wet etching.

[0191] like Figure 48 and Figure 49 As shown, sacrificial material 72 is removed. With this removal, sacrificial material 73A is exposed in space SP3. An example of the removal method includes wet etching.

[0192] like Figure 50 and Figure 51 As shown, sacrificial material 73B is removed, and sacrificial material 73A is also partially removed. An example of the removal method includes wet etching. The wet etching solution reaches sacrificial material 73A from space SP3, partially removing sacrificial material 73A. The solution removes the portion between insulator 44 and insulator 42 in sacrificial material 73A. As the solution travels through sacrificial material 73A, it reaches sacrificial material 73B, which is connected to sacrificial material 73A, thereby removing sacrificial material 73B. By partially removing sacrificial material 73A, space SP4 is formed in the region where sacrificial material 73A is located. Space SP4 is connected to space SP3. By removing sacrificial material 73B, space SP5 is formed in the region where sacrificial material 73B is located. Based on the connection between sacrificial material 73B and sacrificial material 73A, space SP5 is connected to space SP4.

[0193] like Figure 52 and Figure 53As shown, a conductor 25A is deposited on the surface of the defined slit SL2 and spaces SP2 and SP3. The conductor 25A is a component subsequently processed into conductor 25. The conductor 25A is located on the portions of insulators 41 and 42 exposed in slit SL2 and space SP3. Additionally, the conductor 25A is located on the portion of insulator 44 exposed at space SP3. Furthermore, the conductor 25A is embedded in space SP4. Moreover, the conductor 25A is embedded in space SP5 connected to space SP4, thereby forming conductor 23. The conductor 25A comprises the same material as conductors 25 and 23. An example of a method for depositing the conductor 25A includes CVD.

[0194] like Figure 54 and Figure 55 As shown, a conductive material 21A is stacked. The conductive material 21A is a component that is subsequently processed into the conductive material 21. The conductive material 21A is embedded in the slit SL2 and the space SP3.

[0195] like Figure 56 and Figure 57 As shown, conductors 21A and 25A are partially removed. Specifically, the portion of conductor 25A located on insulator 42 within slit SL2 is removed. Additionally, the portion of conductor 21A located away from aperture HL is removed from the side of insulator 42 opposite to aperture HL. Through this removal, slit SL2 is formed locally again, and conductor 21 is formed from conductor 21A, while conductor 25 is formed from conductor 25A. Examples of methods for partially removing conductors 21A and 25A include photolithography and anisotropic etching such as RIE.

[0196] Next, the slit SL2 is embedded by insulator 43. An example of the embedding method includes CVD.

[0197] like Figure 58 and Figure 59 As shown, sacrificial material 79 is removed. By removing it, space SP2 and slit SL1 are re-formed, and sacrificial material 78 is exposed in space SP2 and slit SL1. An example of the removal method includes wet etching.

[0198] Remove the portions of the sacrificial material 78 exposed at space SP2 and slit SL1. The removal is performed in a manner that preserves the portion of the sacrificial material 78 embedded between the insulators 46. Examples of methods for locally removing the sacrificial material 78 include wet etching.

[0199] like Figure 60 and Figure 61As shown, conductive material 35 is deposited. Conductive material 35 covers the portions of the surface of insulator 42 exposed at slit SL1 and space SP2. Conductive material 35 covers the portions of the surface of insulator 41 exposed at slit SL1 and space SP2. Conductive material 35 covers the portions of the surface of insulator 46 exposed at space SP2. Conductive material 35 covers the portions of sacrificial material 78 exposed at space SP2 (the portions between insulators 46). An example of a method for depositing conductive material 35 includes CVD.

[0200] like Figure 62 and Figure 63 As shown, insulator 48 is deposited on the surface of conductor 35. An example of a method for depositing insulator 48 includes CVD.

[0201] like Figure 64 and Figure 65 As shown, a conductor 33 is stacked. The conductor 33 covers the surface of the insulator 48 and is embedded in the space SP2. An example of the stacking method for the conductor 33 includes CVD.

[0202] like Figure 66 and Figure 67 As shown, a conductor 31 is deposited. The conductor 31 is embedded in the slit SL1. An example of the method for depositing the conductor 31 includes CVD.

[0203] like Figure 68 and Figure 69 As shown, sacrificial material 78 is removed. By removing it, space SP1 is locally formed again, and insulators 44 and 46 are exposed in space SP1. Additionally, by removing it, conductor 35 is exposed in space SP1. An example of a method for removing sacrificial material 78 includes wet etching.

[0204] like Figure 70 and Figure 71 As shown, a semiconductor 65 is deposited. The semiconductor 65 is embedded in space SP1 and is connected to the conductor 35. The semiconductor 65 is deposited on the portion of the insulator 42 exposed in the via HL. The semiconductor 65 is not embedded in the via HL.

[0205] like Figure 5 , Figure 6 and Figure 7 As shown, a conductive material 63 is deposited. The conductive material 63 is deposited on the portion of the semiconductor 65 exposed in the hole HL.

[0206] 1.3. Advantages (Effects)

[0207] According to the first embodiment, as described below, a storage device 1 with high electrical characteristics is provided.

[0208] Consider manufacturing a reference memory device for comparison using the following process. That is, the gate electrode material is deposited in the reference memory of the first embodiment. Figure 12 and Figure 13 The structure obtained by the steps described above. The material of the gate electrode covers the surface of the insulator 42A and the sacrificial material 71. Next, the material of the gate electrode is partially removed and processed into the same shape as the conductor 23 of the first embodiment. Next, a gate insulator is formed on the gate electrode.

[0209] For high reliability, it is desirable to form the gate insulator through the oxidation of the silicon nitride covering the gate electrode. However, it is impossible to achieve a sufficiently oxidation-resistant selection ratio between the gate electrode material and the silicon nitride material used to form the gate insulator. Therefore, the gate electrode can be accidentally oxidized during the gate insulator formation process. This reduces the reliability of the gate electrode. Furthermore, because the gate electrode is covered by the gate insulator, the gate electrode and the word lines subsequently deposited in connection with the gate electrode are formed through different steps. This reduces the resistivity and other electrical properties of the gate electrode and the word lines.

[0210] According to the first embodiment, a sacrificial material 73 is formed in the region where a conductor 23 (gate electrode) is to be formed. The sacrificial material 73 is covered by an insulator 46 (gate insulator). After removing the sacrificial material 73, a conductor 25 is formed in the region where the sacrificial material 73 is buried and functions as part of a word line. Thus, the conductor 25 and the conductor 23 are formed using a common process. Therefore, the conductors 25 and 23 are formed as different parts of a single conductor, without seams, and have a common crystal alignment. Therefore, the memory device 1 has high electrical characteristics.

[0211] Furthermore, after the insulator 46 is formed, the conductors 25 and 23 are formed. Therefore, the insulator 46 and the conductors 25 and 23 can suppress each other's influence while being formed in an optimal manner. Therefore, based on this, the storage device 1 also has high electrical characteristics.

[0212] 2. Second Implementation Method

[0213] The second embodiment relates to the shape of the insulator 41.

[0214] Figure 72 and Figure 73 The diagram shows a partial cross-sectional view of the storage device according to the second embodiment, and a cross-section of the insulator 41B according to the second embodiment. Figure 72 This represents a cross-section along the XZ plane. Figure 73This represents a cross-section along the YZ plane. Below, there will be cases where the dimension in the X direction of a certain component is referred to as the X dimension, and the dimension in the Y direction is referred to as the Y dimension.

[0215] like Figure 72 As shown, the insulator 41B has an inverted conical shape along the XZ plane, in the portion including the upper end (or upper part). In the component having the inverted conical shape, the dimension in a certain first direction at a position near the Z direction is smaller than the dimension in the first direction at a position near the -Z direction. That is, in the upper part, the X dimension of the insulator 41B at a position near the Z direction is smaller than the X dimension at a position near the -Z direction.

[0216] The insulator 41B has a tapered shape along the XZ plane, including the lower end (or lower portion). In the component with the tapered shape, the dimension in a first direction at a position near the Z direction is greater than the dimension in the first direction at a position near the -Z direction. That is, in the lower portion, the X dimension of the insulator 41B at a position near the Z direction is greater than the X dimension at a position near the -Z direction.

[0217] The insulator 41B has a first protrusion 41Bp_a and a second protrusion 41Bp_b. The first protrusion 41Bp_a is located in the lowest memory layer ML (that is, the layer where the conductor 21 is located). The first protrusion 41Bp_a on the X-direction side protrudes in the X-direction. The first protrusion 41Bp_a on the -X-direction side protrudes in the -X-direction.

[0218] The second protrusion 41Bp_b is located in the second memory layer ML from the bottom. The second protrusion 41Bp_b on the X-direction side protrudes in the X-direction. The second protrusion 41Bp_b on the -X-direction side protrudes in the -X-direction.

[0219] The insulator 41B is connected to the multilayer film CPF at its X-direction end. The insulator 41B is connected to the assembly of conductors 21 and 25 at its -X-direction end. The diagram of conductor 25 is omitted.

[0220] Protrusions can be set in more than three memory layers (ML).

[0221] like Figure 73 As shown, the maximum Y-dimensionality of insulator 41B is smaller than the maximum X-dimensionality. Insulator 41B has an inverted cone shape at its upper part along the YZ plane. That is, at its upper part, the Y-dimensionality of insulator 41B at its Z-direction position is smaller than the Y-dimensionality at its -Z-direction position. The inverted cone angle (angle relative to the z-axis) related to the Y-dimensionality at the upper part of insulator 41B is smaller than the inverted cone angle related to the X-dimensionality at the upper part of insulator 41B.

[0222] Insulator 41B has a conical shape at its lower part along the YZ plane. That is, at the lower part, the Y dimension of insulator 41B at the position closer to the Z direction is greater than the Y dimension at the position closer to the -Z direction. The cone angle related to the Y dimension at the lower part of insulator 41B is smaller than the cone angle related to the X dimension at the lower part of insulator 41B.

[0223] The insulator 41B has no protrusions at its Y-direction side and -Y-direction side end. The Y-direction side end and -Y-direction side end of the insulator 41B are connected to the assembly of conductors 21 and 25. The diagram of conductor 25 is omitted.

[0224] Figures 74-83 A cross-section showing a portion of the structure between the manufacturing steps of the storage device of the second embodiment. (Reference) Figures 74-83 The described steps are equivalent to the reference in the first embodiment. Figure 8 and Figure 9 This is part of the steps described.

[0225] Figure 74 , Figure 76 , Figure 78 , Figure 80 and Figure 82 express Figure 72 The area shown.

[0226] Figure 75 , Figure 77 , Figure 78 , Figure 81 and Figure 83 express Figure 73 The area shown.

[0227] like Figure 74 and Figure 75 As shown, an insulator 53A is deposited on a substrate 51 (not shown), and sacrificial material 71 and insulator 42A are deposited alternately on insulator 52A. Next, insulator 55A is deposited on the uppermost sacrificial material 71. Insulator 52A is processed into a component of insulator 52 through subsequent steps, comprising the same material as insulator 52. Insulator 55A is processed into a component of insulator 55 through subsequent steps, comprising the same material as insulator 55. An example of the deposition method includes CVD.

[0228] like Figure 76 and Figure 77As shown, a slit SL5 is formed. The slit SL5 is formed in the region where the insulator 41B is to be formed. The slit SL5 has the same shape as the insulator 41B, with inverted conical shapes at its upper X, -X, Y, and -Y direction ends. Additionally, the slit SL5 has the same shape as the insulator 41B, with conical shapes at its lower X, -X, Y, and -Y direction ends. The slit SL5 reaches the lower surface of the lowermost sacrificial material 71.

[0229] like Figure 78 and Figure 79 As shown, a protective film 81 is deposited on the surface of the constituent elements of the slit SL5. The protective film 81 is deposited on the portions of the insulators 53A, 42A, and 55 and the sacrificial material 71 exposed at the slit SL5. In one example, the protective film 81 comprises the same material as the insulator 42A. An example of a method for depositing the protective film 81 includes CVD.

[0230] like Figure 80 and Figure 81 As shown, the protective film 81 is partially removed by anisotropic etching such as RIE. The taper angles of the lower X-direction and -X-direction ends of the slit SL5 are relatively large. Therefore, by etching, the portion of the protective film 81 near the -Z direction, especially located on the sacrificial material 71 and insulator 42A in several layers upward from the bottommost layer containing the bottommost layer, is removed. As a result, the sacrificial material 71 and insulator 42A are exposed at the lower part of the slit SL5. On the other hand, the protective film 81 remains at the upper part of the slit SL5. By etching, the upper part of the insulator 53A is removed, and the insulator 53 is formed from the insulator 53A.

[0231] The taper angles at the lower Y and -Y direction ends of the slit SL5 are relatively small. Therefore, even through etching, only a small amount of the protective film 81 is removed. Consequently, portions of the protective film 81 at the Y and -Y direction ends remain at the lower part of the slit SL5. In other words, the exposed portions of the surfaces of the sacrificial material 71 and the insulator 42A at the Y and -Y direction ends of the slit SL5 are still covered by the protective film 81.

[0232] like Figure 82 and Figure 83 As shown, the sacrificial material 71 is partially removed. Removal is performed by isotropic etching, with wet etching being an example of the removal method. The wet etching solution removes the portion of the sacrificial material 71 exposed in the slit SL5. Thus, the sacrificial material 71 not covered by the protective film 81 (the sacrificial material 71 exposed at the bottom of the slit SL5) is partially removed from the center of the slit SL5 along the X and -X directions. As a result, the portion removed from the sacrificial material 71 forms the space SP7.

[0233] On the other hand, the sacrificial material 71 covered by the protective film 81 is not removed by wet etching. Therefore, in the upper part of the slit SL5, the removal of the sacrificial material 71 does not proceed along the X and -X directions. In addition, the removal of the sacrificial material 71 does not proceed along the Y and -Y directions. Therefore, even in the lower part of the slit SL5, the space SP7 extending in the Y and -Y directions is not formed.

[0234] like Figure 72 and Figure 73 As shown, the reserved portions of slit SL5 and space SP7 are embedded in the material of insulator 41B. Subsequently, the constituent elements including unit capacitor CC and transistor CT are formed.

[0235] According to the second embodiment, as described below, accidental short circuits of the constituent elements are suppressed.

[0236] The following describes a reference structure for comparison. The insulator 41B serves to separate the two constituent elements (e.g., semiconductor 65) sandwiched in the Y direction, preventing them from connecting to each other. For this purpose, when forming two spaces (e.g., space SP2 in the first embodiment) where two constituent elements are intended to be respectively disposed, it is required that the insulator 41B prevent the two spaces from connecting.

[0237] The reference structure replaces insulator 41B and includes insulator 141B. The slit defining the shape of insulator 141B is the same as that described for slit SL5, and inevitably has a tapered shape at the lower part due to the inherent nature of anisotropic etching. Therefore, the XY plane shape of the lower portion of insulator 141B is smaller than that of the upper portion. Therefore, there is a concern that two spaces should be connected in the area where insulator 141B should exist, which would cause the constituent elements formed in the space to connect. To prevent this, it is considered to increase the overall shape of insulator 141B and even the shape of slit SL5, but this would erode the area where memory cells and wiring are arranged, and the spacing between constituent elements would become narrower.

[0238] According to the second embodiment, the insulator 41B has a protrusion 41Bp at its lower part. The protrusion 41Bp extends from the insulator 41B in the X direction and the -X direction. Therefore, based on the cone shape, the insulator 41B has a large X dimension even at its lower part where the X dimension is small. Therefore, even at its lower part, the insulator 41B can prevent the connection of components on both sides of the insulator 41B that should be mutually insulated.

[0239] Furthermore, the insulator 41B does not protrude at its ends in the Y direction and -Y direction. Therefore, it prevents the spacing between the insulator 41B and the constituent elements (e.g., semiconductor 65) arranged in the Y direction from becoming too narrow.

[0240] While several embodiments of the present invention have been described, these embodiments are merely illustrative and not intended to limit the scope of the invention. These embodiments can be implemented in various other ways, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments or variations thereof are included in the scope or spirit of the invention, and similarly, are included within the scope of the invention as described in the claims and its equivalents.

[0241] [Symbol Explanation]

[0242] 21,23,25,29,31,33,35,63: Conductors

[0243] 41,42,43,44,46,48,53,55,57: Insulators

[0244] 51: Substrate

[0245] 61: Vertical Structure

[0246] 65: Semiconductors.

Claims

1. A storage device comprising: A semiconductor extends along a first surface that includes a first direction and a second direction that intersect each other, has an annular shape, has a first portion on the side of the first direction, and has a second portion on the side opposite to the first direction; The second insulator on the first portion of the semiconductor; The second insulator on the second portion of the semiconductor; A first conductor has a first portion disposed in the second insulator and in a third direction that intersects the first and second directions more closely than the second insulator, and the first portion of the second insulator facing the semiconductor is separated from the semiconductor. The second conductor is connected to the first conductor; The third conductor is connected to the first portion of the semiconductor; The third insulator, together with the first portion of the semiconductor, sandwiches the third conductor; and The fourth conductor, together with the third conductor, sandwiches the third insulator.

2. The storage device according to claim 1, further comprising: The fifth conductor extends in the third direction and is surrounded by the semiconductor along the first surface.

3. The storage device according to claim 1, further comprising: A fourth insulator is disposed further in the third direction than the first and second portions of the semiconductor, and has a hole extending in the third direction.

4. The storage device according to claim 3, wherein The semiconductor surrounds the hole along the first surface.

5. The storage device according to claim 4, further comprising: A fifth conductor extends in the third direction and is surrounded by the semiconductor along the first surface; and The semiconductor further includes a third portion that surrounds the fifth conductor along the first surface; The third portion of the semiconductor extends in the third direction, is connected to the first portion and the second portion, and is in contact with the fourth insulator in the hole.

6. The storage device according to claim 3, wherein The second insulator is not in contact with the fourth insulator in the hole.

7. The storage device according to claim 6, wherein The second insulator is not in contact with the fourth insulator in the hole.

8. The storage device according to claim 3, wherein The first conductor is located between the semiconductor and the fourth insulator.

9. The storage device according to claim 3, wherein A fifth insulator is provided on the first portion of the semiconductor in a fourth direction, which is further away from the third direction than the second insulator. The first conductor also has a second part, and The second portion of the first conductor is disposed on the second insulator and further in the fourth direction than the second insulator, separating the first portion of the fifth insulator facing the semiconductor.

10. The storage device according to claim 9, wherein The second insulator includes a second portion on the first portion of the semiconductor in the fourth direction, which is further along the first portion of the semiconductor. The first conductor also has a third part. The third portion of the first conductor is disposed further in the fourth direction than the second portion of the semiconductor, and the second portion of the second insulator faces the second portion of the semiconductor.

11. The storage device according to claim 10, further comprising: A sixth insulator is disposed in the fourth direction further than the first and second portions of the semiconductor, and has a second hole connected to the hole.

12. The storage device according to claim 11, wherein The third portion of the semiconductor is connected to the sixth insulator in the second hole.

13. The storage device according to claim 12, wherein The fifth insulator is not in contact with the sixth insulator in the second hole.

14. The storage device according to claim 12, wherein The second insulator is not in contact with the sixth insulator in the second hole.

15. The storage device according to claim 1, wherein The semiconductor includes an oxide semiconductor.

16. A storage device comprising: A plurality of first insulators are arranged at intervals in a first direction; A semiconductor that penetrates the plurality of first insulators in the first direction, and has a first portion protruding in a second direction intersecting the first direction between each pair of adjacent first insulators; The second insulator on the first portion of the semiconductor; A first conductor between one of the plurality of first insulators and the second insulator; A second conductor connected to the first portion of the semiconductor; A third insulator sandwiched together with the first portion of the semiconductor and the second conductor; The third conductor, which is sandwiched between the second conductor and the third insulator; and A fourth insulator penetrates the plurality of first insulators in the first direction and extends in the second direction; and The end of the fourth insulator on the second direction side of the portion on the first direction side is located closer to the first direction and closer to the second direction. The end of the fourth insulator on the second direction side of the portion opposite to the first direction has a first portion protruding in the second direction.

17. The storage device according to claim 16, wherein The first portion of the fourth insulator is located in the layer containing the first portion of the semiconductor.

18. The storage device according to claim 16, wherein The third-direction end of the portion of the fourth insulator on the first-direction side is located closer to the first-direction side than on the third-direction side. The third direction intersects with the first direction and the second direction.

19. The storage device according to claim 18, wherein The end of the fourth insulator on the third direction side does not have a portion protruding in the third direction.

20. The storage device according to claim 16, wherein The first portion of the fourth insulator is located in one of the adjacent layers of the plurality of first insulators, which is located in the fourth direction closest to the first insulator. The fourth direction is in the opposite direction to the first direction.

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