Semiconductor device and method for manufacturing the same

Abstract

According to one embodiment, a semiconductor device and a manufacturing method thereof can be provided in which an electric field distribution in a termination region can be improved. A semiconductor device includes a first electrode, a second electrode, and a semiconductor layer. The semiconductor layer includes a first semiconductor region of a first conductivity type, a plurality of guard ring regions of a second conductivity type, and a high concentration region of the first conductivity type. The plurality of guard ring regions are located at an upper surface of the semiconductor layer. The high concentration region is located between two mutually adjacent guard ring regions of the plurality of guard ring regions. The two mutually adjacent guard ring regions include an outer side guard ring region and an inner side guard ring region located between the outer side guard ring region and a device region. The high concentration region is separated from the inner side guard ring region. An impurity concentration of the first conductivity type in the high concentration region is greater than an impurity concentration of the first conductivity type in the first semiconductor region, and is not greater than 1.5 x 10 16 / cm 3 .

Description

[0001] Cross-reference to related applications

[0002] This application is based on and claims priority to Japanese Patent Application No. 2025-045297, filed on March 19, 2025, the entire contents of which are incorporated herein by reference. Technical Field

[0003] The implementation methods relate to semiconductor devices and methods of manufacturing the same. Background Technology

[0004] Semiconductor devices include, for example, a component region and a termination region outside the component region, the component region including components such as IGBTs (Insulated Gate Bipolar Transistors), MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors), diodes, etc. Summary of the Invention

[0005] According to one embodiment, a semiconductor device and a method of manufacturing the same can be provided, wherein the electric field distribution in the termination region can be improved.

[0006] A semiconductor device according to an embodiment includes a first electrode, a second electrode, and a semiconductor layer. The second electrode is located above the first electrode. The semiconductor layer is located vertically between the first electrode and the second electrode. The semiconductor layer includes a first semiconductor region of a first conductivity type, a plurality of guard ring regions of a second conductivity type, and a high-concentration region of the first conductivity type. The first semiconductor region includes a device region and a termination region surrounding the device region. The plurality of guard ring regions surround the device region in the termination region and are located at the upper surface of the semiconductor layer. The high-concentration region is located between two adjacent guard ring regions of the plurality of guard ring regions. The two adjacent guard ring regions include an outer guard ring region and an inner guard ring region located between the outer guard ring region and the device region. The high-concentration region is separated from the inner guard ring region. The impurity concentration of the first conductivity type in the high-concentration region is greater than the impurity concentration of the first conductivity type in the first semiconductor region, but not greater than 1.5 × 10⁻⁶. 16 / cm 3 .

[0007] A semiconductor device according to another embodiment includes a first electrode, a second electrode, and a semiconductor layer. The second electrode is located above the first electrode. The semiconductor layer is located vertically between the first and second electrodes. The semiconductor layer includes a first semiconductor region of a first conductivity type, a plurality of guard ring regions of a second conductivity type, and a high-concentration region of the first conductivity type. The first semiconductor region includes a device region and a termination region surrounding the device region. The plurality of guard ring regions surround the device region in the termination region and are located at the upper surface of the semiconductor layer. The high-concentration region is located between two adjacent guard ring regions of the plurality of guard ring regions. The two adjacent guard ring regions include an outer guard ring region and an inner guard ring region located between the outer guard ring region and the device region. The high-concentration region is separated from the inner guard ring region and the outer guard ring region. The impurity concentration of the first conductivity type in the high-concentration region is greater than the impurity concentration of the first conductivity type in the first semiconductor region.

[0008] A method for manufacturing a semiconductor device according to an embodiment includes a step of preparing a semiconductor layer comprising a first semiconductor region of a first conductivity type and a plurality of guard ring regions of a second conductivity type. The first semiconductor region is located in a device region and in a terminating region surrounding the device region. The plurality of guard ring regions are located on the first semiconductor region in the terminating region and surround the device region. The manufacturing method includes a step of forming a plurality of conductive components. A portion of each of the plurality of conductive components is located above the plurality of guard ring regions; and the plurality of conductive components are electrically connected to the plurality of guard ring regions. The manufacturing method includes a step of performing ion implantation using a plurality of conductive portions as a mask to form a high-concentration region of a first conductivity type on the first semiconductor region between two adjacent guard ring regions in the plurality of guard ring regions. The impurity concentration of the first conductivity type in the high-concentration region is greater than the impurity concentration of the first conductivity type in the first semiconductor region. The dose of the first conductivity type impurity during ion implantation is not greater than 3.5 × 10⁻⁶. 12 / cm 2 . Attached Figure Description

[0009] Figure 1 This is a schematic plan view illustrating a semiconductor device according to an embodiment;

[0010] Figure 2 This is a schematic cross-sectional view used to illustrate the semiconductor device of this embodiment;

[0011] Figure 3 It is a graph showing a simulation of the electric field of a semiconductor device;

[0012] Figure 4 It is a graph illustrating a simulation of the potential difference in a semiconductor device;

[0013] Figure 5 It is a graph showing the impurity concentration distribution of the semiconductor layer in the Z direction for the first conductivity type;

[0014] Figure 6 It is a simulated graph showing the breakdown voltage;

[0015] Figure 7 It is a simulated graph showing the breakdown voltage;

[0016] Figures 8A to 8C This is a schematic cross-sectional view illustrating a portion of a semiconductor device used to explain an embodiment;

[0017] Figure 9 It is a graph showing the impurity concentration distribution of the semiconductor layer in the Z direction for the first conductivity type;

[0018] Figure 10 This is a schematic cross-sectional view showing a portion of a semiconductor device according to an embodiment;

[0019] Figure 11 It shows along Figure 10 The graph shown represents a portion of the impurity concentration of line La.

[0020] Figure 12 This is a schematic cross-sectional view showing a portion of a semiconductor device according to an embodiment;

[0021] Figure 13 It shows along Figure 12 The graph shown represents a portion of the impurity concentration of line Lb.

[0022] Figure 14 This is a schematic cross-sectional view showing a portion of a semiconductor device according to an embodiment;

[0023] Figure 15 This is a schematic cross-sectional view showing a portion of a semiconductor device according to an embodiment;

[0024] Figure 16 This is a schematic cross-sectional view showing a portion of a semiconductor device according to an embodiment;

[0025] Figure 17A and Figure 17B This is a schematic cross-sectional view illustrating a method for manufacturing a semiconductor device according to an embodiment;

[0026] Figure 18A and Figure 18B This is a schematic cross-sectional view illustrating a method for manufacturing a semiconductor device according to an embodiment;

[0027] Figure 19A and Figure 19BThis is a schematic cross-sectional view illustrating a method for manufacturing another semiconductor device according to an embodiment;

[0028] Figure 20A and Figure 20B This is a schematic cross-sectional view illustrating a method for manufacturing another semiconductor device according to an embodiment;

[0029] Figure 21 This is a schematic cross-sectional view used to illustrate a method for manufacturing another semiconductor device according to an embodiment. Detailed Implementation

[0030] The various embodiments are described below with reference to the accompanying drawings.

[0031] The accompanying drawings are schematic and conceptual; the relationship between the thickness and width of a part, the dimensional proportions between parts, etc., may not be the same as the actual values. Even for the same part, the dimensions and proportions may be shown differently in the accompanying drawings.

[0032] In the specification and drawings, components similar to those previously described or shown in the preceding drawings are labeled with the same reference numerals, and detailed descriptions are omitted where appropriate.

[0033] In the embodiments described below, each implementation can be achieved by reversing the p-type (an example of the second conductivity type) and n-type (an example of the first conductivity type) of each semiconductor region.

[0034] Figure 1 This is a schematic plan view showing a semiconductor device according to an embodiment.

[0035] like Figure 1 As shown, the semiconductor device 100 according to an embodiment includes a component region RC and a termination region RE surrounding the component region RC. In this example, the IGBT is located in the component region RC. Components such as MOSFETs, diodes, etc., may be located in the component region RC.

[0036] Semiconductor device 100 includes a semiconductor layer 20. Semiconductor layer 20 (semiconductor device 100) has a rectangular shape, including a side extending in the X direction and a side extending in the Y direction. Semiconductor device 100 also includes a first electrode 11 (e.g., a collector) and a second electrode 12 (e.g., an emitter) located above the first electrode 11, which will be described below. Semiconductor layer 20 is located between the first electrode 11 and the second electrode 12 in the vertical direction (Z direction). Semiconductor layer 20 is located in the element region RC and the termination region RE.

[0037] Semiconductor layer 20 includes multiple guard ring regions GR. The guard ring regions GR are located in the termination region RE at the front surface of semiconductor layer 20. The guard ring regions GR have an annular shape surrounding the entire periphery of the element region RC. The multiple guard ring regions GR are separated from each other. Parts of the semiconductor device 100, such as the second electrode 12, are not included in the guard ring region GR. Figure 1 As shown in the image.

[0038] Figure 2 This is a schematic cross-sectional view used to illustrate the semiconductor device of this embodiment.

[0039] Figure 2 It shows along Figure 1 The cross-section of line A1-A2 shown is a portion of the cross-section of the termination region RE and the element region RC.

[0040] like Figure 2 As shown, the second electrode 12 is separated from the first electrode 11 in the Z direction. In the description of the embodiment, the direction from the first electrode 11 toward the second electrode 12 is referred to as the Z direction (first direction). In the description, the direction from the first electrode 11 toward the second electrode 12 is referred to as "up / above," and the opposite direction is referred to as "down / below." These directions are based on the relative positional relationship between the first electrode 11 and the second electrode 12 and are independent of the direction of gravity. The X, Y, and Z directions are perpendicular to each other. For example, the semiconductor layer 20 is a semiconductor substrate; the Z direction is the thickness direction of the semiconductor substrate; and the X and Y directions are parallel to the main surfaces (lower surface f1 and upper surface f2) of the semiconductor substrate.

[0041] A semiconductor layer 20 is located between a first electrode 11 and a second electrode 12 in the component region RC. The semiconductor layer 20 includes a lower surface f1 on the side of the first electrode 11 and an upper surface f2 on the side of the second electrode 12. The lower surface f1 and the upper surface f2 extend along the XY plane. The first electrode 11 contacts the lower surface f1 and is electrically connected to the semiconductor layer 20. The second electrode 12 contacts the upper surface f2 and is electrically connected to the semiconductor layer 20.

[0042] Semiconductor layer 20 includes a first semiconductor region 21 (e.g., a drift region), a fourth semiconductor region 24 (e.g., a buffer region) and a fifth semiconductor region 25 (e.g., a collector region).

[0043] The first electrode 11, the fourth semiconductor region 24, the semiconductor region 25, and the first semiconductor region 21 extend across the element region RC and the termination region RE. The second electrode 12 is located in the element region RC.

[0044] The fifth semiconductor region 25 is located on the first electrode 11. The fifth semiconductor region 25 is in contact with the first electrode 11. The fifth semiconductor region 25 has a second conductivity type.

[0045] The fourth semiconductor region 24 is located on the fifth semiconductor region 25. The fourth semiconductor region 24 has a first conductivity type.

[0046] The first semiconductor region 21 is located on the fourth semiconductor region 24. The first semiconductor region 21 has a first conductivity type. The impurity concentration of the first conductivity type in the first semiconductor region 21 is less than the impurity concentration of the first conductivity type in the fourth semiconductor region 24.

[0047] In this example, guard ring regions GR0 to GR7 are included as a plurality of guard ring regions GR. The guard ring regions GR are located on the first semiconductor region 21 on the upper surface f2 side of the semiconductor layer 20. The guard ring regions GR extend downward from the upper surface f2. The guard ring regions GR are semiconductor regions of a second conductivity type. The impurity concentration of the second conductivity type in the guard ring regions GR is, for example, not less than 1 x 10⁻⁶. 17 / cm 3 A portion of the first semiconductor region 21 lies between adjacent guard ring regions GR.

[0048] Guard ring regions GR0, GR1, GR2, GR3, GR4, GR5, GR6, and GR7 are arranged sequentially from the RC side of the element region. For example, the potential of the guard ring region GR is in a floating state. For example, the guard ring region GR suppresses electric field concentration by allowing the depletion layer to diffuse in the termination region RE.

[0049] like Figure 2 As shown, a portion of the guard ring region GR0 can extend beyond the boundary between the component region RC and the termination region RE, and extend into the end of the component region RC.

[0050] The guard ring region GR0 extends below the second electrode 12. The second electrode 12 contacts the top of the guard ring region GR0 and is electrically connected to the guard ring region GR0.

[0051] For example, multiple guard ring regions GR1 to GR7 have the same impurity concentration of the second conductivity type. The impurity concentration of the second conductivity type in guard ring region GR0 can be greater than the impurity concentration of the second conductivity type in other guard ring regions GR1 to GR7.

[0052] The semiconductor layer 20 also includes a plurality of high-concentration regions 28 in the termination region RE. The high-concentration regions 28 are semiconductor regions of a first conductivity type. The impurity concentration of the first conductivity type in the high-concentration regions 28 is greater than the impurity concentration of the first conductivity type in the first semiconductor region 21.

[0053] Each high-concentration region 28 is located between two adjacent guard ring regions GR. In other words, a high-concentration region 28 is located between two guard ring regions GR. The guard ring regions GR and the high-concentration regions 28 are arranged alternately in the X direction.

[0054] The high-concentration region 28 extends along the guard ring region GR in the XY plane. In other words, similar to the guard ring region GR, the high-concentration region 28 can have an annular shape surrounding the element region RC.

[0055] For example, the high-concentration region 28 located between the guard ring regions GR2 and GR3 is separated from the guard ring region GR2. That is, a portion of the first semiconductor region 21 is located between the high-concentration region 28 and the guard ring region GR2, and is in contact with both the high-concentration region 28 and the guard ring region GR2. Therefore, the high-concentration region 28 between two adjacent guard ring regions GR is separated from the inner guard ring region GR of the two guard ring regions GR.

[0056] In two adjacent guard ring regions GR, the guard ring region GR that is relatively closer to the component region RC is called the inner guard ring region GR; and the guard ring region GR that is relatively farther away from the component region RC is called the outer guard ring region GR. In other words, the inner guard ring region GR is located between the component region RC and the outer guard ring region GR.

[0057] exist Figure 2 In the example, the high-concentration region 28 between two adjacent guard ring regions GR is in contact with the outer guard ring region GR of the two guard ring regions GR. In other words, for example, the high-concentration region 28 between guard ring regions GR2 and GR3 is in contact with guard ring region GR3 and forms a pn junction with guard ring region GR3.

[0058] In the termination region RE, a plurality of electrodes 40 are located on the semiconductor layer 20. The electrodes 40 are located on and electrically connected to the guard ring regions GR1 to GR7, respectively. More specifically, each electrode 40 includes a contact portion 42 that contacts the upper surface of the guard ring region GR, and a conductive portion 41 wider than the contact portion 42. The contact portion 42 and the conductive portion 41 extend along the guard ring region GR in the XY plane. In other words, similar to the guard ring region GR, the electrode 40 may have an annular shape surrounding the element region RC. The electrode 40 is, for example, a field plate. For example, the potential of the electrode 40 is floating. It is desirable that the electrode 40 and the high-concentration region 28 do not overlap in the Z direction.

[0059] Semiconductor layer 20 includes a semiconductor region 26 located at the outer end of the termination region RE. Semiconductor region 26 is situated on the first semiconductor region 21 and surrounds the element region RC. Semiconductor region 26 is, for example, an EQPR (equipotential ring). The impurity concentration of a first conductivity type in semiconductor region 26 is greater than the impurity concentration of the first conductivity type in the first semiconductor region 21. Electrode 17 is located on, in contact with, and electrically connected to semiconductor region 26.

[0060] The insulating layer 32 is located on the semiconductor layer 20 (guard ring region GR, first semiconductor region 21 and semiconductor region 26), electrode 40 and electrode 17 in the termination region RE. A portion of electrode 40 and electrode 17 is separated from the first semiconductor region 21 by the insulating layer 32.

[0061] Figure 3 It is a graph showing a simulation of the electric field of a semiconductor device.

[0062] A positive voltage relative to the second electrode 12 is applied to the first electrode 11. Figure 3 The electric field strengths of semiconductor devices 109a, 100a, 100b and 100c are shown. Figure 3 The electric field intensity along the X direction is shown at a depth near the lower end of the protective ring region GR. Figure 3 The electric field intensity around two adjacent guard ring regions GR (inner guard ring region GRa and outer guard ring region GRb) is shown. Figure 3 Position X1 corresponds to the end of the inner protective ring region GRa. Positions X2 and X3 correspond to the ends of the outer protective ring region GRb.

[0063] Semiconductor device 109 differs from semiconductor device 100 according to the above embodiment in that it does not include the high-concentration region 28. Similar to semiconductor device 100, semiconductor devices 100a, 100b, and 100c include the high-concentration region 28. The concentration of impurities of the first conductivity type in the high-concentration region 28 increases in the order of semiconductor devices 100a, 100b, and 100c.

[0064] like Figure 3 As shown, when the high-concentration region 28 is included, the electric field strength between positions X1 and X2 increases. In other words, the electric field strength between the two guard ring regions GR increases.

[0065] Figure 4 It is a graph showing a simulation of the potential difference in a semiconductor device.

[0066] Figure 4 The potential difference of semiconductor devices 109, 100a, 100b and 100c is shown. Figure 4It shows something similar to Figure 3 The potential difference within the range. Figure 4 The potential difference is the absolute value of the potential difference relative to the potential of the inner guard ring region GRa in the semiconductor device.

[0067] like Figure 4 As shown, when the high-concentration region 28 is included, the potential change between positions X1 and X2 (i.e., between the two guard ring regions GR) becomes larger. By including the high-concentration region 28, the potential change in the termination region RE can be increased. For example, the potential decreases more as one moves away from the component region RC.

[0068] Therefore, by including the high-concentration region 28, the electric field strength between the guard ring regions GR can be increased, and the effective electric field in the termination region RE can be controlled. The electric field distribution in the termination region RE can be improved. As a result, for example, the termination region RE can be reduced, and the semiconductor device can be made smaller.

[0069] Each guard ring region GR has an inner end (on the element region RC side) and an outer end (on the side opposite to the element region RC). The inner end lies between the outer end and the element region RC. The electric field tends to be stronger at the outer end of each guard ring region GR. For example, as... Figure 3 As shown, the electric field strength peaks at positions X1 and X3 (i.e., the corners of the guard ring regions GR). In the semiconductor device 100 described above, the high-concentration region 28 is separated from the inner guard ring region GR of the two adjacent guard ring regions GR. In other words, the high-concentration region 28 is separated from the outer end of the guard ring region GR (e.g., position X1). For example, by including the high-concentration region 28, the electric field strength at position X1 is not significantly increased. Therefore, for example, an increase in the electric field at the outer end of the guard ring region GR can be suppressed. For example, the potential difference between the guard ring regions GR can be increased while suppressing the electric field at the corners of the guard ring regions GR. For example, the semiconductor device can be made smaller while suppressing a decrease in breakdown voltage.

[0070] As per the above reference Figure 2 The high-concentration region 28 can come into contact with the outer protective ring region GR. In this case, the distance between the high-concentration region 28 and the inner protective ring region GR can be increased. As a result, for example, the electric field at the corner of the inner protective ring region GR can be further suppressed.

[0071] Figure 5 This is a graph showing the impurity concentration distribution of the semiconductor layer in the Z direction for the first conductivity type.

[0072] The horizontal axis is the Z-direction distance (depth) from the upper surface f2 of the semiconductor layer 20. Figure 5The impurity concentration distribution from the upper end of the high-concentration region 28 to the first semiconductor region 21 is shown.

[0073] Figure 5 The impurity concentration distribution is shown when high concentration regions 28a to 28f form high concentration region 28. High concentration regions 28a to 28f have different doses.

[0074] In this example, the impurity concentration of the first conductivity type in the Z direction of each high-concentration region 28 has peak values ​​P1 and P2. The shallow peak P1 and the deep peak P2 have, for example, approximately equal values. The value of the deep peak P2 may, for example, be greater than the value of the shallow peak P1.

[0075] Figure 6 This is a simulated graph showing the breakdown voltage.

[0076] The vertical axis represents the breakdown voltage Vces between the collector and emitter of the semiconductor device. The horizontal axis represents the impurity concentration of the first conductivity type in the high-concentration region 28. The horizontal axis corresponds to the peak concentration of the first conductivity type of impurities in the high-concentration region 28. The values ​​along the horizontal axis are... Figure 5 The graph shows the impurity concentration at peak P2 near the high concentration region 28a to 28f. Specifically, it plots... Figure 5 The impurity concentration at a depth of 2 μm in the high-concentration regions 28a to 28f is shown. When the high-concentration region 28 is excluded, the impurity concentration in the first semiconductor region 21 is approximately 10. 13 / cm 3 Therefore, the curve is as close to zero as possible on the horizontal axis.

[0077] Figure 6 The substrate concentration (i.e., the impurity concentration of the first conductivity type in the first semiconductor region 21) is shown to be 2 × 10⁻⁶. 13 / cm 3 3.15×10 13 / cm 3 and 5×10 13 / cm 3 In this embodiment, the concentration of the first conductivity type impurity in the first semiconductor region 21 is, for example, not less than 1 x 10⁻⁶. 13 / cm 3 and no greater than 7x10 13 / cm 3 .

[0078] For example Figure 6 For each substrate concentration shown, the breakdown voltage varies with the horizontal axis value at a value not less than 1 × 10⁻⁶. 15 / cm 3 and not greater than 6×10 15 / cm3 It increases within the range. When the horizontal axis value is approximately 6 × 10⁻⁶... 15 / cm 3 At this point, the breakdown voltage has a peak value. Then, the breakdown voltage decreases as the horizontal axis value increases. In the semiconductor device 109 without the formation of the high-concentration region 28, the electric field strength between the guard ring regions GR is low, and the breakdown voltage is low; however, the breakdown voltage is increased by forming the high-concentration region 28. When the concentration of the high-concentration region 28 becomes too high, the electric field strength between the guard ring regions GR increases, and the breakdown voltage decreases. When the electric field strength between the guard ring regions GR is high and the breakdown voltage decreases significantly, there is a possibility that the breakdown immunity may decrease, etc. Therefore, it is desirable that the concentration of the high-concentration region 28 is the concentration around which the breakdown voltage has a peak value.

[0079] For 2×10 13 / cm 3 3.15×10 13 / cm 3 and 5×10 13 / cm 3 The concentration of each substrate, when the horizontal axis value is not greater than 1.5 × 10⁻⁶. 16 / cm 3 The breakdown voltage at this time is greater than the breakdown voltage when excluding the high-concentration region 28 (when the horizontal axis value is close to zero). When the substrate concentration is 5 × 10⁻⁸... 13 / cm 3 At that time, the breakdown voltage when the horizontal axis value is close to zero is approximately equal to the breakdown voltage when the horizontal axis value is 1.5 × 10⁻⁶. 16 / cm 3 The breakdown voltage at that time.

[0080] According to this embodiment, the concentration of the first conductivity type impurity in the high concentration region 28 is, for example, no greater than 1.5 x 10⁻⁶. 16 / cm 3 In this case, the breakdown voltage can be higher than the breakdown voltage excluding the high-concentration region 28. For example, the impurity concentration of the first conductivity type in the high-concentration region 28 is no greater than 1.0 x 10⁻⁶. 16 / cm 3 .

[0081] For example, the concentration of impurities of the first conductivity type in the high-concentration region 28 is not less than 2.5 × 10⁻⁶. 15 / cm 3 And not greater than 1.0 × 10 16 / cm 3 In this case, the ratio of the breakdown voltage drop to the peak breakdown voltage is, for example, no more than about 10%.

[0082] For example, the concentration of impurities of the first conductivity type in the high-concentration region 28 is not less than 4.0 × 10⁻⁶. 15 / cm 3 and not greater than 9.0 × 10 15 / cm 3 In this case, the ratio of the breakdown voltage drop to the peak breakdown voltage is, for example, no greater than about 7.5%.

[0083] For example, the concentration of impurities of the first conductivity type in the high-concentration region 28 is not less than 5.0 × 10⁻⁶. 15 / cm 3 and not greater than 8.0×10 15 / cm 3 In this case, the ratio of the breakdown voltage drop to the peak breakdown voltage is, for example, no more than about 5%.

[0084] Figure 7 This is a simulated graph showing the breakdown voltage.

[0085] Similar to Figure 6 The vertical axis represents the breakdown voltage Vces between the collector and emitter. The horizontal axis represents the dose of the first conductivity type in the high-concentration region 28. In other words, the horizontal axis represents the number of impurities of the first conductivity type per unit area in the high-concentration region 28. Assuming an activation rate of approximately 100%, the horizontal axis corresponds to... Figure 5 The impurity concentration values ​​shown are integrated over the substrate concentration and at a depth exceeding that. Alternatively, assuming an activation rate of approximately 100%, the horizontal axis corresponds to the impurity mass per unit area of ​​the high-concentration region 28 in the XY plane. Figure 7 In the middle, it was drawn Figure 5 The high-concentration regions 28a to 28f are shown as the first conductivity type dose. When excluding the high-concentration region 28, the impurity concentration of the first semiconductor region 21 is approximately 10. 13 / cm 3 And plotted on the horizontal axis as close to zero as possible. Figure 7 It also shows 2×10 13 / cm 3 3.15×10 13 / cm 3 and 5×10 13 / cm 3 substrate concentration.

[0086] According to this embodiment, the dose of the first conductivity type impurity in the high concentration region 28 is, for example, no greater than 3.5 x 10⁻⁶. 12 / cm 2In this case, the breakdown voltage can be higher than the breakdown voltage excluding the high-concentration region 28. For example, the dose of the first conductivity type impurity in the high-concentration region 28 is no greater than 2.4 × 10⁻⁶. 12 / cm 2 .

[0087] For example, the dose of impurities of the first conductivity type in the high-concentration region 28 is not less than 8.0 × 10⁻⁶. 11 / cm 2 And not greater than 2.4 × 10 12 / cm 2 In this case, the ratio of the breakdown voltage drop to the peak breakdown voltage is, for example, no more than about 10%.

[0088] For example, the dose of impurities of the first conductivity type in the high-concentration region 28 is not less than 9.0 × 10⁻⁶. 11 / cm 2 And not greater than 2.2 × 10 12 / cm 2 In this case, the ratio of the breakdown voltage drop to the peak breakdown voltage is, for example, no greater than about 7.5%.

[0089] For example, the dose of impurities of the first conductivity type in the high-concentration region 28 is not less than 1.0 × 10⁻⁶. 12 / cm 2 And not greater than 2.0 × 10 12 / cm 2 In this case, the ratio of the breakdown voltage drop to the peak breakdown voltage is, for example, no more than about 5%.

[0090] Figures 8A to 8C These are schematic cross-sectional views showing portions of a semiconductor device according to an embodiment. These views are similar to... Figure 2 A magnified view of the periphery of the high-concentration region 28 in the cross-section.

[0091] exist Figure 8A In the example, the upper end 28t of the high-concentration region 28 and the upper end GRt of the guard ring region GR are located at the upper surface f2 of the semiconductor layer 20. A portion of the upper surface f2 is formed by the high-concentration region 28 and the guard ring region GR. The lower end 28u of the high-concentration region 28 is higher than the lower end GRu of the guard ring region GR. For example, the length GRz of the guard ring region GR in the Z direction is not less than 3 μm and not greater than 10 μm.

[0092] As in Figure 8B In the example, the lower end 28u of the high-concentration region 28 can be lower than the lower end GRu of the guard ring region GR. In this case, for example, the electric field strength increases even at deeper locations.

[0093] As in Figure 8C In the example, the upper end 28t of the high-concentration region 28 may be lower than the upper surface f2 of the semiconductor layer 20. In this case, for example, the electric field on the front side is suppressed, and breakdown voltage degradation due to external charges is suppressed. The semiconductor region on the high-concentration region 28 has a lower impurity concentration of the first conductivity type than the high-concentration region 28. For example, a portion of the first semiconductor region 21 may be located on the high-concentration region 28.

[0094] Figure 9 This is a graph showing the impurity concentration distribution of the semiconductor layer in the Z direction for the first conductivity type.

[0095] The horizontal axis and the vertical axis are similar Figure 5 Those. Figure 9 The impurity concentration distribution is shown when the high concentration regions 28g to 28k are formed as high concentration region 28. The high concentration regions 28g to 28k have different doses.

[0096] In this example, the impurity concentration of the first conductivity type in the Z direction of each high-concentration region 28 has peak values ​​P3 and P4. The value of the deep peak P4 can be greater than or less than the value of the shallow peak P3.

[0097] For reference Figure 5 and Figure 9 The high-concentration region 28 may have multiple peaks in the impurity concentration distribution of the first conductivity type in the Z direction (depth direction). The high-concentration region 28 can be formed by introducing impurities into the substrate through ion implantation and annealing. For example, multiple peaks can be formed by performing ion implantation multiple times at different accelerating voltages.

[0098] For example, one approach could be to form a deep high-concentration region 28 by annealing at a high temperature after ion implantation. However, if the annealing temperature is too high, problems such as crystal defects in the semiconductor may occur. Conversely, for example, by performing ion implantation multiple times at different accelerating voltages, a deep high-concentration region 28 can be obtained while suppressing the annealing temperature.

[0099] For example, given the breakdown voltage, the higher peak concentration in peaks P3 and P4 does not exceed the upper limit of the aforementioned desired concentration range (e.g., not exceeding 1.5 x 10⁻⁶). 16 / cm 3 That's sufficient. For example, in the high concentration region of 28k, the breakdown voltage can be maintained by setting the peak value P3, which has the maximum value, to no greater than the upper limit of the desired concentration range.

[0100] Figure 10 This is a schematic cross-sectional view showing a portion of a semiconductor device according to an embodiment. Figure 11 It shows along Figure 10 The graph shown represents a portion of the impurity concentration of line La. Figure 11 (and below) Figure 13 In the diagram, the impurity concentration of the first conductivity type is shown by a solid line; and the impurity concentration of the second conductivity type is shown by a dashed line. Figure 11 In the first semiconductor region 21, the concentration of impurities of the first conductivity type can be constant.

[0101] like Figure 10 As shown, the width of the high-concentration region 28, i.e., its length L28 in the X direction, can be less than half the length L1 between two adjacent guard ring regions GR. The length L28 of the high-concentration region 28 can be less than the length L2 between the inner guard ring region GRa and the high-concentration region 28. The length L28 of the high-concentration region 28 can be less than the width of the outer guard ring region GRb, i.e., its length LGR in the X direction. For example, a strong electric field at the end of the inner guard ring region GRa can be suppressed by ensuring a sufficient distance between the high-concentration region 28 and the inner guard ring region GRa.

[0102] Figure 12 This is a schematic cross-sectional view showing a portion of a semiconductor device according to an embodiment. Figure 13 It shows along Figure 12 The graph shown represents a portion of the impurity concentration of line Lb.

[0103] like Figure 12 As shown, the high-concentration region 28 can be separated from the outer guard ring region GRb. In this case, the range of electric field strength between the guard ring regions GR can be increased through the high-concentration region 28. As a result, for example, the potential variation between the guard ring regions GR can be increased.

[0104] exist Figure 12 In the example, the length L3 between the high-concentration region 28 and the outer protective ring region GRb is less than the length L28 of the high-concentration region 28 and less than the length L2. When the length L3 is set to be less than the length L2, as... Figure 4 The region where the potential difference is generated can be wider between the inner guard ring region GRa and the high-concentration region 28, thus improving the electric field distribution and reducing the termination region RE. Therefore, for example, by positioning the high-concentration region 28 near the outer guard ring region GRb, the increase in electric field at the corner of the inner guard ring region GRa can be suppressed.

[0105] like Figure 13As shown, the peak P5 of the impurity concentration of the first conductivity type can be separated from the outer guard ring region GRb along the X direction. In other words, a semiconductor region with a lower impurity concentration of the first conductivity type than the high concentration region 28 can be located between the outer guard ring region GRb and the high concentration region 28. A portion of the first semiconductor region 21 can be located between the guard ring region GRb and the high concentration region 28.

[0106] When the high-concentration region 28 is separated from the outer guard ring region GRb, the influence of impurities included in the high-concentration region 28 on the conductivity type of the guard ring region GRb can be reduced. For example, the high-concentration region 28 is of the n-type conductivity type, and the guard ring region GRb is of the p-type conductivity type. This reduces the influence of the diffusion of n-type impurities included in the high-concentration region 28 into the guard ring region GRb on the p-type conductivity type of the guard ring region GRb. For example, the reduction in the effective acceptor concentration of the guard ring region GRb due to donors included in the high-concentration region 28 can be suppressed.

[0107] The width (length LGR) of the guard ring region GR is, for example, not less than 9 μm and not more than 16 μm. The width (length L28) of the high concentration region 28 is, for example, not less than 2 μm and not more than 6 μm. The spacing (length L1) of the guard ring regions GR is, for example, not less than 10 μm and not more than 30 μm.

[0108] Figure 14 This is a schematic cross-sectional view showing a portion of a semiconductor device according to an embodiment.

[0109] At least a portion of the guard ring region GR is located between the first semiconductor region 21 and at least a portion of the conductive portion 41. Figure 14 In the example, the conductive part 41 is located above the entire protective ring region GR. In other words, the entire protective ring region GR overlaps with the conductive part 41 in the Z direction.

[0110] The conductive portion 41 includes an inner end 41a on the component region RC side and an outer end 41b on the opposite side of the inner end 41a. The inner end 41a is located between the outer end 41b and the component region RC.

[0111] For example, in the Z direction, the high-concentration region 28 does not overlap with the outer end 41b of the conductive portion 41 electrically connected to the inner guard ring region GRa. The high-concentration region 28 is located further away from the element region RC than the outer end 41b of the conductive portion 41 electrically connected to the inner guard ring region GRa. For example, the influence of the high-concentration region 28 on the electric field at the corner of the inner guard ring region GRa can be suppressed.

[0112] In this example, in the Z direction, the high-concentration region 28 overlaps with the inner end 41a of the conductive portion 41 electrically connected to the outer protective ring region GRb. However, as described above... Figure 10 In this configuration, the inner end 41a can be positioned directly above the protective ring region GR, and can avoid overlapping with the high-concentration region 28 in the Z direction. Furthermore, the conductive portion 41 can be... Figure 14 The example extends further toward the RC side of the element region, such that the conductive portion 41 is located above the entire high-concentration region 28.

[0113] Figure 15 This is a schematic cross-sectional view showing a portion of a semiconductor device according to an embodiment.

[0114] Therefore, the high-concentration region 28 may overlap with at least one of the conductive portions 41 electrically connected to the inner protective ring region GRa or the conductive portions 41 electrically connected to the outer protective ring region GRb in the Z direction. Figure 15 In the example, the high-concentration region 28 overlaps with the inner end 41a and the outer end 41b in the Z direction. As described below, the high-concentration region 28 can be formed by ion implantation using the conductive portion 41 as a mask.

[0115] Figure 16 This is a schematic cross-sectional view showing a portion of a semiconductor device according to an embodiment.

[0116] Multiple high-concentration regions 28 include an outer high-concentration region 28p, an inner high-concentration region 28q, and an inner high-concentration region 28r. High-concentration region 28q is located between the component region RC and high-concentration region 28p. High-concentration region 28r is located between high-concentration region 28q and component region RC.

[0117] In this example, the widths of the multiple high-concentration regions 28 increase with distance from the component region RC. In other words, for example, the width (length L28) of high-concentration region 28p is greater than the width (length L28) of high-concentration region 28q. The width of high-concentration region 28q is greater than the width (length L28) of high-concentration region 28r. Therefore, the width of the high-concentration regions 28 can increase with distance from the component region RC. For example, by widening the high-concentration regions 28, the potential variation can be increased.

[0118] In this example, the distance (length L3) between the high-concentration region 28 and the guard ring region GR increases with distance from the component region RC. In other words, for example, the interval between the high-concentration region 28p and the guard ring region GR7 can be greater than the interval between the high-concentration region 28q and the guard ring region GR6. For example, the interval between the high-concentration region 28q and the guard ring region GR6 can be greater than the interval between the high-concentration region 28r and the guard ring region GR5. Therefore, the interval between the high-concentration region 28 and the guard ring region GR closest to the high-concentration region 28 increases with distance from the component region RC. Furthermore, the distance (length L1) between the guard ring regions GR increases with distance from the component region RC.

[0119] For example, the potential variation can be increased by increasing the spacing between the guard ring regions GR located away from the component region RC.

[0120] Figure 17A , 17B 18A and 18B are schematic cross-sectional views illustrating a method for manufacturing a semiconductor device according to an embodiment.

[0121] like Figure 17A As shown, a guard ring region GR and a high-concentration region 28 of the termination region RE are formed by ion implantation into a semiconductor substrate (including a semiconductor layer 20 of the first semiconductor region 21). For example, the region other than the area to be implanted with ions is covered with a photoresist, and diffusion layers for forming the guard ring region GR and the high-concentration region 28 are sequentially formed in the termination region RE. The guard ring region GR of the termination region RE is formed by ion implantation of boron (B) + Phosphorus (P) is formed through ion implantation. + A high-concentration region 28 is formed. Next, a diffusion layer is formed over the element region RC. Specifically, a second semiconductor region 22 (e.g., a base region) is formed by ion implantation. The desired shape can be formed while suppressing diffusion by performing a low-temperature heat treatment at no more than 1,000°C after ion implantation for activation.

[0122] Then, as Figure 17B As shown, a trench T1, a conductive portion 15 (e.g., a gate electrode), an insulating layer 30, a third semiconductor region 23 (e.g., a source region), and a second electrode 12 are formed in the component region RC. The termination region RE is covered by the insulating layer 31.

[0123] like Figure 18A As shown, an electrode 40 is formed that is connected to the guard ring region GR. The termination region RE is covered by an insulating layer 32. Subsequently, the back side of the semiconductor layer 20 is polished and thinned to have a specified thickness.

[0124] Subsequently, as Figure 18BAs shown, the fourth semiconductor region 24 is formed by implanting P ions into the entire back surface of the semiconductor layer 20. The fifth semiconductor region 25 is formed by implanting B ions into the back surface of the semiconductor layer 20. Activation is performed by low-temperature annealing, such as laser annealing. The first electrode 11 is formed on the back side of the semiconductor layer 20.

[0125] Although electrode 40 is a single layer in this example, a multilayer field plate can be used. The fifth semiconductor region 25 formed on the back surface of semiconductor layer 20 does not necessarily need to be formed in the termination region RE.

[0126] The semiconductor device 100 can be formed as described above.

[0127] The second semiconductor region 22 is located on the first semiconductor region 21 in the element region RC. In other words, the second semiconductor region 22 is located between the first semiconductor region 21 and the second electrode 12. The second semiconductor region 22 has a second conductivity type. The third semiconductor region 23 is located on a portion of the second semiconductor region 22 in the element region RC. In other words, the third semiconductor region 23 is located between the second semiconductor region 22 and the second electrode 12. The third semiconductor region 23 has a first conductivity type.

[0128] The conductive portion 15 is positioned opposite the first semiconductor region 21, the second semiconductor region 22, and the third semiconductor region 23 via the insulating layer 30. In this example, the conductive portion 15 and the insulating layer 30 are located inside a trench T1 in the semiconductor layer 20. The trench T1 extends from the upper surface f2 of the substrate to the first semiconductor region 21 in the Z direction. The insulating layer 30 is located on the inner wall of the trench T1. The insulating layer 30 is in contact with the first semiconductor region 21, the second semiconductor region 22, and the third semiconductor region 23. The conductive portion 15 is located inside the insulating layer 30 within the trench T1 and is insulated from the semiconductor layer 20 through the insulating layer 30. The conductive portion 15 is aligned with the first semiconductor region 21, the second semiconductor region 22, and the third semiconductor region 23 in the X direction.

[0129] The second electrode 12 is in contact with and electrically connected to the second semiconductor region 22 and the third semiconductor region 23. The second electrode 12 is insulated from the conductive portion 15 by the insulating layer 33.

[0130] The following will describe examples of the materials used in the components of the semiconductor device 100.

[0131] Semiconductor layer 20 (including semiconductor regions within semiconductor layer 20) comprises silicon, silicon carbide, gallium nitride, or gallium arsenide as the semiconductor material. For example, semiconductor layer 20 is a semiconductor substrate such as a silicon substrate.

[0132] When silicon is used as a semiconductor material, arsenic, phosphorus, or antimony can be used as n-type impurities. Boron can be used as a p-type impurity.

[0133] The conductive part 15 contains a conductive material, such as polycrystalline silicon. Impurities may be added to the conductive material.

[0134] Insulating layers 30, 31, 32 and 33 include insulating materials such as silicon oxide, silicon nitride and the like.

[0135] The first electrode 11, the second electrode 12, the electrode 40, and the electrode 17 are conductive parts that include metals such as aluminum and copper.

[0136] The operation of the semiconductor device 100 will now be described.

[0137] With a positive voltage applied to the first electrode 11 relative to the second electrode 12, a voltage not less than a threshold is applied to the conductive portion 15. As a result, an inversion layer is formed in the second semiconductor region 22, and the state is set to the ON state. For example, electrons flow from the second electrode 12 to the first semiconductor region 21 via the third semiconductor region 23 and the inversion layer. For example, holes flow from the first electrode 11 to the first semiconductor region 21 via the fourth semiconductor region 24. Subsequently, when the voltage applied to the conductive portion 15 drops below the threshold, the inversion layer in the second semiconductor region 22 disappears, and the state is switched to the OFF state.

[0138] Figure 19A , 19B 20A, 20B and 21 are schematic cross-sectional views illustrating a method for manufacturing another semiconductor device according to an embodiment.

[0139] like Figure 19A As shown, a guard ring region GR of the termination region RE is formed by ion implantation into a semiconductor substrate. For example, the region other than the area to be implanted with ions is covered with a photoresist; and a diffusion layer for forming the guard ring region GR is formed in the termination region RE. The guard ring region GR of the termination region RE is formed by ion implantation of boron (B) + Next, a diffusion layer is formed over the element region RC. For example, a second semiconductor region 22 is formed by ion implantation. After ion implantation, diffusion is suppressed by performing a low-temperature heat treatment at no more than 1,000°C, while the desired shape can be formed.

[0140] For example, such as Figure 19BAs shown, trench T1 is formed in the device region RC; and the third semiconductor region 23 and the channel stop layer are formed by ion implantation. Subsequently, an insulating film is formed for forming insulating layers 30 and 31; and a polysilicon electrode is formed for forming conductive portion 15 and electrode 40. Conductive portion 15 and electrode 40 are formed by etching the polysilicon electrode. In this example, each electrode 40 covers the entire guard ring region GR directly below and electrically connected to electrode 40.

[0141] Subsequently, as Figure 20A As shown, the element region RC is protected with resist 70; and an opening 31p is formed in the insulating layer 31 of the termination region RE by etching using electrode 40 as a mask. For example, the upper surface of the semiconductor layer 20 is exposed in the opening 31p. A portion of the insulating layer 31 remains between the electrode 40 and the semiconductor layer 20. As a result, for example, the scattering of ionic material outside the semiconductor layer 20 during annealing can be suppressed.

[0142] Ion implantation was performed using electrode 40 and insulating layer 31 as a mask; and annealing was then performed. The result is as follows: Figure 20B As shown, a high-concentration region 28 is formed at the location of opening 31p. Subsequently, the termination region RE is covered with an insulating layer 32 as needed. The second electrode 12, the fourth semiconductor region 24, the fifth semiconductor region 25, and the first electrode 11 are formed similarly to those described above (see [reference]). Figure 21 ).

[0143] In this example, the field plate electrode is formed of an electrode 40 (polysilicon electrode) on an insulating layer 31 located on the front surface of Si in the coverage termination region RE. The field plate electrode may include a multilayer electrode disposed above the electrode 40 (polysilicon electrode).

[0144] In this example, the high-concentration region 28 is separated from the guard ring region GR. Therefore, for example, the electric field can be effectively increased across the entire high-concentration region 28. Consequently, a shorter termination in the termination region RE is possible.

[0145] As described above, the method for manufacturing a semiconductor device according to the embodiment includes a step of preparing a semiconductor layer 20 comprising a first semiconductor region 21 and a guard ring region GR. Figure 19A The process of forming conductive portion 15, insulating layer 30, second semiconductor region 22 and third semiconductor region 23 in component region RC. Figure 19B ); the process of forming an insulating layer 31 on the first semiconductor region 21 ( Figure 19B ); and forming multiple electrodes 40 (conductive parts 41) Figure 19B The conductive part 41 is formed on the insulating layer 31.

[0146] The manufacturing method according to the embodiment further includes a step of removing at least a portion of the insulating layer 31. Figure 20A For example, see reference. Figure 20A As described, this process removes the portion of the insulating layer 31 that does not overlap with the conductive portion while retaining the portion of the insulating layer 31 that overlaps with the conductive portion 41.

[0147] The manufacturing method according to the embodiment includes a step of forming a high-concentration region after a step of removing at least a portion of the insulating layer. This step forms a high-concentration region 28 on a first semiconductor region 21 between two adjacent guard ring regions GR by ion implantation using an electrode 40 (conductive portion 41) as a mask.

[0148] According to an embodiment, a semiconductor device can be provided in which the electric field distribution in the termination region can be improved.

[0149] In the description of this application, "perpendicular" and "parallel" not only refer to strictly perpendicular and strictly parallel, but also include variations caused by manufacturing processes, for example. Basically perpendicular and basically parallel are sufficient.

[0150] In this specification, "electrical connection" includes not only direct contact connections but also connections via another conductive component. The state of contact between one region and another does not necessarily mean that the boundary between the regions is clearly observable, and may mean that the regions are continuous or directly connected (joined) to each other.

[0151] In each of the above embodiments, for example, SCM (scanning capacitance microscopy) can be used to confirm the relative levels of impurity concentration between semiconductor regions. The carrier concentration in each semiconductor region can be considered equal to the concentration of activated impurities in each semiconductor region. Therefore, SCM can also be used to confirm the relative levels of carrier concentration between semiconductor regions. The relative levels of impurity concentration between semiconductor regions can be considered to correspond to the relative levels of carrier concentration between semiconductor regions. The impurity concentration in each semiconductor region can be measured, for example, by SIMS (secondary ion mass spectrometry).

[0152] While certain embodiments have been described, these embodiments are presented by way of example only and are not intended to limit the scope of the invention. In fact, the novel embodiments described herein can be embodied in various other forms; furthermore, various omissions, substitutions, and changes can be made to the forms of the embodiments described herein without departing from the spirit of the invention. The appended claims and their equivalents are intended to cover these forms or modifications that fall within the scope and spirit of the invention. Additionally, the above embodiments can be combined with each other.

Claims

1. A semiconductor device, comprising: First electrode; The second electrode is located above the first electrode; as well as A semiconductor layer, located vertically between the first electrode and the second electrode, comprises: Component area, The terminating region surrounding the component region, A first semiconductor region, located between the element region and the termination region, has a first conductivity type. Multiple guard ring regions are located in the termination region on the upper surface of the semiconductor layer, the multiple guard ring regions surrounding the element region, the multiple guard ring regions having a second conductivity type, and A high-concentration region is located between two adjacent guard ring regions among the plurality of guard ring regions. This high-concentration region has the first conductivity type. The two adjacent guard ring regions include an outer guard ring region and an inner guard ring region. The inner guard ring region is located between the outer guard ring region and the component region. The high-concentration region is separated from the inner guard ring region. The impurity concentration of the first conductivity type in the high-concentration region is greater than the impurity concentration of the first conductivity type in the first semiconductor region. The impurity concentration of the first conductivity type in the high-concentration region is not greater than 1.5 × 10⁻⁶. 16 / cm 3 .

2. The semiconductor device according to claim 1, wherein The high-concentration area is in contact with the outer protective ring area.

3. The semiconductor device according to claim 1, wherein The high-concentration region is separated from the outer protective ring region.

4. The semiconductor device according to claim 3, wherein The distance between the high-concentration region and the outer protective ring region is less than the distance between the high-concentration region and the inner protective ring region.

5. The semiconductor device according to claim 1, wherein The concentration of impurities of the first conductivity type in the high-concentration region is not less than 2.5 × 10⁻⁶. 15 / cm 3 .

6. The semiconductor device according to claim 1, further comprising: Multiple conductive parts are electrically connected to the multiple protective ring regions, respectively. At least a portion of the plurality of guard ring regions are respectively located between the first semiconductor region and at least a portion of the plurality of conductive portions. Each of the plurality of conductive portions includes an outer end and an inner end located between the outer end and the element region. The high-concentration region is located further away from the element region than the outer end of the conductive part that is electrically connected to the inner protective ring region.

7. The semiconductor device according to claim 1, wherein Including multiple high-concentration areas, The plurality of high-concentration regions include an outer high-concentration region and an inner high-concentration region located between the outer high-concentration region and the element region. The width of the outer high-concentration region is greater than the width of the inner high-concentration region.

8. A semiconductor device, comprising: First electrode; The second electrode is located above the first electrode; as well as A semiconductor layer, located vertically between the first electrode and the second electrode, comprises: Component area, The terminating region surrounding the component region, A first semiconductor region, located between the element region and the termination region, has a first conductivity type. Multiple guard ring regions are located in the termination region on the upper surface of the semiconductor layer, the multiple guard ring regions surrounding the element region, the multiple guard ring regions having a second conductivity type, and A high-concentration region is located between two adjacent guard ring regions in the plurality of guard ring regions. The high-concentration region has the first conductivity type. The two adjacent guard ring regions include an outer guard ring region and an inner guard ring region. The inner guard ring region is located between the outer guard ring region and the element region. The high-concentration region is separated from the inner guard ring region and the outer guard ring region. The impurity concentration of the first conductivity type in the high-concentration region is greater than the impurity concentration of the first conductivity type in the first semiconductor region.

9. The semiconductor device according to claim 1, wherein The upper end of the high-concentration region is located at the upper surface of the semiconductor layer.

10. The semiconductor device of claim 1, wherein The upper end of the high-concentration region is lower than the upper surface of the semiconductor layer.

11. The semiconductor device of claim 1, wherein The lower end of the high-concentration region is lower than the lower end of the plurality of protective ring regions.

12. The semiconductor device according to claim 1, wherein The lower end of the high-concentration region is higher than the lower end of the plurality of protective ring regions.

13. The semiconductor device according to claim 1, wherein The impurity concentration of the first conductivity type in the first semiconductor region is not less than 1×10⁻⁶. 13 / cm 3 and not greater than 7×10 13 / cm 3 .

14. The semiconductor device of claim 1, wherein The width of the high-concentration region is less than half the distance between the two adjacent protective ring regions.

15. The semiconductor device according to claim 3, wherein The distance between the high-concentration region and the outer protective ring region is less than the width of the high-concentration region.

16. The semiconductor device of claim 1, further comprising: Multiple conductive parts are electrically connected to the multiple protective ring regions, respectively. At least a portion of the plurality of guard ring regions are respectively located between the first semiconductor region and at least a portion of the plurality of conductive portions. The high-concentration region overlaps with at least one of the conductive portions electrically connected to the inner protective ring region or electrically connected to the outer protective ring region in the vertical direction.

17. The semiconductor device of claim 1, wherein The concentration distribution of the first impurity along the depth direction of the high-concentration region has multiple peaks.

18. A method for manufacturing a semiconductor device, the method comprising: Prepare a semiconductor layer, the semiconductor layer comprising: Component area; The terminating region surrounding the element region; A first semiconductor region, located in the element region and the termination region, having a first conductivity type; and Multiple guard ring regions are located on the first semiconductor region in the termination region, the multiple guard ring regions surround the element region, and the multiple guard ring regions have a second conductivity type; Multiple conductive portions are formed, such that a portion of each of the multiple conductive portions is located above the multiple protective ring regions, and the multiple conductive portions are electrically connected to the multiple protective ring regions respectively; and Ion implantation is performed using the plurality of conductive portions as masks to form a high-concentration region on the first semiconductor region between two adjacent guard ring regions in the plurality of guard ring regions. The high-concentration region has the first conductivity type, and the impurity concentration of the first conductivity type in the high-concentration region is greater than the impurity concentration of the first conductivity type in the first semiconductor region. The impurity dose of the first conductivity type during ion implantation is no greater than 3.5 × 10⁻⁶. 12 / cm 2 .

19. The method of claim 18, further comprising: An insulating layer is formed on the first semiconductor region; as well as Remove at least a portion of the insulating layer. The formation of the plurality of conductive portions includes forming the plurality of conductive portions on the insulating layer. Removing at least a portion of the insulating layer includes retaining the portions of the insulating layer that overlap with the plurality of conductive portions, and removing the portions of the insulating layer that do not overlap with the plurality of conductive portions. The high-concentration region is formed after at least a portion of the insulating layer is removed.

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