Array substrate, display panel and electronic device

Abstract

The application provides an array substrate, a display panel and an electronic device. The array substrate forms a first fixing structure on a fixing layer, sets a first recessed part on the first fixing structure, fills pad material in the first recessed part, and forms a structure embedded with each other. The adhesion between the pad and the array substrate can be increased in the reliability verification of the subsequent display panel. Even if the pad and the array substrate fall off, the pad can still be fixed due to the embedded structure between the first recessed part and the pad as support, and the generation of dark spot defects is reduced.

Description

Technical Field

[0001] This application relates to the field of display panel technology, and more specifically, to an array substrate, a display panel, and an electronic device. Background Technology

[0002] In Mini-LED or Micro-LED display panels, the array substrate and the light-emitting device are typically combined to form an electrical connection. The array substrate includes pads for connecting the light-emitting device, and a solder layer connects the pads on the array substrate to the light-emitting device. When considering screen reliability requirements, the display panel needs to undergo long-term reliability verification under high temperature and high humidity environments. The copper pads and tin soldering auxiliary layer of the array substrate will further alloy to form an alloy layer. The resulting copper-tin intermetallic compound alloy layer has poor density and is relatively loose, making it very easy for the light-emitting device to detach from the array substrate and cause dark spots, affecting the display effect of the light-emitting device. Summary of the Invention

[0003] In order to at least overcome the above-mentioned shortcomings of the prior art, the present application aims to provide an array substrate, comprising:

[0004] Substrate;

[0005] An array of functional layers located on one side of the substrate;

[0006] A fixing layer located on one side of the array functional layer, the fixing layer including a first fixing structure, the first fixing structure including a first surface near the substrate, a second surface away from the substrate and a first side surface, the first side surface connecting the first surface and the second surface; at least a portion of the first side surface includes a first recess;

[0007] A pad located on the side of the first fixing structure away from the substrate, at least a portion of the pad extends to cover the first side of the first fixing structure and fill the first recess; the pad is electrically connected to the wiring layer in the array functional layer through the first fixing structure.

[0008] In one possible implementation, at least two of the first fixing structures have orthographic projections on the substrate located within the orthographic projection of the pads on the substrate;

[0009] Preferably, the orthographic projections of the plurality of first fixing structures arranged in an array on the substrate are located within the orthographic projection of the same pad on the substrate;

[0010] Preferably, each of the first fixing structures is in contact with the wiring layer in the array functional layer;

[0011] Preferably, the material of the solder pad includes copper.

[0012] In one possible implementation, the fixing layer further includes a second fixing structure, the second fixing structure including a third surface near the substrate, a fourth surface away from the substrate, and a second side surface, the second side surface connecting the third surface and the fourth surface; at least a portion of the second side surface includes a second recess.

[0013] The array substrate further includes a soldering auxiliary layer located on the side of the pads and at least a portion of the second fixing structure away from the substrate, the soldering auxiliary layer covering at least a portion of the second side of the second fixing structure and filling the second recess;

[0014] Preferably, the second fixing structure is disposed on the same layer as the first fixing structure;

[0015] Preferably, the material of the welding auxiliary layer includes tin;

[0016] Preferably, the orthographic projection of the solder pad on the substrate is located within the orthographic projection of the soldering auxiliary layer on the substrate.

[0017] In one possible implementation, the orthographic projection of the second fixing structure on the substrate at least partially surrounds the orthographic projection of the first fixing structure on the substrate; the second recess is located on the first sidewall of the second fixing structure facing the first fixing structure.

[0018] In one possible implementation, the array substrate further includes a first insulating layer located between the second fixing structure and the wiring layer, wherein the second fixing structure is electrically connected to the wiring layer through a through-hole penetrating the first insulating layer;

[0019] Preferably, the second fixing structure is electrically connected to the wiring layer through a plurality of the through holes;

[0020] Preferably, the orthographic projections of the plurality of through holes on the substrate surround the orthographic projection of the first fixing structure on the substrate;

[0021] Preferably, the array substrate further includes a second insulating layer located on the side of the second fixing structure away from the substrate, the second insulating layer exposing at least a portion of the second sidewall of the second fixing structure.

[0022] In one possible implementation, the fixing layer includes a first metal layer, a second metal layer, and a third metal layer stacked sequentially in a direction away from the substrate; at the first side of the first fixing structure, the second metal layer is recessed relative to the first metal layer and the third metal layer to form the first recess.

[0023] In one possible implementation, under the same etching conditions, the etching resistance of the second metal layer is less than that of the first metal layer and the third metal layer;

[0024] Preferably, the materials of the first metal layer and the third metal layer include titanium, and the material of the second metal layer includes aluminum.

[0025] In one possible implementation, the thickness of the pad is less than 1 micrometer in the direction away from the substrate;

[0026] Preferably, the thickness of the pad is 600 to 700 nanometers.

[0027] This application also provides a display panel, the display panel including the array substrate described in any one of the foregoing claims and a plurality of light-emitting devices, the light-emitting devices being electrically connected to the pads.

[0028] This application also provides an electronic device, which includes the aforementioned display panel.

[0029] Compared with the prior art, this application has the following beneficial effects:

[0030] This application provides an array substrate, a display panel, and an electronic device. The array substrate forms a first fixing structure by forming a fixing layer, and a first recess is provided on the first fixing structure. At the same time, the first recess is filled with pad material to form an interlocking structure. This can increase the adhesion between the pad and the array substrate during subsequent reliability verification of the display panel. Even if the pad falls off from the array substrate, the interlocking structure between the first recess and the pad can still fix the pad, reducing the occurrence of dark spot defects. Attached Figure Description

[0031] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings required in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0032] Figure 1 This is one of the schematic diagrams of the array substrate provided in this embodiment;

[0033] Figure 2 This is the second schematic diagram of the array substrate provided in this embodiment;

[0034] Figure 3 This is the third schematic diagram of the array substrate provided in this embodiment;

[0035] Figure 4 This is a top view of the array substrate provided in this embodiment;

[0036] Figure 5 This is the fourth schematic diagram of the array substrate provided in this embodiment;

[0037] Figure 6 This is one of the schematic diagrams of the first and second fixing structures provided in this embodiment.

[0038] Icons: Substrate-100; Array functional layer-200; Wiring layer-201; First insulating layer-300; Fixing layer-400; Second insulating layer-700; First fixing structure-410; Second fixing structure-420; Through-hole-310; Pad-500; Soldering auxiliary layer-600; First metal layer-401; Second metal layer-402; Third metal layer-403; Pad thickness-D1; First recess-411; Second recess-421. Detailed Implementation

[0039] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0040] Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0041] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0042] In the description of this application, it should be noted that the terms "upper," "lower," etc., indicating the orientation or positional relationship are based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the product is in use. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on this application. In addition, the terms "first," "second," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0043] Furthermore, terms such as "horizontal," "vertical," and "sag" do not imply that components must be absolutely horizontal or suspended, but rather that they can be slightly tilted. For example, "horizontal" simply means that its direction is more horizontal relative to "vertical," and does not mean that the structure must be completely horizontal, but can be slightly tilted.

[0044] In the description of this application, it should also be noted that, unless otherwise expressly specified and limited, the terms "set up," "install," "connect," and "link" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0045] It should be noted that, where there is no conflict, different features in the embodiments of this application can be combined with each other.

[0046] The inventors discovered through research that in Mini-LED or Micro-LED display panels, the array substrate and the light-emitting device are typically combined to form an electrical connection. The array substrate includes pads 500 that connect to the light-emitting device, and a solder layer connects the pads 500 on the array substrate to the light-emitting device. However, when considering screen reliability requirements, the display panel needs to undergo long-term reliability verification under high temperature and high humidity environments. This causes the pads 500 and the soldering auxiliary layer 600 of the array substrate to further alloy, forming an alloy layer. The stress and material properties of this alloy layer change compared to the original stress and material properties of the pads 500, resulting in changes to the bonding surface between the pads 500 and the underlying film layer they contact. For example, if the pads 500 are made of copper and the soldering auxiliary layer 600 is made of tin, the resulting copper-tin intermetallic compound alloy layer has poor density and is relatively porous, making it very easy for the light-emitting device to detach from the array substrate and causing dark spots, affecting the display effect of the light-emitting device.

[0047] In view of this, this application provides a solution that can reduce the risks of the above-mentioned problems, and the solution provided by this application will be described in detail below.

[0048] Please see Figure 1 This application provides an array substrate, which includes: a substrate 100, an array functional layer 200, a fixing layer 400, and pads 500.

[0049] The array functional layer 200 is located on one side of the substrate 100. In this embodiment, the array functional layer 200 may include multiple film layer structures, such as a buffer layer, an active layer, multiple conductive layers, multiple insulating layers, and a planarization layer. The multiple film layer structures of the array functional layer can form multiple thin film transistors (TFTs) and wiring structures at different locations. The thin film transistors cooperate to form multiple pixel driving units or driving circuits, and the wiring structures provide signals or voltages to the circuits. The multiple conductive layers of the array functional layer 200 include a wiring layer 201.

[0050] The fixing layer 400 is located on the side of the array functional layer 200 away from the substrate 100. The fixing layer 400 includes at least one first fixing structure 410.

[0051] The first fixing structure 410 includes a first surface near the substrate 100, a second surface away from the substrate 100, and a first side surface, with the first side surface connecting the first surface and the second surface. At least a portion of the first side surface includes a first recess 411.

[0052] The pad 500 is located on the side of the first fixing structure 410 away from the substrate 100, and at least a portion of the pad 500 extends to cover the first side of the first fixing structure 410 and fill the first recess 411. The pad 500 is electrically connected to the wiring layer 201 in the array functional layer 200 through the first fixing structure 410.

[0053] In this embodiment, a first recess 411 is pre-formed on the first side of the fixing layer 400, and the pad 500 material is filled into the first recess 411 during the subsequent pad 500 formation process, thereby forming an interlocking structure between the pad 500 and the fixing layer 400. Even if the pad 500 detaches from the array substrate, the interlocking structure between the first recess 411 and the pad 500 provides support, effectively reducing dark spot defects caused by pad detachment, improving the reliability of the display panel, and extending the product's lifespan.

[0054] The first recess 411 can be formed by side etching of the fixing layer 400. Specifically, the first recess 411 can be formed by wet etching of the first side of the fixing layer 400 using a mixture of nitric acid and phosphoric acid.

[0055] Optionally, during the fabrication of the array substrate, after forming the pads 500, a soldering auxiliary layer 600 needs to be formed on the side of the pads 500 and the fixing layer 400 away from the substrate 100 to facilitate subsequent electrical connection with the light-emitting device. The soldering auxiliary layer 600 is typically made of a material with good conductivity and easy soldering.

[0056] In this case, in one possible implementation, please refer to Figure 2 The fixing layer 400 further includes a second fixing structure 420, which includes a third surface near the substrate 100, a fourth surface away from the substrate 100, and a second side surface, the second side surface connecting the third surface and the fourth surface. At least a portion of the second side surface includes a second recess 421.

[0057] The array substrate also includes a soldering aid layer 600 located on the side of the pad 500 and at least a portion of the second fixing structure 420 away from the substrate 100, the soldering aid layer 600 covering at least a portion of the second side of the second fixing structure 420 and filling the second recess 421.

[0058] In this embodiment, by pre-setting a second recess 421 on the second side of the fixing layer 400, and filling the second recess 421 with the welding auxiliary layer 600 material in the subsequent welding auxiliary layer 600 forming process, a mutually interlocking structure is formed between the welding auxiliary layer 600 and the fixing layer 400.

[0059] By providing a first fixing layer 400 with a first recess 411 and a second fixing layer 400 with a second recess 421, the adhesion between the pads 500 and the soldering auxiliary layer 600 and the array functional layer 200 can be increased, reducing the risk of film peeling between the pads 500 and the soldering auxiliary layer 600 and the fixing layer 400, and reducing the incidence of dark spot defects.

[0060] Optionally, the second fixing structure 420 is disposed in the same layer as the first fixing structure 410. For example, the first fixing structure 410 and the second fixing structure 420 can be formed by etching the same film layer structure.

[0061] Optionally, the material of the welding auxiliary layer 600 includes tin.

[0062] Because tin has good electrical conductivity and is easy to solder, in this preferred embodiment, the material of the soldering auxiliary layer 600 can be tin.

[0063] Optionally, the orthographic projection of the pad 500 on the substrate 100 lies within the orthographic projection of the soldering aid layer 600 on the substrate 100. The soldering aid layer 600 covers the side of the pad 500 away from the substrate 100, and the material of the soldering aid layer 600 is subsequently alloyed with the material of the pad 500.

[0064] In one possible implementation, please refer to Figure 3At least two of the first fixing structures 410 have their orthogonal projections on the substrate 100 located within the orthogonal projection of the pad 500 on the substrate 100. For example, in this embodiment, one pad 500 can cover at least a plurality of the first fixing structures 410, so that the plurality of first fixing structures 410 can improve the adhesion between the pad 400 and the array functional layer 200, further reducing the risk of the pad 500 falling off.

[0065] Optionally, please see Figure 4 The orthographic projections of multiple arrayed first fixed structures 410 on the substrate 100 lie within the orthographic projection of the same pad 500 on the substrate 100.

[0066] In this preferred embodiment, the fixing layer 400 further includes a plurality of first fixing structures 410 arranged in an array, wherein at least a portion of the pad 500 extends to cover the first side of the plurality of first fixing structures 410 arranged in an array and fills the first recess 411. The plurality of first fixing structures 410 can enhance the bonding strength between the pad 500 and the fixing layer 400 from different positions, thereby significantly reducing the risk of dark spot defects caused by the detachment of the pad 500.

[0067] Optionally, please see Figure 3 Each of the first fixed structures 410 contacts the wiring layer 201 in the array functional layer 200.

[0068] In existing array substrates, an insulating layer can be present between the fixing layer 400 and the wiring layer 201 in the array functional layer 200. The insulating layer has through-holes 310 to allow electrical connection between the fixing layer 400 and the wiring layer 201. In this embodiment, since multiple mutually spaced first fixing structures 410 are included, all of which need to be electrically connected to the wiring layer 201, the insulating layer between these first fixing structures 410 and the wiring layer 201 can be removed, allowing the first fixing structures 410 to directly contact the wiring layer 201 for electrical connection, thereby reducing manufacturing difficulty.

[0069] Optionally, the material of pad 500 may include copper.

[0070] In one possible implementation, please refer to Figure 4 The orthographic projection of the second fixing structure 420 on the substrate 100 at least partially surrounds the orthographic projection of the first fixing structure 410 on the substrate 100; the second recess 421 is located on the first side of the second fixing structure 420 facing the first fixing structure 410.

[0071] In this embodiment, the fixing layer 400 includes a first region and a second region surrounding the first region. A first fixing structure 410 is located in the first region and is used to form a mutually interlocking structure with the pad 500. A second fixing structure 420 is located in the second region and is used to form a mutually interlocking structure with the soldering auxiliary layer 600. A second recess 421 faces the first side of the first fixing structure 410. In this way, while ensuring the electrical connection between the pad 500 and the wiring layer 201 on the array functional layer 200, it is also possible to ensure that the pad 500 and the soldering auxiliary layer 600 remain firmly connected to the fixing layer 400 on the array substrate after alloying.

[0072] In some possible implementations, the orthographic projection of the second fixing structure 420 onto the substrate 100 can be an annular or frame-shaped structure with a central gap, and the orthographic projection of the first fixing structure 410 onto the substrate lies within the gap formed by the orthographic projection of the second fixing structure 420 onto the substrate. Alternatively, please refer to... Figure 1 The array substrate also includes a first insulating layer 300 located between the second fixing structure 420 and the wiring layer 201. The second fixing structure 420 is electrically connected to the wiring layer 201 through a through-hole 310 penetrating the first insulating layer 300. The first insulating layer 300 can provide a flat surface so that the subsequent formation of the fixing layer 400 can proceed smoothly.

[0073] Optionally, the second fixing structure 420 is electrically connected to the wiring layer 201 through a plurality of through holes 310.

[0074] In this preferred embodiment, the second fixing structure 420 is electrically connected to the wiring layer 201 through multiple through holes 310, which can effectively reduce contact resistance and improve current transmission efficiency. At the same time, the design of multiple through holes 310 can enhance the reliability of mechanical connections.

[0075] Optionally, please see Figure 4 The orthographic projections of multiple through holes 310 on the substrate 100 surround the orthographic projection of the first fixing structure 410 on the substrate 100.

[0076] In this embodiment, a plurality of through holes 310 are provided in the second region of the aforementioned fixing layer 400.

[0077] In some other possible implementations, multiple second fixing structures 420 may be distributed at intervals in the second region, that is, multiple second fixing structures 420 are distributed around the first fixing structure 410 as a whole.

[0078] Optionally, please see Figure 5The array substrate also includes a second insulating layer 700 located on the side of the second fixing structure 420 away from the substrate 100, the second insulating layer 700 exposing at least a portion of the second sidewall of the second fixing structure 420.

[0079] In this embodiment, the second insulating layer 700 provides necessary mechanical support for the array substrate and also serves as an isolation layer between the fixing layer 400 and the wiring layer 201 of the array functional layer 200 to prevent short circuits. In order not to affect the interlocking connection between the second fixing structure 420 and the soldering auxiliary layer 600, the second insulating layer 700 exposes at least a portion of the second sidewall of the second fixing structure 420.

[0080] In one possible implementation, please refer to Figure 6 The fixing layer 400 includes a first metal layer 401, a second metal layer 402, and a third metal layer 403 sequentially stacked in a direction away from the substrate 100. At the first side of the first fixing structure 410, the second metal layer 402 is recessed relative to the first metal layer 401 and the third metal layer 403 to form a first recess 411.

[0081] In this embodiment, this multilayer structure not only meets the requirements of mechanical strength and electrical conductivity, but also retains the first metal layer 401 and the second metal layer 402 by the difference in the characteristics of each layer material, and etches the second metal layer 402, thereby easily obtaining the first recess 411.

[0082] In one possible implementation, under the same etching conditions, the second metal layer 402 has lower etching resistance than the first metal layer 401 and the third metal layer 403.

[0083] In this embodiment, the design with different etching resistance can achieve selective etching of the fixed layer 400 during the etching process, thereby precisely controlling the structure of each metal layer. Specifically, when the sidewalls of the first metal layer 401, the second metal layer 402, and the third metal layer 403 are all exposed, under the action of the same etching solution, the etching rate of the second metal layer 402 is greater than that of the first metal layer 401 and the third metal layer 403. This causes the sidewall of the second metal layer 402 to be recessed relative to the first metal layer 401 and the third metal layer 403, forming an undercut structure, that is, forming a first recess 411 and a second recess 421.

[0084] Optionally, the first metal layer 401 and the third metal layer 403 are made of titanium, and the second metal layer 402 is made of aluminum. Titanium, as a metal material with strong corrosion resistance and excellent mechanical properties, can remain undamaged during the etching process of aluminum; while aluminum, due to its relatively low corrosion resistance, is more easily removed during the etching process, thereby forming the desired recessed structure.

[0085] In one possible implementation, please refer to Figure 5 In the direction away from the substrate 100, the thickness D1 of the pad 500 is less than 1 micrometer.

[0086] In this embodiment, the thickness D1 of pad 500 is less than 1 micrometer. This ultra-thin design is to meet the requirements of Mini-LED technology: due to the miniaturization of device size and the increase in integration, the thickness D1 of pad 500 needs to be reduced to meet the requirements of high-density packaging.

[0087] Optionally, the thickness D1 of the pad 500 is 600 to 700 nanometers. Within the thickness range of 600 to 700 nanometers, the pad 500 can provide enough material to form a stable intermetallic compound while avoiding the impact of excessive thickness on the miniaturization design of the light-emitting device.

[0088] Based on the same inventive concept, this application also provides a display panel. The display panel includes any of the aforementioned array substrates and a plurality of light-emitting devices, the light-emitting devices being electrically connected to pads 500. The array substrate includes a substrate 100, an array functional layer 200, a fixing layer 400, and pads 500, the fixing layer 400 being electrically connected to the pads 500 via a first fixing structure 410 and a first recess 411.

[0089] In this embodiment, by setting the first recess 411 to connect the pad 500 and the fixing layer 400, even when the screen is being verified for reliability, the alloy layer is embedded in the first recess 411, so that the alloy layer formed by the alloying of the pad 500 and the welding auxiliary layer 600 is less likely to fall off from the array substrate, thereby improving the electrical connection stability between the array substrate and the light-emitting device, reducing the risk of dark spot defects in the light-emitting device, and improving the overall display effect of the display panel.

[0090] It is worth noting that the light-emitting device can be a mini-LED or a micro-LED.

[0091] Based on the same inventive concept, embodiments of this application also provide an electronic device, which includes a plurality of display panels provided in this application. Because the aforementioned display panels increase the adhesion between the light-emitting devices and the array substrate, they reduce the risk of dark spot defects in the light-emitting devices, improve the user experience, and thus enhance the market competitiveness of the electronic device.

[0092] In summary, this application provides an array substrate that forms a first fixing structure 410 in the fixing layer 400, provides a first recess 411 on the first fixing structure 410, and fills the first recess 411 with pad 500 material to form an interlocking structure. This can increase the adhesion between the pad 500 and the array substrate during subsequent reliability verification of the display panel. Even if the pad 500 falls off the array substrate, the pad 500 can still be fixed because the interlocking structure between the first recess 411 and the pad 500 provides support, reducing the occurrence of dark spot defects.

[0093] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0094] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. An array substrate, characterized in that, The array substrate includes: Substrate; An array of functional layers located on one side of the substrate; A fixing layer located on one side of the array functional layer, the fixing layer including a first fixing structure, the first fixing structure including a first surface near the substrate, a second surface away from the substrate and a first side surface, the first side surface connecting the first surface and the second surface; at least a portion of the first side surface includes a first recess; A pad located on the side of the first fixing structure away from the substrate, at least a portion of the pad extends to cover the first side of the first fixing structure and fill the first recess; the pad is electrically connected to the wiring layer in the array functional layer through the first fixing structure.

2. The array substrate according to claim 1, characterized in that, At least two of the first fixing structures have orthographic projections on the substrate located within the orthographic projection of the pads on the substrate; Preferably, the orthographic projections of the plurality of first fixing structures arranged in an array on the substrate are located within the orthographic projection of the same pad on the substrate; Preferably, each of the first fixing structures is in contact with the wiring layer in the array functional layer; Preferably, the material of the solder pad includes copper.

3. The array substrate according to claim 1, characterized in that, The fixing layer further includes a second fixing structure, the second fixing structure including a third surface near the substrate, a fourth surface away from the substrate, and a second side surface, the second side surface connecting the third surface and the fourth surface; at least a portion of the second side surface includes a second recess. The array substrate further includes a soldering auxiliary layer located on the side of the pads and at least a portion of the second fixing structure away from the substrate, the soldering auxiliary layer covering at least a portion of the second side of the second fixing structure and filling the second recess; Preferably, the second fixing structure is disposed on the same layer as the first fixing structure; Preferably, the material of the welding auxiliary layer includes tin; Preferably, the orthographic projection of the solder pad on the substrate is located within the orthographic projection of the soldering auxiliary layer on the substrate.

4. The array substrate according to claim 3, characterized in that, The orthographic projection of the second fixing structure on the substrate at least partially surrounds the orthographic projection of the first fixing structure on the substrate; the second recess is located on the first sidewall of the second fixing structure facing the first fixing structure.

5. The array substrate according to claim 4, characterized in that, The array substrate further includes a first insulating layer located between the second fixing structure and the wiring layer, wherein the second fixing structure is electrically connected to the wiring layer through a through-hole penetrating the first insulating layer; Preferably, the second fixing structure is electrically connected to the wiring layer through a plurality of the through holes; Preferably, the orthographic projections of the plurality of through holes on the substrate surround the orthographic projection of the first fixing structure on the substrate; Preferably, the array substrate further includes a second insulating layer located on the side of the second fixing structure away from the substrate, the second insulating layer exposing at least a portion of the second sidewall of the second fixing structure.

6. The array substrate according to claim 1, characterized in that, The fixing layer includes a first metal layer, a second metal layer, and a third metal layer stacked sequentially in a direction away from the substrate; at the first side of the first fixing structure, the second metal layer is recessed relative to the first metal layer and the third metal layer to form the first recess.

7. The array substrate according to claim 6, characterized in that, Under the same etching conditions, the etching resistance of the second metal layer is less than that of the first metal layer and the third metal layer; Preferably, the materials of the first metal layer and the third metal layer include titanium, and the material of the second metal layer includes aluminum.

8. The array substrate according to claim 6, characterized in that, In the direction away from the substrate, the thickness of the pad is less than 1 micrometer; Preferably, the thickness of the pad is 600 to 700 nanometers.

9. A display panel, characterized in that, The display panel includes an array substrate as described in any one of claims 1-8 and a plurality of light-emitting devices, wherein the light-emitting devices are electrically connected to the pads.

10. An electronic device, characterized in that, The electronic device includes the display panel as described in claim 9.

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