Image sensor including backside scattering structures

Abstract

An image sensor is provided. The image sensor includes a substrate including first to fourth photodiode regions, a first isolation layer formed to surround the first to fourth photodiode regions, a second isolation layer formed to protrude from the first isolation layer and separate the first to fourth photodiode regions, a floating diffusion region formed on a first surface and in which photocharges formed in a photodiode of each of the first to fourth photodiode regions are accumulated, a backside scattering structure formed inside a trench formed in a second surface of the substrate, and at least one microlens, wherein respective gates of first to fourth transfer transistors are electrically connected to each other, the second isolation layer is formed to expose central regions of the first to fourth photodiode regions, and the floating diffusion region is disposed in the central regions of the first to fourth photodiode regions.

Description

Cross-reference to related applications

[0001] This application claims priority and benefit to Korean Patent Application No. 10-2025-0036215, filed with the Korean Intellectual Property Office on March 20, 2025, the entire disclosure of which is incorporated herein by reference. Technical Field

[0002] This disclosure relates to image sensors including back-side scattering structures. Background Technology

[0003] Image sensors, which capture images and convert them into electrical signals, are already used in consumer electronics such as digital cameras, mobile phone cameras, and portable camcorders, as well as cameras installed in vehicles, safety devices, and robots.

[0004] In recent years, the importance of near-infrared light detection capabilities has increased significantly due to the demand for various image sensors, such as iris scanners, security cameras, and time-of-flight (ToF) sensors. To increase infrared sensitivity, it may be necessary to increase the incident distance of the light to the photoelectric conversion device (e.g., a photodiode) in the image sensor. Summary of the Invention

[0005] The disclosed concept provides an image sensor that delivers images with high infrared sensitivity and high dynamic range (HDR).

[0006] Furthermore, the problems to be solved by the technical ideas disclosed are not limited to those described above, and other problems will be clearly understood by those skilled in the art from the following description.

[0007] According to various aspects of the disclosed concept, an image sensor is provided, comprising: a substrate including first to fourth photodiode regions in which photodiodes are respectively formed; a first isolation layer formed around the first to fourth photodiode regions and penetrating from a first surface of the substrate to a second surface of the substrate opposite to the first surface; a second isolation layer formed protruding from the first isolation layer and separating the first to fourth photodiode regions; a floating diffusion region formed on the first surface, wherein photocharge generated in the photodiodes of each of the first to fourth photodiode regions accumulates in the floating diffusion region; at least one back-side scattering structure formed inside a trench formed on the second surface of the substrate; and at least one microlens disposed on the second surface of the substrate, wherein the gates of the respective first to fourth transfer transistors are electrically connected to each other, the second isolation layer is formed to expose a central region of the first to fourth photodiode regions, and the floating diffusion region is disposed in the central region of the first to fourth photodiode regions.

[0008] According to various aspects of the disclosed concept, an image sensor is provided, comprising: a substrate including first to fourth photodiode regions in which photodiodes are respectively formed; an isolation layer separating the first to fourth photodiode regions and penetrating from a first surface of the substrate to a second surface of the substrate opposite to the first surface; a floating diffusion region formed on the first surface, wherein photocharge generated in the photodiodes of each of the first to fourth photodiode regions accumulates in the floating diffusion region; first to fourth transfer transistors transferring photocharge generated in the photodiodes of each of the first to fourth photodiode regions to the floating diffusion region; at least one microlens disposed on the second surface of the substrate; and at least one back-side scattering structure formed inside a trench formed on the second surface of the substrate, wherein the at least one back-side scattering structure is positioned corresponding to the center of the at least one microlens, wherein the gates of the respective transfer transistors of the first to fourth transfer transistors are electrically connected to each other.

[0009] According to various aspects of the disclosed concept, an image sensor is provided, comprising: a substrate including first to fourth photodiode regions in which photodiodes are respectively formed; an isolation layer separating the first to fourth photodiode regions and penetrating from a first surface of the substrate to a second surface of the substrate opposite to the first surface; a floating diffusion region formed on the first surface, wherein photocharge generated in the photodiodes of each of the first to fourth photodiode regions accumulates in the floating diffusion region; first to fourth transfer transistors transferring photocharge generated in the photodiodes of each of the first to fourth photodiode regions to the floating diffusion region; a color filter layer and a microlens disposed on the second surface of the substrate; and a back-side scattering structure disposed between the substrate and the color filter layer on the second surface of the substrate, wherein the gates of the respective transfer transistors are electrically connected to each other.

[0010] According to various aspects of the disclosed concept, a method for manufacturing an image sensor is provided, the method comprising: providing a substrate including a first photodiode region to a fourth photodiode region in which photodiodes are respectively formed; forming a first isolation layer to surround the first photodiode region to the fourth photodiode region and penetrate from a first surface of the substrate to a second surface of the substrate opposite to the first surface; forming a second isolation layer to protrude from the first isolation layer and separate the first photodiode region to the fourth photodiode region; forming a floating diffusion region on the first surface, wherein photocharge generated in the photodiodes of each of the first photodiode region to the fourth photodiode region accumulates in the floating diffusion region; forming at least one back-side scattering structure within a trench formed on the second surface of the substrate; and placing at least one microlens on the second surface of the substrate, wherein the gates of the respective first transfer transistors to the fourth transfer transistors are electrically connected to each other, the second isolation layer is formed to expose a central region of the first photodiode region to the fourth photodiode region, and the floating diffusion region is disposed in the central region of the first photodiode region to the fourth photodiode region. Attached Figure Description

[0011] The embodiments will become clearer from the following detailed description taken in conjunction with the accompanying drawings, in which: Figure 1 This is a block diagram illustrating an image sensor according to an embodiment; Figure 2A and Figure 2B yes Figure 1 The circuit diagram of the pixels included in the pixel array; Figure 3 and Figure 4This is an illustration of the pixels included in the image sensor according to an embodiment; Figure 5A and Figure 5B It is an illustration of the pixels included in the image sensor according to the disclosed concept, and is along... Figure 3 and Figure 4 A cross-sectional view taken from line I-I'; Figure 6 This is an illustration of the pixels included in the image sensor according to an embodiment; Figure 7 This is an illustration of the pixels included in the image sensor according to an embodiment; Figure 8 and Figure 9 This is an illustration of the pixels included in the image sensor according to an embodiment; Figure 10 and Figure 11 This is an illustration of the pixels included in the image sensor according to an embodiment; Figure 12 and Figure 13 This is an illustration of the pixels included in the image sensor according to an embodiment; Figure 14 This is an illustration of pixels included in an image sensor according to an embodiment; and Figure 15 This is an illustration of the pixels included in the image sensor according to an embodiment. Detailed Implementation

[0012] In the following, embodiments are described in detail with reference to the accompanying drawings. In this document, the X-axis direction may be referred to as a first horizontal direction parallel to the main surface of the substrate, and the Y-axis direction may be referred to as a second horizontal direction parallel to the main surface of the substrate.

[0013] The disclosed concept relates to image sensors, and more specifically, to image sensors including back-side scattering structures.

[0014] Figure 1 This is a block diagram illustrating an image sensor 100 according to an embodiment.

[0015] Reference Figure 1 The image sensor 100 may include a pixel array 110, a control circuit 120, a signal processing circuit 130, a line driver 140, and a readout circuit 150. The readout circuit 150 may include a correlated dual sampler (CDS) 151, an analog-to-digital converter (ADC) 153, and a buffer 155.

[0016] Pixel array 110 converts optical signals into electrical signals and may include a plurality of pixels PX arranged in a two-dimensional manner. Each pixel PX included in pixel array 110 can generate a pixel signal based on the intensity of detected light and can be implemented as a photoelectric conversion device (such as, for example, a charge-coupled device (CCD) or complementary metal-oxide-semiconductor (CMOS)), and can also be implemented as various types of photoelectric conversion devices. In embodiments, pixel PX may include a plurality of photoelectric conversion devices that transfer the generated photocharge to a single floating diffusion region (e.g., Figure 2A (FD).

[0017] The pixel array 110 may include color filters to sense various colors, and each of the plurality of pixels PX may sense a corresponding color. For example, a pixel PX may include a corresponding one of a red color filter, a green color filter, and a blue color filter. Alternatively, for example, a pixel PX may include at least one of a yellow color filter, a cyan color filter, and a magenta color filter, or a pixel PX may be configured to sense all visible light.

[0018] Additionally, the pixel array 110 can detect infrared light while simultaneously detecting visible light of various colors. In an embodiment, each of the plurality of pixels PX included in the pixel array 110 may include at least one back-side scattering structure. This at least one back-side scattering structure may include a material having a different refractive index (low-refractive-index material or high-refractive-index material) than nearby components. In an embodiment, the back-side scattering structure may be formed in a trench within a substrate, or it may be formed on the substrate in the form of a prism. Incident light incident on the pixel array 110 can be scattered by the plurality of back-side scattering structures included in the pixel array 110, thereby increasing the path of the incident light and thus increasing the infrared sensitivity of the image sensor 100.

[0019] Each of the multiple pixels PX can output a pixel signal to CDS 151 via the corresponding column output line from the first column output line CLO_0 to the nth column output line CLO_n-1. CDS 151 can sample and hold the pixel signals provided from pixel array 110. CDS 151 can double sample the level of a specific noise and the level according to the pixel signal, and output the level corresponding to the difference between them. In addition, CDS 151 can receive ramp signals generated by ramp signal generator 157, compare the ramp signals with each other, and output the comparison result.

[0020] The ADC 153 can convert an analog signal corresponding to the level received from the CDS 151 into a digital signal. The buffer 155 can latch the digital signal, and the latched digital signal can be sequentially output to the signal processing circuit 130, or the image data can be output to the outside of the image sensor 100.

[0021] The control circuit 120 can control the row driver 140 to cause the pixel array 110 to absorb light and accumulate charge, or temporarily store the accumulated charge and output an electrical signal based on the stored charge to the outside of the pixel array 110. In addition, the control circuit 120 can control the readout circuit 150 to measure the level of the pixel signal provided from the pixel array 110.

[0022] The row driver 140 can generate control signals RS, TS, and SELS for controlling the pixel array 110, and provide the control signals RS, TS, and SELS to multiple pixels PX. The row driver 140 can determine the activation and deactivation timing of the reset control signal RS, the transmission control signal TS, and the selection signal SELS provided to the pixels PX.

[0023] Signal processing circuit 130 can perform signal processing on the signal output from buffer 155. In an embodiment, signal processing circuit 130 can perform image processing operations, including remosaic processing, on data received from readout circuit 150. In an embodiment, signal processing circuit 130 can perform signal processing such as noise reduction, gain adjustment, waveform shaping, interpolation, white balance, gamma processing, edge enhancement, etc. However, in an embodiment, signal processing circuit 130 can be located in a processor external to image sensor 100.

[0024] Figure 2A and Figure 2B yes Figure 1 The circuit diagram of the pixels PX included in the pixel array 110.

[0025] Reference Figure 2A A pixel PX may include multiple photoelectric conversion devices, such as first photodiodes PD1 to fourth photodiodes PD4. Each of the first photodiodes PD1 to fourth photodiodes PD4 can generate photocharge that varies according to light intensity. For example, each of the first photodiodes PD1 to fourth photodiodes PD4 is a PN junction diode that can generate charge proportional to the amount of incident light, i.e., electrons (negative charge) and holes (positive charge). Each of the first photodiodes PD1 to fourth photodiodes PD4 is an example of a photoelectric conversion device and may be at least one of a phototransistor, a photogate, a pinned photodiode (PPD), and combinations thereof.

[0026] Figure 2A and Figure 2B An example of a pixel PX comprising four photoelectric conversion devices (i.e., first photodiodes PD1 to fourth photodiodes PD4) is shown, but the disclosed concept is not limited thereto. A pixel PX may include four or more photoelectric conversion devices.

[0027] Pixel PX may include multiple transfer transistors, for example, first transfer transistors TX1 to fourth transfer transistors TX4 corresponding to multiple photoelectric conversion devices. Each of the first transfer transistors TX1 to fourth transfer transistors TX4 can transfer the generated photocharge to a floating diffusion region FD according to a transmission control signal (one of TS1 to TS4). When each of the first transfer transistors TX1 to fourth transfer transistors TX4 is turned on, the photocharge generated in the corresponding photodiode of the first photodiode PD1 to fourth photodiode PD4 can be transferred to a floating diffusion region FD and accumulated and stored in the floating diffusion region FD.

[0028] In this embodiment, the first transfer control signal TS1 to the fourth transfer control signal TS4 provided to the first transfer transistor TX1 to the fourth transfer transistor TX4 can be the same signal. In this embodiment, the gates of the first transfer transistor TX1 to the fourth transfer transistor TX4 can be electrically connected to each other. Therefore, the first transfer transistor TX1 to the fourth transfer transistor TX4 can simultaneously transfer the photocharge formed in the first photodiode PD1 to the fourth photodiode PD4 to the floating diffusion region FD. Therefore, the first photodiode PD1 to the fourth photodiode PD4 can operate as a single photoelectric conversion device, which can increase the full-well capacity (FWC) of the photoelectric conversion device and improve the dynamic range characteristics of the image sensor.

[0029] Pixel PX may include a reset transistor RX, which periodically resets the charge accumulated in the floating diffusion region FD. When the reset transistor RX is activated according to the row driver (e.g., ...), Figure 1 When the reset control signal RS provided by 140 is turned on, the charge accumulated in the floating diffusion region FD can be discharged, so that the floating diffusion region FD can be reset (e.g., reset to the power supply voltage VPIX level).

[0030] Additionally, the reset transistor RX can reset the capacitor CS (e.g., reset it to the supply voltage VPIX level) according to the reset control signal RS. That is, the reset transistor RX can turn on in response to the reset control signal RS applied to the gate, thereby resetting the floating diffusion region FD or the capacitor CS based on the supply voltage VPIX. For example, the storage control transistor SGX can turn on together with the reset transistor RX in response to the conversion gain control signal DCG received by the gate, such that the supply voltage VPIX is applied to the floating diffusion region FD, and the floating diffusion region FD can be reset.

[0031] The capacitor CS can be a passive element with fixed or variable capacitance, can be a capacitor formed by or connected to the source / drain of the storage control transistor SGX, or can be a parasitic capacitor formed by another pixel that can be connected to the source / drain of the storage control transistor SGX.

[0032] Because each of the first photodiodes PD1 to the fourth photodiode PD4 generates charge based on light intensity, the amount of charge generated by the first photodiodes PD1 to the fourth photodiode PD4 can vary depending on the image capture environment (low light or high light). For example, in a high light environment, the amount of charge generated in the first photodiode PD1 can reach the FWC of the first photodiode PD1, but in a low light environment, this may not be the case.

[0033] The charge accumulated in the floating diffusion region FD can be converted into a voltage in the floating diffusion region FD. The conversion gain (the unit of conversion gain can be, for example, uV / e) is determined by the capacitance of the floating diffusion region FD and is inversely proportional to the capacitance of the floating diffusion region FD. Increasing the capacitance of the floating diffusion region FD decreases the conversion gain, and decreasing the capacitance of the floating diffusion region FD increases the conversion gain.

[0034] The storage control transistor SGX can be turned on or off based on the conversion gain control signal DCG received at its gate, and when the storage control transistor SGX is turned on, the capacitor CS can be connected to the floating diffusion region FD, and the floating diffusion region FD can have parasitic capacitance as well as capacitance generated due to the capacitor CS, so the total capacitance of the floating diffusion region FD can be increased.

[0035] The conversion gain when the storage control transistor SGX is off can be higher than the conversion gain when the storage control transistor SGX is on. When the storage control transistor SGX is off, it can be called the high conversion gain (HCG) mode, and when the storage control transistor SGX is on, it can be called the low conversion gain (LCG) mode.

[0036] In this way, the pixel PX can operate in either HCG or LCG mode depending on the on / off state of the storage control transistor SGX. In low light conditions, the pixel PX can operate in HCG mode and can improve the image sensor (e.g., Figure 1 The low-light detection performance of the image sensor 100 is improved. On the other hand, under strong light, the pixel PX can operate in LCG mode, and since the capacitance of the floating diffusion region FD of the pixel PX is large, the FWC can be increased. Therefore, the strong light detection performance of the image sensor 100 can be improved. In addition, the image sensor 100 can provide dual conversion gain and sense both low and high light, thereby expanding (or increasing) the dynamic range of the image sensor 100. (See reference...) Figure 2A The pixel PX described to provide DCG is an example, and the construction of pixel PX can be modified in various ways.

[0037] The amplifying transistor SF can be controlled based on the amount of photocharge accumulated in the floating diffusion region FD. The amplifying transistor SF can act as a buffer amplifier to buffer the signal based on the charge stored in the floating diffusion region FD, and can also be a source follower. The amplifying transistor SF can amplify the potential change in the floating diffusion region FD and output it as the pixel signal VOUT to the column output line CLO (e.g., ...). Figure 1 (One of CLO_0 to CLO_n-1 in the selection transistor SX). The selection transistor SX can output the pixel signal VOUT to the CDS via the column output line CLO in response to the selection signal SELS (e.g., Figure 1 151 in the middle).

[0038] Reference Figure 2B , Figure 1 The pixel array 110 includes pixels PXa, which may include first photodiodes PD1 to fourth photodiodes PD4, first transfer transistors TX1 to fourth transfer transistors TX4, a reset transistor RX, and a select transistor SX. Pixel PXa may also include multiple amplifying transistors, such as a first amplifying transistor SF1 and a second amplifying transistor SF2. A power supply voltage VPIX is applied to one terminal of each of the first amplifying transistor SF1 and the second amplifying transistor SF2, and the other terminal of each of the first amplifying transistor SF1 and the second amplifying transistor SF2 can be connected to the select transistor SX. Both the first amplifying transistor SF1 and the second amplifying transistor SF2 can operate simultaneously and can generate a pixel signal VOUT based on the voltage of the floating diffusion region FD. Since the first amplifying transistor SF1 and the second amplifying transistor SF2 of pixel PXa operate as a single amplifying transistor, the pixel signal VOUT can be generated stably.

[0039] Alternatively, with Figure 2A and Figure 2B As shown, a pixel (PX or PXa) may include multiple selection transistors that act as a single selection transistor.

[0040] Figure 3 and Figure 4 This is an illustration of the pixels included in the image sensor according to an embodiment. Figure 3 It is along the substrate (e.g., Figure 5A The layout observed in the direction (-Z axis direction) from the first surface (front surface) of 10) toward the second surface (rear surface). Figure 4 The layout is observed along the direction (Z-axis direction) from the second surface (rear surface) of the substrate 10 toward the first surface (front surface) of the substrate 10.

[0041] Reference Figure 3 The pixels can be formed on a substrate and may include four photodiode regions arranged in two rows and two columns (2×2) in the X and Y directions, namely, the first photodiode region PXR1 to the fourth photodiode region PXR4. A photoelectric conversion device (e.g., Figure 2A and Figure 2B PD1 to PD4 can be formed in each of the first photodiode region PXR1 to the fourth photodiode region PXR4.

[0042] Furthermore, a grounding contact GND, to which a ground voltage is applied, can be placed in each of the first photodiode region PXR1 to the fourth photodiode region PXR4. The ground voltage can be applied to one end of the photoelectric conversion device formed in each of the first photodiode region PXR1 to the fourth photodiode region PXR4 through the grounding contact GND.

[0043] In each of the first photodiode regions PXR1 to the fourth photodiode region PXR4, a corresponding transfer transistor from the first transfer transistor TX1 to the fourth transfer transistor TX4 can be placed. The first transfer transistor TX1 to the fourth transfer transistor TX4 can transfer the photocharge in the photoelectric conversion device formed in each of the first photodiode regions PXR1 to the fourth photodiode region PXR4 to the floating diffusion region FD.

[0044] In an embodiment, each of the first transfer transistors TX1 to the fourth transfer transistors TX4 may include multiple gate lines electrically connected to each other, and may include vertical buried gate lines (dual vertical type). In an embodiment, the gates of the first transfer transistors TX1 to the fourth transfer transistors TX4 may be electrically connected to each other. Therefore, the first transfer transistors TX1 to the fourth transfer transistors TX4 can transfer photocharge formed in the photoelectric conversion device of the first photodiode region PXR1 to the fourth photodiode region PXR4 to the floating diffusion region FD at the same time point and within the same time period.

[0045] A corresponding transistor from the first transistor TR1 to the fourth transistor TR4 can be placed in each of the first photodiode region PXR1 to the fourth photodiode region PXR4. For example, each of the first transistor TR1 to the fourth transistor TR4 can be the one referenced above. Figure 2A The described transistors are the reset transistor RX, the amplifying transistor SF, the selection transistor SX, and the storage control transistor SGX. Alternatively, for example, each of the first transistor TR1 through the fourth transistor TR4 may be as described above. Figure 2BThe described transistors are a reset transistor RX, a first amplifying transistor SF1, a second amplifying transistor SF2, and a select transistor SX.

[0046] Pixels can be separated from other pixels by an isolation layer IL (or deep trench isolation), and the first photodiode region PXR1 to the fourth photodiode region PXR4 included in a pixel can be distinguished from each other by the isolation layer IL. For example, the isolation layer IL may include a first isolation layer IL1 formed to surround the first photodiode region PXR1 to the fourth photodiode region PXR4, and a second isolation layer IL2 that separates the first photodiode region PXR1 to the fourth photodiode region PXR4 respectively. Here, the second isolation layer IL2 may be formed to protrude from the first isolation layer IL1 along the X-axis direction, the -X-axis direction (the opposite direction of the X-axis direction), the Y-axis direction, and the -Y-axis direction (the opposite direction of the Y-axis direction). The X-axis direction and the Y-axis direction may be parallel to the main surface of the substrate and may be perpendicular to each other.

[0047] The second isolation layer IL2 can be formed to expose the central region of the first photodiode region PXR1 to the fourth photodiode region PXR4, and the floating diffusion region FD can be formed in the exposed central region of the first photodiode region PXR1 to the fourth photodiode region PXR4. The photocharge in the photoelectric conversion device formed in each of the first photodiode region PXR1 to the fourth photodiode region PXR4 can accumulate in the floating diffusion region FD. Therefore, the free wave capacity (FWC) of the photoelectric conversion device formed in each of the first photodiode region PXR1 to the fourth photodiode region PXR4 can be increased, and an image sensor with a high dynamic range can be realized.

[0048] Reference Figure 4 The image sensor may include a microlens ML. In one embodiment, a microlens ML may be placed on the first photodiode region PXR1 to the fourth photodiode region PXR4. Incident light passing through the microlens ML can be focused inside the pixel.

[0049] The pixels of an image sensor may include a backside scattering structure (BST). The BST increases the path of incident light to the image sensor, thereby increasing infrared sensitivity. For example, the BST may include a material with a different composition and refractive index than nearby structures, so that incident light can be scattered by the BST, and the scattered light can be provided to the photoelectric conversion devices of the first photodiode region PXR1 to the fourth photodiode region PXR4.

[0050] In an embodiment, the back-side scattering structure BST can be positioned corresponding to the center of the microlens ML. Therefore, incident light passing through the microlens ML can be refracted and incident on the back-side scattering structure BST, and the light scattered by the back-side scattering structure BST can be provided to each of the first photodiode regions PXR1 to the fourth photodiode region PXR4.

[0051] The back-side scattering structure (BST) can be formed in an "X" shape. For example, the BST may include a first pattern extending in a third horizontal direction (i.e., the diagonal direction where the X-axis direction (first horizontal direction) and the Y-axis direction (second horizontal direction) intersect) and a second pattern extending in a fourth horizontal direction, and the first pattern may be formed to intersect the second pattern. Therefore, light incident on the BST can be scattered by the BST and then scattered again by the isolation layer IL (e.g., the second isolation layer IL2) to be provided into the interior of the first photodiode region PXR1 to the fourth photodiode region PXR4, and the path of light (especially infrared light) incident on the photoelectric conversion device can be extended.

[0052] Figure 5A and Figure 5B It is an illustration of the pixels included in the image sensor according to the disclosed concept, and is along... Figure 3 and Figure 4 The cross-sectional view taken from line I-I'.

[0053] Reference Figure 3 , Figure 4 and Figure 5A Image sensors (e.g.) Figure 1 The 100 is configured to have a substrate 10. The substrate 10 may include a plurality of pixels arranged two-dimensionally in a first horizontal direction (X-axis direction) and a second horizontal direction (Y-axis direction) that intersect each other. Figure 1 PX).

[0054] The substrate 10 may include a first surface 10a and a second surface 10b opposite to each other. Incident light can enter the substrate 10 through the second surface 10b. The substrate 10 may be a single-crystal wafer, an epitaxial layer, or a silicon-on-insulator (SOI) substrate comprising silicon and / or germanium. The substrate 10 may be doped with an impurity of a second conductivity type. The second conductivity type may be, for example, p-type. The impurity of the second conductivity type may be, for example, boron.

[0055] A first isolation layer IL1, separating and confining multiple pixels PX from each other, may be placed within a substrate 10. The first isolation layer IL1 may have a mesh shape in a planar view. Furthermore, a second isolation layer IL2 may be disposed within the substrate 10 to separate multiple photodiode regions (i.e., first photodiode regions PXR1 to fourth photodiode regions PXR4) included in the pixel PX from each other. The isolation layer IL, including the first isolation layer IL1 and the second isolation layer IL2, may be defined as a deep trench isolation film formed within the substrate 10. The isolation layer IL may be formed to penetrate from a first surface 10a of the substrate 10 to a second surface 10b of the substrate 10. For example, the isolation layer IL may be a front-side deep trench isolation (FDTI) film formed by etching from the first surface 10a of the substrate 10 toward the second surface 10b of the substrate 10. In an embodiment, the isolation layer IL may be formed to have a cross-sectional width that narrows from the first surface 10a to the second surface 10b.

[0056] In an embodiment, the isolation layer IL may include an isolation conductive pattern, an isolation insulating pattern, and a buried insulating pattern. However, it is not limited thereto, and the isolation layer IL may not include an isolation conductive pattern.

[0057] The isolation conductive pattern of the isolation layer IL can be spaced apart from the substrate 10, and the isolation conductive pattern can include a conductive material having a refractive index different from that of the substrate 10. For example, the isolation conductive pattern can include a metal or polycrystalline silicon doped with impurities. In an embodiment, a lower voltage (e.g., a negative voltage) is applied to the isolation conductive pattern compared to the photoelectric conversion region PDR, thereby increasing the energy barrier between the isolation conductive pattern and the photoelectric conversion region PDR to reduce dark current. Therefore, the reliability of the image sensor can be improved.

[0058] The isolation insulating pattern of the isolation layer IL can be disposed between the isolation conductive pattern of the isolation layer IL and the substrate 10, and the buried insulating pattern of the isolation layer IL can be disposed below the isolation conductive pattern. The isolation insulating pattern can be located between the buried insulating pattern and the substrate 10. The isolation insulating pattern and the buried insulating pattern can include an insulating material having a refractive index different from that of the substrate 10. For example, the isolation insulating pattern and the buried insulating pattern can each include silicon oxide.

[0059] The photoelectric conversion region PDR can be placed inside the substrate 10. The well region PW can be placed between the photoelectric conversion region PDR and the first surface 10a. The well region PW can be doped with, for example, an impurity of a second conductivity type (P-type) doped into the substrate 10. The concentration of the second conductivity type impurity doped into the well region PW can be equal to or greater than the concentration of the impurity doped into the substrate 10.

[0060] The photoelectric conversion region (PDR) can be doped with impurities of a first conductivity type, opposite to the second conductivity type. For example, the PDR can be doped with N-type impurities, such as phosphorus or arsenic. The N-type impurity region of the PDR can form a PN junction with the nearby substrate 10 and / or the P-type impurity region of the well region PW to form a photodiode, and electron-hole pairs can be generated through the PN junction when light is incident.

[0061] An isolation element TI for isolating the active regions of the transistors constituting the pixel PX from each other may be placed adjacent to the first surface 10a of the substrate 10. The isolation element TI may be formed by a shallow trench isolation (STI) method and may be formed as a single-film or multi-film structure of at least one of silicon oxide, silicon nitride, and silicon oxynitride. Alternatively, the isolation element TI may be formed by doping with an impurity of the same second conductivity type as the impurity doped into the substrate 10, and the isolation element TI may have a higher doping concentration than the impurity doped into the substrate 10. A first isolation layer IL1 and a second isolation layer IL2 may be formed on the isolation element TI.

[0062] A gate insulating film may be placed between the gate 111 of each of the first transistors TR1 to the fourth transistors TR4 and the substrate 10. The gate insulating film may be a single film or multiple films of at least one of silicon oxide, metal oxide, silicon nitride, and silicon oxynitride.

[0063] In an embodiment, the gate TG of each of the first transfer transistors TX1 to the fourth transfer transistors TX4 may be a vertical buried gate line. For example, a portion of the gate TG of each of the first transfer transistors TX1 to the fourth transfer transistors TX4 may be inserted into the substrate 10. Alternatively, in an embodiment, the gate TG of each of the first transfer transistors TX1 to the fourth transfer transistors TX4 may be a planar gate. A gate insulating film may be placed between the gate TG of each of the first transfer transistors TX1 to the fourth transfer transistors TX4 and the substrate 10.

[0064] The floating diffusion region FD may be disposed in the active region of the gate TG of each of the first transfer transistors TX1 to the fourth transfer transistors TX4. The floating diffusion region FD may be doped with an impurity of a first conductivity type, which is opposite to the second conductivity type impurity doped into the substrate 10. For example, the floating diffusion region FD may be doped with an N-type impurity, such as phosphorus or arsenic.

[0065] On the first surface 10a, multiple interlayer insulating films may be stacked sequentially, and the multiple interlayer insulating films may have a single-film or multi-film structure, such as silicon oxide, silicon nitride, silicon oxynitride and porous insulators.

[0066] Interconnect layers 115 can be placed between different interlayer insulating films, and through-holes / contacts 113 can be positioned to penetrate the interlayer insulating films and connect to the interconnect layers 115. In an embodiment, the gates TG of the first transfer transistor TX1 to the fourth transfer transistor TX4 can be electrically connected to each other through the interconnect layers 115 and the through-holes / contacts 113.

[0067] A trench 12 may be formed in the second surface 10b of the substrate 10, and a back-side scattering structure (BST) may be formed in the trench 12. In an embodiment, the BST may be formed by forming the trench 12 in the second surface 10b of the substrate 10 and then filling the interior of the trench 12 with at least one material used to form the anti-reflective layer 103. The BST may comprise the same material as the anti-reflective layer 103.

[0068] In an embodiment, the back-side scattering structure (BST) may include a material having a lower refractive index than the surrounding structure, and the back-side scattering structure (BST) may include a material having a lower refractive index than the substrate 10. For example, the substrate 10 may include silicon, and the back-side scattering structure (BST) may include titanium oxide, hafnium oxide, or silicon oxide.

[0069] An antireflective layer 103 may be placed on the second surface 10b of the substrate 10. The antireflective layer 103 can adjust the refractive index to suppress reflection of incident light and ensure high transmittance. The antireflective layer 103 prevents reflection of incident light, allowing it to smoothly reach the photoelectric conversion region PDR through the color filter CF. For example, the refractive index of the antireflective layer 103 may be 2.0 or greater and 2.5 or less, but is not limited thereto. The material and thickness of the antireflective layer 103 may vary depending on the wavelength of the incident light. For example, the antireflective layer 103 may be a single layer or multiple layers. The antireflective layer 103 may include, for example, silicon oxide, silicon nitride, silicon oxynitride, hafnium oxide, aluminum oxide, or titanium oxide. In the sense that the antireflective layer 103 is formed below the microlens ML and the color filter CF layer to which light is incident, the antireflective layer 103 may be referred to as a bottom antireflective layer (BARL).

[0070] A grid pattern 104 may be formed on the antireflective layer 103. For example, the grid pattern 104 may include a light-blocking pattern and a low-refractive-index pattern stacked sequentially. The light-blocking pattern and the low-refractive-index pattern may have a mesh shape in a planar manner and may overlap with the first isolation layer IL1, and the light-blocking pattern and the low-refractive-index pattern may expose the antireflective layer 103 on the photoelectric conversion region PDR.

[0071] A color filter CF can be placed on the antireflective layer 103, and a microlens ML can be placed on the color filter CF. The color filter CF can be, for example, a red color filter, a green color filter, and a blue color filter. The microlens ML can focus the incident light and provide it to the back-side scattering structure BST.

[0072] Reference Figure 3 , Figure 4 and Figure 5B The image sensor 100 may include a back-side scattering structure BST disposed on a second surface 10b of a substrate 10. The back-side scattering structure BST may be placed between an anti-reflection layer 103 and a color filter CF. For example, the image sensor 100 according to the disclosed concept can be manufactured by forming an anti-reflection layer 103 on the second surface 10b of the substrate 10, forming a back-side scattering structure BST with a nanoprism structure on the anti-reflection layer 103, and then forming a color filter CF and a microlens ML on the back-side scattering structure BST.

[0073] In an embodiment, the back-side scattering structure (BST) may include a material having a higher refractive index than nearby structures, for example, a material having a higher refractive index than the color filter (CF). For example, the back-side scattering structure (BST) may include titanium oxide, amorphous silicon, or polycrystalline silicon.

[0074] Figure 6 This is an illustration of the pixels included in the image sensor according to an embodiment. Figure 6 This is the layout observed along the direction (Z-axis direction) from the second surface (back surface) of the substrate toward the first surface (front surface) of the substrate. Figure 6 The description omits the comparison with Figure 4 The accompanying figures contain redundant descriptions that use the same reference numerals.

[0075] Reference Figure 6 The pixels of the image sensor may include a backside scattering structure (BSTa), which comprises a material having a different composition and refractive index than its surroundings. In an embodiment, the BSTa may be positioned corresponding to the center of a microlens ML. Incident light passing through the microlens ML may be refracted and incident on the BSTa, and the light scattered by the BSTa may be provided to each of the first photodiode regions PXR1 to the fourth photodiode region PXR4.

[0076] The back-side scattering structure BSTa can be formed in a "+" shape. For example, the back-side scattering structure BSTa can have a shape in which a first pattern extending in the X-axis direction and a second pattern extending in the Y-axis direction intersect each other. That is, the back-side scattering structure BSTa can include a pattern extending in the same direction as the direction in which the second isolation layer IL2 extends.

[0077] Figure 7 This is an illustration of the pixels included in the image sensor according to an embodiment. Figure 7 This is the layout observed along the direction (Z-axis direction) from the second surface (back surface) of the substrate toward the first surface (front surface) of the substrate. Figure 7 The description omits the comparison with Figure 4 and Figure 6 The accompanying figures contain redundant descriptions that use the same reference numerals.

[0078] Reference Figure 7 The image sensor may include at least one of first pixels PX1 to sixth pixels PX6. Each of the first pixels PX1 to sixth pixels PX6 may include a first photodiode region to a fourth photodiode region defined by an isolation layer IL including a first isolation layer and a second isolation layer, and each of the first pixels PX1 to sixth pixels PX6 may include a first microlens ML1 to a fourth microlens ML4 arranged to correspond to the first photodiode region to the fourth photodiode region, respectively. For example, the first microlens ML1 may be arranged on the first photodiode region, the second microlens ML2 may be arranged on the second photodiode region, the third microlens ML3 may be arranged on the third photodiode region, and the fourth microlens ML4 may be arranged on the fourth photodiode region. Each of the first microlens ML1 to the fourth microlens ML4 may focus incident light and provide it to the corresponding photodiode region among the first to fourth photodiode regions.

[0079] Each of the first pixel PX1 to the sixth pixel PX6 may include a first back-side scattering structure to a fourth back-side scattering structure arranged to correspond to the center of the first microlens ML1 to the fourth microlens ML4, respectively. For example, the first back-side scattering structure corresponding to the center of the first microlens ML1 may be arranged inside or above the first photodiode region, the second back-side scattering structure corresponding to the center of the second microlens ML2 may be arranged inside or above the second photodiode region, the third back-side scattering structure corresponding to the center of the third microlens ML3 may be arranged inside or above the third photodiode region, and the fourth back-side scattering structure corresponding to the center of the fourth microlens ML4 may be arranged inside or above the fourth photodiode region. Each of the first back-side scattering structures to the fourth back-side scattering structures included in each of the first pixel PX1 to the sixth pixel PX6 may be an "X"-shaped back-side scattering structure BST or a "+"-shaped back-side scattering structure BSTa.

[0080] Each of the first pixel PX1, the second pixel PX2, the fourth pixel PX4, and the fifth pixel PX5 may further include a fifth back-side scattering structure disposed at the center of the first photodiode region to the fourth photodiode region. A second isolation layer extending from the first isolation layer may be formed to expose the center of the first photodiode region to the fourth photodiode region. The fifth back-side scattering structure may be arranged in the central region of the first photodiode region to the fourth photodiode region where the isolation layer IL is not formed (i.e., the region where the first photodiode region to the fourth photodiode region is in contact with each other).

[0081] The fifth back-side scattering structure can be formed inside the first to fourth photodiode regions, or it can be formed as a prism structure on the second surface of the first to fourth photodiode regions. The fifth back-side scattering structure can be an "X"-shaped back-side scattering structure BST or a "+"-shaped back-side scattering structure BSTa.

[0082] Figure 8 and Figure 9 This is an illustration of the pixels included in the image sensor according to an embodiment. Figure 8 This is the layout observed along the direction (Z-axis direction) from the second surface (back surface) of the substrate toward the first surface (front surface) of the substrate. Figure 9 It is along Figure 8 The cross-sectional view taken from line II-II'. Figure 8 and Figure 9 The description omits the comparison with Figure 4 , Figure 5A and Figure 6 The accompanying figures contain redundant descriptions that use the same reference numerals.

[0083] Reference Figure 8 and Figure 9 The pixels of the image sensor may include first back-side scattering structures BSTa1 to fourth back-side scattering structures BSTa4 corresponding to the first photodiode region PXR1 to the fourth photodiode region PXR4, respectively, and may also include a fifth back-side scattering structure BSTa5 disposed at the center of the first photodiode region PXR1 to the fourth photodiode region PXR4. A second isolation layer IL2 extending from the first isolation layer IL1 may be formed to expose the center of the first photodiode region PXR1 to the fourth photodiode region PXR4, and the fifth back-side scattering structure BSTa5 may be disposed at the center of the first photodiode region PXR1 to the fourth photodiode region PXR4.

[0084] like Figure 9As shown, each of the first back-side scattering structures BSTa1 to the fifth back-side scattering structures BSTa5 can be formed inside the substrate 10 on which the first photodiode region PXR1 to the fourth photodiode region PXR4 are formed, or can be formed as a prism structure on the second surface 10b of the first photodiode region PXR1 to the fourth photodiode region PXR4, such as Figure 5B As shown. In Figure 8 In the diagram, each of the first backside scattering structure BSTa1 to the fifth backside scattering structure BSTa5 is shown as a "+" shaped backside scattering structure, but the disclosed concept is not limited to this and may also be an "X" shaped backside scattering structure.

[0085] The pixels of the image sensor may include first microlenses ML1 to fourth microlenses ML4 corresponding to first photodiode regions PXR1 to fourth photodiode regions PXR4, and may also include a fifth microlens ML5 disposed on the first microlenses ML1 to fourth microlenses ML4. In an embodiment, the first microlenses ML1 to fourth microlenses ML4 may be arranged on the same plane, and the fifth microlens ML5 may be disposed on the first microlenses ML1 to fourth microlenses ML4. For example, the first microlenses ML1 to fifth microlenses ML5 may be manufactured by forming the first microlenses ML1 to fourth microlenses ML4 and then additionally forming the fifth microlens ML5 on the first microlenses ML1 to fourth microlenses ML4.

[0086] The first back-side scattering structures BSTa1 to the fourth back-side scattering structures BSTa4 can be arranged to correspond to the centers of the first microlenses ML1 to the fourth microlenses ML4, respectively. The fifth back-side scattering structure BSTa5 can be positioned to correspond to the center of the fifth microlens ML5. Therefore, each of the first microlenses ML1 to the fourth microlenses ML4 can focus and provide incident light to the first back-side scattering structures BSTa1 to the fourth back-side scattering structures BSTa4, and the fifth microlens ML5 can focus and provide incident light to the fifth back-side scattering structure BSTa5.

[0087] Figure 10 and Figure 11 This is an illustration of the pixels included in the image sensor according to an embodiment. Figure 10 This is the layout observed along the direction (Z-axis direction) from the second surface (back surface) of the substrate toward the first surface (front surface) of the substrate, and Figure 11 It is a cross-sectional view of a pixel cut along the vertical direction (Z-axis). Figure 10 and Figure 11 Redundant descriptions of reference numerals that are the same as those in the previous figures have been omitted in the description.

[0088] Reference Figure 10 and Figure 11 The pixels of the image sensor may include annular microlenses MLDs disposed on the first photodiode regions PXR1 to the fourth photodiode regions PXR4. For example, the microlens MLD may include a hole MLH formed in the central region, and the central region of the first photodiode regions PXR1 to the fourth photodiode regions PXR4 may be exposed through the hole MLH.

[0089] Alternatively, the pixels of the image sensor may include microlenses MLD' disposed on the first photodiode regions PXR1 to the fourth photodiode regions PXR4, and even if the microlenses MLD' do not include the hole MLH formed in the central region, the first height H1 of the central region may be lower than the second height H2 of the other regions. Therefore, Figure 10 Circular microlens MLD or Figure 11 Microlenses MLDs can have a lower maximum height than other microlenses, and the cost of manufacturing microlenses MLDs or MLDs can be reduced.

[0090] Figure 12 and Figure 13 This is an illustration of the pixels included in the image sensor according to an embodiment. Figure 12 This is the layout observed along the direction (Z-axis direction) from the second surface (back surface) of the substrate toward the first surface (front surface) of the substrate. Figure 13 It is along Figure 12 The cross-sectional view taken from line III-III'. Figure 12 and Figure 13 Redundant descriptions of reference numerals that are the same as those in the previous figures have been omitted in the description.

[0091] Reference Figure 12 The image sensor may include a seventh pixel PX7 or an eighth pixel PX8. The seventh pixel PX7 and the eighth pixel PX8 may include a back-side scattering structure BSTb or BSTc, the back-side scattering structure BSTb or BSTc including the features described above. Figure 4 or Figure 6 The described pixels are compared to a relatively long pattern.

[0092] Reference Figure 12 and Figure 13 The back-side scattering structure BSTb of the seventh pixel PX7 may have a "+" shape and may include a first pattern extending along the X-axis and a second pattern extending along the Y-axis. The back-side scattering structure BSTb may be formed to contact an isolation layer IL (e.g., a second isolation layer).

[0093] For example, a deep trench can be formed from the first surface 10a of the substrate 10 toward the second surface 10b of the substrate 10 to form an isolation layer IL, and then a trench can be formed in the second surface 10b of the substrate to form a back-side scattering structure BSTb. A portion of the isolation layer IL can also be etched to form a trench for forming the back-side scattering structure BSTb in the second surface 10b of the substrate, and the back-side scattering structure BSTb can be formed to contact the isolation layer IL. Alternatively, the back-side scattering structure BSTb can be formed between the anti-reflective layer 103 and the color filter CF to overlap with the isolation layer IL in the Z-axis direction.

[0094] Return to reference Figure 12 The back-side scattering structure BSTc of the eighth pixel PX8 may have an "X" shape. The back-side scattering structure BSTc may be included in the substrate (e.g., Figure 5A The first and second patterns extend horizontally in the first photodiode region PXR1 to the fourth photodiode region PXR4 in the direction of 10). For example, the back-side scattering structure BSTc may have a photoelectric conversion region (e.g., formed inside the substrate 10) extending in the Z-axis direction. Figure 5A The first and second patterns overlap (PDR).

[0095] Figure 14 This is an illustration of the pixels included in the image sensor according to an embodiment. Figure 14 It is the layout observed along the direction (Z-axis direction) from the second surface (back surface) of the substrate toward the first surface (front surface) of the substrate.

[0096] Reference Figure 14 The image sensor may include a ninth pixel PX9 or a tenth pixel PX10. The ninth pixel PX9 or the tenth pixel PX10 may include a back-side scattering structure BSTd having a lattice (or mesh) pattern. For example, the back-side scattering structure BSTd of the ninth pixel PX9 and the tenth pixel PX10 may include a plurality of first patterns extending along the X-axis direction (a first horizontal direction) and a plurality of second patterns extending along the Y-axis direction (a second horizontal direction). Alternatively, for example, the back-side scattering structure BSTd of the ninth pixel PX9 and the tenth pixel PX10 may include a plurality of first patterns extending along a third horizontal direction and a plurality of second patterns extending along a fourth horizontal direction, where the third and fourth horizontal directions may refer to the diagonal direction between the X-axis direction and the Y-axis direction.

[0097] In an embodiment, the back-side scattering structure BSTd can be formed as a contact isolation layer IL, for example, a second isolation layer. For example, it can be formed from a substrate (e.g., Figure 5A The first surface of 10) (e.g., Figure 5A 10a) facing the substrate (e.g., Figure 5AThe second surface of (e.g., 10) Figure 5A A deep trench is formed in the second surface 10b of the substrate 10 to form an isolation layer IL, and a trench may be formed in the second surface 10b of the substrate 10 to form a back-side scattering structure BSTd. Alternatively, in an embodiment, the back-side scattering structure BSTd may be formed in an anti-reflection layer (e.g., Figure 5A 103) and color filters (e.g., Figure 5A Between the CFs in the middle, so as to overlap with the isolation layer IL in the Z direction.

[0098] The ninth pixel PX9 may include a microlens ML disposed on the first photodiode regions PXR1 to the fourth photodiode regions PXR4. Here, the ninth pixel PX9 may include an annular microlens MLD.

[0099] The tenth pixel PX10 may include first microlenses ML1 to fourth microlenses ML4 arranged to correspond to the first photodiode region PXR1 to the fourth photodiode region PXR4, respectively. The tenth pixel PX10 may also include a fifth microlens disposed on the first microlenses ML1 to the fourth microlenses ML4.

[0100] Figure 15 This is an illustration of the pixels included in the image sensor according to an embodiment. Figure 15 It is a cross-sectional view of the edge pixels included in the pixel array in the vertical direction (Z-axis direction).

[0101] Reference Figure 1 and Figure 15 The pixel array 110 of the image sensor 100 may include a plurality of pixels arranged in a central region of the pixel array 110 and a plurality of pixels arranged in an edge region surrounding the central region (i.e., edge pixels). Depending on the characteristics of the pixel arrangement in the pixel array 110, the edge pixels arranged in the edge region of the pixel array 110 may be arranged such that the microlens ML is offset in one direction relative to the center line CL of the edge pixel, so as to focus incident light onto the photoelectric conversion region PDR. That is, the center line CL of the edge pixel may not be aligned with the center line CL_ML of the microlens ML.

[0102] Edge pixels may include a back-side scattering structure (BST), and the BST may be positioned corresponding to the centerline CL_ML of the microlens ML. Depending on the arrangement characteristics of the microlens ML at the edge pixel, the BST may be arranged to be misaligned with the centerline CL of the edge pixel. The BST of the edge pixel may be formed in a trench 12 formed in the second surface 10b of the substrate 10, or it may be formed between the anti-reflection layer 103 and the color filter CF.

[0103] Additionally, the pixels arranged in the central region of the pixel array 110 can have, for example... Figure 5A , Figure 5B , Figure 9 , Figure 11 or Figure 13 The cross-sectional structure shown.

[0104] According to various aspects of the disclosed concept, a method for manufacturing an image sensor is provided, the method comprising: providing a substrate including a first photodiode region to a fourth photodiode region in which photodiodes are respectively formed; forming a first isolation layer to surround the first photodiode region to the fourth photodiode region and penetrate from a first surface of the substrate to a second surface of the substrate opposite to the first surface; forming a second isolation layer to protrude from the first isolation layer and separate the first photodiode region to the fourth photodiode region; forming a floating diffusion region on the first surface, wherein photocharge generated in the photodiodes of each of the first photodiode region to the fourth photodiode region accumulates in the floating diffusion region; forming at least one back-side scattering structure within a trench formed on the second surface of the substrate; and placing at least one microlens on the second surface of the substrate, wherein the gates of the respective first transfer transistors to the fourth transfer transistors are electrically connected to each other, the second isolation layer is formed to expose a central region of the first photodiode region to the fourth photodiode region, and the floating diffusion region is disposed in the central region of the first photodiode region to the fourth photodiode region.

[0105] Although the disclosed concept has been specifically shown and described with reference to embodiments thereof, it will be understood that various changes in form and detail may be made therein without departing from the spirit and scope of the appended claims.

Claims

1. An image sensor, comprising: Substrate, comprising respectively The first to fourth photodiode regions form photodiodes; A first isolation layer is formed to surround the first photodiode region to the fourth photodiode region and penetrates from a first surface of the substrate to a second surface of the substrate opposite to the first surface; A second isolation layer is formed to protrude from the first isolation layer and separate the first photodiode region from the fourth photodiode region; A floating diffusion region is formed on the first surface of the substrate, and photocharge generated in the photodiodes of each of the first to fourth photodiode regions accumulates in the floating diffusion region. The first transfer transistor to the fourth transfer transistor transfers the photocharge generated in the photodiode in each of the first photodiode region to the floating diffusion region; At least one back-side scattering structure is formed inside a trench formed in the second surface of the substrate; as well as At least one microlens is placed on the second surface of the substrate. in: The gates of the first to the fourth transfer transistors are electrically connected to each other. The second isolation layer is formed to expose the central region from the first photodiode region to the fourth photodiode region, and The floating diffusion region is arranged in the central region of the first photodiode region to the fourth photodiode region.

2. The image sensor according to claim 1, wherein: The second isolation layer is formed to protrude from the first isolation layer in a first horizontal direction and a second horizontal direction. The at least one back-side scattering structure is formed such that the first pattern extending in the third horizontal direction intersects with the second pattern extending in the fourth horizontal direction, and The third horizontal direction and the fourth horizontal direction are diagonal directions between the first horizontal direction and the second horizontal direction.

3. The image sensor according to claim 2, wherein: The second isolation layer is formed to protrude from the first isolation layer in both the first horizontal direction and the second horizontal direction, and The at least one back-side scattering structure is formed such that the first pattern extending in the first horizontal direction intersects with the second pattern extending in the second horizontal direction.

4. The image sensor according to claim 1, wherein: The at least one microlens includes a first microlens to a fourth microlens arranged to correspond respectively to the first photodiode region to the fourth photodiode region, and The at least one back-side scattering structure includes a first back-side scattering structure to a fourth back-side scattering structure arranged to correspond to the respective centers of the first microlens to the fourth microlens.

5. The image sensor according to claim 4, wherein, The at least one backside scattering structure further includes a fifth backside scattering structure disposed at the center of the first photodiode region to the fourth photodiode region.

6. The image sensor according to claim 4, wherein, The at least one microlens further includes a fifth microlens disposed on the first to the fourth microlenses.

7. The image sensor according to claim 1, wherein, The at least one microlens has a central region, and the central region of the at least one microlens has a lower height than the other regions.

8. The image sensor according to claim 1, wherein, The at least one backside scattering structure comprises multiple line patterns forming a lattice structure.

9. The image sensor according to claim 1, wherein: The array includes a pixel array comprising a plurality of pixels arranged in a central region of the pixel array and a plurality of pixels arranged in an edge region surrounding the central region of the pixel array. The first to fourth photodiode regions are included in one of a plurality of pixels arranged in the edge region. The at least one microlens includes: a microlens disposed on the first to fourth photodiode regions and arranged offset from the center of the first to fourth photodiode regions, and The at least one back-side scattering structure includes a back-side scattering structure arranged to correspond to the center of the microlens.

10. The image sensor according to claim 1, wherein, The first to the fourth transfer transistors include a plurality of gate patterns.

11. An image sensor, comprising: Substrate, comprising respectively The first to fourth photodiode regions form photodiodes; An isolation layer that separates the first photodiode region to the fourth photodiode region and penetrates from the first surface of the substrate to the second surface of the substrate opposite to the first surface; A floating diffusion region is formed on the first surface, and photocharge generated in the photodiodes of each of the first to fourth photodiode regions accumulates in the floating diffusion region; The first transfer transistor to the fourth transfer transistor transfers the photocharge generated in the photodiode in each of the first photodiode region to the floating diffusion region; At least one microlens is placed on the second surface of the substrate; as well as At least one back-side scattering structure is formed inside a trench formed in the second surface of the substrate, and the at least one back-side scattering structure is positioned corresponding to the center of the at least one microlens. The gates of the first to the fourth transfer transistors are electrically connected to each other.

12. The image sensor of claim 11, further comprising an anti-reflective layer and a color filter layer located between the substrate and the at least one microlens.

13. The image sensor according to claim 11, wherein: The isolation layer is formed to extend in a first horizontal direction and a second horizontal direction. The at least one back-side scattering structure is formed such that the first pattern extending in the third horizontal direction intersects with the second pattern extending in the fourth horizontal direction, and The third horizontal direction and the fourth horizontal direction are diagonal directions between the first horizontal direction and the second horizontal direction.

14. The image sensor according to claim 13, wherein: The isolation layer is formed to extend in the first horizontal direction and the second horizontal direction, and The at least one back-side scattering structure is formed such that the first pattern extending in the first horizontal direction intersects with the second pattern extending in the second horizontal direction.

15. The image sensor according to claim 11, wherein: The at least one microlens includes a first microlens to a fourth microlens arranged to correspond respectively to the first photodiode region to the fourth photodiode region, and The at least one backside scattering structure includes a first backside scattering structure to a fourth backside scattering structure arranged to correspond to the center of each of the first to fourth microlenses.

16. The image sensor according to claim 15, wherein, The at least one microlens further includes a fifth microlens placed on the first to the fourth microlenses.

17. The image sensor according to claim 15, wherein, The at least one backside scattering structure further includes a fifth backside scattering structure placed at the center of the first photodiode region to the fourth photodiode region.

18. An image sensor, comprising: Substrate, comprising respectively The first to fourth photodiode regions form photodiodes; An isolation layer that separates the first photodiode region to the fourth photodiode region and penetrates from the first surface of the substrate to the second surface of the substrate opposite to the first surface; A floating diffusion region is formed on the first surface, and photocharge generated in the photodiodes of each of the first to fourth photodiode regions accumulates in the floating diffusion region; The first transfer transistor to the fourth transfer transistor transfers the photocharge generated in the photodiode in each of the first photodiode region to the floating diffusion region; A color filter layer and a microlens are disposed on the second surface of the substrate; as well as A back-side scattering structure is placed between the substrate and the color filter layer on the second surface of the substrate. The gates of the first to the fourth transfer transistors are electrically connected to each other.

19. The image sensor of claim 18, further comprising: An anti-reflective layer is located between the substrate and the color filter layer. The back-side scattering structure is located between the anti-reflection layer and the color filter layer.

20. The image sensor according to claim 18, wherein, The back-side scattering structure comprises a material having a refractive index higher than that of the color filter layer.

Images