Method of manufacturing an image sensor

CN122803412APending Publication Date: 2026-09-22SMARTSENS TECH (SHANGHAI) CO LTD
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Patent Information

Application Number
CN202510322820.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-03-19
Publication Date
2026-09-22

AI Technical Summary

Technical Problem

该LTO不利于后续封装,如与后续封装时使用的封装材料结合性能较差,降低产品的可靠性,尤其在车载产品上非常有必要去除外围区域的LTO,但是去除外围区域的LTO需要额外增加一层掩膜版(mask),提高制造成本

Benefits of technology

[0040]如上所述,本发明的图像传感器的制备方法,通过把打开焊垫的步骤从像素区域及外围区域的结构制备完成后进行前移至沟槽填充及部分光学组件制备的工序之前,并在填充沟槽的同一道沉积工序中采用填充沟槽的绝缘层同时作为焊垫的保护帽层,以避免后续制备光学组件时对焊垫产生损伤,最后基于同一道刻蚀工艺刻蚀沟槽区域的绝缘层及焊垫区域的绝缘层,实现焊垫的打开,有效避免了低温氧化层的沉积实现焊垫的无损伤打开过程,以及额外增加一层去除外围区域低温氧化层的掩膜版,提高封装产品可靠性,降低制造成本。

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Abstract

The present application provides a preparation method of an image sensor, which moves the step of opening the solder pad from after the structure preparation of the pixel area and the peripheral area to before the groove filling and the preparation of part of the optical assembly, and uses the insulating layer for filling the groove as the protective cap layer of the solder pad in the same deposition process of filling the groove, so as to avoid the damage to the solder pad in the subsequent preparation of the optical assembly. Finally, the insulating layer of the groove area and the insulating layer of the solder pad area are etched based on the same etching process, the opening of the solder pad is realized, the damage-free opening process of the solder pad is realized by the deposition of the low-temperature oxide layer, an additional mask for removing the low-temperature oxide layer of the peripheral area is added, the reliability of the packaging product is improved, and the manufacturing cost is reduced.
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Description

Technical Field

[0001] This invention relates to the field of image sensors, and in particular to a method for fabricating a CMOS image sensor. Background Technology

[0002] Image sensors utilize the photoelectric conversion function of optoelectronic devices to convert a light image on a photosensitive surface into an electrical signal proportional to the light image. Based on the different components, they can be divided into two main categories: CCD (Charge-Coupled Device) and CMOS (Metal-Oxide-Semiconductor). With the continuous development of CMOS image sensor (CIS) design and manufacturing processes, CMOS image sensors have gradually replaced CCD image sensors and become the mainstream.

[0003] The CIS structure is mainly divided into pixel area and peripheral area. Pixel area corresponds to one or more image pixels, corresponding pixel circuits, and optical components. Peripheral area corresponds to signal lines connecting pixels to external devices, peripheral circuits connected to pixels, and pads (PDs). In CIS process, the pads need to be opened for subsequent wire bonding and / or CP testing. Before opening the pads, a low-temperature oxide (LTO) layer is typically added to cover the microlenses in the pixel area. Its main function is to protect the microlenses from damage during the subsequent pad opening process. However, LTO not only covers the microlenses but also forms on the surface of the peripheral area. This LTO is detrimental to subsequent packaging, such as poor bonding performance with the packaging materials used in subsequent packaging, reducing product reliability. It is especially necessary to remove the LTO in the peripheral area in automotive products. However, removing the LTO in the peripheral area requires an additional mask, increasing manufacturing costs.

[0004] Therefore, it is necessary to propose a method for fabricating an image sensor that removes LTO without adding a mask, and it is essential to ensure that the microlens is not damaged when the pads are opened.

[0005] It should be noted that the above introduction to the technical background is only for the purpose of providing a clear and complete explanation of the technical solutions of this application and facilitating understanding by those skilled in the art. It should not be assumed that these technical solutions are known to those skilled in the art simply because they have been described in the background section of this application. Summary of the Invention

[0006] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide a method for fabricating an image sensor, which solves the problem in the prior art where an LTO layer is first formed to protect the microlens during the process of opening the image sensor pads, which requires an additional mask layer to be added when removing the LTO in the peripheral area, thus increasing the manufacturing cost.

[0007] To achieve the above and other related objectives, the present invention provides a method for fabricating an image sensor, the method comprising the following steps:

[0008] S1, a substrate having opposing first and second surfaces is provided, the substrate including a pixel region and a peripheral region, the pixel region including at least a plurality of photoelectric conversion pixels, the peripheral region extending around the pixel region; wherein, the sidewalls and bottom wall of the trench are formed with conductive layers;

[0009] S2, a passivation layer is formed on the first surface of the substrate;

[0010] S3, Etch to remove the passivation layer on the surface of the solder pad;

[0011] S4, an insulating layer is formed on the first surface of the substrate, and the insulating layer at least fills the trench;

[0012] S5, the insulating layer is etched using an etching process, while retaining the insulating layer in the trench area and the pad area;

[0013] S6, Prepare the remaining optical components of the photoelectric conversion pixel in the pixel region;

[0014] S7, the insulating layer in the trench region and the insulating layer in the pad region are etched using an etching process.

[0015] Optionally, in step S5, the insulating layer is etched using a photolithography etching process, and in step S7, the insulating layer of the trench region and the pad region is etched using a photolithography etching process based on the same photomask as in step S5.

[0016] Furthermore, the chemical reaction mechanisms of the photoresist layer used in the photolithography etching processes of steps S5 and S7 are opposite.

[0017] Further, step S5, the method for etching the insulating layer based on photolithography etching process, includes:

[0018] S51, a second photoresist layer is coated on the insulating layer, and the second photoresist layer is exposed and developed based on a mask, so that the patterned second photoresist layer exposes the insulating layer except for the trench region and the pad region;

[0019] S52, etching the insulating layer based on the patterned second photoresist layer;

[0020] S53, remove the patterned second photoresist layer to obtain the insulating layer retained in the trench region and the pad region;

[0021] Step S7 involves etching the insulating layer in the trench region and the insulating layer in the pad region using photolithography.

[0022] S71, a third photoresist layer is coated on the obtained structure, and the third photoresist layer is exposed and developed based on the mask used in step S51, and the patterned third photoresist layer exposes the insulating layer of the trench region and the pad region.

[0023] S72, the insulating layer is etched based on the patterned third photoresist layer; wherein the etching removes the insulating layer in the pad region and the insulating layer of a predetermined thickness in the trench region;

[0024] S73, Remove the patterned third photoresist layer.

[0025] Optionally, the method for etching away the passivation layer on the surface of the solder pad in step S3 includes:

[0026] S31, a first photoresist layer is coated on the passivation layer and patterned thereon, the patterned first photoresist layer exposing the passivation layer on the surface of the solder pad;

[0027] S32, based on the patterned first photoresist layer, the passivation layer is etched to expose the surface of the solder pad;

[0028] S33, Remove the patterned first photoresist layer.

[0029] Optionally, the insulating layer formed in step S4 is a flat insulating layer, and the method for forming the flat insulating layer includes:

[0030] S41, an insulating material layer is formed on the first surface of the substrate, and the insulating material layer at least fills the trench;

[0031] S42, The insulating material layer is ground using CMP process to obtain the insulating layer with a flat surface.

[0032] Optionally, the passivation layer is a silicon oxide layer or a silicon nitride layer; the insulating layer is a silicon oxide layer or a silicon nitride layer.

[0033] Furthermore, the thickness of the passivation layer is between 80 Å and 200 Å.

[0034] Optionally, the optical components in step S6 include a filter array and microlenses.

[0035] Optionally, the fabrication method further includes a packaging step based on the structure obtained in step S7, wherein the packaging structure is in direct contact with the passivation layer. Further, the trench extends inward from the first surface of the peripheral region to expose the corresponding wiring layer of the peripheral region, and conductive layers are formed on the sidewalls and bottom wall of the trench.

[0036] Furthermore, the conductive layer extends to a predetermined length on the substrate surface adjacent to the trench; the conductive layer is also formed on the bottom and sidewalls of the pad.

[0037] Optionally, the optical components of the photoelectric conversion pixel further include a light-shielding grid, which is fabricated using the same process as the conductive layer.

[0038] Optionally, the pixel region has light-shielding pixels, and the light-shielding layer on the light-shielding pixels is prepared using the same process as the conductive layer.

[0039] Optionally, the conductive layer is a metal conductive layer, the material of which includes tungsten, and the material of the bonding pad includes aluminum.

[0040] As described above, the image sensor fabrication method of the present invention moves the step of opening the solder pads from the completion of the structure fabrication of the pixel area and the peripheral area to before the trench filling and partial optical component fabrication processes. In the same deposition process for filling the trenches, the insulating layer for filling the trenches is used as a protective cap layer for the solder pads to avoid damage to the solder pads during subsequent fabrication of optical components. Finally, the insulating layer of the trench area and the insulating layer of the solder pad area are etched using the same etching process to open the solder pads. This effectively avoids the deposition of a low-temperature oxide layer, achieving a damage-free opening process for the solder pads. In addition, an extra mask layer is added to remove the low-temperature oxide layer in the peripheral area, improving the reliability of the packaged product and reducing manufacturing costs. Attached Figure Description

[0041] Figures 1 to 4 The diagram shows the cross-sectional structure of each step in the process of removing the low-temperature oxide layer after opening the pad during the fabrication of a scaled-down image sensor.

[0042] Figures 5 to 16 The diagram shows a cross-sectional view of each step in the fabrication process of the image sensor of the present invention.

[0043] Component designation explanation

[0044] 20 base

[0045] 200 pixel area

[0046] 201 Outer Area

[0047] 202 Conductive trench

[0048] 203 Low-temperature oxide layer

[0049] 204 solder pads

[0050] 205 photoresist layer

[0051] 10 base

[0052] 100 pixel area

[0053] 101 Outer Area

[0054] 102 Trench

[0055] 103 solder pad

[0056] 104 conductive layer

[0057] 105 Wiring Layer

[0058] 106 First Page

[0059] 107 Second page

[0060] 11. Passivation layer

[0061] 12 First photoresist layer

[0062] 13 Insulation layer

[0063] 14 Second photoresist layer

[0064] 15 Third photoresist layer

[0065] 16 Optical Components

[0066] 160 microlenses

[0067] 17. Trench isolation Detailed Implementation

[0068] The following specific examples illustrate the embodiments of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. For ease of explanation, when detailing the embodiments of the present invention, the cross-sectional views showing the device structure are partially enlarged, not according to the general scale, and the schematic diagrams are merely examples and should not limit the scope of protection of the present invention. Furthermore, in actual manufacturing, the three-dimensional spatial dimensions of length, width, and depth should be included.

[0069] For ease of description, spatial relation terms such as "below," "below," "lower than," "below," "above," and "upper" may be used herein to describe the relationship between an element or feature shown in the accompanying drawings and other elements or features. It will be understood that these spatial relation terms are intended to include directions other than those depicted in the drawings for the device in use or operation. Furthermore, when a layer is referred to as being "between" two layers, it may be the only layer between the two layers, or there may be one or more layers in between. Additionally, "between" as used in this invention includes both endpoint values. In the context of this application, the described structure of a first feature "above" a second feature may include embodiments where the first and second features are formed in direct contact, or embodiments where additional features are formed between the first and second features, such that the first and second features may not be in direct contact.

[0070] Please see Figures 1 to 16 It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the illustrations only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0071] like Figures 1 to 4 The image shows an example of the process of removing the low-temperature oxide layer after opening the solder pads during the fabrication of a CMOS image sensor. Figure 1 As shown, the substrate 20 includes a pixel region 200 and a peripheral region 201. Conductive trenches 202 and solder pads 204 are formed in the peripheral region 201. The pixel region 200 includes multiple photoelectric conversion pixels and corresponding optical components. Before packaging or CP testing, the solder pads 204 in the peripheral region 201 need to be opened, and the microlenses of the pixel region 200 must not be damaged during the opening process. This is achieved by first forming a low-temperature oxide layer 203 on the front side of the substrate 20. This low-temperature oxide layer 203 can be used to protect the pixels during the opening of the solder pads 204. The microlens in region 200 remains undamaged. However, after opening the pad 204, the low-temperature oxide layer 203 not only covers the microlens but also forms in the peripheral region 201 outside of the pad 204. During subsequent packaging, the low-temperature oxide layer 203 in this peripheral region 201 will directly contact the packaging structure, but the bonding performance between the two is poor, easily leading to package peeling and reducing product reliability. Therefore, after opening the pad 204, the low-temperature oxide layer 203 in the peripheral region 201 needs to be removed. Figures 2 to 4As shown, a photolithography etching process is generally used to remove the low-temperature oxide layer 203 on the peripheral region 201: first, a photoresist layer 205 is formed, and then the photoresist layer 205 is exposed and developed based on a newly added mask to obtain a patterned photoresist layer 205 (e.g., ...). Figure 2 As shown), the patterned photoresist layer 205 exposes the peripheral region 201; then, a low-temperature oxide layer 203 is etched based on the patterned photoresist layer 205 (as shown). Figure 3 (as shown); finally, remove the patterned photoresist layer 205 (as shown). Figure 4 (As shown). This process requires the deposition of a low-temperature oxide layer 203 and necessitates the addition of an extra mask, increasing manufacturing costs.

[0072] Based on this, the inventors propose a method for fabricating an image sensor. This method can avoid the deposition of a low-temperature oxide layer and also enable the opening of the solder pads. The fabrication method includes the following steps:

[0073] S1, a substrate having opposing first and second surfaces is provided, the substrate including a pixel region and a peripheral region, the pixel region including at least a plurality of photoelectric conversion pixels, the peripheral region extending around the pixel region; wherein, the sidewalls and bottom wall of the trench are formed with conductive layers;

[0074] S2, a passivation layer is formed on the first surface of the substrate;

[0075] S3, Etch to remove the passivation layer on the surface of the solder pad;

[0076] S4, an insulating layer is formed on the first surface of the substrate, and the insulating layer at least fills the trench;

[0077] S5, the insulating layer is etched using an etching process, while retaining the insulating layer in the trench area and the pad area;

[0078] S6, Prepare the optical component of the photoelectric conversion pixel in the pixel region;

[0079] S7, the insulating layer in the trench region and the insulating layer in the pad region are etched using an etching process.

[0080] Furthermore, in step S1, a groove and a solder pad are formed on the first surface of the peripheral region, and the groove extends inward from the first surface of the peripheral region to expose the corresponding wiring layer of the peripheral region.

[0081] The image sensor fabrication method of this embodiment moves the step of opening the solder pads from after the structural fabrication of the pixel area and the peripheral area is completed to before the trench filling and partial optical component fabrication processes. In the same deposition process for filling the trenches, the insulating layer for filling the trenches also serves as a protective cap layer for the solder pads to avoid damage to the solder pads caused by subsequent processes such as optical component fabrication. Finally, the insulating layers of the trench area and the solder pad area are etched using the same etching process to open the solder pads. This effectively avoids the deposition of low-temperature oxide layers, achieving a damage-free opening process for the solder pads. In addition, an extra mask layer is added to remove the low-temperature oxide layer in the peripheral area, improving the reliability of the packaged product and reducing manufacturing costs.

[0082] The fabrication method of the image sensor in this embodiment will be described in detail below with reference to the specific accompanying drawings.

[0083] like Figure 5 As shown, step S1 is performed first, providing a substrate 10 having opposing first surfaces 106 and second surfaces 107. The substrate 10 includes a pixel region 100 and a peripheral region 101. The pixel region 100 includes at least a plurality of photoelectric conversion pixels (not shown in the figure), and the peripheral region 101 extends around the pixel region 100. The first surface 106 of the peripheral region 101 has a trench 102 and a bonding pad 103 formed therein. The trench 102 extends inward from the first surface 106 of the peripheral region 101 to expose the corresponding wiring layer 105 of the peripheral region 101. The sidewalls and bottom wall of the trench 102 have conductive layers 104 formed therein. The conductive layer 104 can be used to realize electrical interconnection or electrical lead-out of transistors or the like required between the pixel region and the peripheral region, and can be based on existing interconnection structure layers in the image sensor for wiring interconnection. For example, the trench 102 can be a TSV trench, and interconnection between stacked chips can be realized based on the TSV and its internal conductive layer.

[0084] In the structure of the image sensor, the pixel region 100 includes multiple photoelectric conversion pixels, and generally also includes pixel circuits corresponding to the photoelectric conversion pixels (e.g., components included in 4T, 5T, 6T or other pixel circuits used to control, read out or otherwise manipulate one or more photoelectric conversion pixels) as needed. In this step, the pixel region 100 does not form optical components corresponding to the photoelectric conversion pixels.

[0085] The peripheral area 101 is generally provided with signal lines connecting the photoelectric conversion pixel and external devices, peripheral circuits connected to the photoelectric conversion pixel, solder pads 103, and conductive trenches connecting various circuits. In this step, the sidewalls and bottom walls of the conductive trenches (i.e., trenches 102) are covered with conductive layers, but no insulating layer is used for filling.

[0086] In the fabrication process of the image sensor in this embodiment, the bonding pad 103 can provide electrical contact with one or more components of the image sensor (e.g., the associated control circuitry of one or more photoelectric conversion pixels, or any other component of a prior art image sensor), and can be used for subsequent CP testing or packaging wiring, etc. In one embodiment, one or more bonding pads 103 of the image sensor can be used to couple the image sensor to one or more microcontrollers or processors (e.g., for image sensor operation), memory (e.g., for storing image data), or others.

[0087] As an example, the conductive layer 104 is a metallic conductive layer. The metallic material can be any suitable material for a conductive layer, generally a metallic material with low resistance, such as copper or tungsten. In this embodiment, tungsten is preferred. The pad 103 is preferably made of aluminum.

[0088] like Figure 5 As shown, as an example, the conductive layer 104 extends to a predetermined length on the surface of the substrate 10 adjacent to the trench 102; additionally, the conductive layer 104 is also formed on the bottom wall and sidewalls of the pad 103. Furthermore, the conductive layers 104 located on the bottom and sidewalls of the pad 103, the conductive layers 104 located on the sidewalls and bottom wall of the trench 102, and the conductive layers 104 on the surface of the substrate 10 adjacent to the trench 102 are prepared using the same process.

[0089] As an example, when the optical component of the photoelectric conversion pixel in the pixel region 100 includes a light-shielding grille, the light-shielding grille and the conductive layer 104 are fabricated using the same process. Furthermore, the pixel region 100 also has light-shielding pixels for realizing black level (BLC) detection of the image sensor, and the light-shielding layer on the corresponding light-shielding pixel is fabricated using the same process as the conductive layer 104 on the surface of the substrate 10 adjacent to the trench 102.

[0090] like Figure 5 As shown, step S2 is then performed to form a passivation layer 11 on the first surface 106 of the substrate 10.

[0091] The passivation layer 11 can be prepared using existing conventional passivation layer preparation processes, such as CVD, PVD, ALD, electrochemical processes, or spin coating processes. The passivation layer 11 is generally made of an insulating material, such as silicon oxide, silicon nitride, aluminum oxide, or other high-k materials. In this embodiment, the passivation layer 11 is selected as a silicon oxide layer or a silicon nitride layer, with a thickness generally selected to be 80 Å to 200 Å, for example, 100 Å, 120 Å, 150 Å, or 180 Å. The passivation layer can be a material layer formed on the surface of the bonding pads during the image sensor fabrication process; for example, it can be an insulating layer on the light-shielding grid of the pixel area, or it can be other material layers formed on the surface of the bonding pads during the process that need to be removed.

[0092] like Figure 8 As shown, step S3 is then performed to etch away the passivation layer 11 on the surface of the solder pad 103.

[0093] This step moves the opening process of the solder pad 103 forward to before the fabrication process of the conductive trench and some optical components of the image sensor. Since the microlens has not yet been formed at this time, the deposition process of the low-temperature oxide layer is avoided, and the opening of the solder pad 103 can be achieved directly.

[0094] As a specific example, the photolithography etching process is used to open the bonding pad 103. The specific method includes:

[0095] like Figure 6 and Figure 7 As shown, step S31 is performed first, a first photoresist layer 12 is coated on the passivation layer 11 and patterned, and the patterned first photoresist layer 12 exposes the passivation layer 11 on the surface of the pad 103.

[0096] like Figure 7 As shown, then step S32 is performed, whereby the passivation layer 11 is etched based on the patterned first photoresist layer 12 until the surface of the pad 103 is exposed;

[0097] like Figure 8 As shown, step S33 is performed to remove the patterned first photoresist layer 12, resulting in the pad 103 with the surface passivation layer 11 removed.

[0098] like Figure 9 As shown, step S4 is then performed, in which an insulating layer 13 is formed on the first surface 106 of the substrate 10, and the insulating layer 13 at least fills the trench 102. Further, the insulating layer 13 fills the trench 102 and covers the solder pad 103.

[0099] The insulating layer 13 can be formed using a process with strong pore-filling capabilities, such as CVD. The insulating layer 13 is generally made of an insulating material, such as silicon oxide or silicon nitride.

[0100] As a preferred example, the insulating layer 13 is a flat-surfaced insulating layer, and the method for forming the flat-surfaced insulating layer includes:

[0101] S41, an insulating material layer is formed on the first surface 106 of the substrate 10, and the insulating material layer at least fills the trench 102;

[0102] S42, The insulating material layer is ground using CMP process to obtain the insulating layer 13 with a flat surface.

[0103] like Figure 12 As shown, step S5 is then performed, in which the insulating layer 13 is etched using an etching process, while retaining the insulating layer 13 in the trench 102 region and the pad 103 region.

[0104] The insulating layer 13 retained in the area of ​​the solder pad 103 serves as a protective layer for the solder pad 103 in subsequent processes (e.g., fabrication of the remaining optical components).

[0105] like Figure 13 As shown, step S6 is then performed to fabricate the remaining optical components 16 of the photoelectric conversion pixel in the pixel region 100. In this step, the solder pad 103 is carried out under the protection of the insulating layer 13 thereon.

[0106] As an example, in an image sensor, the optical component 16 may include a filter array, microlens, metal grid, light-shielding layer, etc., depending on the specific design requirements. In this embodiment, the metal grid and light-shielding grid are selected to be prepared using the same process as the conductive layer 104. This step mainly completes the preparation of the remaining optical components such as the filter array and microlens.

[0107] like Figure 16 As shown, the final step S7 is performed, in which the insulating layer 13 in the trench 102 region and the insulating layer 13 in the pad 103 region are etched using an etching process.

[0108] As a preferred example, both this step and step S5 are implemented using photolithography etching. Since the etching areas of this step and step S5 are complementary—that is, the area etched in step S5 is the area outside the trench and pad areas, while the area etched in this step is the trench and pad areas—the same photolithographic mask can be used for both steps to achieve the exposure process. Furthermore, filling the trench 102 using photolithography etching in step S5 also requires a mask. Therefore, in step S5, the mask used for filling the insulating layer 13 on the pad 103 and the insulating layer 13 in the trench 102 is fused into a single mask. Thus, no additional mask is needed. That is, only the mask required for filling the trench 102 using the conventional photolithography etching process in step S5 needs to be modified to include a mask for the insulating layer 13 on the pad 103 to achieve steps S5 and S7, effectively reducing the manufacturing cost of the mask. Therefore, since both steps S5 and S7 employ photolithography etching processes and use the same photomask for the exposure process, it is preferable that the chemical reaction mechanisms of the photoresist layers used in the photolithography etching processes of steps S5 and S7 are opposite. That is, when step S5 uses a positive photoresist, then step S7 uses a negative photoresist; and when step S5 uses a negative photoresist, then step S7 uses a positive photoresist. Of course, in other embodiments, steps S5 and S7 can also be implemented using other processes, different photomasks can be used, or both can use positive photoresist to perform the etching process.

[0109] As a specific example, step S5, which involves etching the insulating layer 13 using a photolithography etching process, includes:

[0110] S51, such as Figure 10 and Figure 11 As shown, a second photoresist layer 14 is coated on the insulating layer 13, and the second photoresist layer 14 is exposed and developed based on a mask. The patterned second photoresist layer 14 exposes the insulating layer 13 except for the trench 102 region and the pad 103 region.

[0111] S52, as shown in 12, the insulating layer 13 is etched based on the patterned second photoresist layer 14;

[0112] S53, as shown in 12, the patterned second photoresist layer 14 is removed to obtain the insulating layer 13 remaining in the trench 102 region and the pad 103 region.

[0113] Furthermore, both steps S5 and S7 employ photolithography etching processes and use the same photolithographic mask to achieve the exposure process. Step S7, which uses photolithography etching to etch the insulating layer 13 in the trench 102 region and the insulating layer 13 in the pad 103 region, includes:

[0114] S71, such as Figure 14 and Figure 15 As shown, a third photoresist layer 15 is coated on the obtained structure, and the third photoresist layer 15 is exposed and developed based on the mask used in step S51. The patterned third photoresist layer 15 exposes the insulating layer 13 in the trench 102 region and the pad 103 region.

[0115] S72, such as Figure 16 As shown, the insulating layer 13 is etched based on the patterned third photoresist layer 15; wherein the etching removes the insulating layer 13 in the pad 103 region and the insulating layer 13 of a predetermined thickness in the trench 102 region;

[0116] S73, such as Figure 16 As shown, the patterned third photoresist layer 15 is removed.

[0117] As an example, step S7 is followed by a step of encapsulating the resulting structure, with the encapsulated structure in direct contact with the passivation layer 11. Since the use of a low-temperature oxide layer is avoided, the encapsulation material directly contacts the passivation layer 11 during the encapsulation process, effectively improving encapsulation reliability and product encapsulation quality.

[0118] Of course, in other embodiments, steps S5 and S7 can also be implemented using other processes.

[0119] In summary, this invention provides a method for fabricating an image sensor. By moving the step of opening the solder pads from the completion of the pixel region and peripheral region structure fabrication to before the trench filling and partial optical component fabrication processes, and by using the insulating layer of the trench filling process as a protective cap layer for the solder pads in the same deposition process, the solder pads are prevented from being damaged by subsequent optical component fabrication processes. Finally, the insulating layers of the trench region and the solder pad region are etched using the same etching process to open the solder pads. This effectively avoids the deposition of a low-temperature oxide layer, achieving a damage-free opening process for the solder pads. Furthermore, the addition of an extra mask layer to remove the low-temperature oxide layer in the peripheral region improves the reliability of the packaged product and reduces manufacturing costs. Therefore, this invention effectively overcomes the various shortcomings of the prior art and has high industrial applicability.

[0120] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A method for fabricating an image sensor, characterized in that, The preparation method includes the following steps: S1, a substrate having opposing first and second surfaces is provided, the substrate including a pixel region and a peripheral region, the pixel region including at least a plurality of photoelectric conversion pixels, and the peripheral region surrounding the pixel region; wherein, the first surface of the peripheral region is formed with trenches and pads; S2, a passivation layer is formed on the first surface of the substrate; S3, Etch to remove the passivation layer on the surface of the solder pad; S4, an insulating layer is formed on the first surface of the substrate, and the insulating layer at least fills the trench; S5, the insulating layer is etched using an etching process, while retaining the insulating layer in the trench area and the pad area; S6, Prepare the remaining optical components of the photoelectric conversion pixel in the pixel region; S7, the insulating layer in the trench region and the insulating layer in the pad region are etched using an etching process.

2. The method for fabricating an image sensor according to claim 1, characterized in that: In step S5, the insulating layer is etched using a photolithography etching process, and in step S7, the insulating layer of the trench region and the pad region is etched using a photolithography etching process based on the same photolithography mask as in step S5.

3. The method for fabricating an image sensor according to claim 2, characterized in that: The chemical reaction mechanisms of the photoresist layer used in the photolithography etching processes of steps S5 and S7 are opposite.

4. The method for fabricating an image sensor according to claim 3, characterized in that, Step S5, the method for etching the insulating layer based on photolithography etching process, includes: S51, a second photoresist layer is coated on the insulating layer, and the second photoresist layer is exposed and developed based on a mask, so that the patterned second photoresist layer exposes the insulating layer except for the trench region and the pad region; S52, etching the insulating layer based on the patterned second photoresist layer; S53, remove the patterned second photoresist layer to obtain the insulating layer retained in the trench region and the pad region; Step S7 involves etching the insulating layer in the trench region and the insulating layer in the pad region using photolithography. S71, a third photoresist layer is coated on the obtained structure, and the third photoresist layer is exposed and developed based on the mask used in step S51, and the patterned third photoresist layer exposes the insulating layer of the trench region and the pad region. S72, the insulating layer is etched based on the patterned third photoresist layer; wherein the etching removes the insulating layer in the pad region and the insulating layer of a predetermined thickness in the trench region; S73, Remove the patterned third photoresist layer.

5. The method for fabricating an image sensor according to claim 1, characterized in that, Step S3, the method for etching away the passivation layer on the surface of the solder pad, includes: S31, a first photoresist layer is coated on the passivation layer and patterned thereon, the patterned first photoresist layer exposing the passivation layer on the surface of the solder pad; S32, based on the patterned first photoresist layer, the passivation layer is etched to expose the surface of the solder pad; S33, Remove the patterned first photoresist layer.

6. The method for fabricating an image sensor according to claim 1, characterized in that, The insulating layer formed in step S4 is a flat insulating layer, and the method for forming the flat insulating layer includes: S41, an insulating material layer is formed on the first surface of the substrate, and the insulating material layer at least fills the trench; S42, The insulating material layer is ground using CMP process to obtain the insulating layer with a flat surface.

7. The method for fabricating an image sensor according to claim 1, characterized in that: The passivation layer is a silicon oxide layer or a silicon nitride layer; the insulating layer is a silicon oxide layer or a silicon nitride layer.

8. The method for fabricating an image sensor according to claim 1, characterized in that: The thickness of the passivation layer is between 80 Å and 200 Å.

9. The method for fabricating an image sensor according to claim 1, characterized in that: The optical components mentioned in step S6 include a filter array and microlenses.

10. The method for fabricating an image sensor according to claim 1, characterized in that: The preparation method further includes a step of encapsulating the structure obtained in step S7, wherein the encapsulation structure is in direct contact with the passivation layer.

11. The method for fabricating an image sensor according to any one of claims 1-10, characterized in that: The trench extends inward from the first surface of the peripheral region to expose the corresponding wiring layer of the peripheral region, and the sidewalls and bottomwalls of the trench are formed with conductive layers.

12. The method for fabricating an image sensor according to claim 11, characterized in that: The conductive layer also extends to a predetermined length on the substrate surface adjacent to the trench; the conductive layer is also formed on the bottom and sidewalls of the pad.

13. The method for fabricating an image sensor according to claim 11, characterized in that: The optical components of the photoelectric conversion pixel also include a light-shielding grid, which is fabricated using the same process as the conductive layer; And / or, the pixel region has light-shielding pixels, and the light-shielding layer on the light-shielding pixels is prepared based on the same process as the conductive layer.

14. The method for fabricating an image sensor according to claim 11, characterized in that: The conductive layer is a metal conductive layer, and the material of the metal conductive layer includes tungsten, while the material of the solder pad includes aluminum.