High reflectivity red micro LED chip and preparation method thereof
Patent Information
- Application Number
- CN202610814284.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-06-08
- Publication Date
- 2026-09-22
AI Technical Summary
[0003]现有技术中,传统的红光Micro LED芯片其制备手法通常在N型GaAs接触层表面蒸镀N型欧姆电极接触层,然后利用N型欧姆电极接触层做掩膜,将其他位置N型GaAs接触层湿法刻蚀漏出下方N型半导体层,在N型半导体层表面蒸镀DBR(分布式布拉格反射镜)作为DBR层,但重掺杂的N型GaAs接触层会强烈吸收有源发光层发出的620~625 nm红光,降低出光效率;传统的红光Micro LED芯片只有单个反射结构(DBR层),DBR层的高反射率只在特定的入射角度范围内(通常接近垂直入射)最优,当光线大角度入射时,反射峰会发生蓝移,导致反射率急剧下降
[0006] Compared with the prior art, the beneficial effects of the present invention are as follows: By removing the N-type GaAs contact layer above the N-type semiconductor layer, and then using magnetron sputtering to magnetron sputter a layer of indium tin oxide as an ITO layer on the N-type semiconductor layer, the absorption of 620nm~625nm red light emitted by the active light-emitting layer by the N-type GaAs contact layer is reduced, thereby improving the light extraction efficiency; by coating photoresist on the ITO layer, and then removing part of the photoresist by exposure and development to expose the ITO layer below the photoresist, and then using electron beam evaporation to sequentially deposit Cr on the exposed ITO layer. The process involves using metals such as Au, Ti, Pt, and Ti, followed by a lift-off process to remove the metals and photoresist from the photoresist layer, forming an N-type ohmic electrode contact layer. The Au metal in the N-type ohmic electrode contact layer serves as an Au mirror structure, becoming the first reflective structure of the active light-emitting layer. The DBR layer fabricated on top of the semi-finished product after step S5 becomes the second reflective structure of the active light-emitting layer. By adding an extra reflective structure to the original single reflective structure, the reflectivity of light at large angles is further improved, further enhancing the chip's light extraction efficiency.
Smart Images

Figure CN122803458A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor technology, and in particular to a high-reflectivity red-light Micro LED chip and its fabrication method. Background Technology
[0002] Due to its structural characteristics, red-light Micro LED epitaxy requires the growth of an N-type GaAs contact layer on top of the N-type semiconductor layer.
[0003] In existing technologies, traditional red Micro LED chips are typically fabricated by depositing an N-type ohmic electrode contact layer on the surface of an N-type GaAs contact layer. Then, using the N-type ohmic electrode contact layer as a mask, other N-type GaAs contact layers are wet-etched to expose the underlying N-type semiconductor layer. A DBR (distributed Bragg mirror) is then deposited on the surface of the N-type semiconductor layer as the DBR layer. However, the heavily doped N-type GaAs contact layer strongly absorbs the 620-625 nm red light emitted by the active light-emitting layer, reducing the light extraction efficiency. Traditional red Micro LED chips only have a single reflective structure (DBR layer). The high reflectivity of the DBR layer is only optimal within a specific incident angle range (usually close to perpendicular incident). When light is incident at a large angle, the reflection peak undergoes a blue shift, resulting in a sharp decrease in reflectivity. Summary of the Invention
[0004] Therefore, the purpose of this invention is to provide a high-reflectivity red light Micro LED chip and its fabrication method, which can effectively solve the shortcomings of the prior art.
[0005] A method for fabricating a high-reflectivity red Micro LED chip, comprising: S1. Provide a GaAs substrate, and sequentially prepare an N-type GaAs contact layer, an N-type semiconductor layer, an active light-emitting layer and a P-type semiconductor layer on the GaAs substrate. Peel off the GaAs substrate to form a red light epitaxial layer. S2. A sapphire substrate is provided, a bonding layer is prepared on the sapphire substrate, and the red epitaxial layer is bonded on top of the bonding layer, wherein the P-type semiconductor layer is disposed close to the bonding layer; S3. After step S2 is completed, a P-type ohmic electrode contact layer is prepared on the top of the semi-finished product; S4. Remove the N-type GaAs contact layer above the N-type semiconductor layer, and then magnetron sputter a layer of indium tin oxide as an ITO layer on the N-type semiconductor layer; S5. Coat the ITO layer with photoresist, then remove part of the photoresist by exposure and development to expose the ITO layer below the photoresist. Then, deposit Cr metal, Au metal, Ti metal, Pt metal and Ti metal in sequence on the exposed ITO layer. Then remove the metal and photoresist on the photoresist to form the N-type ohmic electrode contact layer. S6. Prepare an ALD layer and a DBR layer on top of the semi-finished product after completing step S5. S7. Prepare P-type DBR vias and N-type DBR vias on the DBR layer; S8. Prepare P-type contact electrodes and N-type contact electrodes on the DBR layer, the P-type DBR via, and the N-type DBR via.
[0006] Compared with the prior art, the beneficial effects of the present invention are as follows: By removing the N-type GaAs contact layer above the N-type semiconductor layer, and then using magnetron sputtering to magnetron sputter a layer of indium tin oxide as an ITO layer on the N-type semiconductor layer, the absorption of 620nm~625nm red light emitted by the active light-emitting layer by the N-type GaAs contact layer is reduced, thereby improving the light extraction efficiency; by coating photoresist on the ITO layer, and then removing part of the photoresist by exposure and development to expose the ITO layer below the photoresist, and then using electron beam evaporation to sequentially deposit Cr on the exposed ITO layer. The process involves using metals such as Au, Ti, Pt, and Ti, followed by a lift-off process to remove the metals and photoresist from the photoresist layer, forming an N-type ohmic electrode contact layer. The Au metal in the N-type ohmic electrode contact layer serves as an Au mirror structure, becoming the first reflective structure of the active light-emitting layer. The DBR layer fabricated on top of the semi-finished product after step S5 becomes the second reflective structure of the active light-emitting layer. By adding an extra reflective structure to the original single reflective structure, the reflectivity of light at large angles is further improved, further enhancing the chip's light extraction efficiency.
[0007] Furthermore, an IS1 step is provided between step S7 and step S8, and the IS1 step specifically includes: S7.1. Coat the surface of the semi-finished product after completing step S7 with positive photoresist; S7.2. Expose the areas of the semi-finished product that need to be etched after completing step S7.1. S7.3. The semi-finished product after completing step S7.2 is developed and heated, and then the photoresist in the exposed area is removed. S7.4 Expose the entire surface of the semi-finished product after completing step S7.3; S7.5. Bake the semi-finished product after completing step S7.4 at 105℃ for 40 minutes. S7.6. Coat the surface of the semi-finished product after completing step S7.5 with negative photoresist; S7.7 Expose the non-etched areas of the semi-finished product after completing step S7.6; S7.8. Perform hot plate and development treatment on the semi-finished product after completing step S7.7, and then remove the photoresist in the non-exposed areas. S7.9. The semi-finished product after completing step S7.8 is etched using the ICP process to completely separate the core.
[0008] Furthermore, step S2 specifically includes: A sapphire substrate is provided, and a SiO2 thin film with a thickness of 1um-1.6um is deposited on the top of the sapphire substrate as a bonding layer. The red epitaxial layer is bonded on the top of the bonding layer, and the P-type semiconductor layer is disposed close to the bonding layer.
[0009] Furthermore, step S3 specifically includes: S3.1. Photoresist is coated on the top of the semi-finished product completed in step S2. Then, exposure and development are used to remove part of the photoresist, exposing the N-type GaAs contact layer under the photoresist. Then, MESA etching process is used to etch to a depth of 2 μm with the etching gas Cl2 / BCl3 / BrH to remove the exposed N-type GaAs contact layer, the N-type semiconductor layer at the bottom of the N-type GaAs contact layer, and the active light-emitting layer at the bottom of the N-type semiconductor layer, until the P-type semiconductor layer is exposed. Then, the photoresist is removed.
[0010] Furthermore, step S3 also includes: S3.2. Photoresist is coated on the P-type semiconductor layer. Then, a portion of the photoresist is removed by exposure and development. Then, an electron beam evaporation process is used to sequentially deposit Au metal with a thickness of 100 Å, AuBe metal with a thickness of 2000 Å, Au metal with a thickness of 2000 Å, and Ti metal with a thickness of 50 Å on the exposed portion of the P-type semiconductor layer. Then, a lift-off process is used to remove the metal and photoresist on the photoresist to form a P-type ohmic contact electrode layer.
[0011] Furthermore, step S6 specifically includes: A 300 Å thick Al2O3 film is prepared on the top of the semi-finished product after completing step S5 using the ALD process as the ALD layer. On the surface of the ALD layer, eight stacks of SiO2 with a thickness of 569 Å and TiO2 with a thickness of 924 Å are sequentially deposited using the electron beam evaporation process to form the DBR layer.
[0012] Furthermore, the reflectivity of the DBR layer is close to 100% in the wavelength range of 550nm-700nm, and the red light center wavelength of the DBR layer is 620nm-625nm.
[0013] Furthermore, step S7 specifically includes: Photoresist is coated on the surface of the DBR layer, and then exposed and developed to remove two parts of the photoresist, exposing the DBR layer underneath. Then, inductively coupled plasma etching is used to remove the exposed two parts of the DBR layer and the ALD layer underneath it until the P-type ohmic electrode contact layer and the N-type ohmic electrode contact layer are exposed. Then, the photoresist is removed to form the P-type DBR via and the N-type DBR via.
[0014] Furthermore, step S8 specifically includes: Photoresist is coated on the DBR layer, the P-type DBR via, and the N-type DBR via. Then, exposure and development are performed to remove part of the photoresist, exposing the P-type DBR via and the N-type DBR via beneath the photoresist. Then, a Ti metal with a thickness of 1000 Å, a Pt metal with a thickness of 1000 Å, and an Au metal with a thickness of 7000 Å are sequentially deposited using an electron beam evaporation process. Then, a lift-off process is used to remove the metal and photoresist on top of the photoresist, forming the P-type contact electrode and the N-type contact electrode.
[0015] On the other hand, the present invention also provides a high reflectivity red light Micro LED chip, which is prepared by the above-described method for preparing a high reflectivity red light Micro LED chip. Attached Figure Description
[0016] Figure 1 This is a flowchart of the fabrication method of the high-reflectivity red Micro LED chip in Embodiment 1 of the present invention; Figure 2 This is a cross-sectional schematic diagram of the high-reflectivity red Micro LED chip in Embodiment 2 of the present invention; Explanation of key component symbols:
[0017] The following detailed description, in conjunction with the accompanying drawings, will further illustrate the present invention. Detailed Implementation
[0018] To facilitate understanding of the present invention, a more complete description will be given below with reference to the accompanying drawings. Several embodiments of the invention are illustrated in the drawings. However, the invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
[0019] It should be noted that when a component is said to be "fixed to" another component, it can be directly on the other component or there may be an intervening component. When a component is said to be "connected to" another component, it can be directly connected to the other component or there may be an intervening component. The terms "vertical," "horizontal," "left," "right," and similar expressions used in this document are for illustrative purposes only.
[0020] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.
[0021] Example 1 Please see Figure 1 Embodiment 1 of the present invention provides a method for fabricating a high-reflectivity red Micro LED chip, comprising: S1. Provide a GaAs substrate, and sequentially prepare an N-type GaAs contact layer, an N-type semiconductor layer 123, an active light-emitting layer 122 and a P-type semiconductor layer 121 on the GaAs substrate. Peel off the GaAs substrate to form a red light epitaxial layer 12. S2. A sapphire substrate 10 is provided, a bonding layer 11 is prepared on the sapphire substrate 10, and the red light epitaxial layer 12 is bonded on the top of the bonding layer 11, wherein the P-type semiconductor layer 121 is disposed close to the bonding layer 11. Furthermore, step S2 specifically includes: A sapphire substrate 10 is provided, and a SiO2 thin film with a thickness of 1um-1.6um is deposited on the top of the sapphire substrate 10 as a bonding layer 11. The red light epitaxial layer 12 is bonded on the top of the bonding layer 11, and the P-type semiconductor layer 121 is disposed close to the bonding layer 11. S3. After step S2 is completed, a P-type ohmic electrode contact layer 13 is prepared on the top of the semi-finished product; Furthermore, step S3 specifically includes: S3.1. Photoresist is coated on the top of the semi-finished product completed in step S2. Then, exposure and development are used to remove part of the photoresist, exposing the N-type GaAs contact layer under the photoresist. Then, MESA etching process is used to etch to a depth of 2 μm with the etching gas Cl2 / BCl3 / BrH to remove the exposed N-type GaAs contact layer, the N-type semiconductor layer 123 at the bottom of the N-type GaAs contact layer, and the active light-emitting layer 122 at the bottom of the N-type semiconductor layer 123, until the P-type semiconductor layer 121 is exposed. Then, the photoresist is removed. Furthermore, step S3 also includes: S3.2. Photoresist is coated on the P-type semiconductor layer 121. Then, a portion of the photoresist is removed by exposure and development. Then, an electron beam evaporation process is used to sequentially deposit Au metal with a thickness of 100 Å, AuBe metal with a thickness of 2000 Å, Au metal with a thickness of 2000 Å, and Ti metal with a thickness of 50 Å on the exposed portion of the P-type semiconductor layer 121. Then, a lift-off process is used to remove the metal and photoresist on the photoresist to form a P-type ohmic contact electrode layer 13. S4. The N-type GaAs contact layer above the N-type semiconductor layer 123 is removed by wet etching, and then an indium tin oxide layer with a thickness of 15nm-60nm is magnetron sputtered on the N-type semiconductor layer 123 as an ITO layer 14. Specifically, in this embodiment, a layer of indium tin oxide with a thickness of 25 nm is magnetron sputtered on the N-type semiconductor layer 123 as an ITO layer 14. S5. The semi-finished product after step S4 is annealed at 550℃ for 5 minutes using the RTA process. Photoresist is coated on the ITO layer 14. Then, exposure and development are used to remove part of the photoresist, exposing the ITO layer 14 below the photoresist. Then, electron beam evaporation is used to sequentially deposit Cr metal with a thickness of 20Å-100Å, Au metal with a thickness of 500Å-2000Å, Ti metal with a thickness of 1000Å, Pt metal with a thickness of 2000Å, and Ti metal with a thickness of 50Å on the exposed ITO layer 14. Then, the metal and photoresist on the photoresist are removed using the lift-off process to form the N-type ohmic electrode contact layer 15. Specifically, in this embodiment, electron beam evaporation is used to sequentially deposit Cr metal with a thickness of 30 Å, Au metal with a thickness of 2000 Å, Ti metal with a thickness of 1000 Å, Pt metal with a thickness of 2000 Å, and Ti metal with a thickness of 50 Å on the exposed ITO layer 14. Then, the metal and photoresist on the photoresist are removed using a lift-off process to form the N-type ohmic electrode contact layer 15. S6. Prepare an ALD layer 16 and a DBR layer 17 on top of the semi-finished product after completing step S5. Furthermore, step S6 specifically includes: A 300 Å thick Al2O3 film is prepared on the top of the semi-finished product after completing step S5 using the ALD process as the ALD layer 16. On the surface of the ALD layer 16, eight stacks of SiO2 with a thickness of 569 Å and TiO2 with a thickness of 924 Å are sequentially deposited using the electron beam evaporation process to form the DBR layer 17. Furthermore, the reflectivity of the DBR layer 17 is close to 100% in the wavelength range of 550nm-700nm, and the red light center wavelength of the DBR layer 17 is 620nm-625nm. S7. Prepare P-type DBR vias 171 and N-type DBR vias 172 on the DBR layer 17; Furthermore, step S7 specifically includes: Photoresist is coated on the surface of the DBR layer 17, and then exposed and developed to remove two parts of the photoresist, exposing the DBR layer 17 under these two parts of the photoresist. Then, the exposed two parts of the DBR layer 17 and the ALD layer 16 at its bottom are removed by inductively coupled plasma etching until the P-type ohmic electrode contact layer 13 and the N-type ohmic electrode contact layer 15 are exposed. Then, the photoresist is removed to form the P-type DBR via 171 and the N-type DBR via 172. It should be noted that current products typically use a positive and negative photoresist process to achieve a larger light-emitting area. The specific process is as follows: positive photoresist coating → exposure → development → baking → negative photoresist coating → exposure → development (Q-time > 6h) → ICP etching. During exposure, the underlying positive photoresist is affected by the exposure energy and undergoes a photodecomposition reaction. The change in molecular structure releases nitrogen gas (N2). Because the surface is covered with a layer of negative photoresist, the N2 can only be released slowly. If the Q-time is too short, the baking of the hot plate during the negative photoresist development process will exacerbate the release of N2 from the positive photoresist. The N2 passes through the negative photoresist and is released, resulting in concave defects on the photoresist surface. The photoresist is thinner at the concave area, and the amount of photoresist is insufficient during the ICP etching process, which damages the epitaxial surface and affects the overall wafer yield. Furthermore, an IS1 step is provided between step S7 and step S8, and the IS1 step specifically includes: S7.1. Coat the surface of the semi-finished product after completing step S7 with positive photoresist; S7.2. Expose the areas of the semi-finished product that need to be etched after completing step S7.1. S7.3. The semi-finished product after completing step S7.2 is developed and heated, and then the photoresist in the exposed area is removed. S7.4 Expose the entire surface of the semi-finished product after completing step S7.3; It should be noted that the exposure time in step S7.4 is 20 minutes; Understandably, after a 20-minute overall exposure of the surface of the semi-finished product after step S7.3, all photoactive substances in the photoresist will react completely. S7.5. Bake the semi-finished product after completing step S7.4 at 105℃ for 40 minutes. Understandably, under baking conditions of 105℃ / 40min, the photoresist edges will not collapse, and the time is sufficient for the nitrogen gas generated by the photoresist reaction during baking to be completely released. S7.6. Coat the surface of the semi-finished product after completing step S7.5 with negative photoresist; S7.7 Expose the non-etched areas of the semi-finished product after completing step S7.6; S7.8. Perform hot plate and development treatment on the semi-finished product after completing step S7.7, and then remove the photoresist in the non-exposed areas. S7.9. The semi-finished product after completing step S7.8 is etched using the ICP process to completely separate the core.
[0022] Understandably, the specific process of this solution is as follows: applying positive resist → exposure → development → re-exposure → baking → applying negative resist → exposure → development → ICP etching. In the original technical route, a 20-minute re-exposure process is added before baking to allow the photoactive substances in the positive resist to react completely. During the subsequent baking process, N2 is completely released, and the subsequent development process does not need to wait for Q-time. This can effectively improve the wafer fabrication efficiency while completely eliminating the impact of the negative resist exposure on the bottom positive resist. S8. A P-type contact electrode 181 and an N-type contact electrode 182 are fabricated on the DBR layer 17, the P-type DBR via 171 and the N-type DBR via 172. Furthermore, step S8 specifically includes: Photoresist is coated on the DBR layer 17, the P-type DBR via 171, and the N-type DBR via 172. Then, exposure and development are performed to remove part of the photoresist, exposing the P-type DBR via 171 and the N-type DBR via 172 beneath the photoresist. Then, a Ti metal with a thickness of 1000 Å, a Pt metal with a thickness of 1000 Å, and an Au metal with a thickness of 7000 Å are sequentially deposited using an electron beam evaporation process. Then, a lift-off process is used to remove the metal and photoresist on top of the photoresist, forming the P-type contact electrode 181 and the N-type contact electrode 182.
[0023] Understandably, by removing the N-type GaAs contact layer above the N-type semiconductor layer 123, and then using magnetron sputtering to deposit a 25nm thick layer of indium tin oxide as an ITO layer 14 on the N-type semiconductor layer 123, the absorption of 620nm~625nm red light emitted by the active light-emitting layer 122 by the N-type GaAs contact layer is reduced, thereby improving the light extraction efficiency. Photoresist is coated on the ITO layer 14, and then some of the photoresist is removed by exposure and development, exposing the ITO layer 14 beneath it. Then, electron beam evaporation is used to sequentially deposit a 30Å thick layer of Cr metal and a 2000Å thick layer of As on the exposed ITO layer 14. Au metal, Ti metal with a thickness of 1000 Å, Pt metal with a thickness of 2000 Å, and Ti metal with a thickness of 50 Å are used. Then, the metal and photoresist on the photoresist are removed using a lift-off process to form an N-type ohmic electrode contact layer 15. The Au metal in the N-type ohmic electrode contact layer 15 serves as an Au mirror structure, becoming the first reflective structure of the active light-emitting layer 122. The DBR layer 17 prepared on top of the semi-finished product after completing step S5 becomes the second reflective structure of the active light-emitting layer 122. An additional reflective structure is added on the basis of the original single reflective structure, which further improves the reflectivity when light is incident at a large angle and further improves the chip's light extraction efficiency.
[0024] Example 2 Please see Figure 2 The image shown is a cross-sectional schematic diagram of a high-reflectivity red-light Micro LED chip prepared by the high-reflectivity red-light Micro LED chip preparation method in Embodiment 1 of the present invention.
[0025] Example 3 Embodiment 3 of the present invention provides a method for fabricating a high-reflectivity red Micro LED chip, which differs from Embodiment 1 in that: Specifically, in this embodiment, a layer of indium tin oxide with a thickness of 15 nm is magnetron sputtered on the N-type semiconductor layer 123 as an ITO layer 14.
[0026] Example 4 Embodiment 4 of the present invention provides a method for fabricating a high-reflectivity red Micro LED chip, which differs from Embodiment 1 in that: Specifically, in this embodiment, a layer of indium tin oxide with a thickness of 45 nm is magnetron sputtered on the N-type semiconductor layer 123 as an ITO layer 14.
[0027] Example 5 Embodiment 5 of the present invention provides a method for fabricating a high-reflectivity red Micro LED chip, which differs from Embodiment 1 in that: Specifically, in this embodiment, a 60nm thick layer of indium tin oxide is magnetron sputtered onto the N-type semiconductor layer 123 as an ITO layer 14.
[0028] Example 6 Embodiment 6 of the present invention provides a method for fabricating a high-reflectivity red Micro LED chip, which differs from Embodiment 1 in that: Specifically, in this embodiment, electron beam evaporation is used to sequentially deposit Cr metal with a thickness of 20 Å, Au metal with a thickness of 2000 Å, Ti metal with a thickness of 1000 Å, Pt metal with a thickness of 2000 Å, and Ti metal with a thickness of 50 Å on the exposed ITO layer 14. Then, the metal and photoresist on the photoresist are removed using a lift-off process to form the N-type ohmic electrode contact layer.
[0029] Example 7 Embodiment 7 of the present invention provides a method for fabricating a high-reflectivity red Micro LED chip, which differs from Embodiment 1 in that: Specifically, in this embodiment, electron beam evaporation is used to sequentially deposit Cr metal with a thickness of 50 Å, Au metal with a thickness of 2000 Å, Ti metal with a thickness of 1000 Å, Pt metal with a thickness of 2000 Å, and Ti metal with a thickness of 50 Å on the exposed ITO layer 14. Then, the metal and photoresist on the photoresist are removed using a lift-off process to form the N-type ohmic electrode contact layer.
[0030] Example 8 Embodiment 8 of the present invention provides a method for fabricating a high-reflectivity red Micro LED chip, which differs from Embodiment 1 in that: Specifically, in this embodiment, electron beam evaporation is used to sequentially deposit Cr metal with a thickness of 100 Å, Au metal with a thickness of 2000 Å, Ti metal with a thickness of 1000 Å, Pt metal with a thickness of 2000 Å, and Ti metal with a thickness of 50 Å on the exposed ITO layer 14. Then, the metal and photoresist on the photoresist are removed using a lift-off process to form the N-type ohmic electrode contact layer.
[0031] Example 9 Embodiment 9 of the present invention provides a method for fabricating a high-reflectivity red Micro LED chip, which differs from Embodiment 1 in that: Specifically, in this embodiment, electron beam evaporation is used to sequentially deposit Cr metal with a thickness of 30 Å, Au metal with a thickness of 1000 Å, Ti metal with a thickness of 1000 Å, Pt metal with a thickness of 2000 Å, and Ti metal with a thickness of 50 Å on the exposed ITO layer 14. Then, the metal and photoresist on the photoresist are removed using a lift-off process to form the N-type ohmic electrode contact layer.
[0032] Example 10 Embodiment 10 of the present invention provides a method for fabricating a high-reflectivity red Micro LED chip, which differs from Embodiment 1 in that: Specifically, in this embodiment, electron beam evaporation is used to sequentially deposit Cr metal with a thickness of 30 Å, Au metal with a thickness of 500 Å, Ti metal with a thickness of 1000 Å, Pt metal with a thickness of 2000 Å, and Ti metal with a thickness of 50 Å on the exposed ITO layer 14. Then, the metal and photoresist on the photoresist are removed using a lift-off process to form the N-type ohmic electrode contact layer.
[0033] Comparative Example 1 Comparative Example 1 of this invention provides a method for fabricating a high-reflectivity red-light Micro LED chip, which differs from Example 1 in that: Specifically, in this comparative example, excluding step S4, the thickness of the N-type GaAs contact layer is 40 nm; Specifically, in this comparative example, step S5 is as follows: using an electron beam evaporation process, Au metal with a thickness of 100 Å, AuGeNi metal with a thickness of 1000 Å, Au metal with a thickness of 2000 Å, Pt metal with a thickness of 2000 Å, and Ti metal with a thickness of 50 Å are sequentially deposited on the exposed N-type GaAs contact layer. Then, the metal and photoresist located on the photoresist are removed using a lift-off process to form the N-type ohmic electrode contact layer 15.
[0034] Based on the above-mentioned Examples 1, 3, 4, 5, 6, 7, 8, 9, and 10, a high-reflectivity red Micro LED chip with a size of 50µm*50µm was prepared. A 1mA test current was applied to the high-reflectivity red Micro LED chip with a size of 50µm*50µm prepared in Comparative Example 1, and the chip voltage and brightness were compared. The corresponding test results are shown in the table below:
[0035] It should be noted that, in order to ensure the reliability of the verification results, when comparing the brightness and voltage of the 50um*50um high-reflectivity red Micro LED chips prepared in Examples 1, 3, 4, 5, 6, 7, 8, 9, and 10 of the present invention with the 50um*50um high-reflectivity red Micro LED chip prepared in Comparative Example 1, all other processes and parameters should remain consistent except for the parameters mentioned above.
[0036] In summary, the high-reflectivity red light Micro LED chip and its fabrication method in the above embodiments of the present invention reduce the absorption of 620nm~625nm red light emitted by the active light-emitting layer by removing the N-type GaAs contact layer above the N-type semiconductor layer and then using magnetron sputtering to magnetron sputter a layer of indium tin oxide as an ITO layer on the N-type semiconductor layer, thereby improving the light extraction efficiency. Furthermore, by coating photoresist on the ITO layer and then removing part of the photoresist through exposure and development to expose the ITO layer beneath it, and then using electron beam evaporation to sequentially deposit Cr metal, ... Au metal, Ti metal, Pt metal, and Ti metal are used. Then, the metal and photoresist on the photoresist are removed using a lift-off process to form an N-type ohmic electrode contact layer. The Au metal in the N-type ohmic electrode contact layer serves as an Au mirror structure, becoming the first reflective structure of the active light-emitting layer. The DBR layer prepared on top of the semi-finished product after completing step S5 becomes the second reflective structure of the active light-emitting layer. By adding an extra reflective structure on the basis of the original single reflective structure, the reflectivity when light is incident at a large angle is further improved, and the light extraction efficiency of the chip is further enhanced.
[0037] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.
[0038] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these modifications and improvements all fall within the scope of protection of the present invention. Therefore, the scope of protection of this patent should be determined by the appended claims.
Claims
1. A method for fabricating a high-reflectivity red Micro LED chip, characterized in that, include: S1. Provide a GaAs substrate, and sequentially prepare an N-type GaAs contact layer, an N-type semiconductor layer, an active light-emitting layer and a P-type semiconductor layer on the GaAs substrate. Peel off the GaAs substrate to form a red light epitaxial layer. S2. A sapphire substrate is provided, a bonding layer is prepared on the sapphire substrate, and the red epitaxial layer is bonded on top of the bonding layer, wherein the P-type semiconductor layer is disposed close to the bonding layer; S3. After step S2 is completed, a P-type ohmic electrode contact layer is prepared on the top of the semi-finished product; S4. Remove the N-type GaAs contact layer above the N-type semiconductor layer, and then magnetron sputter a layer of indium tin oxide as an ITO layer on the N-type semiconductor layer; S5. Coat the ITO layer with photoresist, then remove part of the photoresist by exposure and development to expose the ITO layer below the photoresist. Then, deposit Cr metal, Au metal, Ti metal, Pt metal and Ti metal in sequence on the exposed ITO layer. Then remove the metal and photoresist on the photoresist to form the N-type ohmic electrode contact layer. S6. Prepare an ALD layer and a DBR layer on top of the semi-finished product after completing step S5. S7. Prepare P-type DBR vias and N-type DBR vias on the DBR layer; S8. Prepare P-type contact electrodes and N-type contact electrodes on the DBR layer, the P-type DBR via, and the N-type DBR via.
2. The method for fabricating a high-reflectivity red Micro LED chip according to claim 1, characterized in that, An IS1 step is provided between step S7 and step S8, and the IS1 step specifically includes: S7.
1. Coat the surface of the semi-finished product after completing step S7 with positive photoresist; S7.
2. Expose the areas of the semi-finished product that need to be etched after completing step S7.
1. S7.
3. The semi-finished product after completing step S7.2 is developed and heated, and then the photoresist in the exposed area is removed. S7.4 Expose the entire surface of the semi-finished product after completing step S7.3; S7.
5. Bake the semi-finished product after completing step S7.4 at 105℃ for 40 minutes. S7.
6. Coat the surface of the semi-finished product after completing step S7.5 with negative photoresist; S7.7 Expose the non-etched areas of the semi-finished product after completing step S7.6; S7.
8. Perform hot plate and development treatment on the semi-finished product after completing step S7.7, and then remove the photoresist in the non-exposed areas. S7.
9. The semi-finished product after completing step S7.8 is etched using the ICP process to completely separate the core.
3. The method for fabricating a high-reflectivity red Micro LED chip according to claim 1, characterized in that, Step S2 specifically includes: A sapphire substrate is provided, and a SiO2 thin film with a thickness of 1um-1.6um is deposited on the top of the sapphire substrate as a bonding layer. The red epitaxial layer is bonded on the top of the bonding layer, and the P-type semiconductor layer is disposed close to the bonding layer.
4. The method for fabricating a high-reflectivity red Micro LED chip according to claim 1, characterized in that, Step S3 specifically includes: S3.
1. Photoresist is coated on the top of the semi-finished product completed in step S2. Then, exposure and development are used to remove part of the photoresist, exposing the N-type GaAs contact layer under the photoresist. Then, MESA etching process is used to etch to a depth of 2 μm with the etching gas Cl2 / BCl3 / BrH to remove the exposed N-type GaAs contact layer, the N-type semiconductor layer at the bottom of the N-type GaAs contact layer, and the active light-emitting layer at the bottom of the N-type semiconductor layer, until the P-type semiconductor layer is exposed. Then, the photoresist is removed.
5. The method for fabricating a high-reflectivity red Micro LED chip according to claim 4, characterized in that, Step S3 further includes: S3.
2. Photoresist is coated on the P-type semiconductor layer. Then, a portion of the photoresist is removed by exposure and development. Then, an electron beam evaporation process is used to sequentially deposit Au metal with a thickness of 100 Å, AuBe metal with a thickness of 2000 Å, Au metal with a thickness of 2000 Å, and Ti metal with a thickness of 50 Å on the exposed portion of the P-type semiconductor layer. Then, a lift-off process is used to remove the metal and photoresist on the photoresist to form a P-type ohmic contact electrode layer.
6. The method for fabricating a high-reflectivity red Micro LED chip according to claim 1, characterized in that, Step S6 specifically includes: A 300 Å thick Al2O3 film is prepared on the top of the semi-finished product after completing step S5 using the ALD process as the ALD layer. On the surface of the ALD layer, eight stacks of SiO2 with a thickness of 569 Å and TiO2 with a thickness of 924 Å are sequentially deposited using the electron beam evaporation process to form the DBR layer.
7. The method for fabricating a high-reflectivity red Micro LED chip according to claim 6, characterized in that, The DBR layer has a reflectivity of nearly 100% in the wavelength range of 550nm-700nm, and the red light center wavelength of the DBR layer is 620nm-625nm.
8. The method for fabricating a high-reflectivity red Micro LED chip according to claim 1, characterized in that, Step S7 specifically includes: Photoresist is coated on the surface of the DBR layer, and then exposed and developed to remove two parts of the photoresist, exposing the DBR layer underneath. Then, inductively coupled plasma etching is used to remove the exposed two parts of the DBR layer and the ALD layer underneath it until the P-type ohmic electrode contact layer and the N-type ohmic electrode contact layer are exposed. Then, the photoresist is removed to form the P-type DBR via and the N-type DBR via.
9. The method for fabricating a high-reflectivity red Micro LED chip according to claim 1, characterized in that, Step S8 specifically includes: Photoresist is coated on the DBR layer, the P-type DBR via, and the N-type DBR via. Then, exposure and development are performed to remove part of the photoresist, exposing the P-type DBR via and the N-type DBR via beneath the photoresist. Then, a Ti metal with a thickness of 1000 Å, a Pt metal with a thickness of 1000 Å, and an Au metal with a thickness of 7000 Å are sequentially deposited using an electron beam evaporation process. Then, a lift-off process is used to remove the metal and photoresist on top of the photoresist, forming the P-type contact electrode and the N-type contact electrode.
10. A high-reflectivity red Micro LED chip, characterized in that, It is prepared by the method for preparing a high reflectivity red light Micro LED chip according to any one of claims 1-9.