Manufacturing method of red Micro LED chip and red Micro LED chip

Abstract

The application provides a red light Micro LED chip manufacturing method and a red light Micro LED chip, and relates to the chip technical field.The red light Micro LED chip manufacturing method comprises the following steps: preparing a red light epitaxial wafer, the red light epitaxial wafer comprising a light-emitting layer and a first epitaxial layer arranged in sequence; preparing an ITO transparent electrode on the first epitaxial layer; etching the ITO transparent electrode and the first epitaxial layer by using a dry etching method, and etching the light-emitting layer by using a wet etching method to form a Mesa array. The dry etching method for etching the ITO transparent electrode and the first epitaxial layer can prevent the light-emitting layer from being damaged, the light-emitting layer is etched by using the wet etching method, the wet etching method has no physical bombardment effect, and the light-emitting layer can be prevented from being damaged, so that the etching sidewall defects of the red light Micro LED chip are reduced, and the light-emitting efficiency and reliability of the red light Micro LED chip are improved.

Description

Technical Field

[0001] This invention relates to the field of chip technology, and in particular to a method for manufacturing a red Micro LED chip and a red Micro LED chip. Background Technology

[0002] In recent years, Micro LED has become a hot topic in the LED industry due to its self-emissive, high-brightness, long-life and low-power characteristics.

[0003] Currently, blue and green Micro LED chip technologies are basically mature, but red Micro LED chips have been hindering the progress of Micro LED full-color displays due to their poor epitaxial light-emitting materials, chip processes, power consumption, brightness, and reliability.

[0004] In the existing technology, the commonly used red Micro LED chip is the quaternary AlGaInP red light solution, in which the P / N electrodes are set on the same side. After the size is miniaturized, the sidewall effect caused by ICP etching damage is aggravated, which will lead to a sharp drop in efficiency. Summary of the Invention

[0005] The purpose of this invention is to provide a method for manufacturing red Micro LED chips, so as to solve the technical problem that the sidewall effect of Micro LED chips is aggravated by ICP etching damage in the prior art.

[0006] The method for manufacturing a red Micro LED chip provided by this invention includes the following steps: A red-light epitaxial wafer is prepared, comprising a light-emitting layer and a first epitaxial layer sequentially disposed therefrom; An ITO transparent electrode is fabricated on the first epitaxial layer; The ITO transparent electrode and the first epitaxial layer are etched using a dry etching method, and the light-emitting layer is etched using a wet etching method to form the Mesa array.

[0007] Furthermore, the dry etching method includes ICP etching; in the ICP etching step: the main etching gas is Cl2 / BCl3, the ratio of ICP power to RF power is >2, the temperature is 15℃-25℃, and the cavity pressure is 5mTorr-20mTorr.

[0008] Furthermore, in the wet etching step: the wet etching solution is a mixed solution of liquid bromine, H2O and HBr.

[0009] Furthermore, in the wet etching step: the mass content of liquid bromine is 0.2%-1%, the mass content of HBr is 1%-9%, and after the wet etching solution is prepared and allowed to stand for 12 hours, wet etching is carried out at room temperature using the wet etching solution.

[0010] Furthermore, the preparation of red-light epitaxial wafers includes: An etching stop layer, an N-GaAs ohmic layer, a first current spreading layer, a first waveguide layer, a light-emitting layer, and a first epitaxial layer are sequentially grown on a temporary substrate.

[0011] Furthermore, fabricating an ITO transparent electrode on the first epitaxial layer includes: depositing an ITO transparent electrode on the P-ohmic layer of the first epitaxial layer.

[0012] Furthermore, it also includes the following steps: The driving substrate and the red light epitaxial wafer are aligned and mixed for bonding; Remove the temporary substrate and etch stop layer; Remove the N-GaAs ohmic layer that is positioned opposite to the luminescent layer, and retain the N-GaAs ohmic layer surrounding the luminescent layer; Preparation of N-face contact metal: Fabrication of the first ohmic contact electrode on the N-GaAs ohmic layer.

[0013] Furthermore, it also includes the following steps: Roughen the first current spreading layer: Roughen the first current spreading layer on the outside of the first ohmic contact electrode.

[0014] Another objective of this invention is to provide a red Micro LED chip, which is prepared by the red Micro LED chip manufacturing method provided by this invention. The red Micro LED chip includes a driving substrate, a hybrid bonding layer, and a red epitaxial wafer arranged sequentially.

[0015] Furthermore, the red-light epitaxial wafer comprises an N-GaAs ohmic layer, a first current spreading layer, a first waveguide layer, a light-emitting layer, and a first epitaxial layer arranged sequentially. The N-GaAs ohmic layer is disposed outside the light-emitting layer, and the first ohmic contact electrode is disposed on the N-GaAs ohmic layer.

[0016] The present invention provides a method for manufacturing a red Micro LED chip, comprising the following steps: preparing a red epitaxial wafer, the red epitaxial wafer comprising a light-emitting layer and a first epitaxial layer sequentially disposed thereon; preparing an ITO transparent electrode on the first epitaxial layer; etching the ITO transparent electrode and the first epitaxial layer using a dry etching method; and etching the light-emitting layer using a wet etching method to form a Mesa array. Dry etching of the ITO transparent electrode and the first epitaxial layer prevents damage to the light-emitting layer. Wet etching of the light-emitting layer, without physical bombardment, also prevents damage to the light-emitting layer, thereby reducing sidewall defects in the red Micro LED chip and improving its luminous efficiency and reliability. Attached Figure Description

[0017] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0018] Figure 1 This is a schematic diagram of the structure of the red Micro LED chip provided in an embodiment of the present invention; Figure 2 This is a schematic diagram of the structure of a red Micro LED chip after the step of etching the ITO transparent electrode and the first epitaxial layer using a dry etching method is completed, according to an embodiment of the present invention. Figure 3 This is a schematic diagram of the structure of a red Micro LED chip after the wet etching process for etching the light-emitting layer is completed, as provided in an embodiment of the present invention. Figure 4 This is a schematic diagram of the structure of a red Micro LED chip after the removal of the corrosion stop layer step provided in an embodiment of the present invention; Figure 5 This is a schematic diagram of the structure of a red Micro LED chip after the N-side contact metal preparation step is completed, as provided in an embodiment of the present invention. Figure 6 This is a flowchart of the red Micro LED chip manufacturing method provided in the embodiments of the present invention.

[0019] Icons: 1-Driving substrate; 2-Driving side dielectric layer; 3-Driving side interconnect copper pillar; 4-Hybrid bonding cross section; 5-Red light epitaxial side dielectric layer; 6-Red light epitaxial side interconnect copper pillar; 7-Metallic reflective layer; 8-PA layer; 9-ITO transparent electrode; 10-First epitaxial layer; 11-Light emitting layer; 12-First waveguide layer; 13-First current spreading layer; 14-Pyramid structure; 15-N-GaAs ohmic layer; 16-First ohmic contact electrode; 17-Temporary substrate. Detailed Implementation

[0020] The technical solution of the present invention will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0021] This invention provides a method for manufacturing a red Micro LED chip and a red Micro LED chip. Several embodiments are given below to describe in detail the method for manufacturing a red Micro LED chip and the red Micro LED chip provided by this invention.

[0022] The red Micro LED chip manufacturing method provided in this embodiment, such as Figures 1 to 6 As shown, it includes the following steps: A red-light epitaxial wafer is prepared, comprising a light-emitting layer 11 and a first epitaxial layer 10 sequentially disposed therefrom; An ITO transparent electrode 9 is fabricated on the first epitaxial layer 10; The ITO transparent electrode 9 and the first epitaxial layer 10 are etched using a dry etching method, and the light-emitting layer 11 is etched using a wet etching method to form a Mesa array.

[0023] Preferably, a dry etching method is used to etch the ITO transparent electrode 9 and the first epitaxial layer 10. Dry etching of the ITO transparent electrode 9 and the first epitaxial layer 10 can prevent damage to the light-emitting layer 11. The light-emitting layer 11 is etched using a wet etching method, which does not involve physical bombardment and can also prevent damage to the light-emitting layer 11. This reduces sidewall defects in the red MicroLED chip and improves its luminous efficiency and reliability.

[0024] It should be noted that, due to the isotropic nature of wet etching, the process of etching the ITO transparent electrode 9 and the first epitaxial layer 10 by wet etching is not easy to control and can easily affect the morphology of the Mesa mesa. Therefore, wet etching is not used to etch the ITO transparent electrode 9 and the first epitaxial layer 10.

[0025] The steps for forming the Mesa array include: photolithographically patterning the red epitaxial wafer, etching the ITO transparent electrode 9 and all epitaxial layers (light-emitting layer 11 and first epitaxial layer 10) on the first waveguide layer 12 to form the Mesa array.

[0026] The outer contour of the Mesa array is trapezoidal. When etching the ITO transparent electrode 9, the area of ​​the ITO transparent electrode 9 to be etched along the vertical direction needs to be completely etched through. When etching the light-emitting layer 11, the area of ​​the light-emitting layer 11 to be etched along the vertical direction needs to be completely etched through. When etching the first epitaxial layer 10, the area of ​​the first epitaxial layer 10 to be etched along the vertical direction needs to be completely etched through.

[0027] The first epitaxial layer 10 can be a P-type epitaxial layer, which includes a P-waveguide layer, a P-current spread layer and a P-ohm layer arranged sequentially.

[0028] Furthermore, the dry etching method includes ICP etching; in the ICP etching step: the main etching gas is Cl2 / BCl3, the ratio of ICP power to RF power is >2, the temperature is 15℃-25℃, and the cavity pressure is 5mTorr-20mTorr.

[0029] The main etching gas is a mixture of Cl2 and BCl3, and the temperature can be any suitable temperature such as 15℃, 20℃ or 25℃.

[0030] The chamber pressure can be any suitable pressure, such as 5mTorr, 10mTorr, 15mTorr or 20mTorr.

[0031] By controlling the above parameters, the etching effect of the ITO transparent electrode 9 and the first epitaxial layer 10 can be improved.

[0032] Furthermore, in the wet etching step: the wet etching solution is a mixed solution of liquid bromine, H2O and HBr, which can effectively etch the light-emitting layer 11 and prevent damage to the light-emitting layer 11.

[0033] Furthermore, in the wet etching step: the mass content of liquid bromine is 0.2%-1%, the mass content of HBr is 1%-9%, and after the wet etching solution is prepared and allowed to stand for 12 hours, wet etching is carried out at room temperature using the wet etching solution.

[0034] The mass content of liquid bromine can be 0.2%, 0.4%, 0.6%, 0.8%, or 1%, and the mass content of HBr can be 1%, 3%, 5%, 7%, or 9%.

[0035] Furthermore, the preparation of red-light epitaxial wafers includes: An etching stop layer, an N-GaAs ohmic layer 15, a first current spreading layer 13, a first waveguide layer 12, a light-emitting layer 11, and a first epitaxial layer 10 are sequentially grown on a temporary substrate.

[0036] Specifically, the MOCVD method is used to sequentially grow an etching stop layer, an N-GaAs ohmic layer 15, a first current spreading layer 13, a first waveguide layer 12, a light emitting layer 11, a P-waveguide layer, a P-current spreading layer, and a P-ohmic layer on a temporary substrate to obtain a red epitaxial wafer. The first epitaxial layer 10 can be a P-type epitaxial layer, and the first epitaxial layer 10 is formed by sequentially setting a P waveguide layer, a P current spreading layer and a P ohmic layer.

[0037] The first current spreading layer 13 can be an N-current spreading layer, and the first waveguide layer 12 can be an N-waveguide layer.

[0038] Furthermore, the fabrication of the ITO transparent electrode 9 on the first epitaxial layer 10 includes: depositing the ITO transparent electrode 9 on the P-ohm layer of the first epitaxial layer 10, thereby forming the ITO transparent electrode 9 on the P-ohm layer of the first epitaxial layer 10.

[0039] Furthermore, it also includes the following steps: The driving substrate 1 is aligned and mixed with the red light epitaxial wafer for bonding; Remove the temporary substrate and etch stop layer; Remove the N-GaAs ohmic layer 15 that is disposed opposite to the light-emitting layer 11, and retain the N-GaAs ohmic layer 15 around the light-emitting layer 11; Preparation of N-face contact metal: The first ohmic contact electrode 16 is fabricated on the N-GaAs ohmic layer 15.

[0040] The N-GaAs ohmic layer 15 is patterned, and the entire N-GaAs ohmic layer 15, which is vertically opposite to the light-emitting layer 11, is removed using photolithography. Only the N-GaAs ohmic layer 15 around the light-emitting layer 11 and the first ohmic contact electrode 16 are retained. A vertical structure and hybrid bonding process are adopted, and the N-GaAs ohmic layer 15 is placed in the non-effective light-emitting area around the light-emitting layer 11 as a common cathode. First, the contact area between the metal and the N-GaAs semiconductor is increased, forming a good ohmic contact. Second, the first ohmic contact electrode 16 placed around the pixel can absorb and reflect large-angle stray light, effectively preventing crosstalk between pixels and avoiding the first ohmic contact electrode 16 being directly placed in the light-emitting area, which would cause GaAs to absorb light and the metal to block light.

[0041] Preparation of N-side contact metal: The first ohmic contact electrode 16 was fabricated on the N-GaA ohmic layer using a photolithography-coated lift-off method, and then high-temperature annealing was performed to form a good ohmic contact.

[0042] The first ohmic contact electrode can be an N-ohm contact electrode. Preferably, the first ohmic contact electrode 16 is made of AuGe.

[0043] The first ohmic contact electrode 16 is also called the N common cathode.

[0044] More preferably, the first ohmic contact electrode 16 is selected from Au / AuGeNi / Au stacked structure and is evaporated by electron beam EB. The thickness of the first Au layer is 2nm-20nm, the thickness of the second AuGeNi layer is 10nm-50nm, and the thickness of the third Au layer is 100nm-1000nm. Preferably, the high-temperature annealing is performed in an RTP annealing furnace at a temperature of 250℃-350℃ for 3-10 minutes.

[0045] The removal of the temporary substrate and the etch stop layer includes: wet immersion in a mixed solution of ammonia, hydrogen peroxide and water to remove the temporary substrate; and wet immersion in hydrochloric acid to remove the etch stop layer.

[0046] The alignment and bonding of the driving substrate 1 with the red-light epitaxial wafer includes: PA layer 8 was fabricated by ALD deposition and PA layer 8 was grown on the outer surface of the Mesa array. PA openings were formed on the mesa array surface by photolithography etching. Fabrication of the metal reflective layer 7: The PA layer 8 and the Mesa array mesa are completely covered by the metal reflective layer 7 through coating etching or photolithography + EB coating + lift-off. Preparation of red-light epitaxial dielectric layer 5 and interconnect copper pillars: SiO2 red-light epitaxial dielectric layer 5 is grown by PECVD. After CMP polishing, through-holes are formed in the red-light epitaxial dielectric layer 5 by photolithography. Cu is electroplated in the through-holes. After CMP polishing, the red-light epitaxial dielectric layer 5 and red-light epitaxial interconnect copper pillars 6 are prepared. Fabrication of the driving-side dielectric layer 2 and interconnect copper pillars: A SiO2 red-light epitaxial dielectric layer 5 is grown on the first waveguide layer 12 using the PECVD method. The red-light epitaxial dielectric layer 5 is covered with a metal reflective layer 7. The outer contour of the red-light epitaxial dielectric layer 5 is rectangular. After CMP polishing, through-holes are formed in the red-light epitaxial dielectric layer 5 by photolithography. Cu is electroplated in the through-holes. After CMP polishing, the red-light epitaxial dielectric layer 5 and the red-light epitaxial interconnect copper pillars 6 are fabricated. One end of the red-light epitaxial interconnect copper pillars 6 is connected to the metal reflective layer 7.

[0047] Fabrication of interconnect copper pillars on driving substrate 1: SiO2 driving-side dielectric layer 2 is grown on driving substrate 1 using PECVD method. The driving-side dielectric layer 2 covers driving substrate 1. The outer contour of the driving dielectric layer is rectangular. After CMP polishing, through-holes are formed in the driving dielectric layer by photolithography etching. Cu is electroplated in the through-holes. After CMP polishing, the driving dielectric layer and driving-side interconnect copper pillars 3 are fabricated. One end of the driving-side interconnect copper pillars 3 is connected to driving substrate 1.

[0048] Hybrid bonding: The driving substrate 1 and the red epitaxial wafer are aligned and hybrid bonded through the driving side dielectric layer 2 and the red epitaxial side dielectric layer 5, and the driving side interconnect copper pillar 3 is connected to the red epitaxial side interconnect copper pillar 6.

[0049] Furthermore, it also includes the following steps: Roughen the first current spreading layer 13: Roughen the first current spreading layer 13 on the outside of the first ohmic contact electrode 16.

[0050] Roughening the first current extension layer 13: Using photolithography patterning and wet etching, all of the first current extension layer 13 except for the first ohmic contact electrode 16 (the first current extension layer 13 outside the first ohmic contact electrode 16) is roughened, forming a pyramid structure 14 on the surface of the first current extension layer 13. The process also includes the following steps: abrasion test: the prepared red light Micro LED chip is tested, abraded and sorted to obtain the red light Micro LED chip.

[0051] The red Micro LED chip provided in this embodiment is manufactured by the red Micro LED chip manufacturing method provided in this embodiment; the red Micro LED chip includes a driving substrate 1, a hybrid bonding layer and a red epitaxial wafer arranged sequentially.

[0052] Dry etching of the ITO transparent electrode 9 and the first epitaxial layer 10 can prevent damage to the light-emitting layer 11. The light-emitting layer 11 is etched by wet etching, which has no physical bombardment effect and can prevent damage to the light-emitting layer 11. This reduces the etching sidewall defects of the red Micro LED chip and improves the luminous efficiency and reliability of the red Micro LED chip.

[0053] Furthermore, the red epitaxial wafer includes an N-GaAs ohmic layer 15, a first current spreading layer 13, a first waveguide layer 12, a light-emitting layer 11, and a first epitaxial layer 10 arranged sequentially; the N-GaAs ohmic layer 15 is disposed outside the light-emitting layer 11, and the first ohmic contact electrode 16 is disposed on the N-GaAs ohmic layer 15.

[0054] The N-GaAs ohmic layer 15 is patterned, and the entire N-GaAs ohmic layer 15, which is vertically opposite to the light-emitting layer 11, is removed using photolithography. Only the N-GaAs ohmic layer 15 around the light-emitting layer 11 and the first ohmic contact electrode 16 are retained. A vertical structure and hybrid bonding process are used to place the N-GaAs ohmic layer 15 in the non-effective light-emitting area around the light-emitting layer 11 as a common cathode. First, the contact area between the metal and the N-GaAs semiconductor is increased, forming a good ohmic contact. Second, the first ohmic contact electrode 16 placed around the pixel can absorb and reflect large-angle stray light, effectively preventing crosstalk between pixels and avoiding the first ohmic contact electrode 16 being directly placed in the light-emitting area, which would cause GaAs to absorb light and the metal to block light.

[0055] Specifically, the red Micro LED chip includes a driving substrate 1, a hybrid bonding layer, and a red epitaxial wafer arranged from bottom to top.

[0056] The hybrid bonding layer consists of a driving-side dielectric layer 2, a red-light epitaxial-side dielectric layer 5, driving-side interconnect copper pillars 3 and red-light epitaxial-side interconnect copper pillars 6. The driving-side interconnect copper pillars 3 are disposed within vias in the driving-side dielectric layer 2. One end of the driving-side interconnect copper pillar 3 is connected to the driving substrate 1, and the other end of the driving-side interconnect copper pillar 3 is connected to one end of the red-light epitaxial-side interconnect copper pillar 6. The red-light epitaxial-side interconnect copper pillar 6 is disposed within vias in the red-light epitaxial-side dielectric layer 5, and the other end of the red-light epitaxial-side interconnect copper pillar 6 is connected to the metallic reflective layer 7. The driving-side dielectric layer 2 is in contact with the red-light epitaxial-side dielectric layer 5, and the driving-side interconnect copper pillars 3 and 6 are in contact. The contact surfaces of the driving-side dielectric layer 2 and the red-light epitaxial-side dielectric layer 5 form a hybrid bonding cross-section 4, and the contact surfaces of the driving-side interconnect copper pillars 3 and 6 also form a hybrid bonding cross-section 4.

[0057] The red epitaxial wafer, from bottom to top, includes a P-ohm layer, a P-current spreading layer, a P-waveguide layer, a light-emitting layer 11, a first waveguide layer 12, a first current spreading layer 13, and an N-GaAs ohm layer 15. The red epitaxial wafer is configured as an inverted trapezoidal Mesa array. An ITO transparent electrode 9 is disposed below the P-ohm layer. A PA layer 8 is disposed on the outer surface of the Mesa array, covering the sidewalls of the Mesa array and the ITO transparent electrode 9. The PA layer 8 has a PA opening, which is disposed on the ITO transparent electrode 9. A metallic reflective layer 7 is disposed on the PA layer 8, and the metallic reflective layer 7 covers the PA opening. The metallic reflective layer 7 is directly connected downward to the interconnecting copper pillar 6 on the red epitaxial side, and upward to the ITO transparent electrode 9 through the PA opening. The N-GaAs ohm layer 15 is only disposed at the non-effective light-emitting area ISO position around the Pixel. A first ohmic contact electrode 16 is disposed on the N-GaAs ohm layer 15. The upper surface of the first current spreading layer 13 is a roughened pyramid structure 14.

[0058] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for manufacturing a red Micro LED chip, characterized in that, Includes the following steps: A red-light epitaxial wafer is prepared, comprising a light-emitting layer and a first epitaxial layer sequentially disposed therefrom; An ITO transparent electrode is fabricated on the first epitaxial layer; The ITO transparent electrode and the first epitaxial layer are etched using a dry etching method, and the light-emitting layer is etched using a wet etching method to form the Mesa array.

2. The method for manufacturing a red Micro LED chip according to claim 1, characterized in that, The dry etching method includes ICP etching. In the ICP etching step: the main etching gas is Cl2 / BCl3, the ratio of ICP power to RF power is >2, the temperature is 15℃-25℃, and the cavity pressure is 5mTorr-20mTorr.

3. The method for manufacturing a red Micro LED chip according to claim 1, characterized in that, In the wet etching process: the wet etching solution is a mixed solution of liquid bromine, H2O and HBr.

4. The method for manufacturing a red Micro LED chip according to claim 3, characterized in that, In the wet etching process: the mass content of liquid bromine is 0.2%-1%, the mass content of HBr is 1%-9%, and after the wet etching solution is prepared and allowed to stand for 12 hours, wet etching is carried out at room temperature.

5. The method for manufacturing a red Micro LED chip according to claim 1, characterized in that, The preparation of red-light epitaxial wafers includes: An etching stop layer, an N-GaAs ohmic layer, a first current spreading layer, a first waveguide layer, a light-emitting layer, and a first epitaxial layer are sequentially grown on a temporary substrate.

6. The method for manufacturing a red Micro LED chip according to claim 1, characterized in that, Fabricating an ITO transparent electrode on the first epitaxial layer includes: depositing an ITO transparent electrode on the P-ohm layer of the first epitaxial layer.

7. The method for manufacturing a red Micro LED chip according to claim 5, characterized in that, It also includes the following steps: The driving substrate and the red light epitaxial wafer are aligned and mixed for bonding; Remove the temporary substrate and etch stop layer; Remove the N-GaAs ohmic layer that is positioned opposite to the luminescent layer, and retain the N-GaAs ohmic layer surrounding the luminescent layer; Preparation of N-face contact metal: Fabrication of the first ohmic contact electrode on the N-GaAs ohmic layer.

8. The method for manufacturing a red Micro LED chip according to claim 7, characterized in that, It also includes the following steps: Roughen the first current spreading layer: Roughen the first current spreading layer on the outside of the first ohmic contact electrode.

9. A red Micro LED chip, characterized in that, The red MicroLED chip is manufactured by the method described in any one of claims 1-8; The red Micro LED chip includes a driving substrate, a hybrid bonding layer, and a red epitaxial wafer arranged sequentially.

10. The red Micro LED chip according to claim 9, characterized in that, The red-light epitaxial wafer comprises an N-GaAs ohmic layer, a first current spreading layer, a first waveguide layer, a light-emitting layer, and a first epitaxial layer arranged sequentially. The N-GaAs ohmic layer is disposed outside the light-emitting layer, and the first ohmic contact electrode is disposed on the N-GaAs ohmic layer.

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