Red Micro LED Chip Fabrication Method and Red Micro LED Chip

Abstract

The application provides a red light Micro LED chip preparation method and a red light Micro LED chip, and relates to the technical field of chips.The red light Micro LED chip preparation method comprises the following steps: preparing a red light epitaxial wafer: sequentially forming a first epitaxial layer, a light-emitting layer and a second epitaxial layer on a temporary substrate; preparing a Mesa array: etching the light-emitting layer and the second epitaxial layer to form the Mesa array; preparing a PA dielectric layer: growing the PA dielectric layer on the Mesa array, and forming a conductive via on the PA dielectric layer on the Mesa array mesa; preparing a first ohmic contact electrode: setting a first electrode metal to the PA dielectric layer and the conductive via, and high-temperature annealing, so that the first electrode metal in the conductive via forms an ohmic contact with the second epitaxial layer.The red light Micro LED chip preparation method provided by the application sets the first electrode metal to the PA dielectric layer and the conductive via to form the first ohmic contact electrode, so that the first electrode metal in the conductive via forms a good ohmic contact with the second epitaxial layer, and the contact resistance can be reduced.

Description

Technical Field

[0001] This invention relates to the field of chip technology, and in particular to a method for fabricating a red Micro LED chip and the red Micro LED chip itself. Background Technology

[0002] In recent years, Micro LED has become a hot topic in the LED industry due to its self-emissive, high-brightness, long-life and low-power characteristics.

[0003] Currently, blue and green Micro LED chip technologies are basically mature, but red Micro LED chips have been hindering the progress of Micro LED full-color displays due to their poor epitaxial light-emitting materials, chip processes, power consumption, brightness, and reliability.

[0004] In the existing technology, the commonly used red Micro LED chip is the quaternary AlGaInP red light solution, in which the P / N electrodes are set on the same side, resulting in a small light-emitting area, lateral current transmission, high contact resistance, and poor chip heat dissipation. Summary of the Invention The purpose of this invention is to provide a method for fabricating red Micro LED chips to solve the technical problem of high contact resistance in existing Micro LED chips.

[0005] The method for fabricating a red Micro LED chip provided by this invention includes the following steps: Preparation of red-light epitaxial wafer: A first epitaxial layer, a light-emitting layer, and a second epitaxial layer are sequentially formed on a temporary substrate; Fabrication of the Mesa array: Etching the light-emitting layer and the second epitaxial layer to form the Mesa array; Fabrication of PA dielectric layer: A PA dielectric layer is grown on the Mesa array, and conductive vias are formed in the PA dielectric layer on the mesa array surface; Fabrication of the first ohmic contact electrode: A first electrode metal is disposed on the PA dielectric layer and the conductive via, so that the first electrode metal in the conductive via forms an ohmic contact with the second epitaxial layer.

[0006] Furthermore, the second epitaxial layer includes a first ohmic contact layer, and the first electrode metal in the conductive via forms an ohmic contact with the first ohmic contact layer.

[0007] Furthermore, conductive vias are distributed in the central region of the Mesa array mesa.

[0008] Furthermore, the first electrode metal is a stacked structure of Au, AuZn, Au and Ti or a stacked structure of Au, AuBe, Au and Ti.

[0009] Furthermore, the stacked structure of Au, AuZn, Au and Ti is formed by sputtering deposition process, with the thickness of the Au layer being 2nm-10nm, the thickness of the AuZn layer being 10nm-100nm, the thickness of the Au layer being 50nm-100nm, and the thickness of the Ti layer being 2nm-10nm. The stacked structure of Au, AuBe, Au and Ti is formed by sputtering deposition process. The thickness of Au layer is 2nm-10nm, AuBe layer is 10nm-100nm, Au layer is 50nm-100nm, and Ti layer is 2nm-10nm.

[0010] Furthermore, the step of preparing the first ohmic contact electrode includes: high-temperature annealing of the first electrode metal.

[0011] Furthermore, high-temperature annealing is carried out in a nitrogen atmosphere at a temperature of 460℃-500℃ for 6-10 minutes.

[0012] Furthermore, it also includes the following steps: The driving substrate and the red light epitaxial wafer are aligned and mixed for bonding; Remove the temporary substrate; A second ohmic contact electrode is fabricated on the first epitaxial layer and then annealed at high temperature.

[0013] Furthermore, the alignment and hybrid bonding of the driving substrate and the red-light epitaxial wafer includes: A SiO2 epitaxial bonding dielectric layer is grown on the first ohmic contact electrode, a via is formed in the epitaxial bonding dielectric layer, and Cu is electroplated in the via to form an epitaxial interconnect copper pillar. A SiO2 driving-side bonding dielectric layer is grown on the driving substrate, a via is formed in the driving-side bonding dielectric layer, and Cu is electroplated in the via to form driving-side interconnect copper pillars. The epitaxial bonding medium layer and the driving bonding medium layer are aligned and mixed-bonded.

[0014] Another objective of this invention is to provide a red Micro LED chip, which is prepared by the red Micro LED chip preparation method provided by this invention. The red Micro LED chip includes a driving substrate, a hybrid bonding layer and a red epitaxial wafer arranged sequentially. The red-light epitaxial wafer includes a first epitaxial layer, a light-emitting layer, and a second epitaxial layer arranged sequentially; the light-emitting layer and the second epitaxial layer form a Mesa array, the PA dielectric layer is disposed on the Mesa array, the PA dielectric layer is provided with a conductive via, and the first electrode metal in the conductive via forms an ohmic contact with the second epitaxial layer.

[0015] The present invention provides a method for fabricating a red Micro LED chip, comprising the following steps: fabricating a red epitaxial wafer: sequentially forming a first epitaxial layer, a light-emitting layer, and a second epitaxial layer on a temporary substrate; fabricating a Mesa array: etching the light-emitting layer and the second epitaxial layer to form a Mesa array; fabricating a PA dielectric layer: growing a PA dielectric layer on the Mesa array, and forming conductive vias in the PA dielectric layer on the mesa array mesa; fabricating a first ohmic contact electrode: depositing a first electrode metal onto the PA dielectric layer and the conductive vias, so that the first electrode metal in the conductive vias forms an ohmic contact with the second epitaxial layer. The red Micro LED chip fabrication method provided by the present invention, by depositing a first electrode metal onto the PA dielectric layer (at the sidewalls and mesa of the Mesa array) and the conductive vias to form a first ohmic contact electrode, and then annealing at high temperature, allows the first electrode metal in the conductive vias to form a good ohmic contact with the second epitaxial layer, which reduces contact resistance compared to the ITO transparent electrode in the prior art. Attached Figure Description

[0016] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0017] Figure 1 This is a state diagram of the red Micro LED chip provided in an embodiment of the present invention; Figure 2 This is a schematic diagram of the structure of a red Micro LED chip after the PA dielectric layer preparation step is completed, as provided in an embodiment of the present invention. Figure 3 This is a schematic diagram of the structure of a red Micro LED chip after the first ohmic contact electrode preparation step is completed, as provided in an embodiment of the present invention. Figure 4 This is a schematic diagram of the structure of the red Micro LED chip provided in an embodiment of the present invention; Figure 5 This is a flowchart of the red Micro LED chip fabrication method provided in the embodiments of the present invention.

[0018] Icons: 1-Driver substrate; 2-Driver-side bonding dielectric layer; 3-Driver-side interconnect copper pillar; 4-Epitaph-side bonding dielectric layer; 5-Epitaph-side interconnect copper pillar; 6-PA dielectric layer; 7-Conductive via; 8-First ohmic contact electrode; 9-Second epitaxial layer; 10-Light emitting layer; 11-First epitaxial layer; 12-Second ohmic contact electrode; 13-Temporary substrate. Detailed Implementation

[0019] The technical solution of the present invention will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0020] This invention provides a method for fabricating a red Micro LED chip and a red Micro LED chip. Several embodiments are given below to describe in detail the method for fabricating a red Micro LED chip and the red Micro LED chip provided by this invention.

[0021] The red Micro LED chip fabrication method provided in this embodiment is as follows: Figures 1 to 5 As shown, it includes the following steps: The red Micro LED chip fabrication method provided in this embodiment includes the following steps: Preparation of red-light epitaxial wafer: A first epitaxial layer 11, a light-emitting layer 10, and a second epitaxial layer 9 are sequentially formed on a temporary substrate 13; Fabrication of the Mesa array: Etching the light-emitting layer 10 and the second epitaxial layer 9 to form the Mesa array; Fabrication of PA dielectric layer 6: PA dielectric layer 6 is grown on the Mesa array, and conductive vias 7 are formed on the PA dielectric layer 6 on the Mesa array mesa. Fabrication of the first ohmic contact electrode 8: A first electrode metal is disposed on the PA dielectric layer 6 and the conductive via 7, so that the first electrode metal in the conductive via 7 forms an ohmic contact with the second epitaxial layer 9.

[0022] Specifically, a red-light epitaxial wafer is prepared by using the MOCVD method to sequentially form a first epitaxial layer 11, a light-emitting layer 10, and a second epitaxial layer 9 on a GaAs temporary substrate 13 to obtain a red-light epitaxial wafer.

[0023] Fabrication of Mesa array: The red epitaxial wafer is patterned by photolithography. All epitaxial layers of the first epitaxial layer 11 (light-emitting layer 10 and second epitaxial layer 9) form a Mesa array. The light-emitting layer 10 and the second epitaxial layer 9 are etched. Along the vertical direction, the etched areas of the light-emitting layer 10 and the second epitaxial layer 9 are completely etched through to form a trapezoidal Mesa array.

[0024] Preparation of PA dielectric layer 6: PA dielectric layer 6 is grown on the outer surface of the Mesa array using ALD deposition method, and conductive vias 7 are formed by photolithography etching of PA dielectric layer 6 on the mesa array surface. Fabrication of the first ohmic contact electrode 8: A first electrode metal is deposited onto the PA dielectric layer 6 (sidewalls and mesa of the Mesa array) and the conductive via 7 via by deposition etching or photolithography + EB deposition + lift-off, thereby forming the first ohmic contact electrode 8 on the PA dielectric layer 6. High-temperature annealing is then performed to ensure good ohmic contact between the first electrode metal within the conductive via 7 and the second epitaxial layer 9. The first ohmic contact electrode 8 also serves as a reflective layer.

[0025] The first epitaxial layer can be an N-type epitaxial layer, the second epitaxial layer can be a P-type epitaxial layer, the first electrode metal can be a P-type electrode metal, and the first ohmic contact electrode 8 can be a P-ohmic contact electrode.

[0026] The red Micro LED chip fabrication method provided in this embodiment involves setting a first electrode metal on the PA dielectric layer 6 (the sidewall and mesa position of the Mesa array) and the conductive via 7 to form a first ohmic contact electrode 8, and then annealing it at high temperature so that the first electrode metal in the conductive via 7 forms a good ohmic contact with the second epitaxial layer 9. Compared with the ITO transparent electrode in the prior art, this method can reduce the contact resistance.

[0027] Furthermore, the second epitaxial layer 9 includes a first ohmic contact layer, and the first electrode metal in the conductive via 7 forms an ohmic contact with the first ohmic contact layer.

[0028] The second epitaxial layer 9 is in contact with the PA dielectric layer 6, and the first electrode metal in the conductive via 7 forms an ohmic contact with the first ohmic contact layer, which can significantly reduce the contact resistance of the chip.

[0029] The first ohmic contact layer can be a P-GaP ohmic contact layer.

[0030] Furthermore, conductive vias 7 are distributed in the central region of the Mesa array mesa.

[0031] The size, number, and arrangement of the conductive vias 7 can be reasonably adjusted according to the voltage and P-side reflectivity requirements of the red Micro LED chip. The more conductive vias 7 there are, the better the IV performance; the fewer conductive vias 7 there are, the higher the P-side reflectivity and the higher the efficiency of the red Micro LED chip.

[0032] All conductive vias 7 can be distributed in the central region of the Mesa array mesa, rather than on the Mesa array sidewalls, or most conductive vias 7 can be distributed in the central region of the Mesa array mesa, rather than on the Mesa array sidewalls.

[0033] Conductive vias 7 are distributed in the central region of the Mesa array mesa. Most of the P-current transmission channels are concentrated in the central region of the second epitaxial layer 9. Electrons and holes are also concentrated in the center of the light-emitting area to generate photons through radiative recombination. This can prevent the sidewall effect (non-radiative recombination of electrons and holes at the edge) caused by size reduction.

[0034] The central area of ​​the Mesa array platform is the region on the Mesa array platform that is at a preset distance from the center.

[0035] The PA dielectric layer 6 and the first electrode metal constitute an ODR metal mirror, and the reflectivity and emissivity of the P-surface are the reflectivity of the ODR metal mirror. The light-emitting layer 10 is a surface light source, and the function of the ODR metal mirror is to reflect the light emitted towards the second epitaxial layer 9 back to improve light utilization.

[0036] The PA dielectric layer 6 can be a SiO2 layer. The SiO2 layer and AuZn or AuBe form an ODR metal mirror. The ODR metal mirror has high and stable reflectivity, and its overall performance is far superior to that of reflective metals such as Ag or Al, which can improve reliability and light extraction efficiency.

[0037] Furthermore, the first electrode metal is a stacked structure of Au, AuZn, Au and Ti or a stacked structure of Au, AuBe, Au and Ti.

[0038] The first electrode metal is a stacked structure of Au layer, AuZ layer, Au layer and Ti layer or a stacked structure of Au layer, AuBe layer, Au layer and Ti layer. As the ohmic contact electrode of the first ohmic contact layer, it can significantly reduce the contact resistance compared with the existing ITO transparent electrode.

[0039] Furthermore, the stacked structure of Au, AuZn, Au and Ti is formed by sputtering deposition process, with the thickness of the Au layer being 2nm-10nm, the thickness of the AuZn layer being 10nm-100nm, the thickness of the Au layer being 50nm-100nm, and the thickness of the Ti layer being 2nm-10nm. The stacked structure of Au, AuBe, Au and Ti is formed by sputtering deposition process. The thickness of Au layer is 2nm-10nm, AuBe layer is 10nm-100nm, Au layer is 50nm-100nm, and Ti layer is 2nm-10nm.

[0040] For example, a first electrode metal is disposed on the PA dielectric layer 6 and the conductive via 7. The first layer is an Au layer, the second layer is an AuZn layer, the third layer is an Au layer, and the fourth layer is a Ti layer. The Au layer, AuZn layer, Au layer, and Ti layer are all fabricated by sputtering deposition. The thickness of the Au layer is 2nm-10nm, the thickness of the AuZn layer is 10nm-100nm, the thickness of the Au layer is 50nm-100nm, and the thickness of the Ti layer is 2nm-10nm.

[0041] For example, a first electrode metal is disposed on the PA dielectric layer 6 and the conductive via 7. The first layer is an Au layer, the second layer is an AuBe layer, the third layer is an Au layer, and the fourth layer is a Ti layer. The Au layer, AuZn layer, Au layer, and Ti layer are all fabricated by sputtering deposition. The thickness of the Au layer is 2nm-10nm, the thickness of the AuBe layer is 10nm-100nm, the thickness of the Au layer is 50nm-100nm, and the thickness of the Ti layer is 2nm-10nm.

[0042] Furthermore, the step of preparing the first ohmic contact electrode includes: high-temperature annealing of the first electrode metal.

[0043] Specifically, the high-temperature annealing is carried out in an RTP annealing furnace under a nitrogen atmosphere. The high-temperature annealing temperature is 460℃-500℃ and the high-temperature annealing time is 6min-10min, so that the first electrode metal in the conductive via 7 and the second epitaxial layer 9 form a good ohmic contact.

[0044] Furthermore, it also includes the following steps: The driving substrate 1 is aligned and mixed with the red light epitaxial wafer for bonding; Remove temporary substrate 13; A second ohmic contact electrode 12 is fabricated on the first epitaxial layer 11 and then annealed at high temperature. The second ohmic contact electrode 12 is disposed on the outer periphery of the light-emitting layer 10.

[0045] Temporary substrate 13 removal: The GaAs temporary substrate 13 is removed by a non-destructive wet method using a mixed solution of ammonia, hydrogen peroxide and water. A second ohmic contact electrode 12 is fabricated on the first epitaxial layer 11 and then annealed at high temperature: The second ohmic contact electrode 12 is fabricated on the first epitaxial layer 11 using a photolithography-based film stripping method and then annealed at high temperature to form a good ohmic contact. It also includes a scratch test: the obtained chips are tested, scratched and sorted to obtain red light Micro LED chips.

[0046] The second ohmic contact electrode 12 can be an N-ohm contact electrode.

[0047] Furthermore, the alignment and hybrid bonding of the driving substrate 1 and the red epitaxial wafer includes: A SiO2 epitaxial bonding dielectric layer 4 is grown on the first ohmic contact electrode 8, a through hole is formed in the epitaxial bonding dielectric layer 4, and Cu is electroplated in the through hole to form an epitaxial interconnect copper pillar 5. A SiO2 driving-side bonding dielectric layer 2 is grown on the driving substrate 1, a through hole is formed in the driving-side bonding dielectric layer 2, and Cu is electroplated in the through hole to form a driving-side interconnect copper pillar 3. The epitaxial bonding dielectric layer 4 and the driving bonding dielectric layer 2 are aligned and mixed-bonded.

[0048] Specifically, a SiO2 epitaxial bonding dielectric layer 4 is grown on the first ohmic contact electrode 8 using the PECVD method. After CMP polishing, a through hole is formed in the epitaxial bonding dielectric layer 4 by photolithography etching. Cu is electroplated in the through hole to form an epitaxial interconnect copper pillar 5. CMP polishing completes the fabrication of the epitaxial bonding dielectric layer 4 and the epitaxial interconnect copper pillar 5.

[0049] SiO2 driving-side bonding dielectric layer 2 is grown on driving substrate 1 using PECVD method. After CMP polishing, through-holes are formed in driving-side bonding dielectric layer 2 by photolithography etching. Cu is electroplated in the through-holes to form driving-side interconnect copper pillars 3. CMP polishing completes the preparation of driving-side bonding dielectric layer 2 and driving-side interconnect copper pillars 3.

[0050] The epitaxial bonding dielectric layer 4 and the driving bonding dielectric layer 2 are surface activated and then perform alignment and hybrid bonding. The epitaxial interconnect copper pillar 5 is connected to the driving interconnect copper pillar 3.

[0051] The red Micro LED chip provided in this embodiment is prepared by the red Micro LED chip preparation method provided in this embodiment. The red Micro LED chip includes a driving substrate 1, a hybrid bonding layer and a red epitaxial wafer arranged in sequence. The red epitaxial wafer includes a first epitaxial layer 11, a light-emitting layer 10 and a second epitaxial layer 9 arranged in sequence. The light-emitting layer 10 and the second epitaxial layer 9 form a Mesa array. A PA dielectric layer 6 is disposed on the Mesa array. The PA dielectric layer 6 is provided with a conductive via 7. The first electrode metal in the conductive via 7 forms an ohmic contact with the second epitaxial layer 9.

[0052] A first electrode metal is disposed on the PA dielectric layer 6 (the sidewall and mesa position of the Mesa array) and the conductive via 7 to form a first ohmic contact electrode 8, and then annealed at high temperature so that the first electrode metal in the conductive via 7 forms a good ohmic contact with the second epitaxial layer 9. Compared with the ITO transparent electrode in the prior art, the contact resistance can be reduced.

[0053] Specifically, the red Micro LED chip includes a driving substrate 1, a hybrid bonding layer, and a red epitaxial wafer arranged from bottom to top.

[0054] The hybrid bonding layer consists of a driving-side bonding dielectric layer 2, an epitaxial-side bonding dielectric layer 4, driving-side interconnect copper pillars 3, and epitaxial-side interconnect copper pillars 5. The driving-side interconnect copper pillars 3 are disposed within the through-holes of the driving-side bonding dielectric layer 2. One end of the driving-side interconnect copper pillar 3 is connected to the driving substrate 1, and the other end of the driving-side interconnect copper pillar 3 is connected to one end of the epitaxial-side interconnect copper pillar 5. The epitaxial-side interconnect copper pillar 5 is disposed within the through-holes of the epitaxial-side bonding dielectric layer 4, and the other end of the epitaxial-side interconnect copper pillar 5 is connected to the first ohmic contact electrode 8. The driving-side bonding dielectric layer 2 contacts the epitaxial-side bonding dielectric layer 4, and the driving-side interconnect copper pillar 3 contacts the epitaxial-side interconnect copper pillar 5. The contact surfaces of the driving-side bonding dielectric layer 2 and the epitaxial-side bonding dielectric layer 4 form a hybrid bonding cross-section, and the contact surfaces of the driving-side interconnect copper pillar 3 and the epitaxial-side interconnect copper pillar 5 also form a hybrid bonding cross-section.

[0055] The red-light epitaxial wafer includes a first epitaxial layer 11, a light-emitting layer 10, and a second epitaxial layer 9 sequentially disposed. The light-emitting layer 10 and the second epitaxial layer 9 form a Mesa array. A PA dielectric layer 6 is disposed on the Mesa array, and the PA dielectric layer 6 has conductive vias 7. A first electrode metal inside the conductive vias 7 forms an ohmic contact with the second epitaxial layer 9. The Mesa array is configured as an inverted trapezoidal structure. The bottom surface of the Mesa array is the mesa surface of the Mesa array. The PA dielectric layer 6 is disposed on the mesa surface and sidewalls of the Mesa array. The PA dielectric layer 6 has conductive vias 7, and a first electrode metal is disposed on the PA dielectric layer 6 to form a first ohmic contact electrode 8. The first electrode metal fills the conductive vias 7, and the first electrode metal inside the conductive vias 7 forms an ohmic contact with the second epitaxial layer 9.

[0056] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for fabricating a red Micro LED chip, characterized in that, Includes the following steps: Preparation of red-light epitaxial wafer: A first epitaxial layer, a light-emitting layer, and a second epitaxial layer are sequentially formed on a temporary substrate; Fabrication of the Mesa array: Etching the light-emitting layer and the second epitaxial layer to form the Mesa array; Fabrication of PA dielectric layer: A PA dielectric layer is grown on the Mesa array, and conductive vias are formed in the PA dielectric layer on the mesa array surface; Fabrication of the first ohmic contact electrode: A first electrode metal is disposed on the PA dielectric layer and the conductive via, so that the first electrode metal in the conductive via forms an ohmic contact with the second epitaxial layer.

2. The method for fabricating a red Micro LED chip according to claim 1, characterized in that, The second epitaxial layer includes a first ohmic contact layer, and the first electrode metal in the conductive via forms an ohmic contact with the first ohmic contact layer.

3. The method for fabricating a red Micro LED chip according to claim 1, characterized in that, Conductive vias are distributed in the central region of the Mesa array mesa.

4. The method for fabricating a red Micro LED chip according to claim 1, characterized in that, The first electrode metal is a stacked structure of Au, AuZn, Au and Ti or a stacked structure of Au, AuBe, Au and Ti.

5. The method for fabricating a red Micro LED chip according to claim 4, characterized in that, The stacked structure of Au, AuZn, Au and Ti is formed by sputtering deposition process. The thickness of Au layer is 2nm-10nm, the thickness of AuZn layer is 10nm-100nm, the thickness of Au layer is 50nm-100nm, and the thickness of Ti layer is 2nm-10nm. The stacked structure of Au, AuBe, Au and Ti is formed by sputtering deposition process. The thickness of Au layer is 2nm-10nm, AuBe layer is 10nm-100nm, Au layer is 50nm-100nm, and Ti layer is 2nm-10nm.

6. The method for fabricating a red Micro LED chip according to claim 1, characterized in that, The steps for preparing the first ohmic contact electrode include: high-temperature annealing of the first electrode metal.

7. The method for fabricating a red Micro LED chip according to claim 6, characterized in that, High-temperature annealing is carried out in a nitrogen atmosphere at a temperature of 460℃-500℃ for 6-10 minutes.

8. The method for fabricating a red Micro LED chip according to claim 1, characterized in that, It also includes the following steps: The driving substrate and the red light epitaxial wafer are aligned and mixed for bonding; Remove the temporary substrate; A second ohmic contact electrode is fabricated on the first epitaxial layer and then annealed at high temperature.

9. The method for fabricating a red Micro LED chip according to claim 8, characterized in that, The alignment and hybrid bonding of the driving substrate and the red-light epitaxial wafer includes: A SiO2 epitaxial bonding dielectric layer is grown on the first ohmic contact electrode, a via is formed in the epitaxial bonding dielectric layer, and Cu is electroplated in the via to form an epitaxial interconnect copper pillar. A SiO2 driving-side bonding dielectric layer is grown on the driving substrate, a via is formed in the driving-side bonding dielectric layer, and Cu is electroplated in the via to form driving-side interconnect copper pillars. The epitaxial bonding medium layer and the driving bonding medium layer are aligned and mixed-bonded.

10. A red Micro LED chip, characterized in that, The red MicroLED chip is prepared by any one of claims 1-9. The red Micro LED chip includes a driving substrate, a hybrid bonding layer and a red epitaxial wafer arranged sequentially. The red-light epitaxial wafer includes a first epitaxial layer, a light-emitting layer, and a second epitaxial layer arranged sequentially; the light-emitting layer and the second epitaxial layer form a Mesa array, the PA dielectric layer is disposed on the Mesa array, the PA dielectric layer is provided with a conductive via, and the first electrode metal in the conductive via forms an ohmic contact with the second epitaxial layer.

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