Micro-led epitaxial wafer and preparation method thereof

Abstract

This invention discloses a Micro-LED epitaxial wafer and its fabrication method, relating to the field of semiconductor technology. The Micro-LED epitaxial wafer includes a substrate, and a buffer layer, an undoped semiconductor layer, an N-type semiconductor layer, a multi-quantum-well active layer, and a P-type semiconductor layer sequentially stacked on the substrate; the multi-quantum-well active layer includes periodically alternating layers of quantum wells, coupling layers, quantum dot layers, and quantum barrier layers; the quantum well layers are In... x Ga 1‑x The N-type quantum well layer, the coupling layer being a group III nitride layer, and the quantum dot layer being In... y Ga 1‑y An N quantum dot layer, where y > x. Implementing this invention allows for the achievement of high modulation bandwidth while maintaining high optical output power.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a Micro-LED epitaxial wafer and its fabrication method. Background Technology

[0002] Visible light communication (VLC) and micro-display applications require Micro-LEDs to simultaneously possess high light output power (LOP) and high modulation bandwidth. Currently, mainstream active region structures struggle to balance power and speed. InGaN / GaN quantum well (QW) active regions possess two-dimensional high density of states and large carrier trapping cross-sections, resulting in high optical output power. However, due to the quantum confinement Stark effect and carrier thermal escape, they have long radiative recombination lifetimes, with a 3dB modulation bandwidth of only 1GHz~2GHz, making it difficult to meet the demands of high-speed visible light communication. InGaN quantum dot (QD) active regions, with their strong three-dimensional confinement effect and short recombination lifetime, can achieve modulation bandwidths above 3GHz. However, quantum dots have low areal density and weak carrier collection ability, resulting in output power that is only 20%~30% of that of quantum well devices. Existing technologies cascade QD and QW into a vertically stacked structure, but they emit light independently and lack a co-transfer mechanism for carriers in the same period. At the same time, if the spacing between QW and QD is too large, carrier transfer will be slow, and if the spacing is too small, the energy level difference will disappear, causing carrier backflow, making it difficult to achieve picosecond-level unidirectional transport. Summary of the Invention

[0003] The technical problem to be solved by the present invention is to provide a Micro-LED epitaxial wafer and its preparation method, which achieves high modulation bandwidth while maintaining high light output power.

[0004] To address the aforementioned issues, this invention discloses a Micro-LED epitaxial wafer, comprising a substrate, and a buffer layer, an undoped semiconductor layer, an N-type semiconductor layer, a multi-quantum-well active layer, and a P-type semiconductor layer sequentially stacked on the substrate. The multi-quantum-well active layer comprises periodically alternating layers of quantum wells, coupling layers, quantum dot layers, and quantum barrier layers; the quantum well layers are In... x Ga 1-x The N-type quantum well layer, the coupling layer being a group III nitride layer, and the quantum dot layer being In... y Ga 1-y N quantum dot layers, where y > x.

[0005] As an improvement to the above technical solution, the value of yx ranges from 0.03 to 0.15.

[0006] As an improvement to the above technical solution, the In x Ga 1-x The value of x in the N-quantum well layer ranges from 0.05 to 0.35.

[0007] As an improvement to the above technical solution, the In y Ga 1-y N quantum dot layers include In y Ga 1-y N quantum dots, the In y Ga 1-y The areal density of N quantum dots is 5 × 10⁻⁶. 9 cm -2 ~5×10 11 cm -2 The In y Ga 1-y The height of N quantum dots ranges from 2nm to 10nm, and the bottom diameter ranges from 8nm to 30nm.

[0008] As an improvement to the above technical solution, the In x Ga 1-x The thickness of the N quantum well layer is 1 nm to 10 nm; the thickness of the coupling layer is 1 nm to 6 nm; the quantum barrier layer is a GaN quantum barrier layer or an AlGaN quantum barrier layer, with a thickness of 2 nm to 15 nm.

[0009] As an improvement to the above technical solution, the coupling layer is an intrinsic group III nitride layer; or the coupling layer is an N-type group III nitride layer with an N-type doping concentration ≤ 5 × 10⁻⁶. 17 atoms / cm 3 .

[0010] As an improvement to the above technical solution, the number of cycles in which the multiple quantum well active layers are alternately stacked is 2 to 8.

[0011] As an improvement to the above technical solution, the In x Ga 1-x The thickness of the N-quantum well layer increases with the number of periods, with an increment of 0.2 nm to 1 nm. The thickness of the coupling layer decreases with increasing period number, with a decrease of 0.3 nm to 1 nm.

[0012] As an improvement to the above technical solution, the multi-quantum well active layer further includes a capping layer disposed between the quantum dot layer and the quantum barrier layer, wherein the capping layer is a GaN layer with a thickness of 1nm~5nm.

[0013] Accordingly, the present invention also discloses a method for preparing a Micro-LED epitaxial wafer, which includes the following steps: A substrate is provided on which a buffer layer, an undoped semiconductor layer, an N-type semiconductor layer, a multiple quantum well active layer, and a P-type semiconductor layer are sequentially grown. The multi-quantum-well active layer comprises periodically alternating layers of quantum wells, coupling layers, quantum dot layers, and quantum barrier layers; the quantum well layers are In... x Ga 1-x The N-type quantum well layer, the coupling layer being a group III nitride layer, and the quantum dot layer being In... y Ga 1-y N quantum dot layers, where y > x.

[0014] As an improvement to the above technical solution, the growth temperature of the coupling layer is greater than that of the In layer. x Ga 1-x The growth temperature of the N quantum well layer, the In y Ga 1-y The growth temperature of the N quantum dot layer is lower than that of the In. x Ga 1-x Growth temperature of N-quantum well layer; The In x Ga 1-x The growth temperature of the N quantum well layer is 600℃~800℃, and the coupling layer and the In x Ga 1-x The growth temperature difference of the N quantum well layer is 10℃~80℃, and the In y Ga 1-y N quantum dot layer and the In x Ga 1-x The growth temperature difference of the N quantum well layer is 10℃~60℃; The In y Ga 1-y The growth of the N quantum dot layer includes the following steps: introducing an In source, a Ga source, and an N source to grow a pre-deposited layer with a thickness of 0.5 nm to 3 nm; interrupting the metal-organic source while maintaining the N source supply, so that the pre-deposited layer can self-assemble and recombine into quantum dots through strain-driven processes.

[0015] Implementing this invention has the following beneficial effects: In the multi-quantum-well active layer of the Micro-LED epitaxial wafer provided by this invention, In x Ga 1-x N-quantum well layers serve as carrier collectors to achieve carrier injection with high trapping cross-sections. y Ga 1-y The N-quantum dot layer, acting as an ultrafast radiative recombination center, achieves a carrier lifetime in the hundreds of picosecond range, enabling the device to maintain high optical output power while achieving an ultra-high modulation bandwidth of 2.5 GHz to 4 GHz; by controlling x < y, In y Ga 1-y The ground state energy level of the N quantum dot layer compared to In x Ga 1-xThe N-quantum well layer is low, enabling unidirectional carrier transfer; through the synergistic effect of quantum mechanical tunneling and thermal emission mechanisms in the coupling layer, In... x Ga 1-x N quantum well layer and In y Ga 1-y The N quantum dot layers maintain sufficiently strong quantum mechanical coupling to achieve picosecond-level transfers, while also maintaining a sufficient energy level difference to ensure unidirectional carrier flow. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of the structure of a Micro-LED epitaxial wafer provided in an embodiment of the present invention; Figure 2 This is a schematic diagram of the structure of the multi-quantum-well active layer of a Micro-LED epitaxial wafer provided in an embodiment of the present invention; Figure 3 This is a schematic diagram of the structure of the multi-quantum-well active layer of a Micro-LED epitaxial wafer provided in another embodiment of the present invention; Figure 4 This is a flowchart of a method for preparing a Micro-LED epitaxial wafer according to an embodiment of the present invention. Detailed Implementation

[0017] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be described in further detail below.

[0018] like Figures 1-3 As shown, the present invention provides a Micro-LED epitaxial wafer, including a substrate 100, and a buffer layer 200, an undoped semiconductor layer 300, an N-type semiconductor layer 400, a multi-quantum-well active layer 500 and a P-type semiconductor layer 600 sequentially stacked on the substrate 100. The multi-quantum-well active layer 500 includes periodically alternating layers of quantum well layers 510, coupling layers 520, quantum dot layers 530, and quantum barrier layers 540; the quantum well layer 510 is In x Ga 1-x The N-type quantum well layer, the coupling layer 520 being a group III nitride layer, and the quantum dot layer 530 being In... y Ga 1-y N quantum dot layers, where y > x.

[0019] In the multi-quantum-well active layer 500 of the Micro-LED epitaxial wafer provided by this invention, In x Ga 1-x N-quantum well layers serve as carrier collectors to achieve carrier injection with high trapping cross-sections. y Ga 1-yThe N-quantum dot layer, acting as an ultrafast radiative recombination center, achieves a carrier lifetime in the hundreds of picosecond range, enabling the device to maintain high optical output power while achieving an ultra-high modulation bandwidth of 2.5 GHz to 4 GHz; by controlling x < y, In y Ga 1-y The ground state energy level of the N quantum dot layer compared to In x Ga 1-x The N-quantum well layer is low, enabling unidirectional carrier transfer; through the synergistic effect of quantum mechanical tunneling and thermal emission mechanisms in the coupling layer 520, In... x Ga 1-x N quantum well layer and In y Ga 1-y The N quantum dot layers maintain sufficiently strong quantum mechanical coupling to achieve picosecond-level transfers, while also maintaining a sufficient energy level difference to ensure unidirectional carrier flow.

[0020] In a preferred embodiment, the value range of yx is 0.03 to 0.15, exemplarily 0.05, 0.08, 0.1, 0.12, or 0.14, but not limited thereto. By controlling the value range of yx, In y Ga 1-y The ground state energy level of the N quantum dot layer compared to In x Ga 1-x The N quantum well layer has a ground state energy level that is 30 meV to 150 meV lower, forming a deep energy well that allows charge carriers to move from In... x Ga 1-x The N quantum well layer is transferred to In via coupling layer 520. y Ga 1-y The N quantum dot layer cannot return to In due to the energy level difference. x Ga 1-x The N-quantum well layer enables unidirectional carrier transfer with an equivalent carrier transfer time of <100ps.

[0021] In one implementation, the In x Ga 1-x The value of x in the N quantum well layer ranges from 0.05 to 0.35, with examples being 0.08, 0.1, 0.15, 0.2, or 0.3, but is not limited to these values.

[0022] It is understandable that the In y Ga 1-y N quantum dot layers include In y Ga 1-y N quantum dots. In one embodiment, the In... y Ga 1-y The areal density of N quantum dots is 5 × 10⁻⁶. 9 cm -2 ~5×1011 cm -2 An example is 8×10 9 cm -2 1×10 10 cm -2 5×10 10 cm -2 8×10 10 cm -2 Or 1×10 11 cm -2 However, it is not limited to this. The In mentioned above... y Ga 1-y The height of N quantum dots ranges from 2nm to 10nm, with exemplary examples being 3nm, 5nm, 7nm, 8nm, or 9nm, but not limited to these. The In... y Ga 1-y The bottom diameter of N quantum dots ranges from 8nm to 30nm, with examples of 10nm, 15nm, 20nm, 24nm, or 28nm, but is not limited to these.

[0023] It should be noted that the In y Ga 1-y The morphological parameters (area density, height, and bottom diameter) of the N quantum dots are not independently size-limited, but are designed in conjunction with the values ​​of x and y and the thickness of the coupling layer 520 to simultaneously satisfy high carrier collection efficiency and strong three-dimensional quantum confinement effect. Specifically, the In y Ga 1-y The areal density of N quantum dots is 5 × 10⁻⁶. 9 cm -2 ~5×10 11 cm -2 When surface density < 5 × 10 9 cm -2 When the number of charge carriers distributed by a single quantum dot is too large, the ground state of the quantum dot becomes oversaturated, and charge carriers leak into the excited state, leading to an extended radiative recombination lifetime and a degraded modulation bandwidth; when the surface density is >5×10 11 cm -2 At this point, the transverse wavefunctions of adjacent quantum dots overlap, the energy level discreteness degrades, the three-dimensional strong confinement effect weakens, and the radiative recombination lifetime returns to the nanosecond level, making it difficult to support modulation bandwidths above 3 GHz. Simultaneously, this areal density range ensures that the carrier collection cross-sections of the quantum dot layer and the quantum well layer are matched, allowing the carriers collected in the quantum well to be efficiently captured by each quantum dot without causing ground-state oversaturation.

[0024] The In y Ga 1-yThe height of N-quantum dots ranges from 2 nm to 10 nm. Smaller heights result in stronger longitudinal quantum confinement, increased electron-hole wavefunction overlap integral, improved oscillator strength, and faster radiative recombination rates, which is beneficial for achieving picosecond-level carrier lifetimes and high modulation bandwidth. When the height is <2 nm, compressive strain relaxation is limited, the critical thickness effect is significant, mismatch dislocation density increases, non-radiative recombination centers increase, and optical output power decreases. When the height is >10 nm, longitudinal quantum confinement weakens, the quantum dot behavior approaches that of a quantum well, the quantum confinement Stark effect is enhanced, the radiative lifetime is extended, and the modulation bandwidth decreases. Therefore, the 2 nm to 10 nm height range strikes a balance between strong confinement and crystal quality.

[0025] The In y Ga 1-y The diameter of N quantum dots ranges from 8 nm to 30 nm. The diameter directly affects the degree of transverse strain relaxation. A smaller diameter results in less complete transverse strain relaxation, and the bandgap increases due to the blue shift in strain, potentially offsetting the compositional redshift caused by y>x. This leads to the quantum dot's ground state energy level being higher than or close to the quantum well ground state, violating the unidirectional carrier transfer condition. Conversely, a larger diameter results in more complete transverse strain relaxation, and the lattice constant in the central region of the quantum dot approaches that of the strain-free material InGaN corresponding to the In composition, which is beneficial for forming deep level wells. When the diameter is greater than 30 nm, the quantum dot approaches a quantum disk, the transverse dispersion decreases, and the quantum confinement effect degrades. Therefore, the bottom diameter range of 8nm to 30nm must be designed in conjunction with the composition difference of yx = 0.03 to 0.15: when the bottom diameter is small (~8nm), a larger yx (>0.10) is required to compensate for the strain blue shift; when the bottom diameter is large (~30nm), a smaller yx (0.03~0.08) can be used to maintain an energy level difference of 30meV to 150meV, ensuring the unidirectional transfer of charge carriers from the quantum well to the quantum point through the coupling layer.

[0026] In one implementation, the In x Ga 1-x The thickness of the N quantum well layer is 1 nm to 10 nm, controlling the In... x Ga 1-x The thickness of the N-quantum well layer ensures a high electron-hole wavefunction overlap rate even in the presence of QCSE in the c-plane system. In one embodiment, the thickness of the coupling layer 520 is 1nm to 6nm, exemplarily 1.5nm, 2nm, 3nm, 4nm, or 5nm, but not limited to these. By controlling the thickness of the coupling layer 520, the synergistic effect of quantum mechanical tunneling and thermal emission mechanisms is achieved, while ensuring that In... x Ga 1-x N quantum well layer and In y Ga 1-yThe N quantum dot layers maintain sufficiently strong quantum mechanical coupling to achieve picosecond-level transfers while also maintaining a sufficient energy level difference (ΔE≈30meV~150meV) to ensure unidirectional carrier flow. Preferably, the coupling layer 520 has a thickness of 2nm~4nm. The quantum barrier layer 540 can be a GaN quantum barrier layer or an AlGaN quantum barrier layer, with a thickness of 2nm~15nm. The quantum barrier layer 540 serves as an isolation layer between carriers and the electric field during cycles; its thinner thickness facilitates hole penetration to each cycle.

[0027] In one embodiment, the coupling layer 520 is an intrinsic group III nitride layer; or the coupling layer 520 is an N-type group III nitride layer with an N-type doping concentration ≤ 5 × 10⁻⁶. 17 atoms / cm 3 It is understood that group III nitrides can be GaN, AlGaN, etc., but are not limited to these. The coupling layer 520 is an intrinsic layer or a lightly doped layer, which avoids the reduction in carrier transfer rate caused by impurity scattering.

[0028] In a preferred embodiment, the multi-quantum well active layer 500 further includes components disposed on the In... y Ga 1-y A capping layer 550 is formed between the N quantum dot layer and the quantum barrier layer 540. The capping layer 550 can be a GaN layer with a thickness of 1 nm to 5 nm. The capping layer 550 serves as the In... y Ga 1-y The sealing and surface smoothing layers of the N quantum dot layer, being relatively thin, do not cause a significant increase in carrier transfer distance.

[0029] In one embodiment, the number of alternating stacked cycles of the multi-quantum well active layers 500 is 2 to 8, with 3, 4, 5, 6, and 7 being exemplary.

[0030] In one implementation, the In x Ga 1-x The thickness of the N-quantum well layer increases with increasing period number, with an increment of 0.2 nm to 1 nm, exemplarily 0.3 nm, 0.4 nm, 0.5 nm, 0.6 nm, or 0.8 nm, but not limited thereto. In one embodiment, the thickness of the coupling layer 520 decreases with increasing period number, with a decrease of 0.3 nm to 1 nm, exemplarily 0.4 nm, 0.5 nm, 0.6 nm, 0.7 nm, or 0.8 nm, but not limited thereto. Along the stacking direction of the Micro-LED epitaxial wafer, In x Ga 1- xThe thickness of the N-type quantum well layer increases periodically while the thickness of the coupling layer 520 decreases periodically, matching the gradient distribution of carrier concentration that naturally decays from the N-type semiconductor side to the P-type semiconductor side. This makes carrier capture and recombination more uniform in each period, avoiding the problem of oversaturation in the period near the N-type semiconductor side and insufficient carriers in the period near the P-type semiconductor side. Overall, the internal quantum efficiency is improved by 15% to 30%.

[0031] In addition to the multi-quantum-well active layer 500, the other layered structures of the present invention have the following characteristics: The substrate 100 may be a sapphire substrate or a silicon substrate, but is not limited thereto. In one embodiment, the substrate 100 is a sapphire substrate with a thickness of 400 μm to 650 μm.

[0032] The buffer layer 200 can be an AlN buffer layer, a GaN buffer layer, or an AlGaN buffer layer, but is not limited to these. In one embodiment, the buffer layer 200 is an AlN buffer layer with a thickness of 20nm to 50nm.

[0033] The undoped semiconductor layer 300 includes a GaN nucleation layer and a two-dimensional merged growth layer. The thickness of the GaN nucleation layer is 200 nm to 500 nm, and the thickness of the two-dimensional merged growth layer is 0.5 μm to 2 μm.

[0034] The N-type semiconductor layer 400 can be an N-type GaN current spreading layer with a thickness of 2μm~4μm and a Si doping concentration of 1×10⁻⁶. 18 atoms / cm 3 ~5×10 19 atoms / cm 3 The N-type GaN current spreading layer serves as both a current spreading layer and an electron injection layer. The high Si doping concentration ensures low series resistance and good current spreading, while the thickness is controlled to ensure that the N-type semiconductor layer 400 has sufficient exposed area for N-electrode fabrication after mesa etching.

[0035] The P-type semiconductor layer 600 includes a P-type AlGaN electron blocking layer, a P-type GaN contact layer, and a P-type GaN ohmic contact layer. The thickness of the P-type AlGaN electron blocking layer is 15 nm to 25 nm, the Al composition ratio is 0.05 to 0.15, and the Mg doping concentration is 5 × 10⁻⁶. 19 atoms / cm 3 ~1×10 20 atoms / cm 3 The thickness of the p-type GaN contact layer is 100 nm to 200 nm, and the Mg doping concentration is 5 × 10⁻⁶. 19 atoms / cm 3 ~2×10 20atoms / cm 3 The thickness of the p-type GaN ohmic contact layer is 10 nm to 30 nm, and the Mg doping concentration is 1 × 10⁻⁶. 20 atoms / cm 3 ~5×10 20 atoms / cm 3 .

[0036] Correspondingly, such as Figure 4 As shown, this invention also discloses a method for preparing a Micro-LED epitaxial wafer, which includes the following steps: S1. Provide a substrate 100.

[0037] In one embodiment, the substrate 100 is a c-plane sapphire substrate. Specifically, the substrate 100 is placed in an H2 atmosphere for high-temperature thermal cleaning, followed by the introduction of H2 as a carrier gas at a flow rate of 5 slm to 10 slm, controlling the reaction chamber temperature at 1000°C to 1100°C and the pressure at 100 torr to 200 torr, and performing in-situ annealing for 5 min to 10 min to remove organic matter and particulate contaminants from the surface of the substrate 100.

[0038] S2. A buffer layer 200, an undoped semiconductor layer 300, an N-type semiconductor layer 400, a multi-quantum-well active layer 500, and a P-type semiconductor layer 600 are sequentially grown on the substrate 100.

[0039] It is understandable that layered structures can be grown by MOCVD, MBE, PVD, or VPE, but are not limited to these methods.

[0040] In one implementation, S2 includes the following steps: S21, growth buffer layer 200.

[0041] In one embodiment, an AlN buffer layer is grown using MOCVD, with the reaction chamber temperature controlled at 500℃~600℃ and the pressure at 50 torr~200 torr. NH3 is introduced as the N source at a flow rate of 1 slm~5 slm, and TMAl is introduced as the Al source at a flow rate of 20 sccm~80 sccm.

[0042] S22, grow an undoped semiconductor layer 300.

[0043] In one embodiment, MOCVD is used to grow a GaN nucleation layer and a two-dimensional merging growth layer. During the growth process, NH3 is continuously introduced to prevent GaN decomposition. The temperature of the reaction chamber is raised to 1000℃~1050℃ at a rate of 50℃ / min~100℃ / min, and the pressure is controlled at 200 torr~400 torr. NH3 is introduced as the N source at a flow rate of 30 slm~80 slm, and TMGa is introduced as the Ga source at a flow rate of 150 sccm~300 sccm to grow the GaN nucleation layer. The temperature of the reaction chamber is controlled at 1050℃~1100℃, and the pressure is controlled at 200 torr~400 torr. NH3 is introduced as the N source at a flow rate of 30 slm~80 slm, and TMGa is introduced as the Ga source at a flow rate of 150 sccm~300 sccm to grow the two-dimensional merging growth layer. The high temperature promotes a step-flow growth mode, achieving atomic-level surface smoothness.

[0044] S23, grow an N-type semiconductor layer 400.

[0045] In one embodiment, an N-type GaN current-spreading layer is grown using MOCVD. The reaction chamber temperature is controlled at 1050℃~1100℃, the pressure at 200 torr~400 torr, NH3 is introduced as an N source at a flow rate of 30 slm~80 slm, TMGa is introduced as a Ga source at a flow rate of 150 sccm~300 sccm, and SiH4 is introduced as an N-type doping source to grow the N-type GaN current-spreading layer.

[0046] S24, grow a multi-quantum-well active layer 500.

[0047] The fabrication of the multi-quantum-well active layer 500 includes: periodically growing a quantum well layer 510, a coupling layer 520, a quantum dot layer 530, and a quantum barrier layer 540 by repeated stacking using MOCVD.

[0048] Specifically, it includes the following steps: S241, grow quantum well layer 510.

[0049] In grown using MOCVD x Ga 1-x The N quantum well layer is used as the carrier gas, with the reaction chamber temperature controlled at 700℃~750℃ and the pressure at 100 torr~300 torr. NH3 is introduced as the N source at a flow rate of 30 slm~80 slm, TMGa is introduced as the Ga source at a flow rate of 50 sccm~150 sccm, and TMIn is introduced as the In source at a flow rate of 50 sccm~150 sccm.

[0050] S242, Growth coupling layer 520.

[0051] In one embodiment, an intrinsic GaN layer is grown by MOCVD as the coupling layer 520, with N2 and H2 as the carrier gases, and the reaction chamber temperature is controlled to be lower than that of the In growth layer. x Ga 1-x The N-type quantum well layer is grown at a temperature of 10°C to 80°C and a pressure of 100 torr to 300 torr. NH3 is introduced as the N source at a flow rate of 30 slm to 80 slm, and TMGa is used as the Ga source at a flow rate of 50 sccm to 150 sccm. In one embodiment, an N-type GaN layer is grown by MOCVD as the coupling layer 520, with N2 and H2 as the carrier gases, and the reaction chamber temperature is controlled to be higher than that of the In growth layer. x Ga 1-x The N quantum well layer is heated to 10℃~80℃ and the pressure is 100 torr~300 torr. NH3 is introduced as the N source with a flow rate of 30 slm~80 slm. TMGa is introduced as the Ga source with a flow rate of 50 sccm~150 sccm. SiH4 is introduced as the N-type doping source.

[0052] S243, growth of quantum dot layer 530.

[0053] In grown using MOCVD y Ga 1-y The N quantum dot layer, with N2 as the carrier gas, controls the reaction chamber temperature compared to the In growth layer. x Ga 1-x During the N quantum well layer process, the temperature is lowered by 10°C to 60°C. NH3 is introduced as the N source with a flow rate of 30 slm to 50 slm. TMIn is introduced as the In source with a flow rate of 10 sccm to 40 sccm. TMGa is introduced as the Ga source with a flow rate of 10 sccm to 40 sccm to grow an InGaN pre-deposited layer with a thickness of 0.5 nm to 3 nm. All metal-organic sources are interrupted for 1 s to 5 s, while the N source is maintained, allowing the InGaN to spontaneously recombine into quantum dots.

[0054] In one implementation, it further includes: S244, growth cap layer 550.

[0055] A GaN layer was grown by MOCVD as the capping layer 550. The carrier gases were N2 and H2. The reaction chamber temperature was controlled at 720℃~780℃ and the pressure at 100 torr~300 torr. NH3 was introduced as the N source at a flow rate of 30 slm~80 slm, and TMGa was introduced as the Ga source at a flow rate of 50 sccm~150 sccm.

[0056] S245, growth of quantum barrier layer 540.

[0057] GaN layers were grown by MOCVD as quantum barrier layers 540. The reaction chamber temperature was controlled at 800℃~850℃, the pressure at 100 torr~300 torr, NH3 was introduced as the N source at a flow rate of 30 slm~80 slm, and TMGa was introduced as the Ga source at a flow rate of 150 sccm~250 sccm.

[0058] S246, a quantum well layer 510, a coupling layer 520, a quantum dot layer 530, and a quantum barrier layer 540 are periodically grown in a repeated stack. In one embodiment, the quantum well layer 510, the coupling layer 520, the quantum dot layer 530, the capping layer 550, and the quantum barrier layer 540 are periodically grown in a repeated stack.

[0059] S25, grow a P-type semiconductor layer 600.

[0060] In one embodiment, a p-type AlGaN electron blocking layer, a p-type GaN contact layer, and a p-type GaN ohmic contact layer are grown using MOCVD. The reaction chamber temperature is controlled at 850℃~1100℃, the pressure at 150 torr~250 torr, NH3 is introduced as the N source at a flow rate of 40 slm~80 slm, TMGa is introduced as the Ga source at a flow rate of 60 sccm~200 sccm, TMAl is introduced as the Al source at a flow rate of 20 sccm~150 sccm, and Cp2Mg is introduced as the p-type doping source at a flow rate of 50 sccm~300 sccm to grow the p-type AlGaN electron blocking layer. The reaction chamber temperature was controlled at 920℃~970℃, and the pressure at 150 torr~250 torr. NH3 was introduced as the N source at a flow rate of 40 slm~90 slm, TMGa as the Ga source at a flow rate of 200 sccm~500 sccm, and Cp2Mg as the P-type dopant source at a flow rate of 200 sccm~500 sccm to grow a P-type GaN contact layer. The reaction chamber temperature was then lowered to 900℃~950℃, and NH3 was introduced as the N source at a flow rate of 10 slm~60 slm, TMGa as the Ga source at a flow rate of 100 sccm~300 sccm, and Cp2Mg as the P-type dopant source at a flow rate of 200 sccm~600 sccm to grow a P-type GaN ohmic contact layer. After growth, the reaction chamber temperature was lowered to 700℃~800℃, and in-situ annealing was performed for 5 min~10 min in an N2 atmosphere to activate the Mg acceptors.

[0061] The present invention will be further described below with reference to specific embodiments: Example 1 This embodiment provides a Micro-LED epitaxial wafer, including a substrate, and a buffer layer, an undoped semiconductor layer, an N-type semiconductor layer, a multi-quantum-well active layer, and a P-type semiconductor layer sequentially stacked on the substrate.

[0062] Multiple quantum well active layers consist of periodically alternating layers of In 0.14 Ga 0.86 N-quantum well layer, coupling layer, In 0.2 Ga 0.8 The N-quantum dot layer and the quantum barrier layer are stacked alternately, with a period of 2.

[0063] In 0.14 Ga 0.86 The thickness of the N quantum well layer is 1.8 nm.

[0064] The coupling layer is an intrinsic GaN coupling layer with a thickness of 3 nm.

[0065] In 0.2 Ga 0.8 N quantum dot layers include In 0.2 Ga 0.8 N quantum dots, In 0.2 Ga 0.8 The surface density of N quantum dots is 1×10⁻⁶. 11 cm -2 It has a height of 4nm and a bottom diameter of 15nm.

[0066] The quantum barrier layer is a GaN quantum barrier layer with a thickness of 4 nm.

[0067] Accordingly, this embodiment provides a method for fabricating a Micro-LED epitaxial wafer, wherein the fabrication of the multi-quantum-well active layer includes the following steps: (1) Growth In 0.14 Ga 0.86 N quantum well layer.

[0068] In grown using MOCVD 0.14 Ga 0.86 The N quantum well layer is used as the carrier gas, N2. The reaction chamber temperature is controlled at 720℃ and the pressure at 200 torr. NH3 is introduced as the N source at a flow rate of 40 slm, TMGa is introduced as the Ga source at a flow rate of 80 sccm, and TMIn is introduced as the In source at a flow rate of 80 sccm.

[0069] (2) Growth of coupling layer.

[0070] Intrinsic GaN layers were grown by MOCVD as coupling layers, with N2 and H2 as carrier gases. The reaction chamber temperature was controlled at 750℃ and the pressure at 200 torr. NH3 was introduced as the N source at a flow rate of 40 slm, and TMGa was introduced as the Ga source at a flow rate of 100 sccm.

[0071] (3) Growth In 0.2 Ga 0.8 N-quantum dot layer.

[0072] In grown using MOCVD 0.2 Ga 0.8 An N quantum dot layer is grown using N2 as the carrier gas. The reaction chamber temperature is controlled at 680°C. NH3 is introduced as the N source at a flow rate of 40 slm, TMIn as the In source at a flow rate of 30 sccm, and TMGa as the Ga source at a flow rate of 20 sccm. An InGaN pre-deposited layer with a thickness of 2 nm is grown. All metal-organic sources are interrupted for 3 s, while the N source is kept flowing, allowing the InGaN pre-deposited layer to self-assemble and recombine into quantum dots through strain-driven processes.

[0073] (4) Growth of quantum barrier layer.

[0074] MOCVD was used to grow a GaN layer as a quantum barrier layer. The reaction chamber temperature was controlled at 850℃ and the pressure at 200 torr. NH3 was introduced as the N source at a flow rate of 40 slm, and TMGa was introduced as the Ga source at a flow rate of 200 sccm.

[0075] (5) Repeated stacking periodic growth In 0.14 Ga 0.86 N-quantum well layer, coupling layer, In 0.2 Ga 0.8 N-quantum dot layer and quantum barrier layer.

[0076] Example 2 This embodiment provides a Micro-LED epitaxial wafer, which differs from Embodiment 1 in that the multi-quantum-well active layer includes periodically alternating layers of In... 0.14 Ga 0.86 N-quantum well layer, coupling layer, In 0.2 Ga 0.8 N-quantum dot layer, capping layer, and quantum barrier layer.

[0077] The capping layer is a GaN layer with a thickness of 1.5 nm.

[0078] Correspondingly, the fabrication methods for multi-quantum-well active regions also include those using In... 0.2 Ga 0.8 A capping layer is grown on an N quantum dot layer. The method for preparing the capping layer includes: using MOCVD to grow a GaN layer as the capping layer, with N2 and H2 as the carrier gases, controlling the reaction chamber temperature at 750℃ and the pressure at 200 torr, introducing NH3 as the N source at a flow rate of 40 slm, and using TMGa as the Ga source at a flow rate of 100 sccm.

[0079] Everything else is the same as in Example 1.

[0080] Example 3 This embodiment provides a Micro-LED epitaxial wafer, which differs from Embodiment 2 in that, in the second period, In... 0.14 Ga 0.86 The thickness of the N-quantum well layer is 2.2 nm, and the thickness of the coupling layer is 2.7 nm.

[0081] Everything else is the same as in Example 2.

[0082] Comparative Example 1 This comparative example provides a Micro-LED epitaxial wafer, which differs from Example 1 in that the multi-quantum-well active layer includes periodically alternating layers of In... 0.14 Ga 0.86 N-quantum well layer and quantum barrier layer.

[0083] Everything else is the same as in Example 1.

[0084] Comparative Example 2 This comparative example provides a Micro-LED epitaxial wafer, which differs from Example 1 in that the multi-quantum-well active layer includes periodically alternating layers of In... 0.2 Ga 0.8 N-quantum dot layer and quantum barrier layer.

[0085] Everything else is the same as in Example 1.

[0086] The Micro-LED epitaxial wafers prepared in Examples 1-3, Comparative Example 1, and Comparative Example 2 were subjected to performance testing, and the specific results are as follows:

[0087] Analysis of the performance test results shows that: (1) Example 1 achieved a 3dB modulation bandwidth of 2.5GHz and 160mW / mm². 2 The optical output power is [value missing], and the equivalent carrier lifetime is 350 ps. The results indicate that in a quantum well layer (In [missing information]... 0.14 Ga 0.86 N) and quantum dot layer (In) 0.2 Ga 0.8 After introducing a coupling layer (intrinsic GaN, 3nm) between the two, the charge carriers are efficiently collected by the quantum well and then transferred to the quantum dot through the synergistic mechanism of quantum mechanical tunneling and thermal emission. They recombine rapidly in the quantum dot with a lifetime of hundreds of picoseconds, thus simultaneously achieving high charge carrier collection efficiency (corresponding to high optical power) and ultrafast radiative recombination.

[0088] (2) The difference between Example 2 and Example 1 is that a capping layer (GaN, 1.5nm) is added, which increases the 3dB modulation bandwidth to 2.8GHz and the LOP to 170mW / mm. 2The equivalent carrier lifetime was 340 ps. The results indicate that the capping layer, acting as a surface sealing and protective layer for the quantum dot layer, effectively suppressed non-radiative recombination centers on the quantum dot surface, reduced carrier loss in the quantum dot region, and allowed more carriers to participate in radiative recombination. This, in turn, further improved the optical output power and modulation bandwidth while maintaining a short carrier lifetime.

[0089] (3) The difference between Example 3 and Example 2 lies in the use of a thickness gradient design: in the second cycle, the thickness of the quantum well layer increases from 1.8 nm to 2.2 nm, while the thickness of the coupling layer decreases from 3 nm to 2.7 nm. Its 3dB modulation bandwidth reaches 3.2 GHz, and its LOP reaches 180 mW / mm². 2 The equivalent carrier lifetime was 300 ps, ​​which is the highest bandwidth, highest LOP, and shortest equivalent carrier lifetime among all embodiments. The results show that the gradient design of increasing quantum well layers and decreasing coupling layers along the epitaxial direction matches the natural decay distribution of carrier concentration from the N-type semiconductor layer to the P-type semiconductor layer, making carrier capture and recombination more uniform in each cycle, improving the overall internal quantum efficiency, and thus achieving higher modulation bandwidth and optical output power at the same time.

[0090] (4) Comparative Example 1 (pure quantum well structure, In) 0.14 Ga 0.86 The highest LOP (200mW / mm) was achieved with N quantum well + GaN quantum barrier. 2 However, the 3dB modulation bandwidth is only 1.2GHz, and the equivalent carrier lifetime is 800ps. This result shows that although the pure quantum well structure has a high two-dimensional density of states and a large carrier trapping cross section, resulting in high optical output power, it is affected by the quantum confinement Stark effect and carrier thermal escape, leading to an excessively long radiative recombination lifetime and limited modulation bandwidth, making it difficult to meet the requirements of high-speed visible light communication.

[0091] (5) Comparative Example 2 (pure quantum dot structure, In) 0.2 Ga 0.8 The N-quantum dot + GaN quantum barrier combination has the shortest equivalent carrier lifetime (200 ps), but its 3dB modulation bandwidth is only 1.6 GHz and its LOP is only 50 mW / mm². 2 These results demonstrate that while pure quantum dot structures possess strong three-dimensional confinement effects and short radiative recombination lifetimes, their low areal density and weak carrier collection ability mean that a large number of carriers fail to be effectively captured by the quantum dots and overflow into the non-radiative recombination channel, leading to a significant reduction in optical output power. Furthermore, due to insufficient carrier collection efficiency, the overall modulation bandwidth of the device also fails to reach the theoretical limit of quantum dots. This further illustrates that relying solely on quantum dot structures cannot achieve a balance between high optical power and high modulation bandwidth.

[0092] A comparison of Examples 1-3 with Comparative Examples 1 and 2 reveals that the present invention introduces a coupling layer between the quantum well layer and the quantum dot layer, and controls the composition relationship of y>x. This allows the quantum well to act as a high-carrier collector and the quantum dot to act as an ultrafast radiative recombination center. The two are connected by the coupling layer to achieve picosecond-level carrier transfer, thus simultaneously achieving a modulation bandwidth of 2.5 GHz to 3.2 GHz and 160 mW / mm². 2 ~180mW / mm 2 The optical output power. This effect cannot be achieved by simply superimposing quantum wells and quantum dots, but depends on the synergistic mechanism of quantum mechanical tunneling and thermal emission in the coupling layer, as well as the synergistic design of morphological and compositional parameters.

[0093] The above description is a preferred embodiment of the invention. It should be noted that, for those skilled in the art, several improvements and modifications can be made without departing from the principle of the invention, and these improvements and modifications are also considered to be within the scope of protection of the invention.

Claims

1. A Micro-LED epitaxial wafer, characterized in that, It includes a substrate, and a buffer layer, an undoped semiconductor layer, an N-type semiconductor layer, a multi-quantum-well active layer and a P-type semiconductor layer sequentially stacked on the substrate; The multi-quantum-well active layer comprises periodically alternating layers of quantum wells, coupling layers, quantum dot layers, and quantum barrier layers; the quantum well layers are In... x Ga 1-x The N-type quantum well layer, the coupling layer being a group III nitride layer, and the quantum dot layer being In... y Ga 1- y N quantum dot layers, where y > x.

2. The Micro-LED epitaxial wafer as described in claim 1, characterized in that, The value of yx ranges from 0.03 to 0.15; The In x Ga 1-x The value of x in the N-quantum well layer ranges from 0.05 to 0.

35.

3. The Micro-LED epitaxial wafer as described in claim 1, characterized in that, The In y Ga 1-y N quantum dot layers include In y Ga 1-y N quantum dots, the In y Ga 1-y The areal density of N quantum dots is 5 × 10⁻⁶. 9 cm -2 ~5×10 11 cm -2 The In y Ga 1-y The height of N quantum dots ranges from 2nm to 10nm, and the bottom diameter ranges from 8nm to 30nm.

4. The Micro-LED epitaxial wafer as described in claim 1, characterized in that, The In x Ga 1-x The thickness of the N quantum well layer is 1 nm to 10 nm; the thickness of the coupling layer is 1 nm to 6 nm; the quantum barrier layer is a GaN quantum barrier layer or an AlGaN quantum barrier layer, with a thickness of 2 nm to 15 nm.

5. The Micro-LED epitaxial wafer as described in claim 1, characterized in that, The coupling layer is an intrinsic group III nitride layer; or the coupling layer is an N-type group III nitride layer with an N-type doping concentration ≤ 5 × 10⁻⁶. 17 atoms / cm 3 .

6. The Micro-LED epitaxial wafer as described in claim 1, characterized in that, The number of alternating stacked active layers of the multi-quantum well is 2 to 8.

7. The Micro-LED epitaxial wafer as described in claim 1, characterized in that, The In x Ga 1-x The thickness of the N-quantum well layer increases with the number of periods, with an increment of 0.2 nm to 1 nm. The thickness of the coupling layer decreases with increasing period number, with a decrease of 0.3 nm to 1 nm.

8. The Micro-LED epitaxial wafer as described in claim 1, characterized in that, The multi-quantum well active layer also includes a capping layer disposed between the quantum dot layer and the quantum barrier layer. The capping layer is a GaN layer with a thickness of 1 nm to 5 nm.

9. A method for preparing a Micro-LED epitaxial wafer, used to prepare a Micro-LED epitaxial wafer as described in any one of claims 1 to 8, characterized in that, Includes the following steps: A substrate is provided on which a buffer layer, an undoped semiconductor layer, an N-type semiconductor layer, a multiple quantum well active layer, and a P-type semiconductor layer are sequentially grown. The multi-quantum-well active layer comprises periodically alternating layers of quantum wells, coupling layers, quantum dot layers, and quantum barrier layers; the quantum well layers are In... x Ga 1-x The N-type quantum well layer, the coupling layer being a group III nitride layer, and the quantum dot layer being In... y Ga 1- y N quantum dot layers, where y > x.

10. The method for preparing a Micro-LED epitaxial wafer as described in claim 9, characterized in that, The growth temperature of the coupling layer is greater than that of In. x Ga 1-x The growth temperature of the N quantum well layer, the In y Ga 1-y The growth temperature of the N quantum dot layer is lower than that of the In. x Ga 1-x Growth temperature of N-quantum well layer; The In x Ga 1-x The growth temperature of the N quantum well layer is 600℃~800℃, and the coupling layer and the In x Ga 1-x The growth temperature difference of the N quantum well layer is 10℃~80℃, and the In y Ga 1-y N quantum dot layer and the In x Ga 1-x The growth temperature difference of the N quantum well layer is 10℃~60℃; The In y Ga 1-y The growth of the N quantum dot layer includes the following steps: introducing an In source, a Ga source, and an N source to grow a pre-deposited layer with a thickness of 0.5 nm to 3 nm; interrupting the metal-organic source while maintaining the N source supply, so that the pre-deposited layer can self-assemble and recombine into quantum dots through strain-driven processes.

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