LED epitaxial structure, manufacturing method thereof and LED chip

Abstract

This application provides an LED epitaxial structure, its fabrication method, and an LED chip. The LED epitaxial structure is disposed on one side surface of a growth substrate and includes: an epitaxial stack; the epitaxial stack includes an N-type confinement layer, an active layer, and a P-type confinement layer stacked sequentially. The P-type confinement layer includes an undoped layer and a P-type doped layer stacked sequentially in a direction away from the active layer; the undoped layer includes a first sub-layer and a third sub-layer stacked sequentially in a direction away from the active layer; the P-type doped layer includes a fourth sub-layer; the fourth sub-layer includes P-type Al x In （1‑x） P, 0 < x < 1; the first sub-layer includes Al y In （1‑y） P, 0 < y < 1, and y < x; the third sub-layer includes Al. z In （1‑z） P, 0 < z < 1, and z = x; the third sublayer growth has a pause period, during which high-purity hydrogen is used for purging before growth resumes. This P-type confinement layer can prevent dopant from diffusing into the active layer and causing nonradiative recombination, and can effectively suppress the incorporation of oxygen impurities.

Description

Technical Field

[0001] This invention relates to the field of light-emitting diode technology, and more specifically, to an LED epitaxial structure and its fabrication method, and an LED chip. Background Technology

[0002] Light-emitting diodes (LEDs), as a representative of solid-state semiconductor light-emitting technology, utilize the property of electrons and holes recombination in semiconductor materials to release photons, efficiently converting electrical energy into light energy of a specific wavelength. The breakthrough and application of the AlGaInP (aluminum gallium indium phosphide) material system is a milestone in the development of red LEDs. This quaternary compound semiconductor material, by precisely controlling the proportions of its elemental components, can effectively cover the red, orange, and yellow light bands. Due to its excellent luminous efficiency, superior color purity (high-saturation red light), and outstanding long-term operational stability, it is widely used in signal lights, displays, optoelectronic sensors, plant lighting, and other applications.

[0003] In AlGaInP-based red LED chips, the P-type confinement layer is crucial for effectively limiting carrier (hole) recombination and luminescence in the active region. Typically, a high-Al content AlInP layer, matched to the GaAs substrate, is used to increase the band gap with the active layer and improve carrier confinement. However, the following problems exist when growing the P-type AlInP confinement layer: First, high-Al content materials readily combine with oxygen impurities from the environment or raw materials during MOCVD (metal-organic chemical vapor deposition) growth, leading to an increase in oxygen atom concentration in the lattice, forming deep-level defect centers, causing non-radiative recombination, and reducing the device's luminous efficiency. Second, to obtain a higher hole concentration, a high concentration of P-type doping (e.g., Mg doping) is required in the P-type confinement layer. This exacerbates the longitudinal diffusion of the dopant into the active region, resulting in non-radiative recombination and impairing device lifetime and luminous efficiency.

[0004] Therefore, how to prevent dopants from diffusing into the active layer and suppress the incorporation of oxygen impurities in order to improve the lifespan and luminous efficiency of LED chips has become an urgent problem to be solved. Summary of the Invention

[0005] In view of this, the present invention provides an LED epitaxial structure and its manufacturing method, as well as an LED chip, which can prevent the dopant in the P-type confinement layer from diffusing to the active layer to generate non-radiative recombination, and can effectively suppress the incorporation of oxygen impurities.

[0006] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0007] An LED epitaxial structure, disposed on one side surface of a growth substrate, includes:

[0008] Epitaxial stack; the epitaxial stack includes an N-type confinement layer, an active layer and a P-type confinement layer stacked sequentially;

[0009] The P-type confinement layer includes an undoped layer and a P-type doped layer stacked sequentially along a direction away from the active layer;

[0010] The undoped layer includes a first sub-layer and a third sub-layer stacked sequentially along a direction away from the active layer; the P-type doped layer includes a fourth sub-layer.

[0011] The fourth sublayer includes P-type Al x In （1-x） P, 0 < x < 1;

[0012] The first sublayer includes Al y In （1-y） P, 0 < y < 1, and y < x;

[0013] The third sublayer includes Al z In （1-z） P, 0 < z < 1, and z = x;

[0014] The growth of the third sublayer includes a pause period, during which growth is resumed after purging with high-purity hydrogen.

[0015] Optionally, the undoped layer further includes a second sublayer Al located between the first sublayer and the third sublayer. m In （1-m） P;

[0016] Along the direction away from the active layer, the Al component m of the second sublayer gradually changes from y to z.

[0017] Optionally, the value range of the Al component y in the first sublayer is 0.4 ≤ y ≤ 0.45;

[0018] In the fourth sublayer, P-type Al x In （1-x） The Al component of P has x=0.5;

[0019] Al in the third sub-layer z In （1-z） The Al component of P has a value of z=0.5.

[0020] Optionally, the pause in growth is defined as a pause in growth for 10-30 seconds after every 10 nm growth of the third sublayer, including the endpoint values.

[0021] Optionally, the thickness of the undoped layer is less than the thickness of the fourth sublayer.

[0022] Optionally, a buffer layer located between the growth substrate and the N-type confinement layer is also included;

[0023] And / or, it also includes an etching stop layer located between the growth substrate and the N-type confinement layer;

[0024] And / or, it also includes an N-type ohmic contact layer located on the side of the N-type confinement layer opposite to the active layer;

[0025] And / or, it also includes an N-type current spreading layer located on the side of the N-type confinement layer opposite to the active layer;

[0026] And / or, it also includes a P-type window layer located on the side of the P-type confinement layer opposite to the active layer.

[0027] The present invention also provides an LED chip, which includes a target substrate, an N electrode, a P electrode, and an LED epitaxial structure as described in any one of the above; the LED epitaxial structure is disposed on one side surface of the target substrate, the N electrode is electrically connected to the N-type confinement layer, and the P electrode is electrically connected to the P-type confinement layer.

[0028] The present invention also provides a method for fabricating an LED epitaxial structure, comprising:

[0029] Provide a growth substrate;

[0030] The LED epitaxial structure is fabricated on one side surface of the growth substrate: an epitaxial stack is grown on one side surface of the growth substrate; the epitaxial stack includes an N-type confinement layer, an active layer and a P-type confinement layer grown sequentially.

[0031] The P-type confinement layer includes an undoped layer and a P-type doped layer grown sequentially in a direction away from the active layer;

[0032] The undoped layer includes a first sublayer and a third sublayer grown sequentially in a direction away from the active layer; the P-type doped layer includes a fourth sublayer.

[0033] The fourth sublayer includes P-type Al x In （1-x） P, 0 < x < 1;

[0034] The first sublayer includes Al y In （1-y） P, 0 < y < 1, and y < x;

[0035] The third sublayer includes Al z In （1-z） P, 0 < z < 1, and z = x;

[0036] The growth of the third sublayer includes a pause period, during which growth is resumed after purging with high-purity hydrogen.

[0037] Optionally, after growing the first sublayer and before growing the third sublayer, the undoped layer further includes growing a second sublayer Al on the side of the first sublayer opposite to the active layer. m In （1-m） P;

[0038] Along the direction away from the active layer, the Al component m of the second sublayer gradually changes from y to z.

[0039] Optionally, the pause in growth is defined as a pause in growth for 10-30 seconds after every 10 nm growth of the third sublayer, including the endpoint values.

[0040] Optionally, during the paused growth of the third sublayer, the group III source is shut down while the group V source flow is maintained.

[0041] Optionally, the growth temperature of the fourth sublayer is lower than the growth temperature of the undoped layer.

[0042] Optionally, the V / III ratio for growing the fourth sublayer is lower than the V / III ratio for growing the undoped layer.

[0043] Compared with existing technologies, the technical solution provided by this invention has at least the following advantages:

[0044] An LED epitaxial structure is disposed on one side surface of a growth substrate, comprising: an epitaxial stack; the epitaxial stack includes an N-type confinement layer, an active layer, and a P-type confinement layer stacked sequentially; the P-type confinement layer includes an undoped layer and a P-type doped layer stacked sequentially in a direction away from the active layer; the undoped layer includes a first sub-layer and a third sub-layer stacked sequentially in a direction away from the active layer; the P-type doped layer includes a fourth sub-layer; the fourth sub-layer includes P-type Al x In （1-x） P, 0 < x < 1; the first sub-layer includes Al y In （1-y） P, 0 < y < 1, and y < x; the third sub-layer includes Al. z In （1-z） P, 0 < z < 1, and z = x; the third sublayer has a pause period during growth, and growth is resumed after purging with high-purity hydrogen during the pause period.

[0045] Based on the above structure, the P-type confinement layer of this LED epitaxial structure has an undoped layer on the side near the active layer. On the one hand, this concentrates the doping in the fourth sub-layer away from the active layer, which can prevent the dopant from diffusing to the active layer and generating non-radiative recombination, so that the P-type confinement layer has good hole injection capability. On the other hand, optimizing the undoped layer can effectively suppress the incorporation of oxygen impurities.

[0046] The fourth sublayer of the p-type doped layer, which forms the main body of the p-type confinement layer, has a high Al content and its main function is to confine charge carriers and provide holes. During growth, trace amounts of water vapor and oxygen in the reaction chamber, as well as oxygen release from the oxygen-containing cavity at high temperatures, contribute to this process. The high Al content facilitates the combination of Al and oxygen impurities, forming Al-O bonds with high chemical bond energy, which are difficult to decompose and desorb, and stably incorporated into the crystal lattice. These deep-level defect centers trap charge carriers, leading to a decrease in luminescence efficiency. The first sublayer of the undoped layer has a lower Al content than the fourth sublayer. As a low-Al-content buffer layer, using a lower Al content reduces oxygen adsorption sites, lowers the oxygen adsorption activity of the material in the early stages of p-type confinement layer growth, and simultaneously achieves better crystal quality. The Al composition of the third sublayer is the same as that of the fourth sublayer. A pause period is incorporated to allow epitaxial growth and high-purity hydrogen purging to alternate. The purging gas effectively removes oxygen adsorbed within the reaction chamber and on the growth surface. This intermittent epitaxy mode provides periodic cleaning of the growth surface, reducing the probability of oxygen impurities incorporating into the lattice and laying a solid foundation for the growth of the fourth sublayer. Furthermore, intermittent purging of only the third sublayer avoids affecting the P-type doping efficiency of the fourth sublayer. Attached Figure Description

[0047] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0048] Figure 1 A cross-sectional structural schematic diagram of one embodiment of an LED epitaxial structure;

[0049] Figure 2 A cross-sectional structural schematic diagram of another embodiment of the LED epitaxial structure;

[0050] Figure 3 A cross-sectional structural diagram of another embodiment of the LED epitaxial structure;

[0051] Figure 4 A flowchart illustrating a method for fabricating an embodiment of an LED epitaxial structure;

[0052] Figure 5 A flowchart illustrating a method for fabricating another embodiment of an LED epitaxial structure;

[0053] Figure 6 A cross-sectional structural diagram of a growth process of an embodiment of an LED epitaxial structure;

[0054] Figure 7 This is a cross-sectional structural diagram of one embodiment of an LED chip.

[0055] Figure label:

[0056] Growth substrate 11; target substrate 12; N-type confinement layer 300; active layer 4; P-type confinement layer 400; first sublayer 400a; second sublayer 400b; third sublayer 400c; fourth sublayer 400d; buffer layer 10; etch stop layer E; N-type ohmic contact layer 60; N-type current spreading layer 40; P-type window layer 700; N-electrode 91; P-electrode 92. Detailed Implementation

[0057] To make the content of this invention clearer, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0058] Many specific details are set forth in the following description in order to provide a full understanding of this application. However, this application may also be implemented in other ways different from those described herein. Those skilled in the art can make similar extensions without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.

[0059] Secondly, this application provides a detailed description in conjunction with schematic diagrams. When detailing the embodiments of this application, for ease of explanation, the cross-sectional views illustrating the device structure may be partially enlarged, not adhering to the usual scale. Furthermore, the schematic diagrams are merely examples and should not limit the scope of protection of this application. In actual fabrication, the three-dimensional spatial dimensions of length, width, and depth should be included. In this application, unless specifically stated otherwise, all numerical ranges include endpoint values.

[0060] To address the problems mentioned in the background art, this application provides an LED epitaxial structure.

[0061] refer to Figure 1The LED epitaxial structure is disposed on one side surface of the growth substrate 11 and includes an epitaxial stack. The epitaxial stack includes an N-type confinement layer 300, an active layer 4, and a P-type confinement layer 400 stacked sequentially. The P-type confinement layer 400 includes an undoped layer and a P-type doped layer stacked sequentially in a direction away from the active layer 4; the undoped layer includes a first sublayer 400a and a third sublayer 400c stacked sequentially in a direction away from the active layer 4, and the P-type doped layer includes a fourth sublayer 400d.

[0062] The fourth sublayer 400d includes P-type Al x In （1-x） P, 0 < x < 1. The first sublayer 400a includes Al. y In （1-y） P, 0 < y < 1, and y < x; that is, the Al composition of the first sublayer 400a is lower than that of the fourth sublayer 400d. The third sublayer 400c includes Al z In （1-z） P, 0 < z < 1, and z = x; that is, the Al composition of the third sublayer 400c is the same as that of the fourth sublayer 400d. The growth of the third sublayer 400c has a pause period, during which high-purity hydrogen is used for purging before growth resumes; that is, epitaxial growth and high-purity hydrogen purging are alternated during the growth of the third sublayer 400c.

[0063] The P-type confinement layer 400 of the LED epitaxial structure has an undoped layer on the side near the active layer 4. On the one hand, this concentrates the doping in the fourth sub-layer 400d away from the active layer 4, which can prevent the dopant from diffusing to the active layer 4 and generating non-radiative recombination, so that the P-type confinement layer 400 has good hole injection capability. On the other hand, optimizing the undoped layer can effectively suppress the incorporation of oxygen impurities.

[0064] The fourth sublayer 400d of the p-type doped layer is the main part of the p-type confinement layer 400, with a high Al content. Its main function is to confine charge carriers and provide holes. During growth, trace amounts of water vapor and oxygen in the reaction chamber, as well as oxygen release caused by the high temperature of the oxygen-containing cavity, contribute to this process. The high Al content makes it easier for the Al to combine with oxygen impurities, forming Al-O bonds with high chemical bond energy. These bonds are difficult to decompose and desorb, and are stably incorporated into the crystal lattice. The deep-level defect centers formed trap charge carriers, leading to a decrease in luminescence efficiency. The first sublayer 400a of the undoped layer has a lower Al content than the fourth sublayer 400d. As a low-Al-content buffer layer, using a lower Al content reduces oxygen adsorption sites, thereby decreasing the oxygen adsorption activity of the material in the early stages of p-type confinement layer 400 growth and achieving better crystal quality. The Al composition of the third sublayer 400c is the same as that of the fourth sublayer 400d. A pause period is incorporated to allow epitaxial growth and high-purity hydrogen purging to alternate. The purging gas effectively removes oxygen adsorbed within the reaction chamber and on the growth surface. This intermittent epitaxy mode provides periodic cleaning of the growth surface, reducing the probability of oxygen impurities incorporating into the lattice and laying a solid foundation for the growth of the fourth sublayer 400d. Furthermore, intermittent purging of only the third sublayer 400c avoids affecting the P-type doping efficiency of the fourth sublayer 400d.

[0065] refer to Figure 2 In an optional embodiment based on the above embodiments, the undoped layer further includes a second sublayer Al located between the first sublayer 400a and the third sublayer 400c. m In （1-m） P; Along the direction away from the active layer 4, the Al composition m of the second sublayer 400b gradually changes from y to z.

[0066] This embodiment further incorporates a second sublayer 400b, with the Al composition m of the second sublayer 400b gradually changing from y to z along the direction away from the active layer 4. This achieves a smooth transition in the bandgap and lattice, reducing interface defects introduced by abrupt composition changes and ensuring that holes can smoothly enter the active layer 4. The resulting four-layer composite P-type confinement layer 400 can better prevent dopant diffusion to the active layer 4 and provides good hole injection capability, while solving the problem of increased nonradiative recombination and reduced luminous efficiency caused by the easy introduction of oxygen impurities due to high Al composition.

[0067] Preferably, the Al composition m of the second sublayer 400b gradually changes from y to z, which can achieve a smoother transition of energy bands and lattice.

[0068] Based on any of the above embodiments, in an optional embodiment, the Al component y in the first sublayer 400a has a value range of 0.4 ≤ y ≤ 0.45. In the fourth sublayer 400d, P-type Al... x In （1-x）The Al component of P is x=0.5. The third sublayer at 400c contains Al. z In （1-z） The Al component of P has a value of z=0.5.

[0069] Since the fourth sublayer 400d serves as the main body of the P-type confinement layer 400, a higher Al composition is needed to increase the band gap with the active layer 4 to improve carrier confinement capability. Therefore, an Al composition x of 0.5 is preferable for the fourth sublayer 400d. For the first sublayer 400a, too low an Al composition can easily lead to mismatch, while too high an Al composition is less effective in reducing oxygen adsorption sites. Therefore, an Al composition of 0.4-0.45 for the first sublayer 400a is preferable.

[0070] Based on any of the above embodiments, in an optional embodiment, the growth pause period is 10s-30s after every 10nm growth of the third sublayer 400c, including the endpoint value.

[0071] More preferably, during the paused growth of the third sublayer 400c, the group III source (i.e., Al source and In source) is turned off, while the group V source (i.e., P source) flow is maintained.

[0072] More preferably, the growth temperature of the fourth sublayer 400d is lower than the growth temperature of the undoped layer. That is, the growth temperature of the fourth sublayer 400d is lower than the growth temperatures of both the first sublayer 400a and the third sublayer 400c; or, the growth temperature of the fourth sublayer 400d is lower than the growth temperatures of all three sublayers: the first sublayer 400a, the second sublayer 400b, and the third sublayer 400c.

[0073] More preferably, the V / III ratio of the fourth sublayer 400d is lower than the V / III ratio of the undoped layer. That is, the V / III ratio of the fourth sublayer 400d is lower than the V / III ratio of both the first sublayer 400a and the third sublayer 400c; or, the V / III ratio of the fourth sublayer 400d is lower than the V / III ratio of all three sublayers 400a, 400b, and 400c.

[0074] Based on any of the above embodiments, in an optional embodiment, the thickness of the undoped layer is less than the thickness of the fourth sublayer 400d. That is, the sum of the thicknesses of the first sublayer 400a and the third sublayer 400c is less than the thickness of the fourth sublayer 400d, or the sum of the thicknesses of the first sublayer 400a, the second sublayer 400b, and the third sublayer 400c is less than the thickness of the fourth sublayer 400d.

[0075] Optionally, the thickness of the first sublayer 400a is preferably 20nm-30nm, including the endpoint values. The thickness of the second sublayer 400b is preferably 10nm-20nm, including the endpoint values. The thickness of the third sublayer 400c is preferably 30nm-40nm, including the endpoint values. The thickness of the fourth sublayer 400d is preferably 120nm-150nm.

[0076] The primary function of the undoped layer is to suppress the incorporation of oxygen impurities and prevent dopant from diffusing longitudinally into the active layer 4, thus reducing the density of non-radiative recombination centers. Therefore, the undoped layer does not need to be too thick. If the undoped layer is too thick, it will form a high-resistivity layer, increasing the operating voltage and hindering hole injection into the active layer 4, leading to a decrease in luminous efficiency. The fourth sublayer 400d is the main part of the P-type confinement layer 400. Typically, the hole mobility is low, so this layer requires high-concentration Mg doping. To avoid carrier aggregation, it needs to be thickened to enhance current spreading and improve light extraction efficiency. Therefore, setting the thickness of the undoped layer to be smaller than the thickness of the fourth sublayer 400d helps improve the light extraction efficiency of the LED epitaxial structure device.

[0077] Based on any of the above embodiments, in an optional embodiment, the LED epitaxial structure further includes a buffer layer 10 located between the growth substrate 11 and the N-type confinement layer 300. And / or, the LED epitaxial structure further includes an etching stop layer E located between the growth substrate 11 and the N-type confinement layer 300. And / or, the LED epitaxial structure further includes an N-type ohmic contact layer 60 located on the side of the N-type confinement layer 300 opposite to the active layer 4. And / or, the LED epitaxial structure further includes an N-type current spreading layer 40 located on the side of the N-type confinement layer 300 opposite to the active layer 4. And / or, the LED epitaxial structure further includes a P-type window layer 700 located on the side of the P-type confinement layer 40 opposite to the active layer 4. That is, the LED epitaxial structure may further include one or more of the above-mentioned buffer layer 10, etching stop layer E, N-type ohmic contact layer 60, N-type current spreading layer 40, and P-type window layer 700, depending on actual needs.

[0078] refer to Figure 3 In this embodiment, the LED epitaxial structure further includes a buffer layer 10, an etch stop layer E, an N-type ohmic contact layer 60, an N-type current spreading layer 40, and a P-type window layer 700 as an example. The buffer layer 10, etch stop layer E, N-type ohmic contact layer 60, and N-type current spreading layer 40 are sequentially stacked along the direction close to the N-type confinement layer 300. The P-type window layer 700 is located on the surface of the P-type confinement layer 400 facing away from the active layer 4.

[0079] Buffer layer 10 includes, but is not limited to, N-type GaAs. Etching stop layer E includes, but is not limited to, N-type GaInP. N-type ohmic contact layer 60 includes, but is not limited to, N-type GaAs. N-type current spreading layer 40 includes, but is not limited to, N-type (Al) a Ga 1-a ) 0.5 In 0.5 P, 0 < a < 1. P-type window layer 700 includes, but is not limited to, P-type GaP.

[0080] This application also provides a method for manufacturing an LED epitaxial structure, which can manufacture the LED epitaxial structure described in any of the above embodiments.

[0081] refer to Figure 4 The methods for fabricating LED epitaxial structures include:

[0082] S1: A growth substrate 11 is provided. Optionally, the growth substrate 11 includes, but is not limited to, GaAs.

[0083] S2: Fabricating an LED epitaxial structure on one side of the growth substrate: An epitaxial stack is grown on one side of the growth substrate 11. For example... Figure 1 As shown, the epitaxial stack includes an N-type confinement layer 300, an active layer 4, and a P-type confinement layer 400 grown sequentially.

[0084] The P-type confinement layer 400 includes an undoped layer and a P-type doped layer grown sequentially in a direction away from the active layer 4. The undoped layer includes a first sublayer 400a and a third sublayer 400c grown sequentially in a direction away from the active layer 4; the P-type doped layer includes a fourth sublayer 400d. The fourth sublayer 400d includes P-type Al x In （1-x） P, 0 < x < 1. The first sublayer 400a includes Al. y In （1-y） P, 0 < y < 1, and y < x; the third sublayer 400c includes Al z In （1-z） P, 0 < z < 1, and z = x. The growth of the third sublayer 400c has a pause period, during which high-purity hydrogen is used for purging before growth resumes. That is, the Al composition of the first sublayer 400a is lower than that of the fourth sublayer 400d, and the Al composition of the third sublayer 400c is the same as that of the fourth sublayer 400d.

[0085] Alternatively, the growth method may employ metal-organic chemical vapor deposition (MOCVD).

[0086] Optionally, the N-type confinement layer 300 can be N-type AlInP, with the growth temperature maintained at 680-740℃, and TMAl, TMIn, PH3 and SiH4 introduced.

[0087] The active layer 4 can be an AlGaInP multi-quantum-well structure. The growth temperature is maintained at 660-740℃, and TMAl, TMGa, TMIn and PH3 are introduced.

[0088] refer to Figure 5 In step S2, more preferably, such as Figure 2 As shown, after the growth of the first sublayer 400a and before the growth of the third sublayer 400c, the undoped layer also includes the growth of a second sublayer Al on the side of the first sublayer 400a opposite to the active layer 4. m In （1-m） P; Along the direction away from the active layer 4, the Al composition m of the second sublayer 400b gradually changes from y to z. Then, a third sublayer 400c is grown on the side of the second sublayer 400b away from the first sublayer 400a. Preferably, the Al composition m of the second sublayer 400b gradually changes from y to z, which can achieve a smoother transition of energy bands and lattice.

[0089] Preferably, the value range of the Al component y in the first sublayer is 0.4 ≤ y ≤ 0.45. In the fourth sublayer, P-type Al... x In （1-x） The Al component of P is x=0.5, and the Al in the third sublayer is... z In （1-z） The Al component of P has a value of z=0.5.

[0090] Preferably, in step S2, the growth pause period is 10s-30s after every 10nm growth of the third sublayer 400c, including the endpoint value.

[0091] Preferably, in step S2, the group III source is shut off during the paused growth of the third sublayer 400c, while the group V source flow is maintained. The group III source is an Al source and an In source, optionally TMAl or TMIn. The group V source is a P source, optionally PH3.

[0092] Since oxygen impurities adsorb onto the growth surface, if growth is not interrupted, the continuously supplied Group III sources (i.e., Al and In sources) during purging will immediately cover the oxygen impurities. The purging gas cannot fully contact the oxygen impurities on the surface, resulting in a significant reduction in purging efficiency. Therefore, during the pause in growth at the third sublayer 400c, the Group III sources are shut off to allow the purging gas to fully contact the oxygen impurities on the surface, effectively removing the oxygen adsorbed in the reaction chamber and on the growth surface. Since the fourth sublayer 400d requires the same Group V source (i.e., P source), maintaining the Group V source flow rate can prevent defects or cracking on the growth surface.

[0093] Preferably, in step S2, the growth temperature of the fourth sublayer 400d is lower than the growth temperature of the undoped layer.

[0094] Preferably, in step S2, the V / Ⅲ ratio of the fourth sublayer 400d is lower than the V / Ⅲ ratio of the undoped layer.

[0095] It should be understood that the growth temperature of the fourth sublayer 400d can be set lower than that of the undoped layer; the V / III ratio of the fourth sublayer 400d can be set lower than that of the undoped layer; or the growth temperature of the fourth sublayer 400d can be set lower than that of the undoped layer, and the V / III ratio of the fourth sublayer 400d can also be set lower than that of the undoped layer. This application will illustrate the third case as an example.

[0096] Optionally, the growth temperature of the first sublayer 400a, the second sublayer 400b, and the third sublayer 400c is 670℃-750℃, including the endpoint values. The V / III ratio for the growth of the first sublayer 400a, the second sublayer 400b, and the third sublayer 400c is 220-260, including the endpoint values. The growth temperature of the p-type AlInP layer is 650℃-730℃, including the endpoint values. The V / III ratio for the growth of the p-type AlInP layer is 190-240, including the endpoint values; Cp₂Mg is introduced for p-type doping.

[0097] The lower growth temperature and V / III ratio used for growing the fourth sublayer 400d help improve P-type doping efficiency and achieve a high hole concentration. Since oxygen concentration decreases with increasing temperature and V / III ratio, a higher growth temperature and V / III ratio are used for growing the undoped layer. In summary, the P-type confinement layer 400 effectively suppresses oxygen impurity incorporation while ensuring good hole confinement and injection capabilities, reducing the density of non-radiative recombination centers, and improving the lifetime and light extraction efficiency of LED epitaxial devices.

[0098] Preferably, in step S2, the thickness of the undoped layer is less than the thickness of the fourth sublayer 400d. That is, the sum of the thicknesses of the first sublayer 400a and the third sublayer 400c is less than the thickness of the fourth sublayer 400d, or the sum of the thicknesses of the first sublayer 400a, the second sublayer 400b, and the third sublayer 400c is less than the thickness of the fourth sublayer 400d.

[0099] Optionally, the thickness of the first sublayer 400a is preferably 20 nm - 30 nm, including the endpoint values. The thickness of the second sublayer 400b is preferably 10 nm - 20 nm, including the endpoint values. The thickness of the third sublayer 400c is preferably 30 nm - 40 nm, including the endpoint values. The thickness of the fourth sublayer 400d is preferably 120 nm - 150 nm.

[0100] In some embodiments, the LED epitaxial structure may optionally further include a buffer layer 10 located between the growth substrate 11 and the N-type confinement layer 300. And / or, the LED epitaxial structure may further include an etching stop layer E located between the growth substrate 11 and the N-type confinement layer 300. And / or, the LED epitaxial structure may further include an N-type ohmic contact layer 60 located on the side of the N-type confinement layer 300 opposite to the active layer 4. And / or, the LED epitaxial structure may further include an N-type current spreading layer 40 located on the side of the N-type confinement layer 300 opposite to the active layer 4. And / or, the LED epitaxial structure may further include a P-type window layer 700 located on the side of the P-type confinement layer 40 opposite to the active layer 4. That is, the LED epitaxial structure may further include one or more of the buffer layer 10, the etching stop layer E, the N-type ohmic contact layer 60, the N-type current spreading layer 40, and the P-type window layer 700, depending on actual needs. This application embodiment uses an LED epitaxial structure that also includes a buffer layer 10, an etching stop layer E, an N-type ohmic contact layer 60, an N-type current spreading layer 40, and a P-type window layer 700 as an example for illustration. Therefore, the method for fabricating the LED epitaxial structure further includes:

[0101] S11: Reference Figure 6 Before growing the epitaxial stack, a buffer layer 10, an etch stop layer E, an N-type ohmic contact layer 60, and an N-type current spreading layer 40 are sequentially grown on one side surface of the growth substrate 11; then, an epitaxial stack is grown on the surface of the N-type current spreading layer 40 away from the growth substrate 11.

[0102] Taking N-type GaAs as an example, the growth temperature of buffer layer 10 is maintained at 680℃-740℃, and TMGa, AsH3 and SiH4 are introduced.

[0103] Taking N-type GaInP as an example, the corrosion stop layer E is grown at a temperature of 680℃-740℃, and TMGa, TMIn, PH3 and SiH4 are introduced.

[0104] Taking N-type GaAs as an example, the growth temperature of the N-type ohmic contact layer 60 is maintained at 680℃-740℃, and TMGa, AsH3 and SiH4 are introduced.

[0105] N-type current spreading layer 40 with N-type (Al) a Ga 1-a ) 0.5 In 0.5 Taking P, 0 < a < 1 as an example; the growth temperature is maintained at 680℃-740℃, and TMAl, TMGa, TMIn, PH3 and SiH4 are introduced.

[0106] Following step S2, step S3 is also included: after the epitaxial stack is grown, a P-type window layer 700 is grown on the surface of the P-type confinement layer 400 facing away from the active layer 4, forming... Figure 3The LED epitaxial structure shown.

[0107] Taking P-type GaP as an example, the growth temperature of the P-type window layer 700 is maintained at 680℃-740℃, and TMGa, PH3 and Cp2Mg are introduced.

[0108] The method for fabricating this LED epitaxial structure can produce the LED epitaxial structure described in any of the above embodiments, and therefore has all the beneficial effects of the LED epitaxial structure, which will not be elaborated here.

[0109] This application also provides an LED chip. The LED chip includes a target substrate 12, an N-electrode 91, a P-electrode 92, and an LED epitaxial structure according to any of the above embodiments. The LED epitaxial structure is disposed on one side surface of the target substrate 12, the N-electrode 91 is electrically connected to the N-type confinement layer 300, and the P-electrode 92 is electrically connected to the P-type confinement layer 400.

[0110] It should be understood that when fabricating an LED chip, the LED chip can continue to use the growth substrate 11 as the target substrate 12 to provide support for the subsequent LED epitaxial structure; alternatively, the LED chip can use the growth substrate 11 as a temporary growth substrate 11 for the LED epitaxial structure, and then the LED epitaxial structure is bonded to the target substrate 12. In this embodiment, the latter is used as an example for illustration. The N-type confinement layer 300, the active layer 4, and the P-type confinement layer 400 are stacked sequentially in the direction away from the growth substrate 11. After being bonded to the target substrate 12, the P-type confinement layer 400, the active layer 4, and the N-type confinement layer 300 are stacked sequentially in the direction away from the target substrate 12.

[0111] by Figure 3 Taking the LED epitaxial structure shown as an example, the structure of the LED chip will be explained. Figure 3 The P-type window layer 700 of the LED epitaxial structure shown is bonded to one side surface of the target substrate 12, and then the growth substrate 11, buffer layer 10, and etching stop layer E are removed. Subsequently, for example, a portion of the surface of the P-type window layer 700 can be exposed by photolithography and etching processes, and then N-electrode 91 and P-electrode 92 can be fabricated to form... Figure 7 The LED chip shown. The N electrode 91 is electrically connected to the N-type current spreading layer 40 and the N-type confinement layer 300 through the N-type ohmic contact layer 60. The P electrode 92 is disposed on the side of the P-type window layer 700 away from the target substrate 12 and is electrically connected to the P-type confinement layer 400 through the P-type window layer 700.

[0112] The LED chip has the aforementioned LED epitaxial structure, and therefore possesses all the beneficial effects of the aforementioned LED epitaxial structure, which will not be elaborated further here.

[0113] Those skilled in the art should understand that, in the disclosure of this invention, the terms "lateral", "longitudinal", "upper", "lower", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, the above terms should not be construed as limiting this invention.

[0114] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0115] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. An LED epitaxial structure, disposed on one side surface of a growth substrate, characterized in that, include: Epitaxial stack; the epitaxial stack includes an N-type confinement layer, an active layer and a P-type confinement layer stacked sequentially; The P-type confinement layer includes an undoped layer and a P-type doped layer stacked sequentially along a direction away from the active layer; The undoped layer includes a first sub-layer and a third sub-layer stacked sequentially along a direction away from the active layer; the P-type doped layer includes a fourth sub-layer. The fourth sublayer includes P-type Al x In （1-x） P, 0 < x < 1; The first sub-layer includes Al y In （1-y） P, 0 < y < 1, and y < x; The third sublayer includes Al z In （1-z） P, 0 < z < 1, and z = x; The growth of the third sublayer includes a pause period, during which growth is resumed after purging with high-purity hydrogen.

2. The LED epitaxial structure as described in claim 1, characterized in that, The undoped layer further includes a second sublayer Al located between the first sublayer and the third sublayer. m In （1-m） P; Along the direction away from the active layer, the Al component m of the second sublayer gradually changes from y to z.

3. An LED epitaxial structure as described in claim 1 or 2, characterized in that, The value range of the Al component y in the first sublayer is 0.4 ≤ y ≤ 0.45; In the fourth sublayer, P-type Al x In （1-x） The Al component of P has x=0.5; Al in the third sub-layer z In （1-z） The Al component of P has a value of z=0.

5.

4. The LED epitaxial structure as described in claim 1, characterized in that, The pause in growth is defined as a pause in growth for 10-30 seconds after every 10 nm growth of the third sublayer, including the endpoint values.

5. An LED epitaxial structure as described in claim 1 or 2, characterized in that, The thickness of the undoped layer is less than the thickness of the fourth sublayer.

6. The LED epitaxial structure as described in claim 1, characterized in that, It also includes a buffer layer located between the growth substrate and the N-type confinement layer; And / or, it also includes an etching stop layer located between the growth substrate and the N-type confinement layer; And / or, it also includes an N-type ohmic contact layer located on the side of the N-type confinement layer opposite to the active layer; And / or, it also includes an N-type current spreading layer located on the side of the N-type confinement layer opposite to the active layer; And / or, it also includes a P-type window layer located on the side of the P-type confinement layer opposite to the active layer.

7. An LED chip, characterized in that, The LED epitaxial structure includes a target substrate, an N-electrode, a P-electrode, and an LED epitaxial structure as described in any one of claims 1-6; the LED epitaxial structure is disposed on one side surface of the target substrate, the N-electrode is electrically connected to the N-type confinement layer, and the P-electrode is electrically connected to the P-type confinement layer.

8. A method for fabricating an LED epitaxial structure, characterized in that, include: Provide a growth substrate; The LED epitaxial structure is fabricated on one side surface of the growth substrate: an epitaxial stack is grown on one side surface of the growth substrate; the epitaxial stack includes an N-type confinement layer, an active layer and a P-type confinement layer grown sequentially. The P-type confinement layer includes an undoped layer and a P-type doped layer grown sequentially in a direction away from the active layer; The undoped layer includes a first sublayer and a third sublayer grown sequentially in a direction away from the active layer; the P-type doped layer includes a fourth sublayer. The fourth sublayer includes P-type Al x In （1-x） P, 0 < x < 1; The first sub-layer includes Al y In （1-y） P, 0 < y < 1, and y < x; The third sublayer includes Al z In （1-z） P, 0 < z < 1, and z = x; The growth of the third sublayer includes a pause period, during which growth is resumed after purging with high-purity hydrogen.

9. The method for fabricating an LED epitaxial structure as described in claim 8, characterized in that, The undoped layer, after the growth of the first sublayer and before the growth of the third sublayer, also includes the growth of a second sublayer Al on the side of the first sublayer facing away from the active layer. m In （1-m） P; Along the direction away from the active layer, the Al component m of the second sublayer gradually changes from y to z.

10. The method for fabricating an LED epitaxial structure as described in claim 8, characterized in that, The pause in growth is defined as a pause in growth for 10-30 seconds after every 10 nm growth of the third sublayer, including the endpoint values.

11. The method for fabricating an LED epitaxial structure as described in claim 8, characterized in that, During the paused growth in the third sublayer, the group III source is shut down while the group V source flow is maintained.

12. A method for fabricating an LED epitaxial structure as described in claim 8 or 9, characterized in that, The growth temperature of the fourth sublayer is lower than that of the undoped layer.

13. A method for fabricating an LED epitaxial structure as described in claim 8 or 9, characterized in that, The V / Ⅲ ratio for growing the fourth sublayer is lower than the V / Ⅲ ratio for growing the undoped layer.

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