Micro-LED display chip and preparation method thereof

Abstract

The application discloses a Micro-LED display chip and a preparation method thereof. The Micro-LED display chip comprises a driving substrate, a first bonding structure arranged on one side surface of the driving substrate, a plurality of light emitting units, a plurality of heat dissipation structures and a color conversion structure. The light emitting units comprise mutually opposite light emitting surfaces and bottom surfaces, and the adjacent light emitting units are filled with a passivation structure. The bottom surfaces of the light emitting units are provided with second bonding structures. The second bonding structures are located on the side, away from the driving substrate, of the first bonding structure. The heat dissipation structures are arranged in the first bonding structure or the passivation structure. The color conversion structure is located on the side of the light emitting surface of at least part of the light emitting units. The application realizes independent regulation and control of the light emitted by each light emitting unit, realizes full-color display, provides a heat export path, and avoids the problems of thermal quenching and device reliability reduction of the color conversion structure caused by high temperature.

Description

Technical Field

[0001] This invention relates to the field of Micro-LED display technology, and in particular to a Micro-LED display chip and its fabrication method. Background Technology

[0002] Micro-LED (Micro Light-Emitting Diode) display technology, due to its superior characteristics such as high brightness, high contrast, low power consumption, and fast response, has broad application prospects in fields such as AR / VR near-eye displays, automotive micro-displays, and high-definition projection micro-displays. Current Micro-LED display devices generally employ a full-color implementation scheme that combines blue light epitaxial emission with red-green quantum dot color conversion. This scheme uses blue Micro-LEDs to excite red and green quantum dots, converting blue light into red and green light respectively, thus achieving the RGB three primary colors on a single chip. Since quantum dot emission is a thermally excited emission mechanism, heat is highly concentrated within the pixel cavity. Given the poor thermal stability of quantum dot materials, Micro-LEDs, as self-emissive devices, generate significant self-heat during operation. Their small size makes it difficult to effectively dissipate this heat, leading to increased device temperature. This severely affects the color conversion effect of the quantum dots and may even damage the quantum dot material in severe cases. Summary of the Invention

[0003] This invention provides a Micro-LED display chip and its fabrication method, which not only achieves independent control of the emitted light from each light-emitting unit, but also realizes full-color display, while providing an efficient heat dissipation path, avoiding the problems of heat quenching of the color conversion structure due to high temperature and the decrease in device reliability.

[0004] In a first aspect, the present invention provides a Micro-LED display chip, comprising: a driving substrate, a first bonding structure, multiple light-emitting units, a passivation structure, a second bonding structure, multiple heat dissipation structures, and a color conversion structure;

[0005] A first bonding structure is provided on one side surface of the driving substrate;

[0006] The plurality of light-emitting units include light-emitting surfaces and bottom surfaces that are opposite to each other. A passivation structure is filled between adjacent light-emitting units. A second bonding structure is provided on the bottom surface of the plurality of light-emitting units. The second bonding structure is located on the side of the first bonding structure that is opposite to the driving substrate.

[0007] The plurality of heat dissipation structures are disposed in the first bonding structure or the passivation structure;

[0008] The color conversion structure is located on one side of the light-emitting surface of at least a portion of the light-emitting unit.

[0009] Optionally, the first bonding structure includes a first barrier layer, a first buffer layer, and a first bonding interface layer sequentially stacked along the direction away from the driving substrate;

[0010] The second bonding structure includes a second barrier layer, a second buffer layer, and a second bonding interface layer, which are sequentially stacked along the direction away from the light-emitting unit.

[0011] Optionally, it further includes a filling layer; the filling layer is disposed on one side of the light-emitting surface of the light-emitting unit and has a plurality of openings corresponding one-to-one with the plurality of light-emitting units, the plurality of openings including a first opening;

[0012] The color conversion structure is located within the first opening.

[0013] Optionally, it further includes: a microlens structure, wherein the plurality of openings in the filling layer further includes a second opening, and the microlens structure is located within the second opening.

[0014] Optionally, each of the light-emitting units corresponds to a plurality of the heat dissipation structures;

[0015] When the heat dissipation structure has a different distribution density, and the color conversion structure is provided on one side of the light-emitting surface of the light-emitting unit, the heat dissipation structure corresponding to the light-emitting unit has a first cross-sectional size and a first distribution density.

[0016] When the microlens structure is provided on one side of the light-emitting surface of the light-emitting unit, the heat dissipation structure corresponding to the light-emitting unit has a second cross-sectional size and a second distribution density;

[0017] Wherein, the first cross-sectional size is greater than the second cross-sectional size, and / or, the first distribution density is greater than the second distribution density.

[0018] Optionally, the opening has a first opening area on the side closer to the light-emitting unit and a second opening area on the side away from the light-emitting unit; the opening area gradually increases from the side closer to the light-emitting unit to the side away from the light-emitting unit.

[0019] The area of ​​the first opening is larger than the area of ​​the light-emitting surface of the light-emitting unit.

[0020] Optionally, the color conversion structure includes a first reflective layer and a moisture-proof passivation layer between itself and the sidewall of the first opening, and the first reflective layer is located between the sidewall of the first opening and the moisture-proof passivation layer.

[0021] Optionally, each of the first openings is provided with a plurality of periodically arranged nanograting units, the nanograting units being disposed on the light-emitting surface of the light-emitting unit;

[0022] The color conversion structure fills the gaps in the nanograting unit and covers the side of the nanograting unit facing away from the light-emitting unit.

[0023] Optionally, the color conversion structure includes a red light color conversion structure and a green light color conversion structure;

[0024] The nanograting unit corresponding to the red light color conversion structure has a first preset period and a first preset diameter;

[0025] The nanograting unit corresponding to the green light color conversion structure has a second preset period and a second preset diameter;

[0026] The first preset period is less than or greater than the second preset period, and / or the first preset diameter is less than or greater than the second preset diameter.

[0027] Optionally, the bottom surface of the light-emitting unit is further provided with a first conductive layer, which is located between the bottom surface of the light-emitting unit and the second bonding structure;

[0028] A second conductive layer is also provided on the light-emitting surface of the light-emitting unit, and the second conductive layers corresponding to adjacent light-emitting units are connected to each other to form a common conductive layer;

[0029] Each of the light-emitting units is located within the projected area of ​​the second bonding structure, which includes a first conductive post penetrating the second bonding structure;

[0030] The first bonding structure includes a second conductive post that overlaps with the projection of the first conductive post in the first bonding structure, and the second conductive post penetrates the first bonding structure.

[0031] Optionally, the surface of the common conductive layer facing away from the light-emitting unit may further include multiple current spreading layers.

[0032] Optionally, a second reflective structure is provided between the sidewall of the light-emitting unit and the passivation structure, and between the first conductive layer and the second bonding structure;

[0033] An insulating layer is also included between the sidewall of the light-emitting unit and the second reflective structure, and between the common conductive layer and the passivation structure.

[0034] Optionally, the light-emitting surface of the light-emitting unit or the surface of the common conductive layer near the light-emitting surface is a roughened surface.

[0035] Optionally, the filling layer may also have an encapsulation layer on the side of its surface facing away from the light-emitting unit, the encapsulation layer covering the color conversion structure and exposing the microlens structure.

[0036] In a second aspect, the present invention also provides a method for fabricating a Micro-LED display chip, for fabricating a Micro-LED display chip as described in any one of the first aspects, the method comprising:

[0037] A driving substrate and multiple light-emitting units are provided, wherein the multiple light-emitting units include a light-emitting surface and a bottom surface that are opposite to each other;

[0038] A passivation layer is prepared on the bottom surface of the plurality of light-emitting units, and the passivation layer is patterned to form a passivation structure;

[0039] A first bonding structure is prepared on one side surface of the driving substrate;

[0040] The first bonding structure is etched to form multiple heat dissipation structures, or the passivation structure is etched to form multiple heat dissipation structures.

[0041] A second bonding structure is prepared on the bottom surface of the light-emitting unit;

[0042] The first bonding structure and the second bonding structure are bonded together to connect the driving substrate to each of the light-emitting units;

[0043] A color conversion structure is formed on one side of the light-emitting surface of at least a portion of the light-emitting units.

[0044] Optionally, a first bonding structure is formed on one side surface of the driving substrate, comprising:

[0045] A first barrier layer is formed on one side surface of the driving substrate using a sputtering deposition process;

[0046] A first buffer layer is formed on the side of the first barrier layer away from the driving substrate using a spin coating and curing process.

[0047] A first bonding interface layer is formed on the surface of the first buffer layer away from the first barrier layer using a deposition process; wherein, the first barrier layer, the first buffer layer, and the first bonding interface layer constitute the first bonding structure;

[0048] The first bonded structure is planarized using an integrated chemical mechanical polishing process.

[0049] Optionally, a second bonding structure is formed on the bottom surface of the light-emitting unit, comprising:

[0050] A second barrier layer is formed on the bottom surface of the light-emitting unit using a sputtering deposition process;

[0051] A second buffer layer is formed on the surface of the second barrier layer away from the light-emitting unit using a spin coating and curing process;

[0052] A second bonding interface layer is formed on the surface of the second buffer layer away from the second barrier layer using a deposition process; wherein, the second barrier layer, the second buffer layer, and the second bonding interface layer constitute the second bonding structure;

[0053] The second bonded structure is planarized using an integrated chemical mechanical polishing process.

[0054] The Micro-LED display chip and its fabrication method provided by this invention achieve independent control of the emitted light from each light-emitting unit and full-color display by filling a passivation structure between adjacent light-emitting units and setting a color conversion structure on one side of the light-emitting surface of the light-emitting unit. Simultaneously, by setting multiple heat dissipation structures in the first bonding structure or passivation structure, an efficient heat dissipation path is provided for the Micro-LED display chip, avoiding the problems of thermal quenching of the color conversion structure and decreased device reliability due to high temperatures.

[0055] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0056] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0057] Figure 1 This is a schematic diagram of the structure of a Micro-LED display chip provided in an embodiment of the present invention;

[0058] Figure 2 This is a schematic diagram of another Micro-LED display chip provided in an embodiment of the present invention;

[0059] Figure 3 This is a schematic diagram of the structure of another Micro-LED display chip provided in an embodiment of the present invention;

[0060] Figure 4 This is a schematic diagram of the structure of another Micro-LED display chip provided in an embodiment of the present invention;

[0061] Figure 5 This is a schematic diagram of the structure of another Micro-LED display chip provided in an embodiment of the present invention;

[0062] Figure 6 This is a schematic diagram of the structure of another Micro-LED display chip provided in an embodiment of the present invention;

[0063] Figure 7 This is a schematic diagram of the structure of another Micro-LED display chip provided in an embodiment of the present invention;

[0064] Figure 8 A schematic flowchart illustrating a method for fabricating a Micro-LED display chip, provided for an embodiment of the invention;

[0065] Figure 9 for Figure 8 A corresponding fabrication process flow diagram for a Micro-LED display chip;

[0066] Figure 10 for Figure 8 The corresponding fabrication process flow diagram for another Micro-LED display chip;

[0067] Figure 11 A schematic flowchart of another method for fabricating a Micro-LED display chip provided for an embodiment of the invention;

[0068] Figure 12 for Figure 11 A flowchart illustrating the fabrication process of a corresponding Micro-LED display chip. Detailed Implementation

[0069] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and not intended to limit it. Furthermore, it should be noted that, for ease of description, the accompanying drawings show only the parts relevant to the present invention, and not all of the structures.

[0070] The terminology used in the embodiments of this invention is for the purpose of describing specific embodiments only and is not intended to limit the invention. It should be noted that directional terms such as "upper," "lower," "left," and "right" described in the embodiments of this invention are used to describe the angles shown in the accompanying drawings and should not be construed as limiting the embodiments of this invention. Furthermore, in the context, it should be understood that when referring to an element being formed "on" or "below" another element, it can be formed not only directly on or below the other element, but also indirectly on or below it through intermediate elements. The terms "first," "second," etc., are used for descriptive purposes only and do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0071] The term "comprising" and its variations as used in this invention are open-ended, meaning "including but not limited to". The term "based on" means "at least partially based on". The term "one embodiment" means "at least one embodiment".

[0072] It should be noted that the concepts of "first" and "second" mentioned in this invention are only used to distinguish the corresponding contents and are not used to limit the order or interdependence.

[0073] It should be noted that the terms "a" and "a plurality of" used in this invention are illustrative rather than restrictive. Those skilled in the art should understand that, unless otherwise expressly indicated in the context, they should be understood as "one or more".

[0074] Figure 1 This is a schematic diagram of the structure of a Micro-LED display chip provided in an embodiment of the present invention. Figure 2 This is a schematic diagram of another Micro-LED display chip provided in an embodiment of the present invention, as shown below. Figure 1 and Figure 2 As shown, the Micro-LED display chip includes a driving substrate 1, a first bonding structure 2, multiple light-emitting units 3, a passivation structure 4, a second bonding structure 5, multiple heat dissipation structures 6, and a color conversion structure 8. The first bonding structure 2 is disposed on one side surface of the driving substrate 1. The multiple light-emitting units 3 include mutually opposing light-emitting surfaces and bottom surfaces. A passivation structure 4 fills the spaces between adjacent light-emitting units 3. The second bonding structure 5 is disposed on the bottom surface of the multiple light-emitting units 3, and the second bonding structure 5 is located on the side of the first bonding structure 2 opposite to the driving substrate 1. Multiple heat dissipation structures 6 are disposed within the first bonding structure 2 or the passivation structure 4. The color conversion structure 8 is located on the light-emitting surface side of at least some of the light-emitting units 3.

[0075] Specifically, refer to Figure 1 and Figure 2The Micro-LED display chip includes a driving substrate 1 and multiple light-emitting units 3. Each light-emitting unit 3 has a light-emitting surface and a bottom surface that are opposite to each other. Each light-emitting unit 3 is a gallium nitride-based epitaxial stacked structure, capable of converting electrical energy into light energy and emitting it from the light-emitting surface under an applied electric field. The driving substrate 1 provides driving current or driving voltage to the multiple light-emitting units 3 to independently control the switching state of each light-emitting unit 3. For example, the light-emitting unit 3 can generate blue light under an applied electric field. The driving substrate 1 can be a CMOS driving substrate. A first bonding structure 2 is provided on one side surface of the driving substrate 1, and a second bonding structure 5 is provided on the bottom surface of the multiple light-emitting units 3. The second bonding structure 5 and the first bonding structure 2 are bonded to each other to connect the light-emitting units 3 to the driving substrate 1.

[0076] Furthermore, to achieve electrical and optical isolation between adjacent light-emitting units 3, a passivation structure 4 is filled between adjacent light-emitting units 3. For example, the passivation structure 4 can be silicon dioxide. To achieve full-color display, a color conversion structure 8 is provided on the light-emitting surface side of at least some of the light-emitting units 3. The color conversion structure 8 can be red quantum dots and green quantum dots, which can convert the blue light emitted by the light-emitting units 3 into red light and green light, thereby achieving full-color display.

[0077] Furthermore, since Micro-LEDs generate heat during long-term high-brightness operation, the Micro-LED display chip also includes multiple heat dissipation structures 6, which are disposed within the first bonding structure 2 or the passivation structure 4. Figure 1 As shown, multiple heat dissipation structures 6 can be disposed in the first bonding structure 2. In the actual fabrication process, the first bonding structure 2 can be formed on one side surface of the driving substrate 1 firstly, and then the first bonding structure 2 can be etched at the positions corresponding to the multiple heat dissipation structures 6 to form through holes in the first bonding structure 2. Furthermore, copper can be electroplated and filled into the through holes to obtain multiple heat dissipation structures 6. At this time, the heat generated by the color conversion structure 8 during color conversion can be conducted to the first bonding structure 2 through the second bonding structure 5, and then transferred downward to the driving substrate 1 by the heat dissipation structure 6 in the first bonding structure 2, and dissipated outward through the driving substrate 1.

[0078] Furthermore, such as Figure 2As shown, multiple heat dissipation structures 6 can be disposed within the passivation structure 4. In the actual fabrication process, a passivation layer can first be prepared on the bottom surface of multiple light-emitting units 3, and then the passivation layer can be patterned to expose the bottom surface of multiple light-emitting units 3, forming the passivation structure 4. The passivation structure 4 fills the spaces between adjacent light-emitting units 3. Further, the passivation structure 4 is etched at the corresponding positions of the multiple heat dissipation structures 6 to form through holes in the passivation structure 4. Copper is then electroplated into the through holes to obtain multiple heat dissipation structures 6. Since the heat dissipation structures 6 in the passivation structure 4 are disposed adjacent to the light-emitting units 3, the heat dissipation structures 6 can directly conduct heat from the light-emitting units 3 to the second bonding structure 5. The second bonding structure 5 can be made of materials with heat dissipation capabilities such as silicon nitride, boron nitride, and aluminum oxide, thereby improving thermal conductivity and enabling the heat from the light-emitting units 3 to be quickly dissipated, shortening the heat conduction path. It should be noted that this application does not limit the specific shape of the heat dissipation structure 6.

[0079] This invention, through filling the space between adjacent light-emitting units with a passivation structure and setting a color conversion structure on one side of the light-emitting surface of the light-emitting unit, achieves both independent control of the emitted light from each light-emitting unit and full-color display. Simultaneously, by setting multiple heat dissipation structures in the first bonding structure or passivation structure, an efficient heat dissipation path is provided for the Micro-LED display chip, avoiding the problems of thermal quenching of the color conversion structure due to high temperatures and decreased device reliability.

[0080] Since the driving substrate 1 and multiple light-emitting units 3 are bonded together through the first bonding structure 2 and the second bonding structure 5, existing silicon-based Micro-LED wafer hybrid bonding commonly employs pure silicon dioxide dielectric bonding, pure polyimide organic dielectric bonding, or single-layer silicon carbon nitride dielectric bonding schemes. Pure silicon dioxide bonding systems require high-temperature curing and bonding processes above 300℃, but ultra-thin Micro-LED epitaxial wafers have poor heat resistance, and high-temperature processes easily cause lattice damage to the epitaxial layer, luminous efficiency decay, and film stress mismatch. Pure polyimide organic dielectrics have low hardness, are prone to surface scratches and uneven defects during chemical mechanical polishing, and suffer from severe water vapor and oxygen penetration, leading to delamination, leakage, and failure of the bonding interface over long-term operation. Single-layer silicon carbon nitride dielectrics have high conventional deposition temperatures, making them unsuitable for low-temperature bonding processes, and a single dielectric cannot simultaneously meet multiple requirements such as stress matching, dense barrier, and ultra-smooth bonding interfaces. In addition, the existing single-dielectric bonding structure has poor thermal stress matching and large warping after bonding of thin epitaxial wafers, resulting in pixel alignment misalignment, bonding voids, and low yield, which seriously limits the mass production capability of ultra-high resolution monolithic full-color Micro-LEDs.

[0081] Based on this Figure 3This is a schematic diagram of the structure of another Micro-LED display chip provided in an embodiment of the present invention. Figure 4 A schematic diagram of another Micro-LED display chip provided in an embodiment of the present invention is shown below. Figure 3 and Figure 4 As shown, the first bonding structure 2 includes a first barrier layer 21, a first buffer layer 22, and a first bonding interface layer 23 sequentially stacked along the direction away from the driving substrate 1. The second bonding structure 5 includes a second barrier layer 51, a second buffer layer 52, and a second bonding interface layer 53 sequentially stacked along the direction away from the light-emitting unit 3.

[0082] Specifically, both the first bonding structure 2 and the second bonding structure 5 can be multilayer stacked structures, such as... Figure 3 and Figure 4 As shown, the first bonding structure 2 includes a first barrier layer 21, a first buffer layer 22, and a first bonding interface layer 23, which are sequentially stacked along the direction away from the driving substrate 1. The first barrier layer 21 is disposed near the driving substrate 1 to prevent metal ions in the driving substrate 1 from diffusing towards the light-emitting unit 3, thus preventing metal ion contamination of the epitaxial layer or quantum dot material, and also blocking the penetration of water vapor and oxygen. The first buffer layer 22 is disposed on the side of the first barrier layer 21 away from the driving substrate 1 to alleviate the thermal stress generated during the bonding process between the first bonding structure 2 and the second bonding structure 5, as well as the stress generated during the operation of the Micro-LED display chip due to the mismatch of thermal expansion coefficients of different materials, preventing film cracking or delamination. The first bonding interface layer 23 is disposed on the side of the first buffer layer 22 away from the first barrier layer 21 to provide an ultra-smooth bonding surface, ensuring high-quality bonding with the second bonding structure 5.

[0083] Similarly, the second bonding structure 5 includes a second barrier layer 51, a second buffer layer 52, and a second bonding interface layer 53, which are sequentially stacked along the direction away from the light-emitting unit 3. The second barrier layer 51 is disposed near the light-emitting unit 3 to prevent metal ions in the light-emitting unit 3 from diffusing towards the driving substrate 1, while also preventing the penetration of moisture and oxygen. The second buffer layer 52 is used to alleviate thermal stress generated during bonding and operation. The second bonding interface layer 53 is used to provide an ultra-smooth bonding surface. The first bonding interface layer 23 and the second bonding interface layer 53 are disposed opposite each other and bonded together during the bonding process to form a stable bonding interface.

[0084] For example, the materials of the first barrier layer 21 and the second barrier layer 51 can be silicon carbide, silicon nitride, boron nitride, aluminum oxide, etc., which have excellent ion blocking ability and density. When the heat dissipation structure 6 is located in the passivation structure 4, the second barrier layer 51 is preferably silicon nitride, boron nitride, or aluminum oxide, thereby improving the thermal conductivity and enabling the heat in the light-emitting unit 3 to be quickly conducted outward. The materials of the first buffer layer 22 and the second buffer layer 52 can be polyimide-silicon dioxide hybrid materials with adjustable coefficients of thermal expansion. By adjusting the ratio of polyimide to silicon dioxide, the coefficient of thermal expansion of the buffer layer is matched with that of the adjacent layer, thereby effectively reducing thermal stress. The materials of the first bonding interface layer 23 and the second bonding interface layer 53 can be silicon dioxide. After planarization by integrated chemical mechanical polishing (CMP), the surface roughness is less than 0.5 nm, which is beneficial for achieving ultra-low temperature bonding below 200°C, reducing the thermal damage of thin epitaxial wafers, and reducing the wafer bonding warpage from the traditional 180°C. Significantly reduced to 15 The following solutions address the issues of high-temperature deformation, alignment misalignment, and bonding voids in ultra-thin Micro-LED epitaxial wafers. Furthermore, the excellent oxygen and water barrier properties of the barrier layer prevent interface moisture penetration that could lead to oxidation and delamination. The integrated CMP ultra-smooth interface ensures high-precision bonding of the high-density pixel array, significantly improving mass production yield, consistency, and long-term environmental reliability.

[0085] This invention combines the advantages of a high barrier layer, a low stress layer, and an ultra-smooth bonding interface layer by using a three-layer stacked structure with a first barrier layer, a first buffer layer, and a first bonding interface layer in the first bonding structure, and a second barrier layer, a second buffer layer, and a second bonding interface layer in the second bonding structure. It also addresses common industry pain points such as high-temperature damage to pure silicon dioxide, low hardness and easy scratching of pure polyimide, water vapor permeability, and high deposition temperature of single-layer silicon carbide. This reduces thermal damage to thin epitaxial wafers, significantly suppresses wafer warpage, and improves the density, flatness, and long-term reliability of the bonding interface, making it suitable for high-precision, high-yield mass production.

[0086] Optionally, continue to refer to Figure 3 and Figure 4 The Micro-LED display chip also includes a filling layer 7, which is disposed on one side of the light-emitting surface of the light-emitting unit 3 and has multiple openings 10 corresponding to the multiple light-emitting units 3. The multiple openings 10 include a first opening 101, and the color conversion structure 8 is located in the first opening 101.

[0087] Specifically, to achieve independent control and pixel segmentation of the emitted light from each light-emitting unit 3, a filling layer 7 is provided on one side of the light-emitting surface of the light-emitting unit 3. The filling layer 7 has multiple openings 10 corresponding to the multiple light-emitting units 3, wherein the multiple openings 10 include a first opening 101, and the color conversion structure 8 is located within the first opening 101. Exemplarily, the filling layer 7 can be a transparent structure or an opaque structure. The transparent structure can be photoresist, silicon oxide, or silicon nitride, etc., and the opaque material can be black photoresist, carbon black doped resin, or metal oxide, etc. In actual fabrication, the filling layer 7 can be first prepared on the light-emitting surface of the light-emitting unit 3 by spin coating, chemical vapor deposition, or atomic layer deposition, and the positions of the openings 10 are defined by photolithography. Multiple openings 10 are formed by dry or wet etching, and the multiple openings 10 correspond to the light-emitting units 3 one-to-one, wherein the multiple openings 10 include the first opening 101. Then, the color conversion structure 8 is filled into the first opening 101 by inkjet printing, transfer printing, or photolithography.

[0088] Optionally, continue to refer to Figure 3 and Figure 4 The Micro-LED display chip also includes a microlens structure 9, and the multiple openings 10 of the filling layer 7 also include a second opening 102, with the microlens structure 9 located within the second opening 102.

[0089] Specifically, a microlens structure 9 can be set in the area where color conversion is not performed. The microlens structure 9 can converge the light emitted from the light-emitting unit 3 to reduce the light divergence angle and improve the brightness of the front side. Similarly, in actual fabrication, after forming a filling layer 7 and multiple openings 10 on the light-emitting surface of the light-emitting unit 3, including a second opening 102, the microlens structure 9 can be fabricated in the second opening 102 by nanoimprinting, photoresist thermal reflow, or etching transfer processes.

[0090] refer to Figure 3 and Figure 4 The adjacent openings 10 are completely filled by the filling layer 7, which can effectively prevent crosstalk between adjacent pixels and ensure the independence of light emitted by each pixel and color purity.

[0091] Optionally, such as Figure 3 and Figure 4 As shown, each light-emitting unit 3 corresponds to multiple heat dissipation structures 6, with different distribution densities. When a color conversion structure 8 is provided on one side of the light-emitting surface of the light-emitting unit 3, the heat dissipation structure 6 corresponding to the light-emitting unit 3 has a first cross-sectional size and a first distribution density. When a microlens structure 9 is provided on one side of the light-emitting surface of the light-emitting unit 3, the heat dissipation structure 6 corresponding to the light-emitting unit 3 has a second cross-sectional size and a second distribution density. The first cross-sectional size is larger than the second cross-sectional size, and / or the first distribution density is larger than the second distribution density.

[0092] Specifically, such as Figure 3 and Figure 4 As shown, each light-emitting unit 3 corresponds to multiple heat dissipation structures 6. Since the color conversion structure 8 generates heat during the process of converting blue light into red or green light, there will be significant heat concentration in the area of ​​the light-emitting unit 3 with the color conversion structure 8. However, the area of ​​the light-emitting unit 3 with the microlens structure 9 has relatively low heat because it does not need to perform color conversion. Therefore, different heat dissipation structures 6 are set for the areas of the light-emitting unit 3 with the color conversion structure 8 and the microlens structure 9 to achieve precise zoned heat dissipation.

[0093] Specifically, when a color conversion structure 8 is provided on one side of the light-emitting surface of the light-emitting unit 3, the heat in this area is relatively concentrated. Therefore, the heat dissipation structure 6 corresponding to the light-emitting unit 3 has a larger first cross-sectional size and a larger first distribution density. In other words, the multiple heat dissipation structures 6 corresponding to the area of ​​the light-emitting unit 3 have larger dimensions and smaller spacing, thereby increasing the contact area between the heat dissipation structure 6 and the surrounding medium and improving the heat dissipation efficiency per unit volume. When a microlens structure 9 is provided on one side of the light-emitting surface of the light-emitting unit 3, the heat load in this area is lower. Therefore, the heat dissipation structure 6 corresponding to the light-emitting unit 3 has a smaller second cross-sectional size and a smaller second distribution density. In other words, the multiple heat dissipation structures 6 corresponding to the area of ​​the light-emitting unit 3 have smaller dimensions and larger spacing. While meeting basic heat dissipation requirements, this avoids adverse effects on bonding strength or insulation performance due to excessive placement of heat dissipation structures 6.

[0094] Understandably, within the orthographic projection area of ​​the color conversion structure 8, due to the high heat generated during color conversion, the heat gradually decreases towards the gaps between adjacent light-emitting units 3. Therefore, for the same light-emitting unit 3, the heat dissipation structures 6 within the orthographic projection area of ​​the color conversion structure 8 can have smaller spacing, while the heat dissipation structures 6 corresponding to the gaps between light-emitting units 3 can have larger spacing, but overall, the heat dissipation structures 6 corresponding to the region of the light-emitting unit 3 have a first distribution density. Similarly, for the microlens structure 9 region, the heat dissipation structures 6 within the orthographic projection area of ​​the microlens structure 9 can have relatively smaller spacing, while the heat dissipation structures 6 corresponding to the gaps between light-emitting units 3 can have larger spacing, but overall, the heat dissipation structures 6 corresponding to the region of the light-emitting unit 3 have a second distribution density.

[0095] This invention, through the provision of multiple heat dissipation structures corresponding to each light-emitting unit and the differentiated setting of aperture difference and arrangement density ratio of the heat dissipation structures corresponding to each light-emitting unit, enables the heat dissipation structure corresponding to the color conversion structure to accurately match the heat generation power of the color conversion structure, thereby achieving precise zoned heat dissipation. This reduces the steady-state operating temperature of the Micro-LED display chip by approximately 20°C, effectively suppressing problems such as quantum dot thermal quenching and film interface peeling, and increasing the continuous working life of the Micro-LED display chip by 35%, meeting the long-term high-load working requirements of automotive and AR / VR devices.

[0096] Furthermore, regarding pixel isolation, existing technologies generally employ a planar straight-wall single-layer dielectric isolation barrier structure. This involves setting an isolation structure composed of a single-layer thin-film material such as silicon nitride or aluminum nitride between adjacent light-emitting units, with the isolation medium mostly being a single-layer thin-film material. However, existing planar straight-wall isolation structures lack a focusing curved surface structure on the sidewalls and have weak reflectivity, making it unable to effectively confine the large-angle lateral stray light generated by quantum dot excitation. This results in a large light divergence angle, severe color crosstalk, and low contrast. Specifically, the light-emitting beam angle of Micro-LED chips can reach 120°. Due to the lack of a focusing curved surface structure on the sidewalls of the planar straight-wall isolation, it is impossible to effectively converge and directionally guide the lateral light. The divergence angle of existing red and green quantum dot pixels generally reaches 60°-70°. In near-field imaging scenarios such as AR / VR near-eye displays, severe optical crosstalk at pixel edges leads to blurred image edges and significant contrast attenuation. At the same time, the large-angle light emission significantly reduces the utilization rate of effective imaging brightness in the far field, resulting in high overall power consumption. Meanwhile, the quantum dot color conversion layer can only absorb a portion of the incident blue light, with a large amount of unused blue light transmitting downwards to the substrate structure. Current technologies rely solely on simple reflective structures on the sidewalls for light recovery, failing to achieve secondary utilization of the leaked blue light from the bottom. This low blue light excitation utilization rate directly limits the color conversion efficiency and luminous intensity upper limit of red and green pixels. Furthermore, while traditional metal isolation dams possess good reflective properties, they are prone to causing lateral leakage and micro-short circuit defects between pixels, affecting the electrical stability of the device. Pure dielectric isolation dams, although meeting insulation requirements, lack high reflectivity and cannot achieve light path convergence; the planar straight-walled sidewalls lack a focusing curved structure, making narrow-angle directional light emission impossible.

[0097] Based on this, refer to Figure 3 and Figure 4 The opening 10 has a first opening area on the side close to the light-emitting unit 3 and a second opening area on the side away from the light-emitting unit 3. The opening area of ​​the opening 10 gradually increases from the side close to the light-emitting unit 3 to the side away from the light-emitting unit 3, and the first opening area is larger than the light-emitting surface area of ​​the light-emitting unit 3.

[0098] Specifically, such as Figure 3 and Figure 4As shown, the multiple openings 10 in the filling layer 7 have a bowl-like structural design. Each opening 10 has a first opening area near the light-emitting unit 3 and a second opening area away from the light-emitting unit 3. The opening area of ​​each opening 10 gradually increases from the side near the light-emitting unit 3 to the side away from the light-emitting unit 3. In other words, the cross-sectional area of ​​each opening 10 is not constant, but gradually expands from the bottom to the top along a direction perpendicular to the light-emitting surface of the light-emitting unit 3, thus giving the opening 10 an overall bowl-like configuration.

[0099] Furthermore, by setting the area of ​​the first opening to be larger than the area of ​​the light-emitting surface of the light-emitting unit 3, all the light emitted from the light-emitting surface of the light-emitting unit 3 can enter the interior of the opening 10, avoiding light loss caused by the filling layer 7 blocking some of the emitted light due to the opening 10 being too small, thereby ensuring the light emission efficiency of the light-emitting unit 3. Simultaneously, since the area of ​​the opening 10 gradually increases from bottom to top, the sidewall of the opening 10 is inclined relative to the light-emitting surface of the light-emitting unit 3. This inclined sidewall can reflect and converge the large-angle light emitted from the light-emitting unit 3 and the stray light emitted towards the sidewall after the color conversion structure 8 is excited, guiding it to the top light emission direction of the opening 10, thereby effectively reducing the light emission divergence angle, suppressing optical crosstalk between adjacent pixels, and improving display contrast and far-field brightness. For example, the angle between the sidewall of the opening 10 and the light-emitting surface of the light-emitting unit 3 can be 75°.

[0100] It is worth mentioning that the shape of the second opening 102 is not limited to the above-mentioned bowl-shaped configuration. Since the microlens structure 9 itself has the function of converging light, the second opening 102 can have any suitable shape, such as a straight-walled opening or a bowl-shaped opening. Therefore, this application does not limit the specific shape of the second opening 102, as long as it can accommodate the microlens structure 9 and allow light to enter the microlens structure 9 smoothly.

[0101] Optionally, Figure 5 A schematic diagram of another Micro-LED display chip provided in an embodiment of the present invention is shown below. Figure 5 As shown, the color conversion structure 8 and the sidewall of the first opening 101 include a first reflective layer 11 and a moisture-proof passivation layer 12, and the first reflective layer 11 is located between the sidewall of the first opening 101 and the moisture-proof passivation layer 12.

[0102] Specifically, refer to Figure 5A first reflective layer 11 and a moisture-proof passivation layer 12 are disposed between the color conversion structure 8 and the sidewall of the first opening 101. The first reflective layer 11 is located between the sidewall of the first opening 101 and the moisture-proof passivation layer 12, meaning that the color conversion structure 8 is filled within the space enclosed by the moisture-proof passivation layer 12. The first reflective layer 11 reflects the blue light emitted from the light-emitting unit 3 and the red or green light emitted towards the sidewall after the color conversion structure 8 is excited, guiding it to the top of the opening 10 in the light-emitting direction, thereby effectively improving light extraction efficiency and suppressing optical crosstalk between adjacent pixels. The moisture-proof passivation layer 12 covers the surface of the first reflective layer 11 facing the color conversion structure 8, preventing moisture and oxygen from penetrating into the interior of the color conversion structure 8. This solves the oxidation failure problem of the first reflective layer 11 under high-temperature operating conditions and improves the long-term reliability of the Micro-LED display chip. For example, the first reflective layer 11 can be a metal reflective layer, such as an aluminum layer or a silver layer, and the moisture-proof passivation layer 12 can be an atomic layer deposited aluminum oxide layer.

[0103] Optionally, Figure 6 A schematic diagram of another Micro-LED display chip provided in an embodiment of the present invention is shown below. Figure 6 As shown, each first opening 101 contains a plurality of periodically arranged nanograting units 13, which are disposed on the light-emitting surface of the light-emitting unit 3. The color conversion structure 8 fills the gaps between the nanograting units 13 and covers the side of the nanograting units 13 facing away from the light-emitting unit 3.

[0104] Specifically, each first opening 101 is provided with a plurality of periodically arranged nanograting units 13. The nanograting units 13 are disposed on the light-emitting surface of the light-emitting unit 3. When the light-emitting unit 3 emits light from the light-emitting surface, the nanograting units 13 can selectively reflect the blue light emitted by the light-emitting unit 3, that is, they have high reflectivity for the blue light band and high transmittance for the red and green light bands. Thus, the blue light that is not absorbed by the color conversion structure 8 is reflected back into the color conversion structure 8, realizing the secondary utilization of blue light and improving the color conversion efficiency.

[0105] Furthermore, within the first opening 101, the color conversion structure 8 fills the gaps in the nanograting unit 13 and covers the side surface of the nanograting unit 13 facing away from the light-emitting unit 3. In other words, the total height of the nanograting unit 13 in the direction perpendicular to the light-emitting surface is much smaller than the depth of the first opening 101, so that the color conversion structure 8 can fully fill most of the space within the first opening 101. This ensures that the color conversion structure 8 has sufficient optical thickness to fully absorb and convert the incident blue light, and the color conversion efficiency of the color conversion structure 8 will not be affected by the setting of the nanograting unit 13.

[0106] For example, within each first opening 101, the nanograting unit 13 can be a hexagonal close-packed array. Each nanograting unit 13 includes a nanodisk unit and a single-layer substrate dielectric layer. The single-layer substrate dielectric layer serves as the carrier layer for the nanodisk unit and is disposed on the light-emitting surface of the light-emitting unit 3. The nanodisk unit is disposed on the side of the single-layer substrate dielectric layer facing away from the light-emitting unit 3. The height of the single-layer substrate dielectric layer in the direction perpendicular to the light-emitting surface can be 130 nm, and the height of the nanodisk unit can be 65 nm, thus the total height of each nanograting unit 13 is 195 nm. Furthermore, to achieve high reflectivity of blue light and high transmittance of red and green light, the duty cycle of the nanograting unit 13 within each first opening 101 is approximately 0.11, where the duty cycle refers to the ratio of the area occupied by the nanograting unit 13 within a single periodic unit to the area of ​​that periodic unit.

[0107] Since the structural parameters such as the period, diameter, and height of the nanograting unit 13 directly affect its selective reflection and transmission characteristics for different wavelengths of light, i.e., different structural parameters correspond to different peak reflection wavelengths, the structural parameters of the nanograting unit 13 can be differentiated to match its reflection peak with the absorption peak of the corresponding color conversion structure 8, in order to meet the color conversion requirements of different emitted colors. In an optional embodiment, the color conversion structure 8 includes a red color conversion structure and a green color conversion structure. The nanograting unit 13 corresponding to the red color conversion structure has a first preset period and a first preset diameter, and the nanograting unit 13 corresponding to the green color conversion structure has a second preset period and a second preset diameter. The first preset period is less than or greater than the second preset period, and / or the first preset diameter is less than or greater than the second preset diameter. Through differentiated design, red and green pixels are each matched with different nanograting unit parameters, thereby achieving optimal blue light reflection efficiency in pixel areas of different colors, further improving the overall color conversion efficiency and display brightness.

[0108] Specifically, the first preset period can be 260 nm, and the first preset diameter can be 100 nm. In this case, the peak reflection wavelength of the nanograting unit 13 is 460 nm, which matches the blue light absorption peak of the red light color conversion structure. This maximizes the reflection of unabsorbed blue light back into the red light color conversion structure, thereby improving the red light conversion efficiency. The second preset period can be 240 nm, and the second preset diameter can be 90 nm. In this case, the peak reflection wavelength of the nanograting unit 13 is 450 nm, which matches the blue light absorption peak of the green light color conversion structure. This maximizes the green light conversion efficiency. It should be noted that the above values ​​are only examples. In practical applications, those skilled in the art can adjust the period and diameter of the nanograting unit 13 according to the specific wavelength of the blue light emitted by the light-emitting unit 3 and the specific absorption spectrum of the quantum dot material in the color conversion structure 8, so that the reflection peak of the nanograting unit 13 matches the absorption peak of the color conversion structure 8, achieving the best blue light reflection efficiency and color conversion efficiency.

[0109] This invention overcomes the limitations of traditional single-sidewall reflection by setting a first reflective layer on the first opening sidewall of the filling layer and setting a nano-grating unit on the light-emitting surface of the light-emitting unit within the first opening. This constructs a dual blue light recovery system combining sidewall curved surface reflection and bottom metasurface grating vertical backscattering. Through the synergistic cooperation of sidewall curved surface reflection and bottom metasurface grating vertical backscattering, targeted recovery and secondary excitation utilization of leaked blue light from quantum dots are achieved. Compared to traditional structures, this invention improves blue light utilization and color conversion efficiency by 12%~16%, reduces the light divergence angle of red and green pixels from the traditional 60°-70° to 35°-40°, essentially eliminates inter-pixel optical crosstalk, improves display contrast by more than 30%, and demonstrates significant optical gain, providing a structural foundation for high-brightness, high-contrast, and low-power Micro-LED displays.

[0110] Optionally, Figure 7 A schematic diagram of another Micro-LED display chip provided in an embodiment of the present invention is shown below. Figure 7 As shown, a first conductive layer 15 is also provided on the bottom surface of the light-emitting unit 3. The first conductive layer 15 is located between the bottom surface of the light-emitting unit 3 and the second bonding structure 5. A second conductive layer 16 is also provided on the light-emitting surface of the light-emitting unit 3. The second conductive layers 16 corresponding to adjacent light-emitting units 3 are connected to each other to form a common conductive layer. Each light-emitting unit 3 is within the projected area of ​​the second bonding structure 5. The second bonding structure 5 includes a first conductive post 171 that penetrates the second bonding structure 5. The first bonding structure 2 includes a second conductive post 172 that overlaps with the projection of the first conductive post 171 in the first bonding structure 2. The second conductive post 172 penetrates the first bonding structure 2.

[0111] Specifically, a first conductive layer 15 is disposed on the bottom surface of the light-emitting unit 3, and the first conductive layer 15 directly contacts the bottom surface of the light-emitting unit 3. A second bonding structure 5 is disposed on the side of the first conductive layer 15 facing away from the light-emitting unit 3. The first conductive layer 15 is used to form an ohmic contact with the semiconductor layer of the light-emitting unit 3 to realize the injection and output of current. For example, the first conductive layer 15 can be a transparent conductive oxide layer, such as indium tin oxide (ITO). The first conductive layer 15 is electrically connected to the driving substrate 1 through the second bonding structure 5 to realize independent control and driving of each light-emitting unit 3.

[0112] Furthermore, a second conductive layer 16 is also disposed on the light-emitting surface of the light-emitting unit 3, and the second conductive layers 16 corresponding to adjacent light-emitting units 3 are connected to each other to form a common conductive layer. That is, the second conductive layer 16 covers the light-emitting surfaces of multiple light-emitting units 3 and extends continuously between adjacent light-emitting units 3, electrically connecting the same electrode of multiple light-emitting units 3 together as a common electrode layer. Since the second conductive layer 16 is disposed on one side of the light-emitting surface of the light-emitting unit 3, in order to ensure that light can be emitted from the light-emitting surface, the second conductive layer 16 is a transparent conductive layer. For example, the second conductive layer 16 can be a transparent conductive oxide such as indium tin oxide or zinc oxide.

[0113] Furthermore, within the projected area of ​​each light-emitting unit 3 on the second bonding structure 5, the second bonding structure 5 includes a first conductive post 171 penetrating the second bonding structure 5, and the first bonding structure 2 includes a second conductive post 172 overlapping the first conductive post 171 on the projection of the first conductive post 171 on the first bonding structure 2, the second conductive post 172 penetrating the first bonding structure 2. The first conductive post 171 electrically connects the first conductive layer 15 on the bottom surface of the light-emitting unit 3 to the side surface of the second bonding structure 5 facing the first bonding structure 2, and the second conductive post 172 further conducts the electrical signal on the surface of the second bonding structure 5 to the driving substrate 1. That is, the first conductive post 171 and the second conductive post 172 are arranged opposite to each other and aligned in a direction perpendicular to the light-emitting surface of the light-emitting unit 3, together forming a conductive channel penetrating the first bonding structure 2 and the second bonding structure 5. Through this conductive channel, the driving signal of the driving substrate 1 can be transmitted to each light-emitting unit 3 via the second conductive post 172, the first conductive post 171, and the first conductive layer 15, realizing independent control of the light-emitting unit 3. For example, the holes of the first conductive post 171 and the second conductive post 172 are filled with conductive materials, such as copper or tungsten.

[0114] Optionally, continue to refer to Figure 7 The surface of the common conductive layer facing away from the light-emitting unit 3 also includes multiple current spreading layers 18.

[0115] Specifically, since the common conductive layer is usually thin and has a high surface resistance, if current conduction relies solely on the common conductive layer itself, a significant voltage drop will occur during the lateral transmission of the current. This results in insufficient current density and reduced brightness in the light-emitting unit 3 region, which is far from the driving signal input terminal, affecting display uniformity. Therefore, multiple current extension layers 18 are also provided on the surface of the common conductive layer away from the light-emitting unit 3. The projection of each current extension layer 18 in the direction perpendicular to the surface of the light-emitting unit 3 coincides with the passivation structure 4. That is, each current extension layer 18 only covers the gap region between adjacent light-emitting units 3. On the one hand, the current extension layer 18 can assist the common conductive layer in lateral current conduction, reduce the surface resistance of the common conductive layer, and make the current evenly distributed to each light-emitting unit 3 region. On the other hand, since the current extension layer 18 is only set in the gap region between adjacent light-emitting units 3 and does not cover the light-emitting surface of the light-emitting unit 3, it will not block the emitted light from the light-emitting unit 3, ensuring that the light extraction efficiency is not affected. For example, the thickness of the common conductive layer can be 80-260nm, and the current extension layer 18 can be a mesh structure with a mesh linewidth of 2μm.

[0116] Optionally, continue to refer to Figure 7 A second reflective structure 14 is provided between the sidewall of the light-emitting unit 3 and the passivation structure 4, and between the first conductive layer 15 and the second bonding structure 5. An insulating layer 19 is also provided between the sidewall of the light-emitting unit 3 and the second reflective structure 14, and between the common conductive layer and the passivation structure 4.

[0117] Specifically, refer to Figure 7 The second reflective structure 14 at least covers the sidewalls and bottom surface of the light-emitting unit 3, so that all surfaces of the light-emitting unit 3 except for the light-emitting surface are covered by the second reflective structure 14. When the light-emitting unit 3 emits light from the light-emitting surface, the light emitted towards the sidewalls and the leaking light emitted towards the bottom surface can be reflected back to the light-emitting direction by the second reflective structure 14, thereby effectively reducing the loss of blue light emitted by the light-emitting unit 3 in the non-light-emitting direction and improving the blue light extraction efficiency. For example, the second reflective structure 14 can be made of nickel, silver, or titanium. In actual fabrication, a second reflective layer can be formed on one side of the bottom surface of the light-emitting unit 3 by sputtering deposition, and then the second reflective layer can be patterned by photolithography and etching processes to form the second reflective structure 14.

[0118] Furthermore, the insulating layer 19 is disposed between the sidewall of the light-emitting unit 3 and the second reflective structure 14, and between the common conductive layer and the passivation structure 4. That is, the second reflective structure 14 does not directly contact the sidewall of the light-emitting unit 3, but is separated by the insulating layer 19. Similarly, the common conductive layer and the passivation structure 4 are also electrically isolated by the insulating layer 19. Thus, the insulating layer 19 effectively prevents leakage or short circuits between the sidewall of the light-emitting unit 3 and the second reflective structure 14, avoiding current leakage caused by sidewall defects and improving the electrical stability of the device. Simultaneously, the insulating layer 19 between the common conductive layer and the passivation structure 4 prevents unnecessary electrical contact between the common conductive layer and the underlying passivation structure 4, ensuring that current is injected into the light-emitting unit 3 only along the designed path, avoiding crosstalk between adjacent pixels caused by lateral leakage. Optionally, the insulating layer 19 can be formed by plasma-enhanced chemical vapor deposition or atomic layer deposition processes.

[0119] To further increase the light extraction efficiency of the Micro-LED display chip, in an optional embodiment, the light-emitting surface of the light-emitting unit 3 or the surface of the common conductive layer near the light-emitting surface is roughened.

[0120] Specifically, by roughening the light-emitting surface of the light-emitting unit 3 or the surface of the common conductive layer near the light-emitting surface, a microstructure can be formed on the light-emitting surface of the light-emitting unit 3 or the surface of the common conductive layer near the light-emitting surface. In this way, total internal reflection can be avoided through the scattering of the microstructure, thereby increasing the light extraction rate and improving the brightness of the Micro-LED display chip.

[0121] Optionally, continue to refer to Figure 7 The surface of the filling layer 7 facing away from the light-emitting unit 3 is also provided with an encapsulation layer 20, which covers the color conversion structure 8 and the exposed microlens structure 9.

[0122] Specifically, an encapsulation layer 20 is also provided on the surface of the filling layer 7 facing away from the light-emitting unit 3. The encapsulation layer 20 covers the color conversion structure 8, which can isolate the color conversion structure 8 from the external environment, effectively blocking the penetration of water vapor and oxygen, preventing the quantum dot material from experiencing a decrease in luminous efficiency or failure due to water and oxygen erosion, and improving the long-term reliability and service life of the Micro-LED display chip. At the same time, the encapsulation layer 20 exposes the microlens structure 9, allowing the microlens structure 9 to be in direct contact with the air. Since the light-gathering effect of the microlens structure 9 depends on the refractive index difference between its material and the surrounding medium, the low refractive index of air can ensure that the microlens structure 9 maintains a high light-gathering efficiency, avoiding the weakening of its light focusing and collimation ability due to the encapsulation layer 20 covering it. It is understood that when forming the encapsulation layer 20, a mask can be placed above the microlens structure 9 or a photolithography process can be used to prevent the encapsulation layer 20 material from being deposited on the surface of the microlens structure 9, or the encapsulation layer 20 material above the microlens structure 9 can be removed by an etching process after deposition, thereby exposing the microlens structure 9.

[0123] Based on the same inventive concept, embodiments of the present invention also provide a method for fabricating a Micro-LED display chip. Figure 8 This is a schematic flowchart illustrating a method for fabricating a Micro-LED display chip, provided as an embodiment of the invention. Figure 9 for Figure 8 A corresponding fabrication process flow diagram for a Micro-LED display chip. Figure 10 for Figure 8 Another corresponding fabrication process flow diagram for Micro-LED display chips, such as... Figures 8-10 As shown, the preparation method includes:

[0124] S101. A driving substrate and multiple light-emitting units are provided, wherein the multiple light-emitting units include a light-emitting surface and a bottom surface that are opposite to each other.

[0125] Specifically, refer to Figure 9 or Figure 10 In section A1, a driving substrate 1 is provided. The driving substrate 1 is used to provide driving current or driving voltage to multiple light-emitting units 3 to independently control the switching state of each light-emitting unit 3. Exemplarily, the driving substrate 1 can be a silicon-based CMOS driving substrate, which integrates a pixel driving circuit. This pixel driving circuit is electrically connected to each light-emitting unit 3 via a subsequent bonding process. Further, refer to... Figure 9 or Figure 10A2 in the diagram provides multiple light-emitting units 3, which convert electrical energy into light energy under an applied electric field. Each light-emitting unit 3 has a light-emitting surface and a bottom surface that are opposite to each other. The light-emitting surface is the surface from which light rays are emitted, and the bottom surface is the surface opposite to the light-emitting surface, used for electrical connection and fixation with the driving substrate 1. Exemplarily, the light-emitting unit 3 can be a gallium nitride-based epitaxial stacked structure, including a substrate and an N-type semiconductor layer, a multi-quantum-well light-emitting layer, and a P-type semiconductor layer sequentially stacked on the substrate. The substrate is a growth substrate used to support the growth of the epitaxial layer. In this embodiment, the light-emitting surface of the light-emitting unit 3 is the surface of the substrate opposite to the N-type semiconductor layer.

[0126] S102. A passivation layer is prepared on the bottom surface of multiple light-emitting units, and the passivation layer is patterned to form a passivation structure.

[0127] Specifically, refer to Figure 9 or Figure 10 In step A3, a passivation layer can be deposited on the bottom surface and sidewalls of multiple light-emitting units 3 using plasma-enhanced chemical vapor deposition (PECVD) to fill the gaps between adjacent light-emitting units 3. Then, the passivation layer is patterned using photolithography and etching processes to remove a portion of the passivation layer on the bottom surface of the light-emitting unit 3, forming a passivation structure 4 filling the gaps between adjacent light-emitting units 3. This passivation structure 4 fills the gaps between adjacent light-emitting units 3, achieving electrical and optical isolation between them. Exemplarily, the passivation layer material can be an insulating dielectric material such as silicon dioxide, silicon nitride, or silicon oxynitride, preferably silicon dioxide, which has good insulation properties and process compatibility.

[0128] S103. A first bonding structure is prepared on one side surface of the driving substrate.

[0129] Specifically, refer to Figure 9 or Figure 10 In A4, a first bonding structure 2 can be prepared on one side surface of the driving substrate 1 by chemical vapor deposition, physical vapor deposition or spin coating. The first bonding structure 2 is used to bond with the second bonding structure 5 prepared subsequently to realize the mechanical connection and electrical connection between the driving substrate 1 and the light-emitting unit 3.

[0130] S104. Etch the first bonding structure to form multiple heat dissipation structures or etch the passivation structure to form multiple heat dissipation structures.

[0131] Specifically, refer to Figure 9In A5, when multiple heat dissipation structures 6 are disposed in the first bonding structure 2, through-holes can be formed at the location of the heat dissipation structures 6 in the first bonding structure 2 by etching process, and high thermal conductivity material can be filled in the through-holes, thereby constructing a vertical heat conduction path in the first bonding structure 2, so that heat can be transferred to the driving substrate 1 for outward dissipation through the heat dissipation structure 6.

[0132] Further, refer to Figure 10 In A5 of the paper, when multiple heat dissipation structures 6 are disposed in the passivation structure 4, through-holes can be formed at the locations of the heat dissipation structures 6 in the passivation structure 4 through an etching process, and the through-holes can be filled with a highly thermally conductive material. Since the heat dissipation structures 6 in the passivation structure 4 are disposed adjacent to the light-emitting unit 3, heat is directly conducted out from the side of the light-emitting unit 3, further shortening the heat conduction path and improving heat dissipation efficiency. It should be noted that this application does not limit the specific shape of the heat dissipation structure 6, which can be columnar, through-hole, finned, or mesh-like.

[0133] S105. Prepare a second bonding structure on the bottom surface of the light-emitting unit.

[0134] Specifically, refer to Figure 9 or Figure 10 In A6, a second bonding structure 5 can be prepared on the bottom surface of the light-emitting unit 3 by chemical vapor deposition, physical vapor deposition or spin coating. The second bonding structure 5 is used to bond with the first bonding structure 2 to realize the mechanical connection and electrical connection between the driving substrate 1 and the light-emitting unit 3.

[0135] S106. Bond the first bonding structure and the second bonding structure together so that the driving substrate is connected to each light-emitting unit.

[0136] Specifically, refer to Figure 9 or Figure 10 In step A7, the first bonding structure 2 on one side of the driving substrate 1 and the second bonding structure 5 on the side of the light-emitting unit 3 are positioned opposite each other and bonded under certain temperature and pressure conditions, so that the first bonding structure 2 and the second bonding structure 5 are combined with each other, realizing the mechanical and electrical connection between the driving substrate 1 and the multiple light-emitting units 3. It should be noted that the substrate in the light-emitting unit 3 needs to be removed after bonding.

[0137] S107. A color conversion structure is formed on the light-emitting surface side of at least some of the light-emitting units.

[0138] Specifically, refer to Figure 9 or Figure 10In the A8 section, a color conversion structure 8 is formed on at least a portion of the light-emitting surface of the light-emitting unit 3 by inkjet printing, transfer printing, or photolithography. The color conversion structure 8 is used to excite the blue light emitted by the light-emitting unit 3 into red or green light, thereby achieving full-color display. For example, the color conversion material can be a quantum dot material, such as red quantum dots and green quantum dots.

[0139] This invention achieves independent control of the emitted light from each light-emitting unit and full-color display by fabricating a passivation structure between adjacent light-emitting units and a color conversion structure on the light-emitting surface of the light-emitting unit. Simultaneously, by fabricating multiple heat dissipation structures within the first bonding or passivation structure, an efficient heat dissipation path is provided for the Micro-LED display chip, avoiding the problems of thermal quenching of the color conversion structure and decreased device reliability due to high temperatures.

[0140] Optionally, Figure 11 This is a schematic flowchart illustrating another method for fabricating a Micro-LED display chip, provided as an embodiment of the invention. Figure 12 for Figure 11 A corresponding fabrication process flow diagram for a Micro-LED display chip, such as... Figure 11 and Figure 12 As shown, the preparation method includes:

[0141] S201. A driving substrate and multiple light-emitting units are provided, wherein the multiple light-emitting units include a light-emitting surface and a bottom surface that are opposite to each other.

[0142] S202. A passivation layer is prepared on the bottom surface of multiple light-emitting units, and the passivation layer is patterned to form a passivation structure.

[0143] S203. A first barrier layer is formed on one side surface of the driving substrate using a sputtering deposition process.

[0144] Specifically, refer to Figure 12 In section B4, a first barrier layer 21 is formed on one side surface of the driving substrate 1 using a sputtering deposition process. The first barrier layer 21 is used to prevent metal ions in the driving substrate 1 from diffusing outward, and at the same time to prevent the penetration of water vapor and oxygen, thereby protecting the light-emitting unit 3 and the color conversion structure 8. For example, the first barrier layer 21 can be silicon nitride or silicon carbide nitride.

[0145] S204. A first buffer layer is formed on the side of the first barrier layer away from the driving substrate using a spin coating and curing process.

[0146] Specifically, refer to Figure 12In B5, a first buffer layer 22 is formed on the side of the first barrier layer 21 away from the driving substrate 1 using a spin-coating curing process. The first buffer layer 22 is made of a polyimide-silica hybrid material with an adjustable coefficient of thermal expansion. By adjusting the ratio of polyimide to silica, the coefficient of thermal expansion of the buffer layer is matched with that of the adjacent layer, thereby alleviating the thermal stress caused by the mismatch of the coefficients of thermal expansion of different materials during bonding and operation, and suppressing wafer warping and film cracking.

[0147] S205. A first bonding interface layer is formed on the surface of the first buffer layer away from the first barrier layer using a deposition process; wherein the first barrier layer, the first buffer layer and the first bonding interface layer constitute the first bonding structure.

[0148] Specifically, refer to Figure 12 In section B6, a first bonding interface layer 23 is formed on the surface of the first buffer layer 22 opposite to the first barrier layer 21 using a deposition process. The deposition process can be chemical vapor deposition or plasma-enhanced chemical vapor deposition. The first bonding interface layer 23 is made of silicon dioxide to provide an ultra-smooth bonding surface, ensuring high-quality bonding with the second bonding structure 5 subsequently.

[0149] S206. The first bonded structure is planarized using an integrated chemical mechanical polishing process.

[0150] Specifically, the first bonding structure 2 is planarized using an integrated chemical mechanical polishing process. This step simultaneously planarizes the three dielectric layers: the first barrier layer 21, the first buffer layer 22, and the first bonding interface layer 23. After planarization, the surface roughness of the first bonding interface layer 23 is less than 0.5 nm, providing an ultra-smooth interface for low-temperature bonding.

[0151] S207. Etch the first bonding structure to form multiple heat dissipation structures or etch the passivation structure to form multiple heat dissipation structures.

[0152] S208. A second barrier layer is formed on the bottom surface of the light-emitting unit using a sputtering deposition process.

[0153] Specifically, refer to Figure 12 In B8, a second barrier layer 51 is formed on the bottom surface of the light-emitting unit 3 using a sputtering deposition process. The material of the second barrier layer 51 is the same as that of the first barrier layer 21, and it is used to block the diffusion of metal ions in the light-emitting unit 3 toward the driving substrate 1, while also blocking the penetration of water vapor and oxygen.

[0154] S209. A second buffer layer is formed on the side of the second barrier layer away from the light-emitting unit using a spin coating and curing process.

[0155] Specifically, refer to Figure 12In B9, a second buffer layer 52 is formed on the surface of the second barrier layer 51 opposite to the light-emitting unit 3 using a spin-coating curing process. The material of the second buffer layer 52 is the same as that of the first buffer layer 22, and it is used to alleviate the thermal stress generated during bonding and operation.

[0156] S210. A second bonding interface layer is formed on the side of the second buffer layer away from the second barrier layer using a deposition process; wherein, the second barrier layer, the second buffer layer, and the second bonding interface layer constitute the second bonding structure.

[0157] Specifically, refer to Figure 12 In the B10 layer, a second bonding interface layer 53 is formed on the surface of the second buffer layer 52 opposite to the second barrier layer 51 using a deposition process. The material of the second bonding interface layer 53 is the same as that of the first bonding interface layer 23, which is used to provide an ultra-smooth bonding surface.

[0158] S211. The second bonded structure is planarized using an integrated chemical mechanical polishing process.

[0159] Specifically, the second bonding structure 5 is planarized using an integrated chemical mechanical polishing process, so that the surface roughness of the second bonding interface layer 53 is less than 0.5 nm.

[0160] S212. The first bonding structure and the second bonding structure are bonded together to connect the driving substrate to each light-emitting unit.

[0161] S213. A color conversion structure is formed on the light-emitting surface side of at least some of the light-emitting units.

[0162] This invention provides a three-layer stacked bonding structure by sequentially fabricating a barrier layer, a buffer layer, and a bonding interface layer on the driving substrate and the light-emitting unit. After planarization treatment using an integrated chemical mechanical polishing process, an ultra-smooth bonding interface is obtained, achieving high-strength, void-free hybrid bonding at a low temperature of no more than 200°C. This avoids lattice damage to the epitaxial layer caused by high-temperature processes. At the same time, the buffer layer effectively suppresses wafer warpage, ensuring pixel alignment accuracy and bonding yield.

[0163] Note that the above description is merely a preferred embodiment of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and various obvious changes, readjustments, combinations, and substitutions can be made without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments, and may include many other equivalent embodiments without departing from the concept of the present invention, the scope of which is determined by the scope of the appended claims.

Claims

1. A Micro-LED display chip, characterized in that, include: The driving substrate, the first bonding structure, multiple light-emitting units, the passivation structure, the second bonding structure, multiple heat dissipation structures and the color conversion structure; A first bonding structure is provided on one side surface of the driving substrate; The plurality of light-emitting units include light-emitting surfaces and bottom surfaces that are opposite to each other. A passivation structure is filled between adjacent light-emitting units. A second bonding structure is provided on the bottom surface of the plurality of light-emitting units. The second bonding structure is located on the side of the first bonding structure that is opposite to the driving substrate. The plurality of heat dissipation structures are disposed in the first bonding structure or the passivation structure; The color conversion structure is located on one side of the light-emitting surface of at least a portion of the light-emitting unit.

2. The Micro-LED display chip according to claim 1, characterized in that, The first bonding structure includes a first barrier layer, a first buffer layer, and a first bonding interface layer sequentially stacked along the direction away from the driving substrate; The second bonding structure includes a second barrier layer, a second buffer layer, and a second bonding interface layer, which are sequentially stacked along the direction away from the light-emitting unit.

3. The Micro-LED display chip according to claim 1, characterized in that, It also includes a filling layer; the filling layer is disposed on one side of the light-emitting surface of the light-emitting unit and has a plurality of openings corresponding one-to-one with the plurality of light-emitting units, the plurality of openings including a first opening; The color conversion structure is located within the first opening.

4. The Micro-LED display chip according to claim 3, characterized in that, Also includes: The microlens structure includes a second opening within the plurality of openings in the filling layer.

5. The Micro-LED display chip according to claim 4, characterized in that, Each of the light-emitting units corresponds to a plurality of the heat dissipation structures; When the heat dissipation structure has a different distribution density, and the color conversion structure is provided on one side of the light-emitting surface of the light-emitting unit, the heat dissipation structure corresponding to the light-emitting unit has a first cross-sectional size and a first distribution density. When the microlens structure is provided on one side of the light-emitting surface of the light-emitting unit, the heat dissipation structure corresponding to the light-emitting unit has a second cross-sectional size and a second distribution density; Wherein, the first cross-sectional size is greater than the second cross-sectional size, and / or, the first distribution density is greater than the second distribution density.

6. The Micro-LED display chip according to claim 4, characterized in that, The opening has a first opening area on the side closer to the light-emitting unit and a second opening area on the side away from the light-emitting unit; the opening area of ​​the opening gradually increases from the side closer to the light-emitting unit to the side away from the light-emitting unit. The area of ​​the first opening is larger than the area of ​​the light-emitting surface of the light-emitting unit.

7. The Micro-LED display chip according to claim 3, characterized in that, The color conversion structure includes a first reflective layer and a moisture-proof passivation layer between itself and the sidewall of the first opening, and the first reflective layer is located between the sidewall of the first opening and the moisture-proof passivation layer.

8. The Micro-LED display chip according to claim 3, characterized in that, Each of the first openings is provided with a plurality of periodically arranged nanograting units, and the nanograting units are disposed on the light-emitting surface of the light-emitting unit; The color conversion structure fills the gaps in the nanograting unit and covers the side of the nanograting unit facing away from the light-emitting unit.

9. The Micro-LED display chip according to claim 8, characterized in that, The color conversion structure includes a red light color conversion structure and a green light color conversion structure; The nanograting unit corresponding to the red light color conversion structure has a first preset period and a first preset diameter; The nanograting unit corresponding to the green light color conversion structure has a second preset period and a second preset diameter; The first preset period is less than or greater than the second preset period, and / or the first preset diameter is less than or greater than the second preset diameter.

10. The Micro-LED display chip according to claim 1, characterized in that, The bottom surface of the light-emitting unit is further provided with a first conductive layer, which is located between the bottom surface of the light-emitting unit and the second bonding structure. A second conductive layer is also provided on the light-emitting surface of the light-emitting unit, and the second conductive layers corresponding to adjacent light-emitting units are connected to each other to form a common conductive layer; Each of the light-emitting units is located within the projected area of ​​the second bonding structure, which includes a first conductive post penetrating the second bonding structure; The first bonding structure includes a second conductive post that overlaps with the projection of the first conductive post in the first bonding structure, and the second conductive post penetrates the first bonding structure.

11. The Micro-LED display chip according to claim 10, characterized in that, The surface of the common conductive layer opposite to the light-emitting unit also includes multiple current spreading layers.

12. The Micro-LED display chip according to claim 10, characterized in that, A second reflective structure is provided between the sidewall of the light-emitting unit and the passivation structure, and between the first conductive layer and the second bonding structure. An insulating layer is also included between the sidewall of the light-emitting unit and the second reflective structure, and between the common conductive layer and the passivation structure.

13. The Micro-LED display chip according to claim 10, characterized in that, The light-emitting surface of the light-emitting unit or the surface of the common conductive layer near the light-emitting surface is a roughened surface.

14. The Micro-LED display chip according to claim 4, characterized in that, The surface of the filling layer facing away from the light-emitting unit is further provided with an encapsulation layer, which covers the color conversion structure and exposes the microlens structure.

15. A method for fabricating a Micro-LED display chip, characterized in that, The method for fabricating a Micro-LED display chip as described in any one of claims 1-14 includes: A driving substrate and multiple light-emitting units are provided, wherein the multiple light-emitting units include a light-emitting surface and a bottom surface that are opposite to each other; A passivation layer is prepared on the bottom surface of the plurality of light-emitting units, and the passivation layer is patterned to form a passivation structure; A first bonding structure is prepared on one side surface of the driving substrate; The first bonding structure is etched to form multiple heat dissipation structures, or the passivation structure is etched to form multiple heat dissipation structures. A second bonding structure is prepared on the bottom surface of the light-emitting unit; The first bonding structure and the second bonding structure are bonded together to connect the driving substrate to each of the light-emitting units; A color conversion structure is formed on one side of the light-emitting surface of at least a portion of the light-emitting units.

16. The preparation method according to claim 15, characterized in that, A first bonding structure is formed on one side surface of the driving substrate, comprising: A first barrier layer is formed on one side surface of the driving substrate using a sputtering deposition process; A first buffer layer is formed on the side of the first barrier layer away from the driving substrate using a spin coating and curing process. A first bonding interface layer is formed on the surface of the first buffer layer away from the first barrier layer using a deposition process; wherein, the first barrier layer, the first buffer layer, and the first bonding interface layer constitute the first bonding structure; The first bonded structure is planarized using an integrated chemical mechanical polishing process.

17. The preparation method according to claim 15, characterized in that, A second bonding structure is fabricated on the bottom surface of the light-emitting unit, comprising: A second barrier layer is formed on the bottom surface of the light-emitting unit using a sputtering deposition process; A second buffer layer is formed on the surface of the second barrier layer away from the light-emitting unit using a spin coating and curing process; A second bonding interface layer is formed on the surface of the second buffer layer away from the second barrier layer using a deposition process; wherein, the second barrier layer, the second buffer layer, and the second bonding interface layer constitute the second bonding structure; The second bonded structure is planarized using an integrated chemical mechanical polishing process.

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