A perovskite / crystalline silicon tandem solar cell preparation method, cell and application

Abstract

The application provides a perovskite / crystalline silicon laminated solar cell preparation method, a cell and an application, is applied to the crystalline silicon / perovskite laminated cell field, adopts the self-oxidation mode to form a chromium oxide film, avoids the damage to the core function layer when the traditional oxide material is deposited, and improves the interface stability.The application adopts a chromium metal layer / chromium oxide film double-layer structure, the chromium metal layer forms an electron irradiation barrier to effectively reflect and block incident electrons, reduces the injection and damage of irradiation energy to the lower perovskite active layer, and the ultrathin chromium oxide film perfectly matches the energy level structure of the buffer layer, solves the energy level mismatching problem between the simple chromium metal layer and the buffer layer, and greatly improves the bonding force and structural stability of the whole interface layer by relying on the stronger chemical bonding strength.

Description

Technical Field

[0001] This invention relates to the field of perovskite tandem solar cell technology, specifically to a method for fabricating perovskite / crystalline silicon tandem solar cells, the cells themselves, and their applications in space photovoltaics. Background Technology

[0002] With the large-scale advancement of commercial spaceflight low-Earth orbit constellation construction, space photovoltaics, as a core energy system for spacecraft, has become a key technology supporting space missions. It needs to adapt to the extreme space environment and meet the spacecraft's requirements for high specific power and long-term stable power supply. Currently, multiple technical routes, such as triple-junction gallium arsenide, crystalline silicon HJT, and perovskite tandem, are developing in parallel. Among them, perovskite / crystalline silicon tandem technology has become a key research direction in the field of space photovoltaics due to its combination of high photoelectric conversion efficiency and low cost.

[0003] The core difference between space photovoltaics and ground photovoltaics lies in the fact that spacecraft need to withstand the extreme environment of space for a long time when they are in orbit. Among them, high-energy electron and proton irradiation are key factors affecting the performance and lifespan of photovoltaics. The continuous bombardment of photovoltaic cell lattice structure by high-energy particles will lead to an increase in lattice defects and an increase in charge carrier recombination centers, resulting in a rapid decline in photoelectric conversion efficiency. This is also one of the core bottlenecks that space photovoltaic technology needs to overcome.

[0004] The basic principle of perovskite / crystalline silicon tandem technology is to stack perovskite and crystalline silicon materials to form a heterojunction. Utilizing the wide bandgap, high absorption coefficient, and high carrier mobility of perovskite, combined with the stability and good electron transport performance of crystalline silicon, it achieves highly efficient utilization of the solar spectrum. Its theoretical photoelectric conversion efficiency is as high as 40% or more, far exceeding that of traditional crystalline silicon solar cells, making it suitable for high-energy demand scenarios in space. Research shows that perovskite itself possesses a certain degree of electron and proton irradiation tolerance, but the crystalline silicon layer and interlayer interfaces are prone to performance degradation under irradiation, and perovskite is susceptible to problems such as ion migration and crystalline silicon distortion.

[0005] Existing space-based perovskite / crystalline silicon tandem solar cells typically utilize the electron transport layer (such as C) of the perovskite top cell. 60A tin oxide buffer layer is placed between the electron transport layer and the transparent conductive electrode to isolate high-energy particle bombardment during the deposition process of the transparent conductive electrode and improve interfacial contact. However, this approach has significant shortcomings under high-energy electron irradiation in space: there are significant chemical and structural differences between the electron transport layer and the tin oxide buffer layer, and defects such as dangling bonds, uncoordinated atoms, and local bond discontinuities are easily formed at their interface. After penetrating the transparent conductive electrode and the buffer layer, high-energy electrons directly act on this interfacial region, inducing the breaking of interfacial chemical bonds, a sharp increase in defect state density, and local charge trapping. This leads to a significant increase in interfacial recombination loss and a decrease in electron extraction efficiency. This leads to an attenuation of open-circuit voltage and fill factor. Simultaneously, residual stress from the sputtering deposition of the transparent conductive electrode can be transferred to the electron transport layer interface through the buffer layer, further exacerbating microstructural defects at the interface. Under the synergistic effect of electron irradiation and thermal cycling, these defects gradually expand into microcracks or even localized debonding, disrupting the electrical continuity and structural integrity of the device. Furthermore, existing interface modification methods, such as organic molecule modification and direct deposition of metal oxides, suffer from poor radiation resistance, introduce additional contact barriers, or cause secondary damage to the underlying layer during fabrication. It is difficult to simultaneously achieve radiation protection, interface defect passivation, and efficient electron transport under low-damage conditions. In summary, current technologies lack an ultrathin inorganic interface protection structure positioned between the electron transport layer and the tin oxide buffer layer that can simultaneously achieve high-energy electron attenuation, interface defect suppression, and continuous matching of carrier transport. Summary of the Invention

[0006] If existing perovskite-silicon stacked technology is directly applied to space photovoltaics, there are three major drawbacks. First, electron irradiation will exacerbate the inherent interface defects between the tin oxide buffer layer and the electron transport layer, forming a large number of non-radiative recombination centers, leading to a rapid decline in the photoelectric conversion efficiency of the battery, which cannot meet the long-term stable power supply requirements of spacecraft. Second, electron irradiation will further reduce the adhesion between the two interfaces, making the buffer layer prone to peeling, resulting in battery structural failure and shortened on-orbit life. Third, when using traditional methods such as direct evaporation and atomic deposition to add highly stable oxide materials to optimize the interface, it will damage the core functional layer of the perovskite top battery and reduce the battery's radiation resistance and photoelectric performance.

[0007] This application aims to provide a method for fabricating perovskite / crystalline silicon tandem solar cells. A chromium metal layer is formed on top of the electron transport layer using a non-destructive process and then subjected to self-oxidation treatment to form an ultrathin chromium oxide film. On the one hand, the chromium metal layer can form an electron radiation barrier to effectively reflect and block incident electrons, reducing the injection and damage of irradiation energy to the underlying perovskite active layer, thus improving the device's radiation resistance from the source. On the other hand, the ultrathin chromium oxide film not only perfectly matches the energy level structure of the buffer layer, solving the energy level mismatch problem between the pure chromium layer and the buffer layer, but also, due to its stronger chemical bonding strength, greatly improves the adhesion and structural stability of the entire interface layer.

[0008] This invention, through a unique double-layer composite structure design, achieves dual optimization of energy level continuity and interface stability while ensuring non-destructive device fabrication. This endows the tandem solar cell with excellent electron irradiation tolerance, thereby significantly improving its photoelectric conversion efficiency and long-term operational stability in the extreme environment of space.

[0009] To achieve the above objectives, the present invention provides the following specific solution:

[0010] A method for fabricating a perovskite / crystalline silicon tandem solar cell includes the following steps: providing a cell substrate, wherein an electron transport layer is disposed on the cell substrate, a chromium metal layer is deposited thereon, and a chromium oxide thin film is formed on the chromium metal layer by self-oxidation treatment, and a buffer layer, a second transparent electrode layer, a second metal electrode layer, and an antireflection layer are sequentially deposited on the chromium oxide thin film to obtain a crystalline silicon / perovskite tandem solar cell.

[0011] In some embodiments, the chromium metal layer is prepared by vapor deposition, in which chromium metal is evaporated onto the surface of the electron transport layer, and the vapor deposition vacuum degree is (1~5)×10⁻⁶. -4 Pa, evaporation temperature is 500~800℃, evaporation rate is 0.05~1 Å / S, and thickness is controlled at 1~30nm.

[0012] In some embodiments, the self-oxidation treatment time is 1 to 60 minutes, forming an ultrathin chromium oxide film on the surface with a thickness of 0.1 to 10 nm.

[0013] In some embodiments, the buffer layer can be formed using atomic layer deposition, depositing the buffer layer material onto the surface of the chromium oxide thin film at a deposition vacuum of 0~1×10⁻⁶. 4 Pa, the deposition pipe temperature is between 50-150℃, and the deposition chamber temperature is between 40-150℃. Alternatively, the buffer layer can be formed by vapor deposition, with a vapor deposition vacuum degree of 6×10⁻⁶. -5 ~4×10 -4Pa, with a vapor deposition temperature of 100~500℃ and an evaporation rate of 0.05~1 Å / S, deposits the buffer layer material onto the surface of the chromium oxide film.

[0014] Specifically, the buffer layer material can be selected from at least one of zinc oxide, tin oxide, and titanium dioxide.

[0015] In some embodiments, the battery substrate includes a crystalline silicon bottom battery and a tunneling layer, a hole transport layer, a perovskite absorption layer, a passivation layer, and an electron transport layer sequentially disposed thereon.

[0016] Furthermore, the crystalline silicon substrate is a P-type silicon substrate, comprising the following fabrication steps: providing a P-type silicon substrate, sequentially forming a substrate passivation layer, a P-type substrate doped layer, a first transparent electrode layer, and a first metal electrode layer on one side of the P-type silicon substrate, and sequentially forming a substrate surface passivation layer and an N-type substrate doped layer on the other side of the P-type silicon substrate, wherein the side of the N-type substrate doped layer away from the P-type silicon substrate is used for the fabrication of a tunneling layer.

[0017] The present invention also provides a crystalline silicon / perovskite tandem solar cell prepared by the above preparation method, comprising, from bottom to top, a crystalline silicon bottom cell, a tunneling layer and a perovskite top cell, wherein the perovskite top cell includes a chromium metal layer and a chromium oxide thin film disposed between an electron transport layer and a buffer layer.

[0018] In some embodiments, the thickness of the chromium metal layer is 1~30 nm, and the thickness of the chromium oxide film is 0.1~10 nm.

[0019] Specifically, the perovskite top solar cell includes a hole transport layer, a perovskite absorption layer, a passivation layer, an electron transport layer, a chromium metal layer, a chromium oxide thin film, a buffer layer, a second transparent electrode layer, a second metal electrode layer, and an antireflection layer disposed on the tunneling layer.

[0020] Specifically, the crystalline silicon bottom cell includes, from bottom to top, a first metal electrode layer, a first transparent electrode layer, a P-type substrate doped layer, a substrate passivation layer, a P-type silicon substrate, a substrate surface passivation layer, and an N-type substrate doped layer, wherein the N-type substrate doped layer is in contact with the tunneling layer.

[0021] The perovskite / crystalline silicon tandem solar cells described above can also be used in space photovoltaics.

[0022] This application provides a method for fabricating a perovskite / crystalline silicon tandem solar cell, the cell itself, and its application in the field of crystalline silicon / perovskite tandem solar cells. The tandem solar cell includes a crystalline silicon bottom cell, a tunneling layer, and a perovskite top cell. The perovskite top cell includes a chromium metal layer and a chromium oxide thin film disposed between an electron transport layer and a buffer layer. The chromium oxide thin film is formed through self-oxidation, avoiding damage to the core functional layer during traditional oxide material deposition and improving interface stability. This application employs a chromium metal layer / chromium oxide thin film bilayer structure. The chromium metal layer forms an electron irradiation barrier to effectively reflect and block incident electrons, reducing the injection and damage of irradiation energy to the lower perovskite active layer. Furthermore, the ultrathin chromium oxide thin film perfectly matches the energy level structure of the buffer layer, solving the energy level mismatch problem between the simple chromium metal layer and the buffer layer. Simultaneously, its stronger chemical bonding greatly enhances the bonding force and structural stability of the entire interface layer. Attached Figure Description

[0023] Figure 1 This is a diagram illustrating the fabrication steps of the perovskite / crystalline silicon tandem solar cell described in this invention.

[0024] Figure 2 This is a flowchart illustrating the fabrication process of the perovskite / crystalline silicon tandem solar cell described in this invention.

[0025] Figure 3 This is a schematic diagram of the structure of the perovskite / crystalline silicon tandem solar cell described in this invention.

[0026] The labels in the diagram are as follows: 1. Battery substrate; 10. Crystalline silicon bottom cell; 20. Perovskite top cell; 30. Tunneling layer;

[0027] 101. First metal electrode layer; 102. First transparent electrode layer; 103. P-type substrate doped layer; 104. Substrate passivation layer; 105. P-type silicon substrate; 106. Substrate surface passivation layer; 107. N-type substrate doped layer;

[0028] 201. Hole transport layer; 202. Perovskite absorption layer; 203. Passivation layer; 204. Electron transport layer; 205. Chromium metal layer; 206. Chromium oxide thin film; 207. Buffer layer; 208. Second transparent electrode layer; 209. Second metal electrode layer; 210. Antireflection layer. Detailed Implementation

[0029] The technical solutions in the embodiments of the present invention will be clearly and completely described below. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments.

[0030] In the description of this invention, unless otherwise stated, "a plurality of" means two or more; the terms "center," "longitudinal," "lateral," "upper," "lower," "left," "right," "inner," "outer," "front end," "rear end," "head," "tail," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing the invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the invention. Furthermore, the terms "first," "second," "third," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0031] Please see Figures 1-3 The preparation method and battery provided in the embodiments of this application will now be described. The first aspect of this application provides a method for preparing a perovskite / crystalline silicon tandem solar cell, including the following steps:

[0032] A battery substrate 1 is provided, on which an electron transport layer 204 is disposed, a chromium metal layer 205 is deposited, and a self-oxidation treatment is performed to form a chromium oxide thin film 206 on the chromium metal layer 205. A buffer layer 207, a second transparent electrode layer 208, a second metal electrode layer 209, and an anti-reflection layer 210 are sequentially deposited on the chromium oxide thin film 206 to obtain a crystalline silicon / perovskite tandem solar cell.

[0033] In this embodiment, self-oxidation refers to the slow, non-combustion oxidation of a metal at room temperature or slightly higher temperatures with an oxygen-containing medium, forming a corresponding metal oxide. This application utilizes self-oxidation to form a chromium oxide thin film 206 on the surface of the chromium metal layer 205, which significantly reduces the damage to the core functional layer of the device caused by traditional oxide thin film deposition processes, thus improving interface stability. This application uses the chromium metal layer 205 to form an electron irradiation barrier, effectively reflecting and blocking incident electrons, reducing the injection and damage of irradiation energy to the underlying perovskite active layer. Simultaneously, the ultra-thin chromium oxide thin film 206 matches the energy level structure of the buffer layer, solving the energy level mismatch problem between the simple chromium metal layer and the buffer layer. Furthermore, its stronger chemical bonding greatly enhances the bonding force and structural stability of the entire interface layer.

[0034] In this embodiment, the chromium metal layer 205 is prepared by vapor deposition, in which chromium metal is evaporated onto the surface of the electron transport layer 204, and the vapor deposition vacuum degree is (1~5)×10⁻⁶. -4 Pa, evaporation temperature is 500~800℃, evaporation rate is 0.05~1 Å / S, and thickness is controlled at 1~30nm.

[0035] Preferably, the thickness of the chromium metal layer 205 is 20 nm.

[0036] In some embodiments, the self-oxidation treatment time is 1 to 60 minutes, forming an ultra-thin chromium oxide film 206 on the surface with a thickness of 0.1 to 10 nm.

[0037] The thickness of the chromium oxide film 206 can be controlled by the time of the self-oxidation treatment. Preferably, the thickness of the chromium oxide film 206 is 0.5 nm.

[0038] The chromium oxide thin film 206 is prepared using a non-destructive process, which can reduce the damage to the bottom film layer caused by traditional oxide thin film preparation processes. At the same time, the film obtained by the self-oxidation process has a better interface contact effect with the bottom film layer.

[0039] In some embodiments, the buffer layer 207 can be formed by atomic layer deposition, depositing the buffer layer material onto the surface of the chromium oxide thin film 206, with a deposition vacuum degree of 0~1×10⁻⁶. 4 Pa, the deposition pipe temperature is between 50-150℃, and the deposition chamber temperature is between 40-150℃. Alternatively, the buffer layer 207 can be formed by vapor deposition, with the vapor deposition vacuum degree set to 6×10⁻⁶. -5 ~4×10 -4 Pa, with a vapor deposition temperature of 100~500℃ and an evaporation rate of 0.05~1 Å / S, deposit the buffer layer material onto the surface of the chromium oxide thin film 206.

[0040] Specifically, the buffer layer material can be selected from at least one of zinc oxide, tin oxide, and titanium dioxide.

[0041] In some embodiments, the second transparent electrode layer 208 can be prepared by magnetron sputtering, controlling the sputtering power to 30~200W, to prepare the transparent electrode material on the surface of the buffer layer 207; or, the second transparent electrode layer 208 can also be prepared by vapor deposition, controlling the vapor deposition vacuum degree to 1×10 -5 -5×10 -4 Pa, with a deposition temperature of 1000-2000℃ and an evaporation rate of 0.05-3 Å / S, a transparent electrode material is prepared on the surface of the buffer layer 207.

[0042] Specifically, the transparent electrode material can be selected from at least one of indium tin oxide (ITO), indium zinc oxide (IZO), and aluminum zinc oxide (AZO).

[0043] In some embodiments, the second metal electrode layer 209 can be formed by vapor deposition, with the vapor deposition vacuum degree set to 5×10⁻⁶. -5 ~2×10 -4Pa, with a vapor deposition temperature of 500~2000℃ and an evaporation rate of 0.1~5 Å / S, deposits the metal material onto the surface of the second transparent electrode layer 208.

[0044] Specifically, the metallic material may be selected from at least one of silver (Ag), gold (Au), copper (Cu), aluminum (Al), and carbon (C).

[0045] In some embodiments, the antireflection layer 210 can be prepared by magnetron sputtering or vapor deposition.

[0046] The antireflective layer 210 is composed of at least one of magnesium fluoride, lithium fluoride (LiF), sodium fluoride (NaF), and silicon oxide (SiO2).

[0047] It should be noted that the battery substrate 1 includes an electron transport layer 204, meaning that the surface layer of the battery substrate 1 is an electron transport layer 204. The battery substrate 1 is a battery semi-finished structure, which may include a crystalline silicon bottom cell 10, a tunneling layer 30, and a portion of the film layers of the perovskite top cell 20. The portion of the film layers includes a hole transport layer, a perovskite absorption layer, and an electron transport layer.

[0048] In other embodiments, the battery substrate 1 may also include a structure consisting of multiple sub-cells, with multiple sub-cells and a portion of the perovskite top cell film layer connected in series via a tunneling layer.

[0049] Preferably, the battery substrate 1 includes a crystalline silicon bottom battery 10 and a tunneling layer 30, a hole transport layer 201, a perovskite absorption layer 202, a passivation layer 203, and an electron transport layer 204 sequentially disposed thereon.

[0050] Furthermore, the crystalline silicon substrate 10 is a P-type silicon substrate, comprising the following fabrication steps: providing a P-type silicon substrate 105, wherein on one side of the P-type silicon substrate 105, a substrate passivation layer 104, a P-type substrate doped layer 103, a first transparent electrode layer 102, and a first metal electrode layer 101 are sequentially formed; on the other side of the P-type silicon substrate 105, a substrate surface passivation layer 106 and an N-type substrate doped layer 107 are sequentially formed, wherein the side of the N-type substrate doped layer 107 away from the P-type silicon substrate 105 is used for the fabrication of the tunneling layer 30.

[0051] It should be noted that the preparation sequence of the crystalline silicon bottom cell 10 does not need to strictly follow the above, and the preparation sequence of each film layer can be appropriately adjusted according to actual conditions such as efficiency and cost.

[0052] In this embodiment, the P-type silicon substrate 105 can be a single-crystal silicon wafer. Before preparation, it can be cleaned and polished to reduce surface contaminants. Alternatively, one side of the P-type silicon substrate 105 can be texturized to form a pyramid-shaped textured surface structure to reduce reflection.

[0053] In this embodiment, the substrate passivation layer 104 and the substrate surface passivation layer 106 can be formed by atomic layer deposition, plasma-enhanced chemical vapor deposition or thermal oxidation, and can be made of materials such as silicon oxide and aluminum oxide. The purpose is to reduce dangling bonds on the substrate surface and reduce carrier recombination, thereby achieving the passivation effect.

[0054] In this embodiment, the P-type substrate doped layer 103 and the N-type substrate doped layer 107 form the PN junction of the crystalline silicon bottom cell. The P-type substrate doped layer 103 can be formed by boron source diffusion and ion implantation, and the N-type substrate doped layer 107 can be formed by phosphorus source diffusion and ion implantation.

[0055] The composition and preparation process of the first transparent electrode layer 102 are the same as those of the second transparent electrode layer 208. The same or different materials or thicknesses as the second transparent electrode layer 208 can be selected according to actual needs, which will not be elaborated here.

[0056] The composition and preparation process of the first metal electrode layer 101 are the same as those of the second metal electrode layer 209. The same or different materials or thicknesses as the second metal electrode layer 209 can be selected according to actual needs, which will not be elaborated here.

[0057] The tunneling layer 30 is used to connect the crystalline silicon bottom cell 10 and the perovskite top cell 20 in series. Its ultra-thin tunneling structure allows charge carriers to pass through the potential barrier via quantum tunneling, improving interfacial contact characteristics. Specifically, the tunneling layer can be prepared using atomic layer deposition and is composed of at least one of molybdenum oxide, titanium dioxide, and indium nitride, with a thickness of 2-5 nm.

[0058] In this embodiment, the hole transport layer 201 can be prepared by spin coating, whereby a hole transport layer dispersion is uniformly coated onto the surface of the tunneling layer 30 at a spin coating speed of 1000-5000 rpm for 10-100 s, followed by annealing at a temperature of 300-600℃ for 10-50 min; or, the hole transport layer 201 can also be prepared by magnetron sputtering, with a controlled power of 30-90 W, whereby the hole transport layer material is sputtered onto the tunneling layer 30; the hole transport layer 201 can be made of poly[bis(4-phenyl)(2,4,6-trimethylphenyl)amine] (PTAA), poly-3-hexylthiophene (P3HT), or nickel oxide (NiO). xAt least one of molybdenum trioxide (MoO3), cuprous iodide (CuI), and cuprous thiocyanate (CuSCN).

[0059] In this embodiment, the perovskite absorber layer 202 can be prepared by spin-coating and flash evaporation. A perovskite precursor solution is prepared and uniformly coated onto the surface of the hole transport layer 201. The spin-coating speed is 1000-6000 rpm, and the spin-coating time is 20-120 s. After spin-coating, a flash evaporation operation is performed for 10-60 s at a temperature of 0-100°C. After flash evaporation, an annealing treatment is performed at a temperature of 50-150°C for 5-40 min.

[0060] Furthermore, the perovskite precursor solution contains an ABX3 structure, wherein the A-site is an organic cation, including CH3NH3. + (MA + ), NH2CH=NH2 + (FA + CH3CH2NH3 + or Cs + At least one of them;

[0061] The B site is a metal cation, including Pb. 2+ Sn 2+ At least one of them;

[0062] The X-position is a halide anion, including F. - Cl - ,Br - I - At least one of them.

[0063] The passivation layer 203 can be deposited by vapor deposition, whereby the passivation layer material is evaporated onto the surface of the perovskite absorber layer 202, with a vapor deposition vacuum degree of 1-5 × 10⁻⁶. -4 The perovskite absorption layer 202 is deposited at a temperature of 50-400℃ and an evaporation rate of 0.05-1 Å / s. After evaporation, annealing is performed at a temperature of 0-150℃ for 0-30 min. Alternatively, the passivation layer 203 can be prepared by spin coating. A passivation layer dispersion is prepared and uniformly coated onto the surface of the perovskite absorption layer 202. The spin coating speed is 1000-7000 rpm, and the spin coating time is 20-120 s. After spin coating, annealing is performed at a temperature of 40-160℃ for 5-40 min. Alternatively, the passivation layer 203 can be sprayed. The passivation layer dispersion is sprayed onto the perovskite absorption layer 202 at a spraying rate of 0-100 cm / s. After spraying, annealing is performed at a temperature of 20-170℃ for 0-30 min.

[0064] The passivation layer dispersion is prepared by dissolving the passivation layer material in organic solvents including but not limited to methanol, ethanol, or isopropanol, followed by ultrasonic dissolution. The concentration is 0.1-6 mg / ml, and the ultrasonic time is 0-30 min. The passivation layer material includes, but is not limited to, at least one of propylenediamine iodine, propylenediamine bromide (PDADBr), butylamine chloride (BACl), butylamine bromide (BABr), butylamine iodide (BAI), N,N-dimethyl-1,3-propanediamine hydrochloride (DMePDADCl), and dodecylamine bromide (DDDADBr); it may also be at least one of magnesium fluoride, lithium fluoride, and sodium fluoride.

[0065] In one embodiment, the electron transport layer 204 can be achieved by spin coating, where an electron transport layer dispersion is uniformly spin-coated onto the surface of the passivation layer 203 at a spin-coating speed of 500-4000 rpm and a spin-coating time of 10-80 s; or, the electron transport layer 204 can also be achieved by vapor deposition, where the electron transport layer material is evaporated onto the surface of the passivation layer 203 at a vapor deposition vacuum degree of 5 × 10⁻⁶. -5 -5×10 -4 Pa, evaporation temperature is 100-400℃, evaporation rate is 0.05-1Å / S.

[0066] The electron transport layer dispersion is obtained by dissolving the electron transport layer material in at least one solvent, such as methanol, ethanol, or isopropanol; the electron transport layer material includes zinc oxide (ZnO), tin dioxide (SnO2), titanium dioxide (TiO2), and methyl [6,6]-phenyl C61-butyrate (PC). 61 BM), C60 (C 60 At least one of ), 2,9-dimethyl-4,7-diphenyl-1,10-phenanthroline (BCP).

[0067] The second aspect of this application provides a perovskite / crystalline silicon tandem solar cell, which is prepared by the above-described method and includes, from bottom to top, a crystalline silicon bottom cell 10, a tunneling layer 30, and a perovskite top cell 20. The perovskite top cell 20 includes a chromium metal layer 205 and a chromium oxide thin film 206 disposed between an electron transport layer 204 and a buffer layer 207.

[0068] In some embodiments, the chromium metal layer 205 has a thickness of 1~30 nm, and the chromium oxide thin film 206 has a thickness of 0.1~10 nm.

[0069] Specifically, the perovskite top solar cell 20 includes a hole transport layer 201, a perovskite absorption layer 202, a passivation layer 203, an electron transport layer 204, a chromium metal layer 205, a chromium oxide thin film 206, a buffer layer 207, a second transparent electrode layer 208, a second metal electrode layer 209, and an antireflection layer 210 disposed on the tunneling layer 30.

[0070] Specifically, the crystalline silicon bottom cell 10 includes, from bottom to top, a first metal electrode layer 101, a first transparent electrode layer 102, a P-type substrate doped layer 103, a substrate passivation layer 104, a P-type silicon substrate 105, a substrate surface passivation layer 106, and an N-type substrate doped layer 107, wherein the N-type substrate doped layer 107 is in contact with the tunneling layer 30.

[0071] The perovskite / crystalline silicon tandem solar cells described above can also be used in space photovoltaics.

[0072] The following specific embodiments and comparative examples clearly and completely describe the technical solution of the present invention. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0073] Example 1

[0074] Please see Figures 1-3 This embodiment provides a perovskite / crystalline silicon tandem solar cell, comprising, from bottom to top, a first metal electrode layer 101, a first transparent electrode layer 102, a P-type substrate doped layer 103, a substrate passivation layer 104, a P-type silicon substrate 105, a substrate surface passivation layer 106, an N-type substrate doped layer, a tunneling layer 30, a hole transport layer 201, a perovskite absorber layer 202, a passivation layer 203, an electron transport layer 204, a chromium metal layer 205, a chromium oxide thin film 206, a buffer layer 207, a second transparent electrode layer 208, a second metal electrode layer 209, and an antireflection layer 210. The fabrication method of the tandem solar cell includes the following steps:

[0075] S(1) Provide a P-type silicon substrate 105, and sequentially prepare a substrate passivation layer 104 and a P-type substrate doped layer 103 on the back side of the P-type silicon substrate 105, and sequentially prepare a substrate surface passivation layer 106 and an N-type substrate doped layer 107 on its surface.

[0076] S(2) Using magnetron sputtering, an ITO target is set up, the sputtering power is controlled at 60W, the running time is 1.5h, and a first transparent electrode layer 102 with a thickness of 100nm is deposited on the surface of the P-type substrate doped layer 103.

[0077] S(3) Using vapor deposition, control the vapor deposition vacuum degree to be 2×10 -4 Pa, adjust the evaporation voltage to the evaporation temperature, control the evaporation rate at 2.5 Å / S, and deposit silver onto the first transparent electrode layer 102 to obtain the first metal electrode layer 101 with a thickness of 200 nm;

[0078] S(4) Using magnetron sputtering, the sputtering power is controlled at 60W and the running time is 1.5h. A metal oxide target is set to form a tunneling layer 30 with a thickness of 3nm on the surface of the N-type substrate doped layer 107.

[0079] S(5) The sample obtained in the above steps was treated with UV-Ozone for 15 min. A hole transport layer dispersion was prepared by dissolving 0.05 mol NiOx powder in 1 ml of ultrapure water and ultrasonically vibrating for 20 min. The hole transport layer dispersion was then uniformly coated onto the surface of the tunneling layer 30. The spin coating speed was set to 2000 rpm, the spin coating time was 40 s, and the solution volume was 100 μl. After spin coating, annealing was performed at 450 °C for 30 min to obtain the hole transport layer 201 with a thickness of 20 nm.

[0080] S(6) The perovskite absorber layer 202 is prepared by flash evaporation, including the following steps: dissolving perovskite powder with ABX3 structure in 1 ml of DMF and DMSO solvent in a solvent ratio of 8:2, stirring to obtain perovskite precursor solution, placing the battery substrate on a spin coater, setting the spin coater speed to 3500 rpm and the spin coater time to 30 s, coating the surface of the battery substrate with 120 μl of perovskite precursor solution, transferring it to a flash evaporation stage after spin coatering, setting the flash evaporation time to 30 s and the flash evaporation temperature to 30 °C, and performing annealing treatment after flash evaporation, setting the annealing temperature to 100 °C and the annealing time to 15 min to obtain perovskite absorber layer 202 with a thickness of 500 nm.

[0081] S(7) Using the vapor deposition method, weigh 3 mg of propylenediamine iodine and place it in a crucible. Place the sample obtained in the above steps on a mask and put it into the vapor deposition chamber. Wait until the vapor deposition vacuum degree is 2×10 -4 Evaporation was performed at Pa, the evaporation voltage was adjusted to the evaporation temperature, and the evaporation rate was controlled at 0.1 Å / S. Propylene diamine iodine was deposited onto the perovskite absorber layer 202 with a thickness of 4 nm. After the evaporation was completed, the annealing station temperature was set to 100°C and annealing was performed for 8 minutes to obtain the passivation layer 203.

[0082] S(8), C 60The electron transport layer 204 is prepared by evaporation onto the surface of the passivation layer 203. The thickness of the electron transport layer 204 is 20 nm, and the vacuum degree of the evaporation is 1 × 10⁻⁶. -4 Pa, evaporation temperature at 200℃, evaporation rate at 0.1 Å / S.

[0083] S(9) Using the vapor deposition method, place the sample obtained in the above steps on a mask and put it into the vapor deposition chamber. Wait until the vapor deposition vacuum degree is 1×10 -4 Evaporation was performed at Pa, the evaporation voltage was adjusted to the evaporation temperature of 800 degrees, and the evaporation rate was controlled at 0.1 Å / S to deposit metallic chromium onto the electron transport layer 204 to obtain a chromium metal layer 205 with a thickness of 10 nm; it was then placed in air for self-oxidation treatment for 10 min to form a chromium oxide thin film 206 with a thickness of 0.5 nm on the surface of the chromium metal layer 205.

[0084] S(10) SnO2 is deposited onto the surface of the chromium oxide thin film 206 using atomic layer deposition (ALD) equipment to prepare the buffer layer 207 with a thickness of 15 nm. The vacuum degree of the deposition is 0.5 × 10⁻⁶. 4 Pa, the temperature of the deposition pipe is 70℃, and the temperature of the deposition chamber is 60℃.

[0085] S(11) The second transparent electrode layer 208 with a thickness of 100 nm is prepared on the surface of the buffer layer 207 by magnetron sputtering. The target material of the magnetron sputtering method is indium zinc oxide (IZO), the power of the magnetron sputtering method is 50 W, and the running time of the magnetron sputtering method is 1 h.

[0086] S(12) Place the sample prepared in the previous step on a mask, and deposit silver (Ag) onto the surface of the second transparent electrode layer 208 to prepare a second metal electrode layer 209 with a thickness of 100 nm. The vacuum degree of the deposition is 2 × 10⁻⁶. -4 Pa, temperature 800℃, evaporation rate 0.1 Å / S.

[0087] S(13) Place the sample prepared in the previous step on a mask, evaporate magnesium fluoride onto the surface of the second metal electrode layer 209 using a vapor deposition method, and anneal it to prepare the antireflection layer 210 with a thickness of 100 nm, wherein the vapor deposition vacuum degree is 2 × 10⁻⁶. -4 The perovskite / crystalline silicon tandem solar cell was obtained by evaporation at 80℃, evaporation rate at 2Å / s, annealing temperature at 100℃, and annealing time at 8min.

[0088] Example 2

[0089] The preparation process of this embodiment is the same as that of the stacked solar cell described in Embodiment 1. The difference is that in step S (9) of this embodiment, the thickness of the chromium metal layer 205 is 20 nm by controlling the evaporation time.

[0090] Example 3

[0091] The preparation process of this embodiment is the same as that of the stacked solar cell described in Embodiment 1. The difference is that in step S (9) of this embodiment, the thickness of the chromium metal layer 205 is 30 nm by controlling the evaporation time.

[0092] Comparative Example 1

[0093] In this comparative example, the tandem solar cell was prepared using a conventional process. Compared with Example 1, step (9) was removed, and the double-layer protective structure of chromium metal layer / chromium oxide thin film was not present.

[0094] The perovskite / crystalline silicon tandem solar cells obtained in Examples 1-3 and Comparative Example 1 were tested under the following conditions: a standard solar intensity calibration was performed using a solar simulator, and the solar cells with an area of ​​1.0 cm² were tested. 2 The embodiment device underwent long-term IV testing and passed 1e 16 The attenuation rate after dose electron radiation was measured with an initial voltage of 1.95V, a cutoff voltage of 0V, and a range of 100mA. The results were rounded to one decimal place. The test results are shown in Table 1 below.

[0095] Table 1. Test results of the tandem solar cells described in Examples 1-3 and Comparative Example 1.

[0096] Devices <![CDATA[Short-circuit current Jsc (mA / cm 2 )]]> Photoelectric conversion efficiency (%) <![CDATA[After 1e 16 decay rate (%) after dose electron irradiation]]> Example 1 20.5 32.4 10.1 Example 2 20.2 33.5 2.1 Example 3 19.8 31.9 1.1 Comparative Example 1 20.8 33.1 52.2

[0097] As shown in Table 1, Examples 1-3 effectively solved the core problems of performance degradation and insufficient stability of existing tandem battery structures under space irradiation by setting a chromium metal layer and a self-oxidizing ultrathin chromium oxide film between the electron transport layer and the buffer layer. Comparative Example 1 uses a traditional tandem battery structure, which, after 1e... 16 The decay rate after dose electron irradiation is as high as 52.2%, and its resistance to electron irradiation is poor, making it difficult to apply to the extreme radiation environment of space.

[0098] The applicant optimized the structure of the chromium metal layer and the chromium oxide film. As can be seen from multiple embodiments, if the thickness of the chromium metal layer is too low, the attenuation rate of the device after electron irradiation will be too high, while if the thickness is too high, it will affect the photoelectric conversion efficiency of the device. In contrast, the 20nm chromium metal layer and 0.5nm chromium oxide film used in Embodiment 2 can effectively eliminate the interface defects between the tin oxide buffer layer and the chromium metal layer, reduce non-radiative recombination, ensure the energy level matching of the device, and improve the device's resistance to electron irradiation, thereby optimizing the device's photoelectric conversion efficiency and stability.

[0099] The above embodiments are merely preferred embodiments of the present invention. It should be noted that, for those skilled in the art, various changes, modifications, substitutions, and variations can be made to these embodiments without departing from the principle of the present invention. All technical solutions after making equivalent substitutions to the claims of the present invention fall within the protection scope of the present invention, which is defined by the appended claims and their equivalents.

Claims

1. A method for fabricating a perovskite / crystalline silicon tandem solar cell, characterized in that, The steps include: providing a battery substrate, on which an electron transport layer is disposed, depositing a chromium metal layer thereon, performing self-oxidation treatment to form a chromium oxide thin film on the chromium metal layer, and sequentially depositing a buffer layer, a second transparent electrode layer, a second metal electrode layer, and an anti-reflection layer on the chromium oxide thin film to obtain a crystalline silicon / perovskite tandem solar cell. The buffer layer material is selected from at least one of zinc oxide, tin oxide, and titanium dioxide.

2. The method for fabricating perovskite / crystalline silicon tandem solar cells according to claim 1, characterized in that, The chromium metal layer is prepared by vapor deposition, in which chromium metal is evaporated onto the surface of the electron transport layer, and the vapor deposition vacuum degree is (1~5)×10⁻⁶. -4 Pa, evaporation temperature is 500~800℃, evaporation rate is 0.05~1 Å / S, and thickness is controlled at 1~30nm.

3. The method for fabricating perovskite / crystalline silicon tandem solar cells according to claim 1, characterized in that, The self-oxidation treatment time is 1~60 min, forming a chromium oxide film on the surface with a thickness of 0.1~10 nm.

4. The method for fabricating perovskite / crystalline silicon tandem solar cells according to claim 1, characterized in that, The battery substrate includes a crystalline silicon bottom cell and a tunneling layer, a hole transport layer, a perovskite absorption layer, a passivation layer, and an electron transport layer sequentially disposed thereon.

5. The method for fabricating perovskite / crystalline silicon tandem solar cells according to claim 4, characterized in that, The crystalline silicon substrate is a P-type silicon substrate, and includes the following fabrication steps: providing a P-type silicon substrate, and sequentially forming a substrate passivation layer, a P-type substrate doped layer, a first transparent electrode layer, and a first metal electrode layer on one side of the P-type silicon substrate; sequentially forming a substrate surface passivation layer and an N-type substrate doped layer on the other side of the P-type silicon substrate; and using the side of the N-type substrate doped layer away from the P-type silicon substrate for the fabrication of a tunneling layer.

6. The method for fabricating perovskite / crystalline silicon tandem solar cells according to claim 1, characterized in that, The buffer layer is formed using atomic layer deposition (ALD), where the buffer layer material is deposited onto the surface of the chromium oxide thin film at a deposition vacuum of 0~1×10⁻⁶. 4 Pa, the deposition pipeline temperature is between 50-150℃, and the deposition chamber temperature is between 40-150℃; or, the buffer layer is formed by vapor deposition, with a vapor deposition vacuum degree of 6×10⁻⁶. -5 ~4×10 -4 Pa, with a vapor deposition temperature of 100~500℃ and an evaporation rate of 0.05~1 Å / S, deposits the buffer layer material onto the surface of the chromium oxide film.

7. A perovskite / crystalline silicon tandem solar cell, characterized in that, The cell is prepared by any one of claims 1-6 and comprises, from bottom to top, a crystalline silicon bottom cell, a tunneling layer, and a perovskite top cell. The perovskite top cell includes a chromium metal layer and a chromium oxide thin film disposed between an electron transport layer and a buffer layer.

8. The perovskite / crystalline silicon tandem solar cell according to claim 7, characterized in that, The thickness of the chromium metal layer is 1~30nm, and the thickness of the chromium oxide film is 0.1~10nm.

9. The perovskite / crystalline silicon tandem solar cell according to claim 7, characterized in that, The perovskite top solar cell includes a hole transport layer, a perovskite absorption layer, a passivation layer, an electron transport layer, a chromium metal layer, a chromium oxide thin film, a buffer layer, a second transparent electrode layer, a second metal electrode layer, and an anti-reflection layer disposed on the tunneling layer.

10. The perovskite / crystalline silicon tandem solar cell according to claim 7, characterized in that, The crystalline silicon bottom cell includes, from bottom to top, a first metal electrode layer, a first transparent electrode layer, a P-type substrate doped layer, a substrate passivation layer, a P-type silicon substrate, a substrate surface passivation layer, and an N-type substrate doped layer, wherein the N-type substrate doped layer is in contact with the tunneling layer.

11. An application of the perovskite / crystalline silicon tandem solar cell according to any one of claims 7-10 in the field of space photovoltaics.

Images