Light-emitting substrate and display device

Abstract

This disclosure provides a light-emitting substrate and a display device. The light-emitting substrate has a plurality of sub-pixels, at least one sub-pixel including a light-emitting region and a light-transmitting region. The light-emitting region is configured to emit light, and the light-transmitting region is configured to transmit light. The light-emitting region includes at least a first power line extending along a first direction, a second power line extending along a second direction, and a light-emitting device. The light-emitting device includes at least a first electrode, a pixel definition layer, a light-emitting layer, and a second electrode. The first electrode is connected to the first power line, and the second electrode is connected to the second power line. The pixel definition layer has a pixel opening that exposes the first electrode, and the light-emitting layer is connected to the first electrode through the pixel opening. In at least one sub-pixel, the orthographic projection of the pixel opening on the plane of the light-emitting substrate does not overlap with the orthographic projections of the first power line and the second power line on the plane of the light-emitting substrate.

Description

Technical Field

[0001] This disclosure relates to, but is not limited to, the field of display technology, and particularly to a light-emitting substrate and a display device. Background Technology

[0002] Organic light-emitting diodes (OLEDs) possess advantages such as self-illumination, high contrast, fast response, wide viewing angle, and low power consumption, making them the next generation of mainstream display technology after liquid crystal displays (LCDs). Depending on the driving method, OLEDs are divided into active-matrix OLEDs (AMOLEDs) and passive-matrix OLEDs (PMOLEDs). PMOLEDs have a simple structure, eliminating the need for complex thin-film transistor (TFT) backplanes, and are characterized by low manufacturing costs, mature processes, and high reliability. The PMOLED light-emitting substrate, as the light source, has a wide range of applications.

[0003] Currently, existing light-emitting substrates used as front light sources suffer from problems such as significant brightness loss. Summary of the Invention

[0004] The following is an overview of the subject matter described in detail herein. This overview is not intended to limit the scope of the claims.

[0005] The technical problem to be solved by the embodiments of this disclosure is to provide a light-emitting substrate and a display device to solve the problem of large brightness loss in existing light-emitting substrates used as front light sources.

[0006] On one hand, embodiments of this disclosure provide a light-emitting substrate including a plurality of sub-pixels. At least one sub-pixel includes a light-emitting region and a light-transmitting region located on at least one side of the light-emitting region. The light-emitting region is configured to emit light, and the light-transmitting region is configured to transmit light. The light-emitting region includes at least a first power line extending along a first direction, a second power line extending along a second direction, and a light-emitting device. The first direction and the second direction intersect. The light-emitting device includes at least a first electrode, a pixel definition layer, a light-emitting layer, and a second electrode. The first electrode is connected to the first power line, and the second electrode is connected to the second power line. The pixel definition layer is provided with a pixel opening exposing the first electrode, and the light-emitting layer is connected to the first electrode through the pixel opening. In at least one sub-pixel, the orthographic projection of the pixel opening on the plane of the light-emitting substrate does not overlap with the orthographic projections of the first power line and the second power line on the plane of the light-emitting substrate.

[0007] In an exemplary embodiment, in at least one sub-pixel, the orthographic projection of the first power line on the light-emitting substrate plane at least partially overlaps with the orthographic projection of the pixel center line on the light-emitting substrate plane, wherein the pixel center line is a straight line that bisects the sub-pixel in the second direction and extends in the first direction.

[0008] In an exemplary embodiment, in at least one sub-pixel, the first electrode includes at least a first sub-electrode and a second sub-electrode. The first sub-electrode and the second sub-electrode are respectively disposed on both sides of the first power line in the second direction. The first sub-electrode is connected to the first power line through a first sub-connection electrode, and the second sub-electrode is connected to the first power line through a second sub-connection electrode.

[0009] In an exemplary embodiment, in at least one sub-pixel, in the second direction, the first sub-electrode and the first sub-connection electrode are disposed on the same side of the first power line, and the second sub-electrode and the second sub-connection electrode are disposed on the same side of the first power line; the first end of the first sub-connection electrode is directly connected to the first sub-electrode, the second end of the first sub-connection electrode is connected to the first power line through a via, the first end of the second sub-connection electrode is directly connected to the second sub-electrode, and the second end of the second sub-connection electrode is connected to the first power line through a via.

[0010] In an exemplary embodiment, in at least one sub-pixel, the first sub-electrode and the first sub-connection electrode are an integral structure connected to each other, and the second sub-electrode and the second sub-connection electrode are an integral structure connected to each other.

[0011] In an exemplary embodiment, in at least one sub-pixel, the first sub-connection electrode and the second sub-connection electrode are respectively disposed on both sides of the first electrode in the first direction.

[0012] In an exemplary embodiment, in at least one sub-pixel, the pixel opening includes at least a first pixel opening and a second pixel opening. The first pixel opening and the second pixel opening are respectively disposed on both sides of the first power line in the second direction. The orthographic projection of the first pixel opening on the light-emitting substrate plane is within the range of the orthographic projection of the first sub-electrode on the light-emitting substrate plane, and the orthographic projection of the second pixel opening on the light-emitting substrate plane is within the range of the orthographic projection of the second sub-electrode on the light-emitting substrate plane.

[0013] In an exemplary embodiment, in at least one sub-pixel, the light-emitting device further includes a reflective electrode, which overlaps with the second electrode; in a direction perpendicular to the light-emitting substrate, the reflective electrode is disposed on the side of the second electrode away from the light-emitting layer, or the reflective electrode is disposed between the light-emitting layer and the second electrode.

[0014] In an exemplary embodiment, in at least one sub-pixel, the orthogonal projections of the first sub-electrode and the second sub-electrode onto the light-emitting substrate plane are located within the range of the orthogonal projection of the reflective electrode onto the light-emitting substrate plane.

[0015] In an exemplary embodiment, in at least one sub-pixel, the orthographic projection of the reflective electrode on the light-emitting substrate plane at least partially overlaps with the orthographic projection of the first power line on the light-emitting substrate plane, while the orthographic projection of the reflective electrode on the light-emitting substrate plane does not overlap with the orthographic projection of the second power line on the light-emitting substrate plane.

[0016] In an exemplary embodiment, in at least one sub-pixel, the orthographic projection of the second power line on the light-emitting substrate plane does not overlap with the orthographic projection of the first power line on the light-emitting substrate plane.

[0017] In an exemplary embodiment, in at least one sub-pixel, the orthographic projection of the second power line on the light-emitting substrate plane at least partially overlaps with the orthographic projection of the light-emitting center line on the light-emitting substrate plane, wherein the light-emitting center line is a straight line that bisects the light-emitting area in the first direction and extends in the second direction.

[0018] In an exemplary embodiment, in at least one sub-pixel, the second power line includes at least a first power trace and a second power trace extending along the second direction, wherein the first power trace and the second power trace are respectively disposed on both sides of the first electrode in the second direction.

[0019] In an exemplary embodiment, in at least one sub-pixel, the end of the first power supply trace near the first electrode is connected to a first connection block, and the second electrode is connected to the first connection block via a first cathode connection electrode; or, the end of the second power supply trace near the first electrode is connected to a second connection block, and the second electrode is connected to the second connection block via a second cathode connection electrode.

[0020] In an exemplary embodiment, in at least one sub-pixel, the first cathode connection electrode includes at least a stacked first auxiliary electrode, a third auxiliary electrode, and a fifth auxiliary electrode. The first auxiliary electrode is connected to the first connection block through a via. The third auxiliary electrode is disposed on the side of the first auxiliary electrode away from the first connection block and overlaps with the first auxiliary electrode. The fifth auxiliary electrode is disposed on the side of the third auxiliary electrode away from the first connection block and overlaps with the third auxiliary electrode. Alternatively, the second cathode connection electrode includes at least a stacked second auxiliary electrode, a fourth auxiliary electrode, and a sixth auxiliary electrode. The second auxiliary electrode is connected to the second connection block through a via. The fourth auxiliary electrode is disposed on the side of the second auxiliary electrode away from the second connection block and overlaps with the second auxiliary electrode. The sixth auxiliary electrode is disposed on the side of the fourth auxiliary electrode away from the second connection block and overlaps with the fourth auxiliary electrode.

[0021] In an exemplary embodiment, in at least one sub-pixel, the orthographic projection of the third auxiliary electrode onto the light-emitting substrate plane is located within the range of the orthographic projection of the fifth auxiliary electrode onto the light-emitting substrate plane, and the fifth auxiliary electrode has a protrusion relative to the sidewall of the third auxiliary electrode, forming an undercut structure; or, the orthographic projection of the fourth auxiliary electrode onto the light-emitting substrate plane is located within the range of the orthographic projection of the sixth auxiliary electrode onto the light-emitting substrate plane, and the sixth auxiliary electrode has a protrusion relative to the sidewall of the fourth auxiliary electrode, forming an undercut structure.

[0022] In an exemplary embodiment, in at least one sub-pixel, on a plane parallel to the light-emitting substrate, the third auxiliary electrode or the fourth auxiliary electrode is polygonal in shape, and at least one edge of the polygonal shape is provided with a groove.

[0023] In an exemplary embodiment, in at least one sub-pixel, the pixel definition layer is further provided with a first light-transmitting opening and a second light-transmitting opening. The first light-transmitting opening and the second light-transmitting opening are respectively disposed on both sides of the first power line in the second direction. The orthographic projection of the first light-transmitting opening on the light-emitting substrate plane overlaps at least partially with the orthographic projection of the first cathode connection electrode on the light-emitting substrate plane. The orthographic projection of the second light-transmitting opening on the light-emitting substrate plane overlaps at least partially with the orthographic projection of the second cathode connection electrode on the light-emitting substrate plane.

[0024] In an exemplary embodiment, in at least one sub-pixel, the orthographic projections of the first light-transmitting opening and the second light-transmitting opening onto the light-emitting substrate plane do not overlap with the orthographic projections of the first power line and the first electrode onto the light-emitting substrate plane.

[0025] On the other hand, embodiments of this disclosure also provide a display device, including the aforementioned light-emitting substrate.

[0026] This disclosure provides a light-emitting substrate and a display device. By ensuring that the orthographic projection of the pixel opening on the substrate does not overlap with the orthographic projection of the first power line and the second power line on the substrate, the aperture ratio can be effectively increased while ensuring transmittance, thus effectively increasing the light emission brightness. This effectively compensates for the brightness loss of the light-emitting substrate as a front light source and effectively solves the problem of large brightness loss in the light-emitting substrate as a front light source.

[0027] After reading and understanding the accompanying diagrams and detailed descriptions, other aspects can be understood. Attached Figure Description

[0028] The accompanying drawings are used to provide an understanding of the technical solutions of this disclosure and form part of the specification. They are used together with the embodiments of this disclosure to explain the technical solutions of this disclosure and do not constitute a limitation on the technical solutions of this disclosure.

[0029] Figure 1 This is a schematic diagram of a planar structure of a light-emitting substrate; Figure 2 This is a schematic diagram of the structure of a light-emitting substrate as an exemplary embodiment of the present disclosure; Figure 3 for Figure 2 Sectional view along the middle AA direction; Figure 4 for Figure 2 Sectional view along the BB direction; Figure 5 This is a schematic diagram of the light-emitting substrate after the first conductive layer pattern has been formed; Figure 6 This is a schematic diagram of the light-emitting substrate after the first insulating layer pattern has been formed; Figure 7A and Figure 7B This is a schematic diagram of the light-emitting substrate after the second conductive layer pattern has been formed; Figure 8A and Figure 8B This is a schematic diagram showing the pattern of the third and fourth conductive layers formed on the light-emitting substrate of this disclosure; Figure 8C for Figure 8B A cross-sectional view along the CC direction; Figure 8D for Figure 8C A sectional view along the DD direction; Figure 9 This is a schematic diagram of the light-emitting substrate after the pixel definition layer pattern has been formed in this disclosure; Figure 10This is a schematic diagram showing the pattern of the organic light-emitting layer, the fifth conductive layer, and the sixth conductive layer formed on the light-emitting substrate of this disclosure; Figure 11 This is a schematic diagram of the structure of another light-emitting substrate as an exemplary embodiment of the present disclosure; Figure 12 This is a schematic diagram of the structure of a display device as an exemplary embodiment of the present disclosure.

[0030] Explanation of reference numerals in the attached figures: 10 - First power line; 11 - First connecting electrode; 12 - Second connecting electrode; 20 - Second power line; 21-First power supply trace; 22-Second power supply trace; 30-First electrode; 31-First sub-electrode; 32 - Second sub-electrode; 33 - First sub-connecting electrode; 34 - Second sub-connecting electrode; 40A - First cathode connection electrode; 40B - Second cathode connection electrode; 41 - First auxiliary electrode; 42 - Second auxiliary electrode; 43 - Third auxiliary electrode; 44 - Fourth auxiliary electrode; 45-Fifth auxiliary electrode; 46-Sixth auxiliary electrode; 50-Light-emitting layer; 51-Light-emitting block; 60 - Second electrode; 70 - Reflective electrode; 90 - Substrate; 91 - First insulating layer; 92 - Pixel definition layer; 100 - Light-emitting substrate; 110 - Sub-pixel; 110A - Light-emitting area; 110B - Light-transmitting area; 200 - Display panel. Detailed Implementation

[0031] To make the objectives, technical solutions, and advantages of this disclosure clearer, embodiments of this disclosure will be described in detail below with reference to the accompanying drawings. Note that the implementation methods can be carried out in many different forms. Those skilled in the art will readily understand that the methods and content can be varied in various forms without departing from the spirit and scope of this disclosure. Therefore, this disclosure should not be construed as limited to the content described in the following embodiments. Without conflict, the embodiments and features in the embodiments of this disclosure can be arbitrarily combined with each other.

[0032] The scale of the accompanying drawings in this disclosure can be used as a reference in actual processes, but is not limited thereto. For example, the aspect ratio of the channel, the thickness and spacing of each film layer, and the width and spacing of each signal line can be adjusted according to actual needs. The number of pixels in the light-emitting substrate and the number of sub-pixels in each pixel are not limited to the quantities shown in the figures. The accompanying drawings described in this disclosure are only schematic diagrams of the structure, and one aspect of this disclosure is not limited to the shapes or values ​​shown in the figures.

[0033] The ordinal numbers “first,” “second,” and “third” used in this specification are used to avoid confusion among the constituent elements, not to limit their quantity.

[0034] In this specification, for convenience, terms such as "middle," "upper," "lower," "front," "rear," "vertical," "horizontal," "top," "bottom," "inner," and "outer" are used to indicate orientation or positional relationships in conjunction with the accompanying drawings. This is solely for the purpose of facilitating the description and simplification, and does not imply that the device or component referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation of this disclosure. The positional relationships of the constituent elements may be appropriately varied depending on the orientation of each constituent element being described. Therefore, the use of terms not limited to those described in the specification may be appropriately replaced as needed.

[0035] In this specification, unless otherwise expressly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they may refer to a fixed connection, a detachable connection, or an integral connection; a mechanical connection or an electrical connection; a direct connection, an indirect connection via an intermediate component, or a connection within two components. Those skilled in the art will understand the specific meaning of these terms in this disclosure based on the specific circumstances.

[0036] In this specification, a transistor is a device that includes at least three terminals: a gate electrode, a drain electrode, and a source electrode. A transistor has a channel region between the drain electrode (drain electrode terminal, drain region, or drain electrode) and the source electrode (source electrode terminal, source region, or source electrode), and current can flow through the drain electrode, the channel region, and the source electrode. Note that in this specification, the channel region refers to the region through which current primarily flows.

[0037] In this specification, the first electrode can be the drain electrode and the second electrode can be the source electrode, or vice versa. In cases where transistors with opposite polarities are used or the current direction changes during circuit operation, the functions of the "source electrode" and "drain electrode" may sometimes be interchanged. Therefore, in this specification, the "source electrode" and "drain electrode" can be interchanged, and the "source terminal" and "drain terminal" can be interchanged.

[0038] In this specification, "electrical connection" includes the situation where components are connected together by elements that have a certain electrical function. There are no particular limitations on what constitutes an "electrical function," as long as it allows for the transmission and reception of electrical signals between the connected components. Examples of "electrical functions" include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, and other elements with various functions.

[0039] In this specification, "parallel" refers to the state where the angle formed by two straight lines is greater than or equal to -10° and less than 10°, and therefore also includes the state where the angle is greater than or equal to -5° and less than 5°. Similarly, "perpendicular" refers to the state where the angle formed by two straight lines is greater than or equal to 80° and less than 100°, and therefore also includes the state where the angle is greater than or equal to 85° and less than 95°.

[0040] In this specification, the terms "film" and "layer" may be interchanged. For example, "conductive layer" may sometimes be replaced with "conductive film." Similarly, "insulating film" may sometimes be replaced with "insulating layer."

[0041] In this specification, triangles, rectangles, trapezoids, pentagons, or hexagons are not strictly defined; they can be approximate triangles, rectangles, trapezoids, pentagons, or hexagons. Small deformations due to tolerances are possible, as are chamfers, curved edges, and other variations.

[0042] In this disclosure, “about” means a value that is not strictly limited and allows for process and measurement errors.

[0043] Figure 1 This is a schematic diagram of a planar structure of a light-emitting substrate. Figure 1 As shown, the light-emitting substrate may include a plurality of sub-pixels 110 arranged in a regular pattern. At least one sub-pixel 110 may include a light-emitting region 110A and a light-transmitting region 110B. The light-emitting region 110A may include at least a light-emitting device, which is connected to a first power line and a second power line respectively. The light-emitting region 110A is configured to emit light. The light-transmitting region 110B may be located on one side or on both sides of the light-emitting region 110A. The light-transmitting region 110B is configured to transmit light.

[0044] An exemplary embodiment of this disclosure provides a light-emitting substrate including a plurality of sub-pixels. At least one sub-pixel includes a light-emitting region and a light-transmitting region located on at least one side of the light-emitting region. The light-emitting region is configured to emit light, and the light-transmitting region is configured to transmit light. The light-emitting region includes at least a first power line extending along a first direction, a second power line extending along a second direction, and a light-emitting device. The first direction and the second direction intersect. The light-emitting device includes at least a first electrode, a pixel definition layer, a light-emitting layer, and a second electrode. The first electrode is connected to the first power line, and the second electrode is connected to the second power line. The pixel definition layer has a pixel opening exposing the first electrode, and the light-emitting layer is connected to the first electrode through the pixel opening. In at least one sub-pixel, the orthographic projection of the pixel opening on the plane of the light-emitting substrate does not overlap with the orthographic projections of the first power line and the second power line on the plane of the light-emitting substrate.

[0045] The present disclosure of the light-emitting substrate will be illustrated by some exemplary embodiments below.

[0046] Figure 2 This is a schematic diagram of a light-emitting substrate according to an exemplary embodiment of the present disclosure, illustrating the structure of a sub-pixel. The light-emitting device can be a white light-emitting device that emits white light. The light-emitting substrate may include a plurality of sub-pixels arranged sequentially along a first direction X and a second direction Y, wherein the first direction X and the second direction Y may intersect. Figure 2 As shown, at least one sub-pixel may include a light-emitting region 110A and light-transmitting regions 110B located on both sides of the light-emitting region 110A in a first direction X. The light-emitting region 110A is configured to emit light, and the light-transmitting region 110B is configured to transmit light. The light-emitting region 110A of at least one sub-pixel may include a driving circuit disposed on a substrate and a light-emitting device disposed on the side of the driving circuit away from the substrate. The light-emitting device is connected to the driving circuit and is configured to emit light of a corresponding brightness in response to the voltage output by the driving circuit.

[0047] In an exemplary embodiment, a plurality of sub-pixels arranged sequentially along the first direction X can be called a pixel row, and a plurality of sub-pixels arranged sequentially along the second direction Y can be called a pixel column. The plurality of pixel rows and the plurality of pixel columns form a pixel array arranged in an array, and the first direction X and the second direction Y can be perpendicular to each other.

[0048] In an exemplary embodiment, in at least one sub-pixel, the driving circuit may include at least one first power line 10 and one second power line 20. The light-emitting device may be connected to the first power line 10 and the second power line 20 respectively. The first power line 10 is configured to provide a first power signal to the light-emitting device, and the second power line 20 is configured to provide a second power signal to the light-emitting device. The voltage of the first power signal may be greater than the voltage of the second power signal.

[0049] In an exemplary embodiment, the shape of the first power line 10 can be a straight line or a broken line extending along the first direction X of the main body, and can be continuously set in a sub-pixel. The shape of the second power line 20 can be a straight line or a broken line extending along the second direction Y of the main body, and can be interrupted in a sub-pixel. The orthographic projection of the second power line 20 on the substrate does not overlap with the orthographic projection of the first power line 10 on the substrate.

[0050] In an exemplary embodiment, in at least one sub-pixel, a first power line 10 may be disposed in the middle region of the sub-pixel in the second direction Y. The orthographic projection of the first power line 10 on the substrate at least partially overlaps with the orthographic projection of the pixel center line O1 on the substrate. The pixel center line O1 may be a straight line that is parallel to the sub-pixel in the second direction Y and extends in the first direction X.

[0051] In an exemplary embodiment, in at least one sub-pixel, the second power line 20 may be disposed in the middle region of the light-emitting region 110A in the first direction X. The orthographic projection of the second power line 20 on the substrate and the orthographic projection of the light-emitting center line O2 on the substrate at least partially overlap. The light-emitting center line O2 may be a straight line that bisects the light-emitting region 110A in the first direction X and extends in the second direction Y.

[0052] In an exemplary embodiment, in at least one sub-pixel, the second power line 20 may include at least a first power line 21 and a second power line 22. The shape of the first power line 21 and the second power line 22 may be a straight line or a broken line extending along the second direction Y of the main body, and may be located on both sides of the first power line 10 in the second direction Y, that is, the second power line 20 is interrupted in the middle of a sub-pixel.

[0053] In an exemplary embodiment, in a direction perpendicular to the light-emitting substrate, the light-emitting substrate may include at least a plurality of conductive layers disposed on the substrate, and the first power line 10 and the second power line 20 may be disposed in the same conductive layer.

[0054] In an exemplary embodiment, the light-emitting device may include at least a first electrode, a pixel definition layer disposed on the side of the first electrode away from the substrate, a light-emitting layer disposed on the side of the pixel definition layer away from the substrate, and a second electrode disposed on the side of the light-emitting layer away from the substrate. The pixel definition layer has at least one pixel opening exposing the first electrode, through which the light-emitting layer is connected to the first electrode, and the second electrode overlaps with the light-emitting layer. In at least one sub-pixel, the first electrode is connected to a first power line 10, and the second electrode is connected to a second power line 20, thus enabling the light-emitting device to emit light of corresponding brightness in response to the voltage output by the first power line 10 and the second power line 20.

[0055] In an exemplary embodiment, in at least one sub-pixel, the orthographic projection of the pixel opening on the substrate does not overlap with the orthographic projection of the first power line 10 and the second power line 20 (first power line 21 and second power line 22) on the substrate. This can effectively improve the aperture ratio while ensuring transmittance, effectively improve the luminous brightness, and effectively compensate for the brightness loss of the light-emitting substrate as a front light source.

[0056] In an exemplary embodiment, in at least one sub-pixel, the first electrode 30 may include at least a first sub-electrode 31, a second sub-electrode 32, a first sub-connection electrode 33, and a second sub-connection electrode 34. The first sub-electrode 31 and the second sub-electrode 32 may be respectively disposed on opposite sides of the first power line 10 in the second direction Y. The first sub-electrode 31 can be connected to the first power line 10 via the first sub-connection electrode 33, and the second sub-electrode 32 can be connected to the first power line 10 via the second sub-connection electrode 34.

[0057] In an exemplary embodiment, in at least one sub-pixel, in the second direction Y, the first sub-electrode 31 and the first sub-connection electrode 33 may be disposed on the same side of the first power line 10, and the second sub-electrode 32 and the second sub-connection electrode 34 may be disposed on the same side of the first power line 10. The first end of the first sub-connection electrode 33 is connected to the first sub-electrode 31, and the second end of the sub-connection electrode 33 is connected to the first power line 10 through a via. The first end of the second sub-connection electrode 34 is connected to the second sub-electrode 32, and the second end of the sub-connection electrode 33 is connected to the first power line 10 through a via.

[0058] In an exemplary embodiment, in at least one sub-pixel, the first sub-electrode 31 and the first sub-connecting electrode 33 can be an integral structure that is interconnected with each other, and the second sub-electrode 32 and the second sub-connecting electrode 34 can be an integral structure that is interconnected with each other.

[0059] In an exemplary embodiment, in at least one sub-pixel, the first sub-connecting electrode 33 may be disposed on the side opposite to the first direction X of the first sub-electrode 31, and the second sub-connecting electrode 34 may be disposed on the side of the second sub-electrode 32 in the first direction X. That is, the first sub-connecting electrode 33 and the second sub-connecting electrode 34 may be disposed on both sides of the first electrode 30 in the first direction X, respectively.

[0060] In an exemplary embodiment, in at least one sub-pixel, the first power line 21 may be disposed on the side of the first sub-electrode 31 away from the first power line 10, and the second power line 22 may be disposed on the side of the second sub-electrode 32 away from the first power line 10, that is, the first power line 21 and the second power line 22 may be disposed on both sides of the first electrode in the second direction Y.

[0061] In an exemplary embodiment, at least one sub-pixel may have a pixel opening that includes at least a first pixel opening K1 and a second pixel opening K2. The first pixel opening K1 and the second pixel opening K2 may be respectively disposed on both sides of the first power line 10 in the second direction Y. The orthographic projection of the first pixel opening K1 onto the substrate may be located within the range of the orthographic projection of the first sub-electrode 31 onto the substrate, and the first pixel opening K1 exposes a portion of the surface of the first sub-electrode 31. The orthographic projection of the second pixel opening K2 onto the substrate may be located within the range of the orthographic projection of the second sub-electrode 32 onto the substrate, and the second pixel opening K2 exposes a portion of the surface of the second sub-electrode 32.

[0062] In an exemplary embodiment, in at least one sub-pixel, the orthographic projection of the first power line 10 and the second power line 20 (the first power trace 21 and the second power trace 22) on the substrate does not overlap with the orthographic projection of the first pixel opening K1 and the second pixel opening K2 on the substrate.

[0063] In an exemplary embodiment, at least one sub-pixel is further provided with a first light-transmitting opening TG1 and a second light-transmitting opening TG2 on the pixel definition layer. The first light-transmitting opening TG1 and the second light-transmitting opening TG2 can be respectively provided on both sides of the first power line 10 in the second direction Y.

[0064] In an exemplary embodiment, at least one sub-pixel may further include a reflective electrode 70, which overlaps with the second electrode. In a direction perpendicular to the light-emitting substrate, the reflective electrode 70 may be disposed on the side of the second electrode away from the light-emitting layer.

[0065] In an exemplary embodiment, in at least one sub-pixel, the orthogonal projections of the first sub-electrode 31 and the second sub-electrode 32 onto the substrate may be located within the range of the orthogonal projection of the reflective electrode 70 onto the substrate.

[0066] In an exemplary embodiment, in at least one sub-pixel, the orthographic projection of the reflective electrode 70 on the substrate at least partially overlaps with the orthographic projection of the first power line 10 on the substrate, and the orthographic projection of the reflective electrode 70 on the substrate does not overlap with the orthographic projection of the second power line 20 (first power line 21 and second power line 22) on the substrate.

[0067] In an exemplary embodiment, in at least one sub-pixel, the end of the first power supply line 21 near the first sub-electrode 31 is connected to a first connecting block. The second electrode can be connected to the first connecting block via the first cathode connecting electrode 40A, thereby achieving connection between the second electrode and the first power supply line 21. The end of the second power supply line 22 near the second sub-electrode 32 is connected to a second connecting block. The second electrode can be connected to the second connecting block via the second cathode connecting electrode 40B, thereby achieving connection between the second electrode and the second power supply line 22. Since both the first power supply line 21 and the second power supply line 22 are connected to the second electrode, mutual connection between the first power supply line 21 and the second power supply line 22 in a sub-pixel is achieved.

[0068] Figure 3 for Figure 2 Sectional view along the AA direction. Figure 4 for Figure 2 A sectional view along the BB direction. (e.g.) Figure 2 , Figure 3 and Figure 4 As shown, in a direction perpendicular to the light-emitting substrate, the light-emitting substrate may include at least: a first conductive layer disposed on a substrate 90, a first insulating layer 91 disposed on the side of the first conductive layer away from the substrate, a second conductive layer disposed on the side of the first insulating layer 91 away from the substrate, a third conductive layer disposed on the side of the second conductive layer away from the substrate, a fourth conductive layer disposed on the side of the third conductive layer away from the substrate, a pixel definition layer 92 disposed on the side of the fourth conductive layer away from the substrate, an organic light-emitting layer disposed on the side of the pixel definition layer 92 away from the substrate, a fifth conductive layer disposed on the side of the organic light-emitting layer away from the substrate, and a sixth conductive layer disposed on the side of the fifth conductive layer away from the substrate.

[0069] In an exemplary embodiment, the first conductive layer may include at least a first power line 10 and a second power line 20, and the second power line 20 may include a first power trace 21 and a second power trace 22. The second conductive layer may include at least a first electrode 30, a first auxiliary electrode 41, and a second auxiliary electrode 42. The first electrode 30 may include at least a first sub-electrode 31, a second sub-electrode 32, a first sub-connecting electrode 33, and a second sub-connecting electrode 34. The first sub-electrode 31 is connected to the first power line 10 through the first sub-connecting electrode 33, and the second sub-electrode 32 is connected to the first power line 10 through the second sub-connecting electrode 34. The first auxiliary electrode 41 is connected to a first connecting block in the first power trace 21 through a via, and the second auxiliary electrode 42 is connected to a second connecting block in the second power trace 22 through a via. The third conductive layer may include at least a third auxiliary electrode 43 and a fourth auxiliary electrode 44. The third auxiliary electrode 43 is disposed on the side of the first auxiliary electrode 41 away from the substrate and overlaps with the first auxiliary electrode 41. The fourth auxiliary electrode 44 is disposed on the side of the second auxiliary electrode 42 away from the substrate and overlaps with the second auxiliary electrode 42. The fourth conductive layer may include at least a fifth auxiliary electrode 45 and a sixth auxiliary electrode 46. The fifth auxiliary electrode 45 is disposed on the side of the third auxiliary electrode 43 away from the substrate and overlaps with the third auxiliary electrode 43. The sixth auxiliary electrode 46 is disposed on the side of the fourth auxiliary electrode 44 away from the substrate and overlaps with the fourth auxiliary electrode 44. The stacked first auxiliary electrode 41, third auxiliary electrode 43, and fifth auxiliary electrode 45 form the first cathode connection electrode 40A, and the stacked second auxiliary electrode 42, fourth auxiliary electrode 44, and sixth auxiliary electrode 46 form the second cathode connection electrode 40B.

[0070] In an exemplary embodiment, in at least one sub-pixel, the orthographic projection of the third auxiliary electrode 43 onto the substrate may be within the range of the orthographic projection of the fifth auxiliary electrode 45 onto the substrate. The fifth auxiliary electrode 45 has a protrusion relative to the sidewall of the third auxiliary electrode 43, and the third auxiliary electrode 43 and the fifth auxiliary electrode 45 form an undercut structure. The orthographic projection of the fourth auxiliary electrode 44 onto the substrate may be within the range of the orthographic projection of the sixth auxiliary electrode 46 onto the substrate. The sixth auxiliary electrode 46 has a protrusion relative to the sidewall of the fourth auxiliary electrode 44, and the fourth auxiliary electrode 44 and the sixth auxiliary electrode 46 form an undercut structure. In an exemplary embodiment, the undercut structure is configured to truncate the subsequently formed light-emitting layer.

[0071] In an exemplary embodiment, in at least one sub-pixel, on a plane parallel to the light-emitting substrate, the third auxiliary electrode 43 or the fourth auxiliary electrode 44 is polygonal in shape, and at least one side edge of the polygonal shape is provided with a groove.

[0072] In an exemplary embodiment, the pixel definition layer 92 may include at least a first pixel opening K1, a second pixel opening K2, a first light-transmitting opening TG1, and a second light-transmitting opening TG2. In at least one sub-pixel, the orthographic projection of the first pixel opening K1 onto the substrate may be within the range of the orthographic projection of the first sub-electrode 31 onto the substrate, the orthographic projection of the second pixel opening K2 onto the substrate may be within the range of the orthographic projection of the second sub-electrode 32 onto the substrate, the orthographic projection of the first cathode connection electrode 40A onto the substrate may be within the range of the orthographic projection of the first light-transmitting opening TG1 onto the substrate, and the orthographic projection of the second cathode connection electrode 40B onto the substrate may be within the range of the orthographic projection of the second light-transmitting opening TG2 onto the substrate.

[0073] In an exemplary embodiment, in at least one sub-pixel, the organic light-emitting layer may include at least a light-emitting layer 50 and a light-emitting block 51. The light-emitting layer 50 may be disposed in a region other than the first cathode connection electrode 40A and the second cathode connection electrode 40B. The light-emitting layer 50 may be connected to the first sub-electrode 31 through a first pixel opening K1 and to the second sub-electrode 32 through a second pixel opening K2, thus achieving connection between the light-emitting layer and the first electrode. The light-emitting block 51 may be disposed on the surface of the first cathode connection electrode 40A and the second cathode connection electrode 40B on the side away from the substrate, and the light-emitting layer 50 and the light-emitting block 51 are isolated from each other.

[0074] In an exemplary embodiment, the fifth conductive layer may include a second electrode 60 of an integral structure. The second electrode 60 is connected to the light-emitting layer 50 on one hand and to the first cathode connection electrode 40A and the second cathode connection electrode 40B on the other hand, thereby realizing the connection between the second electrode and the first power line 21 and the second power line 22.

[0075] In an exemplary embodiment, the sixth conductive layer may include at least a reflective electrode 70, which is directly connected to the second electrode 60. The orthogonal projection of the reflective electrode 70 onto the substrate may include the orthogonal projections of the first sub-electrode 31 and the second sub-electrode 32 onto the substrate, and the orthogonal projection of the reflective electrode 70 onto the substrate may include the orthogonal projections of the first pixel opening K1 and the second pixel opening K2 onto the substrate.

[0076] In an exemplary embodiment, the first electrode may be the anode of the light-emitting device, and the second electrode may be the cathode of the light-emitting device.

[0077] The following is an illustrative description of the fabrication process of a light-emitting substrate. The "patterning process" described in this disclosure includes, for metallic, inorganic, or transparent conductive materials, processes such as depositing a film, coating with photoresist, mask exposure, development, etching, and photoresist stripping; for organic materials, it includes processes such as coating with organic materials, mask exposure, and development. Deposition can be performed using any one or more of sputtering, evaporation, and chemical vapor deposition; coating can be performed using any one or more of spraying, spin coating, and inkjet printing; etching can be performed using any one or more of dry etching and wet etching. This disclosure does not limit the methods used. A "thin film" refers to a thin film made of a certain material on a substrate using deposition, coating, or other processes. If the "thin film" does not require a patterning process during the entire fabrication process, it can also be called a "layer." If the "thin film" requires a patterning process during the entire fabrication process, it is called a "thin film" before the patterning process and a "layer" after the patterning process. The "layer" after the patterning process contains at least one "pattern." The phrase "A and B are arranged in the same layer" in this disclosure means that A and B are formed simultaneously through the same patterning process, and the "thickness" of the film layer is the dimension of the film layer in the direction perpendicular to the light-emitting substrate. In the exemplary embodiments of this disclosure, "the orthographic projection of B is within the range of the orthographic projection of A" or "the orthographic projection of A includes the orthographic projection of B" means that the boundary of the orthographic projection of B falls within the boundary range of the orthographic projection of A, or the boundary of the orthographic projection of A overlaps with the boundary of the orthographic projection of B.

[0078] In an exemplary embodiment, taking a sub-pixel as an example, the fabrication process of the light-emitting substrate in an exemplary embodiment of this disclosure may include the following operations.

[0079] (11) Forming a first conductive layer pattern. In an exemplary embodiment, forming the first conductive layer pattern includes: depositing a first conductive thin film on a substrate, patterning the first conductive thin film using a patterning process, and forming the first conductive layer pattern on the substrate, such as... Figure 5 As shown. In an exemplary embodiment, the first conductive layer may be referred to as the source / drain metal layer (SD).

[0080] In an exemplary embodiment, the first conductive layer of each sub-pixel in the light-emitting substrate may include at least a first power line 10 and a second power line 20.

[0081] In an exemplary embodiment, the shape of the first power line 10 can be a straight line or a broken line extending along the first direction X of the main body portion, and it can be continuously arranged in multiple sub-pixels of a pixel row. In at least one sub-pixel, the first power line 10 can extend from the light-transmitting area 110B on one side of the sub-pixel through the light-emitting area 110A of the sub-pixel to the light-transmitting area 110B on the other side of the sub-pixel.

[0082] In an exemplary embodiment, in the second direction Y, the first power line 10 may be disposed in the middle region of the sub-pixel, and the orthographic projection of the first power line 10 on the substrate at least partially overlaps with the orthographic projection of the pixel center line O1 on the substrate.

[0083] In an exemplary embodiment, at least one sub-pixel may have a first connecting electrode 11 and a second connecting electrode 12 disposed on the first power line 10. The first connecting electrode 11 and the second connecting electrode 12 may be block-shaped (such as rectangular) and are respectively connected to the first power line 10. The first connecting electrode 11 is configured to be connected to a subsequently formed first sub-connecting electrode, and the second connecting electrode 12 is configured to be connected to a subsequently formed second sub-connecting electrode.

[0084] In an exemplary embodiment, in at least one sub-pixel, the first power line 10, the first connecting electrode 11, and the second connecting electrode 12 can be an integral structure that is interconnected.

[0085] In an exemplary embodiment, in the first direction X, the first connecting electrode 11 can be located in the light-transmitting region 110B on the opposite side of the light-emitting region 110A in the first direction X, and the second connecting electrode 12 can be located in the light-transmitting region 110B on the side of the light-emitting region 110A in the first direction X. That is, the first connecting electrode 11 and the second connecting electrode 12 can be located in the light-transmitting regions 110B on both sides of the light-emitting region 110A. In the second direction Y, the first connecting electrode 11 can be disposed on the opposite side of the first power line 10 in the second direction Y, and the second connecting electrode 12 can be disposed on the side of the first power line 10 in the second direction Y. That is, the first connecting electrode 11 and the second connecting electrode 12 can be disposed on both sides of the first power line 10 in the second direction Y.

[0086] In an exemplary embodiment, the second power line 20 may be located in the light-emitting region 110A, and the orthographic projection of the second power line 20 on the substrate does not overlap with the orthographic projection of the first power line 10 on the substrate. In at least one sub-pixel, the second power line 20 may include at least a first power trace 21 and a second power trace 22. The shapes of the first power trace 21 and the second power trace 22 may be straight lines or broken lines extending along the second direction Y, and may be located on opposite sides of the first power line 10 in the second direction Y. Specifically, the first power trace 21 may be located on the opposite side of the first power line 10 in the second direction Y, and the second power trace 22 may be located on one side of the first power line 10 in the second direction Y, that is, the second power trace 22 may be located on one side of the first power trace 21 in the second direction Y.

[0087] In an exemplary embodiment, in the first direction X, the first power line 21 and the second power line 22 may be disposed in the central region of the light-emitting region 110A. The orthographic projections of the first power line 21 and the second power line 22 on the substrate at least partially overlap with the orthographic projection of the light-emitting center line O2 on the substrate.

[0088] In an exemplary embodiment, at least one sub-pixel may have a first connection block 21-1 disposed on the first power line 21. The first connection block 21-1 may be block-shaped (e.g., rectangular), disposed at the end of the first power line 21 near the first power line 10, and connected to the first power line 21. The first connection block 21-1 is configured to be connected to a subsequently formed first auxiliary electrode.

[0089] In an exemplary embodiment, in at least one sub-pixel, the first power supply line 21 and the first connection block 21-1 can be an integral structure that is interconnected.

[0090] In an exemplary embodiment, a second connection block 22-1 may be provided on the second power line 22 in at least one sub-pixel. The shape of the second connection block 22-1 may be block-shaped (such as rectangular), and it may be provided at the end of the second power line 22 near the first power line 10 and connected to the second power line 22. The second connection block 22-1 is configured to be connected to the second auxiliary electrode that is subsequently formed.

[0091] In an exemplary embodiment, in at least one sub-pixel, the second power supply line 22 and the second connection block 22-1 can be an integral structure that is interconnected.

[0092] In an exemplary embodiment, the first conductive layer may be made of a metallic material, such as any one or more of silver (Ag), copper (Cu), aluminum (Al) and molybdenum (Mo), or an alloy of the above metals, such as aluminum-neodymium alloy (AlNd) or molybdenum-niobium alloy (MoNb). It may be a single-layer structure or a multi-layer composite structure, such as Mo / Cu / Mo.

[0093] (12) Forming a first insulating layer pattern. In an exemplary embodiment, forming the first insulating layer pattern may include: depositing a first insulating film on a substrate on which the aforementioned pattern is formed, patterning the first insulating film using a patterning process to form a first insulating layer pattern covering the first conductive layer, wherein the first insulating layer has a plurality of vias, such as... Figure 6 As shown.

[0094] In an exemplary embodiment, the plurality of vias in each sub-pixel of the light-emitting substrate may include at least the first via V1 to the fourth via V4.

[0095] In an exemplary embodiment, the orthographic projection of the first via V1 on the substrate is within the range of the orthographic projection of the first connecting electrode 11 on the substrate. The first insulating layer inside the first via V1 is etched away, exposing the surface of the first connecting electrode 11. The first via V1 is configured to allow the subsequently formed first sub-connecting electrode to be connected to the first connecting electrode 11 through the via.

[0096] In an exemplary embodiment, the orthographic projection of the second via V2 on the substrate is within the range of the orthographic projection of the second connecting electrode 12 on the substrate. The first insulating layer inside the second via V2 is etched away, exposing the surface of the second connecting electrode 12. The second via V2 is configured to allow a subsequently formed second sub-connecting electrode to be connected to the second connecting electrode 12 through the via.

[0097] In an exemplary embodiment, the orthographic projection of the third via V3 on the substrate is within the range of the orthographic projection of the first connecting block 21-1 on the substrate. The first insulating layer inside the third via V3 is etched away, exposing the surface of the first connecting block 21-1. The third via V3 is configured to allow the subsequently formed first auxiliary electrode to be connected to the first connecting block 21-1 through the via.

[0098] In an exemplary embodiment, the orthographic projection of the fourth via V4 on the substrate is within the range of the orthographic projection of the second connecting block 22-1 on the substrate. The first insulating layer inside the fourth via V4 is etched away, exposing the surface of the second connecting block 22-1. The fourth via V4 is configured to allow the subsequently formed second auxiliary electrode to be connected to the second connecting block 22-1 through the via.

[0099] In an exemplary embodiment, the first insulating layer may be any one or more of silicon oxide (SiOx), silicon nitride (SiNx), and silicon oxynitride (SiON), and may be a single layer, multiple layers, or a composite layer. In an exemplary embodiment, the first insulating layer may be referred to as a passivation layer (PVX).

[0100] (13) Forming a second conductive layer pattern. In an exemplary embodiment, forming a second conductive layer pattern may include: depositing a second conductive film on a substrate on which the aforementioned pattern is formed, and patterning the second conductive film using a patterning process to form a second conductive layer pattern disposed on the first insulating layer, such as... Figure 7A and Figure 7B As shown, Figure 7B for Figure 7A A schematic diagram of the second conductive layer.

[0101] In an exemplary embodiment, the second conductive layer of each sub-pixel in the light-emitting substrate may include at least a first electrode 30, a first auxiliary electrode 41, and a second auxiliary electrode 42.

[0102] In an exemplary embodiment, the first electrode 30 may include at least a first sub-electrode 31 and a second sub-electrode 32. The first sub-electrode 31 may be connected to the first power line 10 via a first sub-connection electrode 33, and the second sub-electrode 32 may be connected to the first power line 10 via a second sub-connection electrode 34.

[0103] In an exemplary embodiment, the first sub-electrode 31 and the second sub-electrode 32 can be rectangular in shape and can be disposed in the light-emitting region 110A. The first sub-electrode 31 can be located on the side opposite to the second direction Y of the first power line 10, and the second sub-electrode 32 can be located on one side of the second direction Y of the first power line 10. That is, the first sub-electrode 31 and the second sub-electrode 32 can be located on opposite sides of the second direction Y of the first power line 10, and the second sub-electrode 32 can be located on one side of the second direction Y of the first sub-electrode 31.

[0104] In an exemplary embodiment, the first sub-electrode 31 and the second sub-electrode 32 may have substantially the same geometric dimensions, and the distance between the first sub-electrode 31 and the first power line 10 and the distance between the second sub-electrode 32 and the first power line 10 may be substantially the same. The distance may be a dimension in the second direction Y.

[0105] In an exemplary embodiment, the orthographic projection of the geometric center of the first sub-electrode 31 onto the substrate at least partially overlaps with the orthographic projection of the light-emitting center line O2 onto the substrate, and the orthographic projection of the geometric center of the second sub-electrode 32 onto the substrate at least partially overlaps with the orthographic projection of the light-emitting center line O2 onto the substrate.

[0106] In an exemplary embodiment, the first sub-connecting electrode 33 can be L-shaped and can be located on the side opposite to the second direction Y of the first power line 10. The first end of the first sub-connecting electrode 33 is directly connected to the first sub-electrode 31, and the second end of the first sub-connecting electrode 33 is connected to the first connecting electrode 11 through the first via V1. Since the first connecting electrode 11 is connected to the first power line 10, the first sub-electrode 31 is connected to the first power line 10.

[0107] In an exemplary embodiment, in at least one sub-pixel, the first sub-electrode 31 and the first sub-connection electrode 33 can be an integral structure that is interconnected.

[0108] In an exemplary embodiment, the second sub-connecting electrode 34 can be L-shaped and can be disposed on one side of the first power line 10 in the second direction Y. The first end of the second sub-connecting electrode 34 is directly connected to the second sub-electrode 32, and the second end of the second sub-connecting electrode 34 is connected to the second connecting electrode 12 through the second via V2. Since the second connecting electrode 12 is connected to the first power line 10, the second sub-electrode 32 is connected to the first power line 10.

[0109] In an exemplary embodiment, in at least one sub-pixel, the second sub-electrode 32 and the second sub-connection electrode 34 can be an integral structure that is interconnected.

[0110] In an exemplary embodiment, in the first direction X, the first sub-connecting electrode 33 can be disposed on the side opposite to the first sub-electrode 31 in the first direction X, and the second sub-connecting electrode 34 can be disposed on the side of the second sub-electrode 32 in the first direction X, that is, the first sub-connecting electrode 33 and the second sub-connecting electrode 34 can be disposed on both sides of the first electrode 30 in the first direction X respectively.

[0111] In an exemplary embodiment, when a dark spot defect occurs on the light-emitting substrate, either the first sub-connecting electrode 33 or the second sub-connecting electrode 34 can be cut off by laser cutting. This allows one of the first sub-electrode 31 and the second sub-electrode 32 to be connected to the first power line 10, while the other remains floating. This isolates the dark spot, repairs the defect, prevents dark-state current from affecting other surrounding light-emitting devices, and reduces the risk of degradation. For example, when the first sub-electrode 31 has a dark spot defect, the first sub-connecting electrode 33 can be cut off by laser cutting. Similarly, when the second sub-electrode 32 has a dark spot defect, the second sub-connecting electrode 34 can be cut off by laser cutting.

[0112] In an exemplary embodiment, the portion of the sub-connecting electrode (first sub-connecting electrode and second sub-connecting electrode) that is connected to the connecting electrode through a via can be disposed in the light-transmitting region 110B. The light-transmitting region can be changed into an irregular shape. When light passes through the irregularly shaped light-transmitting region, the diffraction fringes are generated at different positions and in different directions. Therefore, the light does not diffuse in one direction but diffuses in multiple directions, which greatly weakens the diffraction effect, avoids the blurring of objects behind the screen, and improves the transparency effect.

[0113] In an exemplary embodiment, the first electrode 30 may be the anode of a light-emitting device.

[0114] In an exemplary embodiment, the first auxiliary electrode 41 may be block-shaped (e.g., rectangular) and may be located on the side opposite to the second direction Y of the first power line 10. The orthographic projection of the first auxiliary electrode 41 on the substrate at least partially overlaps with the orthographic projection of the first connecting block 21-1 on the substrate. The first auxiliary electrode 41 may be connected to the first connecting block 21-1 through the third via V3. The first auxiliary electrode 41 is configured to be connected to the third auxiliary electrode formed subsequently.

[0115] In an exemplary embodiment, the second auxiliary electrode 42 may be block-shaped (such as rectangular) and may be located on one side of the first power line 10 in the second direction Y. The orthographic projection of the second auxiliary electrode 42 on the substrate at least partially overlaps with the orthographic projection of the second connecting block 22-1 on the substrate. The second auxiliary electrode 42 may be connected to the second connecting block 22-1 through the fourth via V4. The second auxiliary electrode 42 is configured to be connected to the subsequently formed fourth auxiliary electrode.

[0116] In an exemplary embodiment, the distance between the first auxiliary electrode 41 and the first sub-electrode 31 can be substantially the same as the distance between the second auxiliary electrode 42 and the second sub-electrode 32, and the distance can be a dimension in the second direction Y.

[0117] In an exemplary embodiment, the material of the second conductive layer can be a transparent conductive material, such as indium tin oxide (ITO) or indium zinc oxide (IZO).

[0118] (14) Forming the third and fourth conductive layer patterns. In an exemplary embodiment, forming the third and fourth conductive layer patterns may include: sequentially depositing a third conductive film and a fourth conductive film on a substrate on which the aforementioned patterns are formed, and patterning the third and fourth conductive films using a patterning process to form the third and fourth conductive layer patterns, such as... Figure 8A and Figure 8B As shown, Figure 8B for Figure 8A A schematic diagram of the third and fourth conductive layers.

[0119] In an exemplary embodiment, the third conductive layer of each sub-pixel in the light-emitting substrate may include at least a third auxiliary electrode 43 and a fourth auxiliary electrode 44, and the fourth conductive layer may include at least a fifth auxiliary electrode 45 and a sixth auxiliary electrode 46.

[0120] In an exemplary embodiment, the third auxiliary electrode 43 and the fifth auxiliary electrode 45 may be located on the side opposite to the second direction Y of the first power line 10. The third auxiliary electrode 43 may be disposed on the side of the first auxiliary electrode 41 away from the substrate, and the orthographic projection of the third auxiliary electrode 43 on the substrate at least partially overlaps with the orthographic projection of the first auxiliary electrode 41 on the substrate, and the third auxiliary electrode 43 is directly connected to the first auxiliary electrode 41. The fifth auxiliary electrode 45 may be disposed on the side of the third auxiliary electrode 43 away from the substrate, and the orthographic projection of the fifth auxiliary electrode 45 on the substrate at least partially overlaps with the orthographic projection of the third auxiliary electrode 43 on the substrate, and the fifth auxiliary electrode 45 is directly connected to the third auxiliary electrode 43. The third auxiliary electrode 43 and the fifth auxiliary electrode 45 are configured to be connected to the subsequently formed second electrode.

[0121] In an exemplary embodiment, the stacked first auxiliary electrode 41, third auxiliary electrode 43 and fifth auxiliary electrode 45 can constitute a first cathode connection electrode.

[0122] In an exemplary embodiment, the fourth auxiliary electrode 44 and the sixth auxiliary electrode 46 may be located on one side of the first power line 10 in the second direction Y. The fourth auxiliary electrode 44 may be disposed on the side of the second auxiliary electrode 42 away from the substrate, and the orthographic projection of the fourth auxiliary electrode 44 on the substrate at least partially overlaps with the orthographic projection of the second auxiliary electrode 42 on the substrate, and the fourth auxiliary electrode 44 is directly connected to the second auxiliary electrode 42. The sixth auxiliary electrode 46 may be disposed on the side of the fourth auxiliary electrode 44 away from the substrate, and the orthographic projection of the sixth auxiliary electrode 46 on the substrate at least partially overlaps with the orthographic projection of the fourth auxiliary electrode 44 on the substrate, and the sixth auxiliary electrode 46 is directly connected to the fourth auxiliary electrode 44. The fourth auxiliary electrode 44 and the sixth auxiliary electrode 46 are configured to be connected to the subsequently formed second electrode.

[0123] In an exemplary embodiment, the stacked second auxiliary electrode 42, fourth auxiliary electrode 44 and sixth auxiliary electrode 46 can constitute a second cathode connection electrode.

[0124] Figure 8C for Figure 8B A sectional view along the CC direction. (e.g.) Figure 8A , Figure 8B and Figure 8C As shown, the first cathode connecting electrode and the second cathode connecting electrode can adopt an isolation pillar (RIB) structure. In the direction perpendicular to the substrate, the cross-sectional shape of the first cathode connecting electrode and the second cathode connecting electrode can be "I" shaped.

[0125] In an exemplary embodiment, the patterning process for forming the third conductive layer and the fourth conductive layer can employ a two-stage etching process. After forming the stacked third auxiliary electrode 43, fifth auxiliary electrode 45, fourth auxiliary electrode 44, and sixth auxiliary electrode 46 through the first etching process, the third auxiliary electrode 43 and fourth auxiliary electrode 44 in the third conductive layer are over-etched through the second etching process. This causes the first auxiliary electrode 41 and fifth auxiliary electrode 45 to protrude a certain distance relative to the sidewall of the third auxiliary electrode 43, and the second auxiliary electrode 42 and sixth auxiliary electrode 46 to protrude a certain distance relative to the sidewall of the fourth electrode 44, forming an "I"-shaped structure for the first cathode connection electrode and the second cathode connection electrode.

[0126] In an exemplary embodiment, the fifth auxiliary electrode 45 has a protrusion relative to the sidewall of the third auxiliary electrode 43, the sidewall of the third auxiliary electrode 43 is recessed inward relative to the protrusion of the fifth auxiliary electrode 45, and the protrusion of the fifth auxiliary electrode 45 forms an undercut structure similar to an eaves relative to the sidewall of the third auxiliary electrode 43. The light-emitting layer formed subsequently can be broken at the edge of the protrusion to connect the second electrode formed subsequently with the first cathode connection electrode.

[0127] In an exemplary embodiment, in the first direction X or the second direction Y, the first auxiliary electrode 41 may have a first width L1, the third auxiliary electrode 43 may have a third width L3, and the fifth auxiliary electrode 45 may have a fifth width L5. The first width L1, the third width L3, and the fifth width L5 may be the average size, the maximum size, or the minimum size, and this disclosure does not limit them.

[0128] In an exemplary embodiment, the third width L3 of the third auxiliary electrode 43 may be smaller than the first width L1 of the first auxiliary electrode 41, and the orthographic projection of the third auxiliary electrode 43 on the substrate may be within the range of the orthographic projection of the first auxiliary electrode 41 on the substrate.

[0129] In an exemplary embodiment, the third width L3 of the third auxiliary electrode 43 may be smaller than the fifth width L5 of the fifth auxiliary electrode 45, and the orthographic projection of the third auxiliary electrode 43 on the substrate may be within the range of the orthographic projection of the fifth auxiliary electrode 45 on the substrate.

[0130] In an exemplary embodiment, the fifth width L5 of the fifth auxiliary electrode 45 may be smaller than the first width L1 of the first auxiliary electrode 41, and the orthographic projection of the fifth auxiliary electrode 45 on the substrate may be within the range of the orthographic projection of the first auxiliary electrode 41 on the substrate.

[0131] In an exemplary embodiment, the cross-sectional shape of the third auxiliary electrode 43 in the direction perpendicular to the substrate can be trapezoidal, and the width of the surface of the third auxiliary electrode 43 away from the substrate can be smaller than the width of the surface of the third auxiliary electrode 43 close to the substrate. In an exemplary embodiment, the trapezoidal sidewalls can be straight or curved.

[0132] Figure 8D for Figure 8C A sectional view along the DD direction. (e.g.) Figure 8A , Figure 8B , Figure 8C and Figure 8D As shown, on a plane parallel to the substrate, the third auxiliary electrode 43 can be an "H" shape with grooves on both sides.

[0133] In an exemplary embodiment, the third auxiliary electrode 43 has grooves 43-1 recessed inward along the second direction Y in both edges extending along the first direction X, thus the third auxiliary electrode 43 is in the shape of an "H".

[0134] In an exemplary embodiment, the perimeter of the square-shaped third auxiliary electrode 43 is 4a, where a is the side length of the third auxiliary electrode 43. For the "H"-shaped third auxiliary electrode 43, the perimeter is 4a + 4b, where b is the depth of the groove 43-1. Thus, the perimeter of the "H"-shaped third auxiliary electrode 43 is (1 + b / a) times the perimeter of the square-shaped third auxiliary electrode 43. For example, if b = a / 3, then the perimeter of the "H"-shaped third auxiliary electrode 43 is 4 / 3 times the perimeter of the square-shaped third auxiliary electrode 43, an increase of approximately 30%. By setting the planar shape of the third auxiliary electrode to an "H" shape, the exemplary embodiment of this disclosure can effectively increase the perimeter of the auxiliary electrode, effectively increase the contact area between the third auxiliary electrode and the subsequently formed second electrode, reduce the resistance at the contact interface, and reduce the voltage drop.

[0135] In an exemplary embodiment, the shape of the groove can be a triangle, rectangle, trapezoid, or polygon. The edges of the triangle, rectangle, trapezoid, or polygon can be straight lines or curves. The corners of the third auxiliary electrode and the corners of the groove can be set as arc chamfers. This disclosure does not limit the scope of the invention.

[0136] Although Figure 8D The design is illustrated using an "H" shape, but in some possible embodiments, the third auxiliary electrode can be polygonal, with at least one side edge having a groove. Each side edge may have one or more grooves, which is not limited herein. For example, the third auxiliary electrode can be an "X" shape with grooves on all four sides, which further increases the perimeter of the third auxiliary electrode and the contact area between the third auxiliary electrode and the subsequently formed second electrode.

[0137] In an exemplary embodiment, the orthographic projection of the fourth auxiliary electrode 44 on the substrate can be located within the range of the orthographic projection of the sixth auxiliary electrode 46 on the substrate. The sixth auxiliary electrode 46 has a protrusion relative to the sidewall of the fourth auxiliary electrode 44, and the sidewall of the fourth auxiliary electrode 44 is recessed inward relative to the protrusion of the sixth auxiliary electrode 46. The protrusion of the sixth auxiliary electrode 46 forms an undercut structure similar to an "eave" relative to the sidewall of the fourth auxiliary electrode 44. The light-emitting layer formed subsequently can be broken at the edge of the protrusion, so as to realize the connection between the second electrode formed subsequently and the second cathode connection electrode.

[0138] In an exemplary embodiment, the structure and parameters of the second cathode connection electrode can be substantially the same as those of the first cathode connection electrode, and will not be described in detail here.

[0139] In an exemplary embodiment, the material of the third conductive layer can be a metallic material, such as aluminum or copper, and the material of the fourth conductive layer can be a transparent conductive material, such as indium tin oxide (ITO) or indium zinc oxide (IZO).

[0140] (15) Forming a pixel definition layer pattern. In an exemplary embodiment, forming a pixel definition layer pattern may include: coating a pixel definition film on a substrate on which the aforementioned pattern is formed, and patterning the pixel definition film using a patterning process to form a pixel definition layer pattern covering the aforementioned conductive layer, wherein the pixel definition layer has multiple openings, such as... Figure 9 As shown.

[0141] In an exemplary embodiment, the plurality of openings in each sub-pixel of the light-emitting substrate may include at least a pixel opening and a light-transmitting opening. Specifically, the pixel opening may include at least a first pixel opening K1 and a second pixel opening K2, and the light-transmitting opening may include at least a first light-transmitting opening TG1 and a second light-transmitting opening TG2.

[0142] In an exemplary embodiment, a first pixel opening K1 and a second pixel opening K2 can be disposed in the light-emitting region 110A. The pixel definition film within the first pixel opening K1 is removed, exposing the surface of the first sub-electrode 31. The pixel definition film within the second pixel opening K2 is removed, exposing the surface of the second sub-electrode 32.

[0143] In an exemplary embodiment, the first pixel opening K1 and the second pixel opening K2 can be respectively disposed on both sides of the first power line 10 in the second direction Y. The second pixel opening K2 can be disposed on one side of the first pixel opening K1 in the second direction Y. The orthographic projection of the first pixel opening K1 onto the substrate can be within the range of the orthographic projection of the first sub-electrode 31 onto the substrate, and the orthographic projection of the second pixel opening K2 onto the substrate can be within the range of the orthographic projection of the second sub-electrode 32 onto the substrate.

[0144] In an exemplary embodiment, in at least one sub-pixel, the orthographic projections of the first pixel opening K1 and the second pixel opening K2 on the substrate do not overlap with the orthographic projections of the first power line 10 and the second power line 20 on the substrate. That is, the orthographic projections of the pixel openings on the substrate do not overlap with the orthographic projections of the first power line 10 and the second power line 20 on the substrate. This can effectively improve the aperture ratio while ensuring transmittance, effectively improve the luminous brightness, and effectively compensate for the brightness loss of the light-emitting substrate as a front light source.

[0145] In an exemplary embodiment, most of the first light-transmitting opening TG1 and the second light-transmitting opening TG2 can be located in the light-transmitting area, and the pixel definition film inside the light-transmitting opening is removed.

[0146] In an exemplary embodiment, the first light-transmitting opening TG1 and the second light-transmitting opening TG2 can be disposed on both sides of the first power line 10 in the second direction Y. Specifically, the first light-transmitting opening TG1 can be disposed on the side opposite to the second direction Y of the first power line 10, and the second light-transmitting opening TG2 can be disposed on the side of the first power line 10 in the second direction Y.

[0147] In an exemplary embodiment, in at least one sub-pixel, the orthographic projections of the first light-transmitting opening TG1 and the second light-transmitting opening TG2 on the substrate do not overlap with the orthographic projections of the first power line 10 and the first electrode 30 on the substrate, and the orthographic projections of the first light-transmitting opening TG1 and the second light-transmitting opening TG2 on the substrate do not overlap with the orthographic projections of the first sub-connecting electrode 33 and the second sub-connecting electrode 34 on the substrate.

[0148] In an exemplary embodiment, in at least one sub-pixel, the orthographic projection of the first light-transmitting opening TG1 on the substrate at least partially overlaps with the orthographic projection of the first cathode auxiliary electrode on the substrate, and the orthographic projection of the second light-transmitting opening TG2 on the substrate at least partially overlaps with the orthographic projection of the second cathode auxiliary electrode on the substrate.

[0149] In an exemplary embodiment, in at least one sub-pixel, the orthographic projection of the first light-transmitting opening TG1 onto the substrate may include the orthographic projection of the first cathode connection electrode onto the substrate, and the orthographic projection of the second light-transmitting opening TG2 onto the substrate may include the orthographic projection of the second cathode connection electrode onto the substrate.

[0150] (16) Sequentially forming patterns of an organic light-emitting layer, a fifth conductive layer, and a sixth conductive layer. In an exemplary embodiment, sequentially forming patterns of an organic light-emitting layer, a fifth conductive layer, and a sixth conductive layer may include: on a substrate on which the aforementioned patterns are formed, first forming an organic light-emitting layer pattern using a vapor deposition process or an inkjet process, then sequentially depositing a fifth conductive film and a sixth conductive film, and patterning the sixth conductive film using a patterning process to form a second electrode with a full-surface structure, and a reflective electrode disposed on the side of the second electrode away from the substrate, such as... Figure 10 As shown.

[0151] In an exemplary embodiment, in at least one sub-pixel, the organic light-emitting layer pattern may include at least a light-emitting layer and a light-emitting block. The light-emitting layer may be disposed in a region other than the first and second cathode connecting electrodes. The light-emitting layer may be connected to the first sub-electrode 31 through a first pixel opening K1 and to the second sub-electrode 32 through a second pixel opening K2, thus achieving connection between the light-emitting layer and the first electrode. The light-emitting block may be disposed on the surface of the first and second cathode connecting electrodes on the side away from the substrate, and the light-emitting block is isolated from the light-emitting layer.

[0152] In an exemplary embodiment, since the cross-sectional shape of the first cathode connecting electrode and the second cathode connecting electrode is an "I" shape, the organic light-emitting material is broken at the edges of the protrusions of the fifth auxiliary electrode and the sixth auxiliary electrode, and a light-emitting block is formed on the upper surface of the fifth auxiliary electrode and the sixth auxiliary electrode. A light-emitting layer is formed in the area outside the fifth auxiliary electrode and the sixth auxiliary electrode, thereby achieving mutual isolation between the light-emitting layer and the light-emitting block.

[0153] In an exemplary embodiment, the second electrode (cathode) can be a single, interconnected structure. In the region other than the first and second cathode connecting electrodes, the second electrode is disposed on the surface of the light-emitting layer away from the substrate and overlaps with the light-emitting layer. In the region where the first and second cathode connecting electrodes are located, the second electrode is disposed on the surface of the light-emitting block away from the substrate and also adheres to the exposed surfaces of the first and second cathode connecting electrodes, forming a structure that encloses the light-emitting block and the first cathode connecting electrode, and another structure that encloses the light-emitting block and the second cathode connecting electrode. In the structure enclosing the light-emitting block and the first cathode connecting electrode, a portion of the second electrode covers the side surface of the third auxiliary electrode, and another portion covers the lower surface of the portion of the fifth auxiliary electrode protruding from the third auxiliary electrode, thus achieving connection between the second electrode and the first cathode connecting electrode. In the structure enclosing the light-emitting block and the second cathode connecting electrode, a portion of the second electrode covers the side surface of the fourth auxiliary electrode, and another portion covers the lower surface of the portion of the sixth auxiliary electrode protruding from the fourth auxiliary electrode, thus achieving connection between the second electrode and the second cathode connecting electrode. Since the first cathode connecting electrode is connected to the first power supply line 21 and the second cathode connecting electrode is connected to the second power supply line 22, the connection between the second electrode and the first power supply line 21 and the second power supply line 22 is realized.

[0154] In an exemplary embodiment, since the contact area between the second electrode and the first cathode connecting electrode and the second cathode connecting electrode is proportional to the perimeter of the third auxiliary electrode and the fourth auxiliary electrode, the longer perimeter of the third and fourth auxiliary electrodes increases the contact area between the second electrode and the first cathode connecting electrode and the second cathode connecting electrode. The exemplary embodiment of this disclosure effectively increases the perimeter of the auxiliary electrode by designing the shape of the auxiliary electrode (in the plane parallel to the light-emitting substrate) as a polygon with grooves on its edges, such as an "H" shape or an "X" shape, thereby effectively increasing the contact area between the second electrode and the auxiliary electrode, effectively reducing the resistance at the contact interface, and thus effectively improving the light-emitting effect.

[0155] In an exemplary embodiment, the second electrode may be the cathode of a light-emitting device.

[0156] In an exemplary embodiment, the reflective electrode 70 may be rectangular in shape and may be disposed in the light-emitting area 110A, and the reflective electrode 70 may be directly connected to the second electrode.

[0157] In an exemplary embodiment, in at least one sub-pixel, the orthogonal projection of the reflective electrode 70 onto the substrate may include the orthogonal projections of the first sub-electrode 31 and the second sub-electrode 32 onto the substrate, and the orthogonal projection of the reflective electrode 70 onto the substrate may include the orthogonal projections of the first pixel opening K1 and the second pixel opening K2 onto the substrate.

[0158] In an exemplary embodiment, in at least one sub-pixel, the orthographic projection of the reflective electrode 70 on the substrate at least partially overlaps with the orthographic projection of the first power line 10 on the substrate, and the orthographic projection of the reflective electrode 70 on the substrate does not overlap with the orthographic projection of the second power line (first power line 21 and second power line 22) on the substrate.

[0159] In an exemplary embodiment, the material of the fifth conductive layer can be a transparent conductive material, such as indium tin oxide (ITO) or indium zinc oxide (IZO), and the material of the sixth conductive layer can be a metallic material, such as aluminum or copper.

[0160] In an exemplary embodiment, subsequent fabrication may include processes such as forming an encapsulation structure layer pattern. Forming the encapsulation structure layer pattern may include: firstly, depositing a first inorganic thin film using an open mask to form a first encapsulation layer; then, using an inkjet printing process to print an organic material onto the first encapsulation layer, curing it to form a second encapsulation layer; subsequently, depositing a second inorganic thin film using an open mask to form a third encapsulation layer. The first, second, and third encapsulation layers constitute the encapsulation structure layer. The first and third encapsulation layers may be any one or more of silicon oxide (SiOx), silicon nitride (SiNx), silicon carbide (SiC), silicon carbonitride (SiCN), and silicon oxynitride (SiON), and may be single-layer, multi-layer, or composite layers. The second encapsulation layer may be made of a resin material, forming an inorganic / organic / inorganic material stacked structure. The organic material layer is disposed between the two inorganic material layers to prevent external moisture from entering the light-emitting structure layer. This completes the fabrication of the light-emitting substrate of this exemplary embodiment.

[0161] In an exemplary embodiment, the substrate can be a flexible substrate or a rigid substrate. The rigid substrate can be, but is not limited to, one or more of glass and quartz, while the flexible substrate can be, but is not limited to, one or more of polyethylene terephthalate, polyethylene terephthalate, polyetheretherketone, polystyrene, polycarbonate, polyarylate, polyarylate, polyimide, polyvinyl chloride, polyethylene, and textile fibers. In an exemplary embodiment, the flexible substrate can include a stacked first flexible material layer, a first inorganic material layer, a semiconductor layer, a second flexible material layer, and a second inorganic material layer. The materials of the first and second flexible material layers can be polyimide (PI), polyethylene terephthalate (PET), or surface-treated polymer films, etc. The materials of the first and second inorganic material layers can be silicon nitride (SiNx) or silicon oxide (SiOx), etc., to improve the substrate's resistance to water and oxygen. The material of the semiconductor layer can be amorphous silicon (a-Si).

[0162] An exemplary embodiment of this disclosure provides a light-emitting substrate with a bottom-emitting structure. By ensuring that the orthographic projection of the pixel opening on the substrate does not overlap with the orthographic projection of the first power line and the second power line on the substrate, the aperture ratio can be effectively increased while ensuring transmittance, thereby effectively increasing the light emission brightness. This not only effectively compensates for the brightness loss of the light-emitting substrate as a front light source and solves the problem of large brightness loss in the light-emitting substrate as a front light source, but also improves product quality and lifespan.

[0163] This embodiment of the disclosure divides the light-emitting device in a sub-pixel into two light-emitting parts by setting the first electrode to include two spaced sub-electrodes, and each sub-electrode is connected to the first power line through a sub-connecting electrode, which is beneficial for repairing dark spot defects.

[0164] In this embodiment, the second power line is split into a first power line and a second power line. The first power line and the second power line are respectively disposed on both sides of the first electrode in the second direction. This not only reduces the amount of metal traces, but also reduces the area of ​​the transparent region occupied by the metal traces, thus avoiding the impact of the metal traces on the transmittance and effectively ensuring high transmittance.

[0165] The embodiments disclosed herein, by placing the first power line and the second power line in a single conductive layer, can not only effectively reduce the number of film layers, but also effectively reduce the number of patterning processes, thereby helping to reduce production costs.

[0166] In this embodiment of the light-emitting device, the second electrode is connected to the second power line via a cathode connection electrode, which effectively reduces the voltage drop of the transparent second electrode and ensures uniform light emission. By setting the cathode connection electrode as an undercut structure, the connection reliability between the second electrode and the cathode connection electrode can be effectively guaranteed.

[0167] This embodiment of the invention effectively increases the perimeter of the auxiliary electrode by designing the auxiliary electrode as a polygon with grooves on its edges, thereby increasing the contact area between the second electrode and the auxiliary electrode and reducing the resistance at the contact interface, which can effectively improve the light emission effect.

[0168] The preparation process of the exemplary embodiments disclosed herein is well compatible with existing preparation processes, is simple to implement, easy to carry out, has high production efficiency, low production cost, and high yield.

[0169] Figure 11 This is a schematic diagram of the structure of another light-emitting substrate as an exemplary embodiment of this disclosure. Figure 11 As shown, the main structure of the light-emitting substrate in this embodiment is similar to... Figures 2 to 4 The embodiments shown can be substantially the same, except that the reflective electrode 70 is disposed between the light-emitting layer 50 and the second electrode 60.

[0170] In the exemplary embodiment, the preparation process of the light-emitting substrate in this embodiment is the same as... Figures 2 to 4 The embodiments shown can be substantially the same, except that in this embodiment, the reflective electrode 70 is first formed by a patterning process, and then the second electrode 60 with a full-surface structure is formed.

[0171] The structure and its preparation process described above in this disclosure are merely illustrative examples. In the exemplary embodiments, the corresponding structure and the patterning process can be changed or added or reduced according to actual needs, and this disclosure does not limit them.

[0172] This disclosure also provides a display device, which includes the aforementioned light-emitting substrate. The display device can be electronic paper, smart wearables, automotive transparent head-up displays (HUDs), and building-integrated smart windows, etc., and the embodiments of the present invention are not limited thereto.

[0173] Figure 12 This is a schematic diagram of the structure of a display device as an exemplary embodiment of the present disclosure. Figure 12 As shown, the display device may include a light-emitting substrate 100 and a display panel 200. The light-emitting substrate 100 may be disposed on the display side of the display panel 200, serving as a transparent front light source for the display panel 200. The display panel 200 may be a natural light type product, including electronic paper (EPD) display devices or reflective liquid crystal (RLCD) display devices. These products display by reflecting ambient light and, while possessing low power consumption, are not compatible with dark environments. The light-emitting substrate 100 may be the aforementioned light-emitting substrate (WOLED). The light-emitting substrate 100 emits light into the display panel 200, allowing the human eye to see the displayed content through the transparent light-emitting substrate 100. Through active driving, not only can EPD and RLCD achieve compatibility with dark environments, but also brightness differentiation in certain areas can be achieved, thereby improving the contrast of EPD and RLCD.

[0174] In an exemplary embodiment, the display panel 200 can also be a side-lit product. Due to the characteristics of side-lit products, these products cannot meet the requirements for both brightness uniformity and flexibility. By placing the light-emitting substrate of this disclosure on the display side of the side-lit product as a transparent front light source, both the requirements for brightness uniformity and flexibility can be met.

[0175] While the embodiments disclosed herein are as described above, it should be noted that these embodiments are merely exemplary and not restrictive. Therefore, this disclosure is not limited to the specific content shown and described herein, and various modifications, substitutions, or omissions can be made to the form and details of the embodiments without departing from the scope of this disclosure.

Claims

1. A light-emitting substrate, characterized in that, The system includes multiple sub-pixels, at least one of which includes a light-emitting region and a light-transmitting region located on at least one side of the light-emitting region. The light-emitting region is configured to emit light, and the light-transmitting region is configured to transmit light. The light-emitting region includes at least a first power line extending along a first direction, a second power line extending along a second direction, and a light-emitting device. The first direction and the second direction intersect. The light-emitting device includes at least a first electrode, a pixel definition layer, a light-emitting layer, and a second electrode. The first electrode is connected to the first power line, and the second electrode is connected to the second power line. The pixel definition layer has a pixel opening that exposes the first electrode, and the light-emitting layer is connected to the first electrode through the pixel opening. In at least one sub-pixel, the orthographic projection of the pixel opening onto the light-emitting substrate plane does not overlap with the orthographic projections of the first power line and the second power line onto the light-emitting substrate plane.

2. The light-emitting substrate according to claim 1, characterized in that, In at least one sub-pixel, the orthographic projection of the first power line onto the light-emitting substrate plane at least partially overlaps with the orthographic projection of the pixel center line onto the light-emitting substrate plane, wherein the pixel center line is a straight line that bisects the sub-pixel in the second direction and extends in the first direction.

3. The light-emitting substrate according to claim 1, characterized in that, In at least one sub-pixel, the first electrode includes at least a first sub-electrode and a second sub-electrode, the first sub-electrode and the second sub-electrode are respectively disposed on both sides of the first power line in the second direction, the first sub-electrode is connected to the first power line through a first sub-connection electrode, and the second sub-electrode is connected to the first power line through a second sub-connection electrode.

4. The light-emitting substrate according to claim 3, characterized in that, In at least one sub-pixel, in the second direction, the first sub-electrode and the first sub-connection electrode are disposed on the same side of the first power line, and the second sub-electrode and the second sub-connection electrode are disposed on the same side of the first power line; the first end of the first sub-connection electrode is directly connected to the first sub-electrode, the second end of the first sub-connection electrode is connected to the first power line through a via, the first end of the second sub-connection electrode is directly connected to the second sub-electrode, and the second end of the second sub-connection electrode is connected to the first power line through a via.

5. The light-emitting substrate according to claim 4, characterized in that, In at least one sub-pixel, the first sub-electrode and the first sub-connecting electrode are an integral structure connected to each other, and the second sub-electrode and the second sub-connecting electrode are an integral structure connected to each other.

6. The light-emitting substrate according to claim 4, characterized in that, In at least one sub-pixel, the first sub-connection electrode and the second sub-connection electrode are respectively disposed on both sides of the first electrode in the first direction.

7. The light-emitting substrate according to claim 3, characterized in that, In at least one sub-pixel, the pixel opening includes at least a first pixel opening and a second pixel opening. The first pixel opening and the second pixel opening are respectively disposed on both sides of the first power line in the second direction. The orthographic projection of the first pixel opening on the light-emitting substrate plane is within the range of the orthographic projection of the first sub-electrode on the light-emitting substrate plane, and the orthographic projection of the second pixel opening on the light-emitting substrate plane is within the range of the orthographic projection of the second sub-electrode on the light-emitting substrate plane.

8. The light-emitting substrate according to claim 3, characterized in that, In at least one sub-pixel, the light-emitting device further includes a reflective electrode, which overlaps with the second electrode; in a direction perpendicular to the light-emitting substrate, the reflective electrode is disposed on the side of the second electrode away from the light-emitting layer, or the reflective electrode is disposed between the light-emitting layer and the second electrode.

9. The light-emitting substrate according to claim 8, characterized in that, In at least one sub-pixel, the orthographic projections of the first sub-electrode and the second sub-electrode onto the light-emitting substrate plane are located within the range of the orthographic projection of the reflective electrode onto the light-emitting substrate plane.

10. The light-emitting substrate according to claim 8, characterized in that, In at least one sub-pixel, the orthographic projection of the reflective electrode on the light-emitting substrate plane at least partially overlaps with the orthographic projection of the first power line on the light-emitting substrate plane, while the orthographic projection of the reflective electrode on the light-emitting substrate plane does not overlap with the orthographic projection of the second power line on the light-emitting substrate plane.

11. The light-emitting substrate according to any one of claims 1 to 10, characterized in that, In at least one sub-pixel, the orthographic projection of the second power line onto the light-emitting substrate plane does not overlap with the orthographic projection of the first power line onto the light-emitting substrate plane.

12. The light-emitting substrate according to claim 11, characterized in that, In at least one sub-pixel, the orthographic projection of the second power line on the light-emitting substrate plane at least partially overlaps with the orthographic projection of the light-emitting center line on the light-emitting substrate plane, wherein the light-emitting center line is a straight line that bisects the light-emitting area in the first direction and extends in the second direction.

13. The light-emitting substrate according to claim 11, characterized in that, In at least one sub-pixel, the second power line includes at least a first power trace and a second power trace extending along the second direction, wherein the first power trace and the second power trace are respectively disposed on both sides of the first electrode in the second direction.

14. The light-emitting substrate according to claim 13, characterized in that, In at least one sub-pixel, the end of the first power supply trace near the first electrode is connected to a first connecting block, and the second electrode is connected to the first connecting block via a first cathode connecting electrode; or, the end of the second power supply trace near the first electrode is connected to a second connecting block, and the second electrode is connected to the second connecting block via a second cathode connecting electrode.

15. The light-emitting substrate according to claim 14, characterized in that, In at least one sub-pixel, the first cathode connecting electrode includes at least a stacked first auxiliary electrode, a third auxiliary electrode, and a fifth auxiliary electrode. The first auxiliary electrode is connected to the first connecting block through a via. The third auxiliary electrode is disposed on the side of the first auxiliary electrode away from the first connecting block and overlaps with the first auxiliary electrode. The fifth auxiliary electrode is disposed on the side of the third auxiliary electrode away from the first connecting block and overlaps with the third auxiliary electrode. Alternatively, the second cathode connecting electrode includes at least a stacked second auxiliary electrode, a fourth auxiliary electrode, and a sixth auxiliary electrode. The second auxiliary electrode is connected to the second connecting block through a via. The fourth auxiliary electrode is disposed on the side of the second auxiliary electrode away from the second connecting block and overlaps with the second auxiliary electrode. The sixth auxiliary electrode is disposed on the side of the fourth auxiliary electrode away from the second connecting block and overlaps with the fourth auxiliary electrode.

16. The light-emitting substrate according to claim 15, characterized in that, In at least one sub-pixel, the orthographic projection of the third auxiliary electrode onto the light-emitting substrate plane is located within the range of the orthographic projection of the fifth auxiliary electrode onto the light-emitting substrate plane, and the fifth auxiliary electrode has a protrusion relative to the sidewall of the third auxiliary electrode, forming an undercut structure; or, the orthographic projection of the fourth auxiliary electrode onto the light-emitting substrate plane is located within the range of the orthographic projection of the sixth auxiliary electrode onto the light-emitting substrate plane, and the sixth auxiliary electrode has a protrusion relative to the sidewall of the fourth auxiliary electrode, forming an undercut structure.

17. The light-emitting substrate according to claim 15, characterized in that, In at least one sub-pixel, on a plane parallel to the light-emitting substrate, the third auxiliary electrode or the fourth auxiliary electrode is polygonal in shape, and at least one edge of the polygonal shape is provided with a groove.

18. The light-emitting substrate according to claim 15, characterized in that, In at least one sub-pixel, the pixel definition layer is further provided with a first light-transmitting opening and a second light-transmitting opening. The first light-transmitting opening and the second light-transmitting opening are respectively provided on both sides of the first power line in the second direction. The orthographic projection of the first light-transmitting opening on the light-emitting substrate plane overlaps at least partially with the orthographic projection of the first cathode connecting electrode on the light-emitting substrate plane. The orthographic projection of the second light-transmitting opening on the light-emitting substrate plane overlaps at least partially with the orthographic projection of the second cathode connecting electrode on the light-emitting substrate plane.

19. The light-emitting substrate according to claim 18, characterized in that, In at least one sub-pixel, the orthographic projections of the first light-transmitting opening and the second light-transmitting opening onto the light-emitting substrate plane do not overlap with the orthographic projections of the first power line and the first electrode onto the light-emitting substrate plane.

20. A display device, characterized in that, Includes the light-emitting substrate as described in any one of claims 1 to 19.

Images