Electronic device

CN122803543APending Publication Date: 2026-09-22SAMSUNG DISPLAY CO LTD
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Patent Information

Application Number
CN202610344043.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2025-03-21
Filing Date
2026-03-20
Publication Date
2026-09-22

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Abstract

An electronic device is disclosed. The electronic device includes a display panel including a first area having a transmissive area and a light emitting area, and a second area; and an electronic module overlapping the first area, wherein the display panel includes a first light emitting element in the light emitting area of the first area, a second light emitting element in the second area, a separation layer in the light emitting area of the first area and in the second area, a transmissive color filter in the first area overlapping the first light emitting element, respectively having an area smaller than the transmissive area, and including first and second transmissive color filters respectively having different thicknesses, a color filter in the second area and respectively overlapping the second light emitting element, and a reinforcement pattern in the first area, above the separation layer, and having a closed ring shape surrounding an edge of the first transmissive color filter in a plan view.
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Description

Technical Field

[0001] This disclosure relates herein to electronic devices including color filters. Background Technology

[0002] Electronic devices can consist of various electronic components such as display panels and electronic modules. Electronic modules may include cameras, infrared detection sensors, or proximity sensors. The electronic modules may be located below the display panel. The transmittance of a portion of the display panel may be greater than that of another portion. The electronic modules can receive external input through a portion of the display panel, or provide output through a portion of the display panel. Summary of the Invention

[0003] This disclosure provides an electronic device with improved display characteristics.

[0004] One or more embodiments of this disclosure provide an electronic device comprising: a display panel including a first region having a transmissive region and a luminescent region, and a second region adjacent to the first region; and an electronic module below the display panel and overlapping the first region, wherein the display panel includes: a first luminescent element in the luminescent region of the first region; a second luminescent element in the second region; a separating layer in the luminescent region of the first region and in the second region; a transmissive color filter in the first region, overlapping the first luminescent element, having an area smaller than the transmissive region, and including the first transmissive color filter and the second transmissive color filter, the second transmissive color filter having a thickness smaller than the first transmissive color filter; a color filter in the second region, overlapping the second luminescent element; and a reinforcing pattern in the first region, above the separating layer, and having a closed loop shape around the edge of the first transmissive color filter in a plan view.

[0005] The first transmission color filter can be green, while the reinforcing pattern has blue.

[0006] The first transmission color filter can be green, while the reinforcing pattern is red.

[0007] The enhanced pattern can have the same color as the second transmission color filter.

[0008] The display panel may also include an additional reinforcing pattern surrounding a third transmission filter that has a different color from the first and second transmission filters.

[0009] The display panel may also include an additional reinforcing pattern, which has a different color from the original reinforcing pattern, and a third transmissive color filter that has a different color from the first and second transmissive color filters.

[0010] The display panel may also include an additional reinforcing pattern surrounding a third transmissive color filter that has a different color from the first and second transmissive color filters, wherein the reinforcing pattern is spaced apart from the second or third transmissive color filter.

[0011] The transmission color filter may also include a third transmission color filter, which has a different color from the first and second transmission color filters, wherein the reinforcing pattern is spaced apart from the second or third transmission color filter in the plan view.

[0012] The transmission color filter may also include a third transmission color filter, which has a different color from the first and second transmission color filters, wherein the thickness of the first transmission color filter is substantially equal to the thickness of the first color filter in the color filter, and the first transmission color filter has the same color as the first color filter in the color filter.

[0013] The transmission color filter can be arranged along an oblique direction, wherein the first transmission color filter and the transmission area are arranged alternately along the horizontal or vertical direction.

[0014] The transmission color filter can be arranged alternately with the transmission area along the horizontal or vertical direction, wherein the second transmission color filter is spaced apart from the first transmission color filter in the vertical direction, and wherein the third transmission color filter in the transmission color filter is spaced apart from the first and second transmission color filters in the horizontal direction.

[0015] In one or more embodiments of this disclosure, an electronic device includes: a display panel including a first region having a transmissive region and a second region adjacent to the first region; and an electronic module below the display panel and overlapping the first region, wherein the display panel includes: a first light-emitting element in the first region; a second light-emitting element in the second region; a separating layer defining a first opening respectively overlapping the first light-emitting element, a second opening respectively overlapping the second light-emitting element, and a transmissive opening respectively overlapping the transmissive region; color filters respectively in the second opening; transmissive color filters respectively in the first opening and including the first transmissive color filter, the upper surface of the first transmissive color filter having a different shape from the upper surfaces of the other transmissive color filters; and a reinforcing pattern in the first region, above the separating layer, and having a closed loop shape around the first transmissive color filter.

[0016] The reinforced pattern can include the same material as any of the transmission color filters.

[0017] The enhanced pattern may be made of a different material than the first transmission color filter and may be red or blue.

[0018] The reinforcing pattern and the first transmission filter can be configured in multiple ways, wherein the transmission filter further includes a second transmission filter, and wherein the reinforcing pattern includes: a first pattern that surrounds the first transmission filter and is spaced apart from each other; and a second pattern that is spaced apart from the first pattern, surrounds the second transmission filter, and has the same color as the first pattern.

[0019] The reinforcing pattern and the first transmission color filter can be configured in multiple ways, wherein the transmission color filter further includes a second transmission color filter, wherein the reinforcing pattern includes first patterns that are spaced apart from each other and surround the first transmission color filter, and wherein the reinforcing pattern further includes a second pattern that is spaced apart from the first pattern, surrounds the second transmission color filter, and has a different color from the first pattern.

[0020] The first transmission color filter may have a different thickness than the first color filter in the color filter, wherein the transmission color filter also includes a second transmission color filter with a different thickness than the first transmission color filter.

[0021] The first transmission color filter can be configured in multiple ways, wherein the transmission color filter has a different arrangement from the color filter, and further includes a second transmission color filter and a third transmission color filter with different colors from the first transmission color filter, wherein the first transmission color filter and the second transmission color filter are arranged alternately along a first oblique direction, and wherein the first transmission color filter and the third transmission color filter are arranged alternately along a second oblique direction that intersects the first oblique direction.

[0022] The transmission color filter may have a different arrangement from the first transmission color filter, wherein the transmission color filter further includes a second transmission color filter and a third transmission color filter with different colors from the first transmission color filter, and wherein the first transmission color filter and the second transmission color filter have a smaller area than the third transmission color filter.

[0023] One of the transmission regions can have a larger area than the first transmission color filter. Attached Figure Description

[0024] The accompanying drawings are included to provide a further understanding of this disclosure and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the present disclosure and, together with the description, serve to explain the principles of the disclosure. In the drawings: Figure 1 It is a block diagram of an electronic device according to one or more embodiments; Figure 2 Schematic diagrams of electronic devices according to various embodiments are shown; Figure 3A and Figure 3BThis is a perspective view of an electronic device according to one or more embodiments of the present disclosure; Figure 4 This is an exploded perspective view of an electronic device according to one or more embodiments of the present disclosure; Figure 5 This is a cross-sectional view of a display device according to one or more embodiments of the present disclosure; Figure 6 This is a plan view of a display panel according to one or more embodiments of the present disclosure; Figure 7 This is an enlarged plan view showing a portion of a display panel according to one or more embodiments of the present disclosure; Figures 8A to 8C It is shown Figure 7 An enlarged cross-sectional view of a portion of the display panel shown; Figure 9A This is a plan view showing a portion of a display panel according to one or more embodiments of the present disclosure; Figure 9B It is shown schematically. Figure 9A A sectional view of a portion of the area; Figure 10A This is a plan view showing a portion of a display panel according to one or more embodiments of the present disclosure; Figure 10B It is shown schematically. Figure 10A A sectional view of a portion of the area; and Figures 11A to 11C This is a plan view showing a portion of a display panel according to one or more embodiments of the present disclosure. Detailed Implementation

[0025] Some aspects of embodiments of this disclosure, and methods of implementing them, can be more readily understood by referring to the detailed description of the embodiments and the accompanying drawings. The described embodiments are provided as examples so that this disclosure will be thorough and complete, and will fully convey aspects of this disclosure to those skilled in the art. Therefore, redundant processes, elements, and techniques that are irrelevant or unrelated to the description of the embodiments, or unnecessary for a person of ordinary skill in the art to fully understand aspects of this disclosure, may be omitted. Unless otherwise stated, the same reference numerals, characters, or combinations thereof denote the same elements throughout the drawings and written description, and therefore, their repeated description may be omitted.

[0026] The described embodiments may have various modifications and may be implemented in different forms, and should not be construed as being limited to the embodiments shown herein. The terms "may," "can," or "may not" used in describing embodiments correspond to one or more embodiments of this disclosure.

[0027] Considering this disclosure in its entirety, those skilled in the art will understand that each suitable feature of the various embodiments of this disclosure may be combined in part or in whole, or combined with one another, and may interact technically and operate in a variety of suitable ways, and each embodiment may be implemented independently of one another or in combination with one another in any suitable way, unless otherwise stated or implied.

[0028] In the accompanying drawings, the relative dimensions of elements, layers, and regions may be exaggerated for clarity and / or for descriptive purposes. In other words, this disclosure is not limited to the dimensions and thicknesses of elements shown in the drawings arbitrarily for ease of description. Furthermore, the use of crosshairs and / or shading in the drawings is generally intended to clarify the boundaries between adjacent elements. Therefore, unless otherwise stated, the presence or absence of crosshairs or shading does not convey or indicate any preference or requirement for particular materials, material properties, dimensions, scale, commonalities between illustrated elements, and / or any other characteristics, properties, or characteristics of the elements.

[0029] Various embodiments are described herein with reference to cross-sectional views as schematic diagrams of implementation methods and / or intermediate structures. Thus, deviations from the illustrated shapes will be anticipated, for example, due to manufacturing techniques and / or tolerances. Furthermore, the specific structural or functional descriptions disclosed herein are merely illustrative for the purpose of describing embodiments according to the concept of this disclosure. Therefore, the embodiments disclosed herein should not be construed as limited to the illustrated shapes of elements, layers, or regions, but will include deviations in shape, for example, due to manufacturing processes.

[0030] For example, an implantation region shown as rectangular will typically have rounded or curved features and / or a gradient of implantation concentration at its edges, rather than a binary variation from the implantation region to the non-implantation region. Similarly, the implantation region formed by implantation may result in some implantation in the region between the implantation region and the surface through which the implantation occurs.

[0031] For ease of explanation, spatial relative terms such as “below,” “under,” “lower,” “lower side,” “below,” “above,” “upper,” “above,” “higher,” “upper side,” “side” (e.g., “sidewall” in “sidewall”) are used herein to describe the relationship between one element or feature and another element(s) shown in the figures. It will be understood that, in addition to the orientations depicted in the figures, the spatial relative terms are intended to encompass different orientations of the device in use or operation. For example, if the device in the figures is flipped, the element described as “below,” “under,” or “below” other elements or features will consequently be oriented “above” other elements or features. Thus, the exemplary terms “below” and “below” can encompass both upper and lower orientations. The device may have other orientations (e.g., rotated 90 degrees or in other orientations), and the spatial relative descriptive terms used herein should be interpreted accordingly. Similarly, if a first part is described as being arranged “on” a second part, this indicates that the first part is arranged on the upper or lower side of the second part, and not limited to its upper side based on the direction of gravity.

[0032] Furthermore, the phrase "in a plan view" refers to the view of an object portion from above, and the phrase "in a schematic sectional view" refers to the view of a schematic section obtained by vertically cutting the object portion from the side. The terms "overlapping" or "overlapping" mean that the first object may be above or below the second object, or on one side of the second object, and that the second object may be above or below the first object, or on one side of the first object. Additionally, the term "overlapping" can include layering, stacking, facing or oriented, extending throughout, covering or partially covering, or any other suitable term as would be understood and appreciated by one of ordinary skill in the art. The expression "non-overlapping" can include meanings such as "separated from," "set beside," or "offset from," and any other suitable equivalent as would be understood and appreciated by one of ordinary skill in the art. The terms "facing" and "oriented" can mean that the first object may be directly or indirectly opposite the second object. In the case where a third object is interposed between the first and second objects, the first and second objects can be understood as indirectly opposite each other, but still facing each other.

[0033] It will be understood that if a component, layer, region, or part (e.g., device, apparatus, circuit, wiring, electrode, terminal, conductive film, etc.) is referred to as being "formed" on, "on" another component, layer, region, or part, "connected to," or "(operably, functionally, or communicatively) coupled to" another component, layer, region, or part, it may be directly formed on, or directly on, or directly connected to or directly coupled to another component, layer, region, or part, or indirectly formed on, or indirectly on, or indirectly connected to or indirectly coupled to another component, layer, region, or part, such that one or more intervening components, layers, regions, or parts may exist. Additionally, this may generally mean direct or indirect connection or linkage, and integral or non-integral connection or linkage. For example, if a layer, region, or component is referred to as "electrically connected" or "electrically coupled" to another layer, region, or component, it may be directly electrically connected or directly coupled to another layer, region, and / or component, or there may be one or more intervening layers, regions, or components. One or more intervening components may include switches, transistors, resistors, inductors, capacitors, diodes, etc. Therefore, the connection is not limited to the connections illustrated in the drawings or detailed description, and may also include other types of connections. In the described embodiments, unless explicitly described as a direct connection, the expression for connection indicates an electrical connection, and "direct connection / direct coupling" or "directly on..." means that one component is directly connected or coupled to another component or directly on another component without intermediate components.

[0034] Furthermore, in this specification, if a portion of a layer, film, region, plate, etc., is formed on another portion, the forming direction is not limited to the upward direction, but includes forming the portion on a side surface or in the downward direction. Conversely, if a portion of a layer, film, region, plate, etc., is formed "below" another portion, this includes not only the case where the portion is "directly" "below" the other portion, but also the case where there is another portion between the portion and the other portion. Similarly, other expressions describing the relationship between components, such as "between" and "directly between," or "adjacent to" and "directly adjacent to," can be interpreted similarly. It will be understood that if an element or layer is referred to as being "between" two elements or layers, it can be the only element or layer between the two elements or layers, or there can be one or more intervening elements or layers.

[0035] For the purposes of this disclosure, when placed after an element of a list, expressions such as “at least one of…”, “any one of…”, or “one or more of…” modify the elements of the entire list rather than individual elements within the list. For example, “at least one of X, Y, and Z” and “at least one selected from the group consisting of X, Y, and Z” can be interpreted as only X, or only Y, or only Z, or any combination of two or more of X, Y, and Z (e.g., XYZ, XY, YZ, and XZ), or any variation thereof. Similarly, the expression “at least one of A and B” can include A, B, or A and B. As used herein, “or” generally means “and / or”, and the term “and / or” includes any and all combinations of one or more of the related listed items. For example, the expression “A and / or B” can include A, B, or A and B. Similarly, when placed before or after an element of a list, expressions such as “at least one of…”, “a plurality of,” “one of…”, and other prepositional phrases modify the elements of the entire list rather than individual elements within the list. When “C to D” is stated, unless otherwise specified, it means that C is or greater and D is or less.

[0036] It will be understood that while the terms “first,” “second,” “third,” etc., may be used herein to describe various elements, components, regions, layers, and / or parts, these elements, components, regions, layers, and / or parts should not be limited by these terms. These terms do not correspond to a specific order, position, or priority, but are used only to distinguish one element, component, part, region, area, layer, segment, or part from another. Therefore, without departing from the spirit and scope of this disclosure, the first element, first component, first region, first layer, or first part described below may be referred to as a second element, second component, second region, second layer, or second part. Describing an element as a “first” element may not require or imply the presence of a second element or other elements. The terms “first,” “second,” etc., may also be used herein to distinguish elements of different categories or groups. For brevity, the terms “first,” “second,” etc., may respectively represent “first category (or first group),” “second category (or second group),” etc.

[0037] In the example, the first direction DR1, the second direction DR2, and / or the third direction DR3 are not limited to the three axes of a Cartesian coordinate system and can be interpreted in a broader sense. For example, the first direction DR1, the second direction DR2, and the third direction DR3 can be perpendicular to each other, or they can represent different directions that are not perpendicular to each other.

[0038] The terminology used herein is for descriptive purposes only and is not intended to limit this disclosure. The terms or phrases used in this specification and claims should not be construed as having a general or dictionary meaning, and should be interpreted as consistent with the meanings and concepts of this disclosure, based on the premise that the inventors may be their own lexicographers and that the concepts of the terms are appropriately defined to best describe the embodiments.

[0039] As used herein, the singular forms “a” and “an” are intended to include the plural forms as well, and the plural forms are intended to include the singular forms as well, unless the context clearly indicates otherwise. It will also be understood that, when used in this specification, the terms “comprises,” “comprising,” “have,” “having,” “includes,” and “including” specify the presence of the described features, integrals, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or combinations thereof.

[0040] As used herein, the terms “substantially,” “about,” “approximately,” and similar terms are used as approximate terms rather than as terms of degree and are intended to account for inherent deviations in measured or calculated values ​​that would be recognized by those skilled in the art. For example, “substantially” can include a range of + / - 5% of the corresponding value. Given the measurement discussed and the errors associated with the measurement of a particular quantity (i.e., limitations of the measurement system), as used herein, “about” or “approximately” includes the value and means within an acceptable range of deviation for a particular value as determined by those skilled in the art. For example, “about” can mean within one or more standard deviations, or within ±30%, ±20%, ±10%, ±5% of the value. Additionally, the word “may” as used in describing embodiments of this disclosure means “one or more embodiments of this disclosure.” Furthermore, the expression “identical” can mean “substantially identical.” In other words, the expression “identical” can include a range acceptable to those skilled in the art. Other expressions may also omit the word “substantially.”

[0041] In some embodiments, well-known structures and arrangements may be described in the accompanying drawings for one or more functional blocks (e.g., block diagrams), units, and / or modules to avoid unnecessarily obscuring the various embodiments. Those skilled in the art will understand that the blocks, units, and / or modules are physically implemented by logic circuitry, discrete components, microprocessors, hardwired circuitry, memory elements, wire connectors, and other electronic circuitry. This can be formed using semiconductor-based manufacturing techniques or other manufacturing techniques. Blocks, units, and / or modules implemented by microprocessors or other similar hardware can be programmed and controlled using software to perform the various functions discussed herein, and optionally can be driven by firmware and / or software. Furthermore, each block, unit, and / or module may be implemented by dedicated hardware, or a combination of dedicated hardware performing some functions and processors performing functions different from those of the dedicated hardware (e.g., one or more programmable microprocessors and associated circuitry). Additionally, in some embodiments, blocks, units, and / or modules may be physically separated into two or more interactive, discrete blocks, units, and / or modules without departing from the scope of this disclosure. Furthermore, in some embodiments, without departing from the scope of this disclosure, blocks, units and / or modules may be physically combined into more complex blocks, units and / or modules.

[0042] Unless otherwise specified, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. It will also be understood that terms, such as those defined in commonly used dictionaries, shall be interpreted as having the same meaning as they have in the relevant field and / or the context of this specification, and shall not be interpreted in an idealized or overly formal sense unless expressly defined herein.

[0043] Figure 1 It is a block diagram of an electronic device EDE according to one or more embodiments.

[0044] refer to Figure 1 An electronic device EDE according to one or more embodiments may include a display module 11, a processor 12, a memory 13, and a power module 14.

[0045] Display module 11 can display images. Images may include still images and moving images. Processor 12 may include at least one of a central processing unit (CPU), application processor (AP), graphics processing unit (GPU), communication processor (CP), image signal processor (ISP), and controller. Processor 12 can be configured to control the operation of display module 11.

[0046] The memory 13 can store data information suitable for the operation of the processor 12 or the display module 11. When the processor 12 executes the application program stored in the memory 13, image data signals and / or input control signals can be transmitted to the display module 11, and the display module 11 can process the received signals and output image information through the display screen.

[0047] The power module 14 may include a power supply module such as a power adapter or battery cell, and a power conversion module that converts the power supplied by the power supply module to generate power suitable for the operation of the electronic device EDE.

[0048] Figure 2 Schematic diagrams of electronic devices according to various embodiments are shown.

[0049] refer to Figure 2 According to the embodiments, various electronic devices for applying display devices may include not only electronic devices for displaying images (such as smartphones 10_1a, tablet PCs 10_1b, laptop computers 10_1c, televisions (TVs) 10_1d, and desktop displays 10_1e), but also wearable electronic devices (such as smart glasses 10_2a, head-mounted displays 10_2b, and smartwatches 10_2c) that include display modules, and electronic devices 10_3 for vehicles that include display modules (such as interior mirror displays and central information displays (CIDs) located on the instrument cluster, central dashboard, and instrument panel of a car).

[0050] The following is for reference. Figures 3A to 5 Examples of some electronic devices according to various implementation methods are described in detail.

[0051] Figure 3A and Figure 3B This is a perspective view of an electronic device EDE according to one or more embodiments of the present disclosure. Figure 3A The electronic device EDE is shown in its folded (or unfolded) state, and Figure 3B The folded state of the electronic device EDE is shown.

[0052] refer to Figure 3A and Figure 3B An electronic device EDE according to one or more embodiments of the present disclosure may include a display surface DS defined by a first direction DR1 and a second direction DR2 intersecting the first direction DR1. The electronic device EDE can provide an image IM to a user through the display surface DS.

[0053] The display surface DS may include a display area DA and a non-display area NDA surrounding the display area DA. The display area DA may display an image IM, and the non-display area NDA may not display an image IM. The non-display area NDA may surround the display area DA (e.g., surrounding the display area DA in a plan view). However, one or more embodiments are not limited thereto, and the shapes of the display area DA and the non-display area NDA may be varied.

[0054] In the following text, the direction that intersects substantially perpendicularly with the plane defined by the first direction DR1 and the second direction DR2 is defined as the third direction DR3. Furthermore, in this specification, the phrase "on a plane" or "in a plan view" may be defined as "the state observed on the third direction DR3".

[0055] The sensor area ED-SA can be confined within the display area DA of the electronic device EDE. Figure 3A One sensor region ED-SA is shown, but the number of sensor regions ED-SA is not limited to this. The sensor region ED-SA may be surrounded by a display region DA (e.g., surrounded by display region DA in a plan view).

[0056] The electronic module can be located in the area overlapping with the sensor area ED-SA. The electronic module can receive external input transmitted through the sensor area ED-SA, or can provide output through the sensor area ED-SA. For example, the electronic module can be a camera module, a sensor (such as a proximity sensor for measuring distance, a sensor for identifying a user's body parts (e.g., fingerprint, iris, or face)), or a small light that outputs light, and is not particularly limited thereto. In the following, the electronic module overlapping with the sensor area ED-SA will be described as a camera module as an example.

[0057] An electronic device (EDE) may include a folded region FA and multiple non-folded regions NFA1 and NFA2. The non-folded regions NFA1 and NFA2 may include a first non-folded region NFA1 and a second non-folded region NFA2. The folded region FA may be located between the first non-folded region NFA1 and the second non-folded region NFA2. The folded region FA may be referred to as a foldable region, and the first non-folded region NFA1 and the second non-folded region NFA2 may be referred to as a first non-foldable region and a second non-foldable region.

[0058] like Figure 3BAs shown, the folding region FA can be folded relative to a folding axis FX parallel to the first direction DR1. When the electronic device EDE is folded, the folding region FA can have a curvature (e.g., a predetermined curvature) and a radius of curvature. The first non-folding region NFA1 and the second non-folding region NFA2 can face each other, and the electronic device EDE can be folded inwards so that the display surface DS is not exposed to the outside.

[0059] In one or more embodiments of this disclosure, the electronic device EDE can be folded outward, exposing the display surface DS to the outside. In one or more embodiments of this disclosure, the electronic device EDE can be folded inward or outward from an unfolded state, but is not limited thereto. In one or more embodiments of this disclosure, the electronic device EDE can be configured to select any one of an unfolding operation, an inward folding operation, and an outward folding operation. In one or more embodiments of this disclosure, a plurality of folding axes can be defined in the electronic device EDE, and the electronic device EDE can be folded inward or outward from an unfolded state about each of the plurality of folding axes.

[0060] exist Figure 3A and Figure 3B The present invention describes a foldable electronic device (EDE) as an example, but its application is not limited to foldable electronic devices (EDEs). For example, the present invention can be applied to rigid electronic devices, such as electronic devices without a folding area (FA).

[0061] Figure 4 This is an exploded perspective view of an electronic device EDE according to one or more embodiments of the present disclosure.

[0062] refer to Figure 4 The electronic device EDE may include a display device DD, a first electronic module EM1, a second electronic module EM2, a power supply module PM, and housings EDC1 and EDC2. The electronic device EDE may also include a mechanical structure for controlling the folding operation of the display device DD.

[0063] The display device DD includes a window module WM and a display module DM. The window module WM provides the front surface of the electronic device EDE. The display module DM may include at least a display panel DP. The display module DM generates images and detects external input.

[0064] exist Figure 4 The diagram shows that the display module DM is the same as the display panel DP, but the display module DM can essentially be a stacked structure of multiple components including the display panel DP. The stacked structure of the display module DM will be described in detail later.

[0065] The display panel DP includes display areas DA corresponding to the electronic device EDE (see...). Figure 3A ) and non-display area NDA (see Figure 3A The display area DP-DA and the non-display area DP-NDA are defined in this specification. In this specification, the phrase "one area / part corresponds to another area / part" indicates that "one area / part overlaps with another area / part," and is not limited to the same area.

[0066] The display area DP-DA may include a first area A1 and a second area A2. The first area A1 may correspond to the sensor area ED-SA of the electronic device EDE (see [link]). Figure 3A The regions A1 and A2 are shown as circular, but A1 can have various shapes such as polygonal, elliptical, having at least one curved side, or atypical shapes, and are not limited to any one embodiment. A1 can be referred to as a component region, and A2 can be referred to as a main display region or a general display region.

[0067] The first region A1 may have a higher transmittance than the second region A2. The first region A1 may overlap with the camera module CMM, which will be described later.

[0068] The display module DM may also include a driver chip DIC located on the non-display area DP-NDA. The display module DM may also include a flexible circuit film FCB connected to the non-display area DP-NDA.

[0069] The driver chip (DIC) may include driving elements for driving the pixels of the display panel (DP), such as data driving circuitry. Figure 4 The diagram illustrates a structure in which the driver chip DIC is mounted on a display panel DP, but this disclosure is not limited thereto. For example, the driver chip DIC may be mounted on a flexible circuit film FCB.

[0070] The power supply module (PM) provides power suitable for the overall operation of the electronic device (EDE). The power supply module (PM) may include a typical battery module.

[0071] The first electronic module EM1 and the second electronic module EM2 may include various functional modules to operate the electronic device EDE. In one or more embodiments, the first electronic module EM1 and the second electronic module EM2 may each be directly mounted on a motherboard electrically connected to the display panel DP, or they may each be mounted on a separate board and electrically connected to the motherboard via connectors or the like.

[0072] The second electronic module EM2 may include a camera module CMM, a light emitting module, a light receiving module, etc. The camera module CMM can capture both still and moving images. Multiple camera modules CMMs may be configured. Some of the camera modules CMMs may overlap with the first region A1. External input (e.g., light) can be provided to the camera module CMMs through the first region A1. For example, the camera module CMM can capture external images by receiving natural light passing through the first region A1.

[0073] Housings EDC1 and EDC2 house the display module DM, the first electronic module EM1, the second electronic module EM2, and the power supply module PM. Housings EDC1 and EDC2 protect the components housed within them, such as the display module DM, the first electronic module EM1, the second electronic module EM2, and the power supply module PM. Figure 4 Two separate housings, EDC1 and EDC2, are shown, but one or more embodiments are not limited thereto. In one or more embodiments, the electronic device EDE may also include a hinge structure for connecting the two housings, EDC1 and EDC2. Housings EDC1 and EDC2 may be coupled to the window module WM.

[0074] Figure 5 This is a cross-sectional view of a display device DD according to one or more embodiments of the present disclosure. Figure 5 It is along Figure 4 A cross-sectional view of a display device DD according to one or more embodiments of the present disclosure, taken by line I-I'.

[0075] refer to Figure 5 The display device DD may include a window module WM and a display module DM.

[0076] The window module WM may include the window UT, the protective film PF on the window UT, and the border pattern BP (as used in this article, "on" can mean "above" or "below").

[0077] Window UT can be chemically strengthened glass. Window UT can be applied to display devices DD to reduce or minimize the appearance of wrinkles, even with repeated folding and unfolding.

[0078] The protective film PF may include polyimide, polycarbonate, polyamide, triacetyl cellulose, polymethyl methacrylate, or polyethylene terephthalate. In one or more embodiments, at least one of a hard coating, an anti-fingerprint layer, and an anti-reflective layer may be located on the upper surface of the protective film PF.

[0079] Border pattern BP and non-display area NDA (see Figure 3A(Overlap.) The border pattern BP can be located on one surface of the window UT or on one surface of the protective film PF. Figure 3A A border pattern BP is shown on the lower surface of a protective film PF. However, one or more embodiments are not limited thereto, and the border pattern BP may also be located on the upper surface of the protective film PF, the upper surface of the window UT, or the lower surface of the window UT. The border pattern BP may be a colored light-blocking film and may be formed by, for example, a coating method. The border pattern BP may include a base material and a dye or pigment mixed into the base material. The border pattern BP may have a closed loop shape in a plane (as used herein, "in a plane" may mean "planar view").

[0080] The first adhesive layer AL1 may be located between the protective film PF and the window UT. The first adhesive layer AL1 may be a pressure-sensitive adhesive (PSA) film or an optically transparent adhesive (OCA) component. The adhesive layer described below may also be the same as the first adhesive layer AL1 and may include typical adhesives.

[0081] The first adhesive layer AL1 may have a thickness sufficient to cover the border pattern BP. For example, the thickness of the border pattern BP may be from about 3 micrometers to about 8 micrometers, and the first adhesive layer AL1 may have a thickness sufficient to prevent air bubbles from forming around the border pattern BP.

[0082] The first adhesive layer AL1 can be separated from the window UT. Because the strength of the protective film PF is lower than that of the window UT, scratches may occur. After the first adhesive layer AL1 and the damaged protective film PF are separated from the window UT, a new protective film PF can be attached to the window UT.

[0083] The display module DM may include an impact-absorbing layer DML, a display panel DP, and a lower component LM.

[0084] The shock-absorbing layer DML can be located on the display panel DP. The shock-absorbing layer DML can be a functional layer used to protect the display panel DP from external impacts. The shock-absorbing layer DML can be attached to the window UT via a second adhesive layer AL2, and can be attached to the display panel DP via a third adhesive layer AL3.

[0085] The lower component LM can be located below the display panel DP. The lower component LM may include a panel protective layer PPF, a support layer PLT, a cover layer SCV, a digitizer DGZ, a shielding layer MMP, a heat dissipation layer CU, a protective layer PET, and a waterproof tape WFT. In one or more embodiments of this disclosure, the lower component LM may not include some of the aforementioned components, or may further include other components. Furthermore, Figure 5The stacking order shown is merely an example, and the stacking order of the individual components can vary.

[0086] The panel protective layer (PPF) can be located beneath the display panel (DP). The PPF can be attached to the rear surface of the display panel (DP) via a fourth adhesive layer (AL4). The PPF protects the lower portion of the display panel (DP). The PPF can comprise a flexible plastic material. The PPF reduces or prevents scratches on the rear surface of the display panel (DP) during the manufacturing process. The PPF can be a colored polyimide film. For example, the PPF can be an opaque yellow film, but is not limited to this.

[0087] The support layer PLT is located below the panel protective layer PPF. The support layer PLT supports components located on it and maintains the display device DD in an unfolded or folded state. In one or more embodiments of this disclosure, the support layer PLT may include at least a first support portion corresponding to a first non-folded region NFA1, a second support portion corresponding to a second non-folded region NFA2, and a folded portion corresponding to a folded region FA. The first and second support portions may be spaced apart from each other in a second direction DR2. The folded portion may be located between the first and second support portions, and a plurality of openings OP may be defined in the folded portion. The flexibility of a portion of the support layer PLT can be improved by the openings OP. The flexibility of the portion of the support layer PLT overlapping the folded region FA can be improved by the openings OP.

[0088] The support layer PLT may include, but is not particularly limited to, carbon fiber reinforced plastic (CFRP). Optionally, the first and second support portions may include non-metallic materials, plastics, glass fiber reinforced plastics, or glass. Plastics may include polyimide, polyethylene, or polyethylene terephthalate, and are not particularly limited. The first and second support portions may include the same material. The folded portion may also include the same material as the first and second support portions, or may include a different material. For example, the folded portion may include a material having an elastic modulus of about 60 GPa or higher, and may include metallic materials such as stainless steel. For example, the folded portion may include SUS 304, but is not limited to this. The folded portion may include various metallic materials.

[0089] The support layer PLT can be attached to the panel protective layer PPF via a fifth adhesive layer AL5. Multiple fifth adhesive layers AL5 can be provided, and these layers can be spaced apart from each other, with the folded area FA located between them. The fifth adhesive layers AL5 do not need to overlap with any of the multiple openings OP. Furthermore, in a planar plane, the fifth adhesive layers AL5 can be spaced apart from the multiple openings OP. Because the fifth adhesive layers AL5 are not located in the area corresponding to the folded area FA, the flexibility of the support layer PLT can be improved.

[0090] In the region overlapping with the folded region FA, the panel protective layer PPF can be spaced apart from the support layer PLT. That is, in the portion overlapping the folded region FA, an empty space can be defined between the support layer PLT and the panel protective layer PPF. Because an empty space is defined between the panel protective layer PPF and the support layer PLT, the shapes of the multiple openings OP defined in the support layer PLT can be determined from the shape of the electronic device EDE (see...). Figure 3A () is not visible from the outside.

[0091] The thickness of the fifth adhesive layer AL5 can be less than the thickness of the fourth adhesive layer AL4. For example, the thickness of the fourth adhesive layer AL4 can be approximately 25 micrometers, and the thickness of the fifth adhesive layer AL5 can be approximately 16 micrometers. As the thickness of the fifth adhesive layer AL5 becomes smaller, the step portion caused by the fifth adhesive layer AL5 can be reduced. With a smaller step portion, it is possible that due to the electronic device EDE (see...) Figure 3A The shape deformation of the stacked structure caused by folding and unfolding is reduced, but multiple openings (OPs) may become visible, or the fifth adhesive layer AL5 may detach due to repeated folding operations. When the thickness of the fifth adhesive layer AL5 becomes greater, it is possible that multiple openings (OPs) become invisible, and the adhesion reliability of the fifth adhesive layer AL5 is increased through repeated folding operations, but the stepped portions may become larger. Therefore, the thickness of the fifth adhesive layer AL5 can be selected within a suitable range, taking into account folding reliability, adhesion reliability, and the visibility of multiple openings (OPs).

[0092] The cover layer SCV can be located below the support layer PLT. The cover layer SCV can be attached to the support layer PLT via an adhesive component. The cover layer SCV can cover multiple openings OP defined in the support layer PLT. Therefore, the cover layer SCV can reduce or prevent the introduction of foreign matter into the multiple openings OP. The cover layer SCV can have a lower modulus of elasticity than the support layer PLT. For example, the cover layer SCV can include, but is not limited to, thermoplastic polyurethane, rubber, and silicone.

[0093] The digitizer DGZ can be located below the support layer PLT and can be attached to the support layer PLT via the sixth adhesive layer AL6. Multiple digitizers DGZ can be configured. For example, multiple digitizers DGZ can be spaced apart in the second direction DR2. A portion of each of the multiple digitizers DGZ can overlap with the non-folded region NFA1 or NFA2, and the remaining portion can overlap with the folded region FA. In the plane, a portion of each of the multiple digitizers DGZ can overlap with a portion of multiple openings OP.

[0094] Multiple digitizers (DGZs) can each include multiple loop coils that generate a magnetic field at a preset resonant frequency using an input unit (hereinafter referred to as the pen). Multiple digitizers (DGZs) can also be referred to as EMR (electromagnetic resonance) sensing panels.

[0095] The magnetic field generated in multiple digitizer DGZs is applied to an LC resonant circuit consisting of an inductor (coil) and a capacitor in the pen. The coil generates a current in response to the received magnetic field, and this current is transferred to the capacitor. Therefore, the capacitor charges the current input to the coil and discharges the charged current back to the coil. Finally, a magnetic field at the resonant frequency is emitted in the coil. The magnetic field emitted by the pen can be reabsorbed by the loop coils of the multiple digitizer DGZs, and thus, the adjacent positions of the pen and the multiple digitizer DGZs can be determined.

[0096] The shielding layer MMP can be located below multiple digitizer DGZs. Each shielding layer MMP can consist of magnetic metal powder. The shielding layer MMP can be referred to as a magnetic metal powder layer, magnetic layer, magnetic circuit layer, or magnetic path layer. The shielding layer MMP can shield magnetic fields.

[0097] The heat dissipation layers (CUs) can be located below the shielding layers (MMPs). The heat dissipation layers (CUs) can be sheets with high thermal conductivity. For example, each heat dissipation layer (CU) can comprise graphite, copper, or a copper alloy, but is not particularly limited thereto.

[0098] In one or more embodiments of this disclosure, the digitizer DGZ and the shielding layer MMP may be omitted. In this case, the heat dissipation layer CU may be attached to the lower portion of the support layer PLT.

[0099] The protective PET layer can be located below the heat dissipation layer CU. The protective PET layer can be an insulating layer. For example, the protective PET layer can be a layer provided to reduce or prevent electrostatic inflow. Therefore, the protective PET layer can reduce or prevent the flexible circuit film FCB (see [link to relevant documentation]). Figure 4 Electrical interference between the components located on the protective PET layer and the components.

[0100] The waterproof tape WFT can be attached to the shielding layer MMP and the protective layer PET. In one or more embodiments, the waterproof tape WFT can be attached to a mounting bracket. The thickness of the waterproof tape attached to the shielding layer MMP and the thickness of the waterproof tape attached to the protective layer PET can be different.

[0101] The through-hole COP can be defined in at least some of the components constituting the lower member LM. The through-hole COP can be associated with the sensor area ED-SA of the electronic device EDE (see...). Figure 3A ) Corresponding or overlapping. Camera Module CMM (see Figure 4 At least a portion of the material can be inserted into the through-hole COP.

[0102] Figure 5 A through-hole COP is shown, but is not limited to, extending from the rear surface of one of the protective layers PET to the fifth adhesive layer AL5. For example, the through-hole COP may also extend from the rear surface of one of the protective layers PET to the upper surface of the panel protective layer PPF, or from the rear surface of one of the protective layers to the upper surface of the fourth adhesive layer AL4.

[0103] Figure 6 This is a plan view of a display panel DP according to one or more embodiments of the present disclosure.

[0104] refer to Figure 6 In a display panel (DP), a display area (DP-DA) and a non-display area (DP-NDA) surrounding the display area (DP-DA) can be defined. The display area (DP-DA) and the non-display area (DP-NDA) can be distinguished by the presence or absence of pixels (PX). Pixels (PX) are located within the display area (DP-DA). The scan driver (SDV), data driver, and transmit driver (EDV) can be located within the non-display area (DP-NDA). The data driver can be part of the circuitry configured in the driver chip (DIC).

[0105] The display area DP-DA may include a first area A1 and a second area A2. The first area A1 and the second area A2 can be distinguished by the presence or absence of a transmission area TP (see [link]). Figure 7 The two regions are distinguished by their respective characteristics. A detailed description of the first region A1 and the second region A2 will be given later.

[0106] The display panel DP may include a first panel area AA1, a curved area BA, and a second panel area AA2 defined along the second direction DR2. The second panel area AA2 and the curved area BA may be portions of the non-display area DP-NDA. The curved area BA may be located between the first panel area AA1 and the second panel area AA2.

[0107] The first panel area AA1 can be... Figure 3A The area corresponding to the display surface DS in the diagram. The first panel area AA1 may include a first non-folding area NFA10, a second non-folding area NFA20, and a folding area FA0. The first non-folding area NFA10, the second non-folding area NFA20, and the folding area FA0 respectively correspond to... Figure 3A and Figure 3B The first non-folded region NFA1, the second non-folded region NFA2, and the folded region FA are in the middle.

[0108] The width (or length) of the curved region BA in the first direction DR1 and the width (or length) of the second panel region AA2 in the first direction DR1 can be smaller than the width (or length) of the first panel region AA1 in the first direction DR1. Regions with shorter lengths in the bending axis direction are more suitable for bending.

[0109] The display panel (DP) may include pixels (PX), initialization scan lines GIL1 to GILm, compensation scan lines GCL1 to GCLm, write scan lines GWL1 to GWLm, black scan lines GBL1 to GBLm, transmit control lines ECL1 to ECLm, data lines DL1 to DLn, first control line CSL1 and second control line CSL2, drive voltage line PL, and multiple pads (PD). Here, m and n are natural numbers greater than or equal to 2.

[0110] Pixel PX can be connected to the initialization scan lines GIL1 to GILm, the compensation scan lines GCL1 to GCLm, the write scan lines GWL1 to GWLm, the black scan lines GBL1 to GBLm, the emission control lines ECL1 to ECLm, and the data lines DL1 to DLn.

[0111] Initialization scan lines GIL1 to GILm, compensation scan lines GCL1 to GCLm, write scan lines GWL1 to GWLm, and black scan lines GBL1 to GBLm can extend in the first direction DR1 to electrically connect to the scan driver SDV. Data lines DL1 to DLn can extend in the second direction DR2 to pass through the bend region BA and electrically connect to the driver chip DIC. Transmit control lines ECL1 to ECLm can extend in the first direction DR1 to electrically connect to the transmit driver EDV.

[0112] The driving voltage line PL may include a portion extending in a first direction DR1 and a portion extending in a second direction DR2. The portions extending in the first direction DR1 and the second direction DR2 may be located on different corresponding layers. The portion of the driving voltage line PL extending in the second direction DR2 may extend through a bending region BA to a second panel region AA2. The driving voltage line PL can provide a driving voltage to the pixel PX.

[0113] The first control line CSL1 can be connected to the scan driver SDV and can extend through the bend area BA toward the lower end of the second panel area AA2. The second control line CSL2 can be connected to the transmit driver EDV and can extend through the bend area BA toward the lower end of the second panel area AA2.

[0114] When viewed in a planar plane (e.g., in a plan view), the pad PD can be positioned adjacent to the lower end of the second panel area AA2. The driver chip DIC, the drive voltage line PL, the first control line CSL1, and the second control line CSL2 can be electrically connected to the pad PD. The flexible circuit film FCB can be electrically connected to the pad PD through an anisotropic conductive adhesive layer.

[0115] Figure 7 This illustrates a portion of a display panel DP according to one or more embodiments of the present disclosure (e.g., Figure 6 The region XX' is an enlarged plan view of the region (which may be the region including the boundary between the first region A1 and the second region A2). Figures 8A to 8C It is shown Figure 7 The image shows an enlarged cross-sectional view of a portion of the display panel DP. Figure 8A This is a cross-sectional view showing a first region A1 of a display panel DP according to one or more embodiments of the present disclosure. Figure 8B This is a cross-sectional view showing the second region A2 of a display panel DP according to one or more embodiments of the present disclosure. Figure 8C This is a cross-sectional view showing a first region A1 and a second region A2 of a display panel DP according to one or more embodiments of the present disclosure. In the following, reference is made to... Figures 7 to 8C This disclosure is described.

[0116] like Figure 7 As shown, there can be multiple pixels PX, and these multiple pixels PX can include a first pixel PXR, a second pixel PXG, and a third pixel PXB. The first pixel PXR can be a red emitting pixel, the second pixel PXG can be a green emitting pixel, and the third pixel PXB can be a blue emitting pixel.

[0117] In one or more embodiments of this disclosure, the first pixel PXR, the second pixel PXG, and the third pixel PXB may be located in the second region A2. A plurality of pixels PXt may be located in the first region A1, and may include a first pixel PXRt, a second pixel PXGt, and a third pixel PXBt respectively corresponding to the first pixel PXR, the second pixel PXG, and the third pixel PXB. Figure 7 The planar shape of each of the first pixels PXR and PXRt, the second pixels PXG and PXGt, and the third pixels PXB and PXBt shown can correspond to the shape of the light-emitting region defined for the light-emitting element. The light-emitting region can be the area defined by a pixel-defined opening defined in a pixel-defined film (e.g., the first pixel-defined film PDL1 and / or the second pixel-defined film PDL2).

[0118] refer to Figure 8A and Figure 8B The display panel DP may include a display layer 100, a sensor layer 200, and an anti-reflective layer 300. The display layer 100 may include a base layer 110, a barrier layer 120, a circuit layer 130, a component layer 140, and an encapsulation layer 150.

[0119] The base layer 110 may include a first sub-base layer 111, a second sub-base layer 112, a third sub-base layer 113, and a fourth sub-base layer 114.

[0120] The first sub-base layer 111 and the fourth sub-base layer 114 may each comprise at least one of the following resins: polyimide-based resin, acrylate-based resin, methacrylate-based resin, polyisoprene-based resin, ethylene-based resin, epoxy-based resin, urethane-based resin, cellulose-based resin, siloxane-based resin, polyamide-based resin, and dinoflagellate-based resin. Furthermore, in this specification, "based on" resin can be considered to include the functional group of "~~". For example, the first sub-base layer 111 and the fourth sub-base layer 114 may each comprise polyimide.

[0121] The second sub-base layer 112 and the third sub-base layer 113 may each comprise an inorganic material. For example, the second sub-base layer 112 and the third sub-base layer 113 may each comprise at least one of silicon oxide, silicon nitride, silicon oxynitride, and amorphous silicon. For example, the second sub-base layer 112 may comprise silicon oxynitride, and the third sub-base layer 113 may comprise silicon oxide.

[0122] The barrier layer 120 may be located on the base layer 110. The barrier layer 120 may include multiple sub-barrier layers 121, 122, 123, 124 and 125, and a first lower light-blocking layer BML1. Figure 8A ) and the second lower light-blocking layer BML2 ( Figure 8B).

[0123] The first lower light blocking layer BML1 and the second lower light blocking layer BML2 can be referred to as the first lower layer and the second lower layer, the first lower metal layer and the second lower metal layer, the first lower electrode layer and the second lower electrode layer, the first lower shielding layer and the second lower shielding layer, the first light blocking layer and the second light blocking layer, the first metal layer and the second metal layer, the first electrode layer and the second electrode layer, the first shielding layer and the second shielding layer, or the first overlapping layer and the second overlapping layer.

[0124] The plurality of sub-barrier layers 121, 122, 123, 124, and 125 may include a first sub-barrier layer 121, a second sub-barrier layer 122, a third sub-barrier layer 123, a fourth sub-barrier layer 124, and a fifth sub-barrier layer 125, which are sequentially stacked in a direction away from the base layer 110. The first sub-barrier layer 121, the second sub-barrier layer 122, the third sub-barrier layer 123, the fourth sub-barrier layer 124, and the fifth sub-barrier layer 125 may each comprise an inorganic material. For example, the first sub-barrier layer 121, the second sub-barrier layer 122, the third sub-barrier layer 123, the fourth sub-barrier layer 124, and the fifth sub-barrier layer 125 may each comprise at least one of silicon oxide, silicon nitride, silicon oxynitride, and amorphous silicon. For example, the first sub-barrier layer 121 may include silicon oxynitride, the second sub-barrier layer 122 may include silicon oxide, the third sub-barrier layer 123 may include amorphous silicon, the fourth sub-barrier layer 124 may include silicon oxide, and the fifth sub-barrier layer 125 may include silicon oxide.

[0125] A first lower light-blocking layer BML1 may be located in a first region A1, and a second lower light-blocking layer BML2 may be located in a second region A2. The first lower light-blocking layer BML1 and the second lower light-blocking layer BML2 may be electrically insulated from each other, and different signals may be applied to the first lower light-blocking layer BML1 and the second lower light-blocking layer BML2 respectively. For example, a constant voltage having a voltage level (e.g., a predetermined voltage level) may be applied to the first lower light-blocking layer BML1, and a driving voltage provided to the second pixel circuit PDC2 may be provided to the second lower light-blocking layer BML2.

[0126] The first lower light-blocking layer BML1 and the second lower light-blocking layer BML2 can be located in the same layer and can comprise the same material. For example, the first lower light-blocking layer BML1 and the second lower light-blocking layer BML2 can be located between the fourth sub-blocking layer 124 and the fifth sub-blocking layer 125. The first lower light-blocking layer BML1 and the second lower light-blocking layer BML2 can be covered by the fifth sub-blocking layer 125. Because the fifth sub-blocking layer 125 has the largest thickness among the first sub-blocking layer 121, the second sub-blocking layer 122, the third sub-blocking layer 123, the fourth sub-blocking layer 124, and the fifth sub-blocking layer 125, the degree to which the transistor characteristics change due to the voltage supplied to the first lower light-blocking layer BML1 and the second lower light-blocking layer BML2 is reduced.

[0127] The first lower light-blocking layer BML1 may have or define a first opening BMop, which defines a transmission region TP. When an electrode opening CEop is formed in or defined by a common electrode CE, the first lower light-blocking layer BML1 may be a pattern used as a mask. For example, light irradiated from the rear surface of the base layer 110 toward the common electrode CE can pass through the first opening BMop of the first lower light-blocking layer BML1 and can reach a portion of each of the common electrode CE and the capping layer CPL. That is, a portion of the common electrode CE and the capping layer CPL can be removed by light passing through the first opening BMop of the first lower light-blocking layer BML1. The light may be a laser beam.

[0128] The region of the first region A1 that overlaps with the first opening BMop of the first lower light-blocking layer BML1 can be defined as the transmission region TP, and the remaining region of the first region A1 can be defined as the light-emitting region EP. The first pixel electrode AE1 can be located in the light-emitting region EP, and the first pixel electrode AE1 can be spaced apart from the transmission region TP.

[0129] The buffer layer BFL can be located on the barrier layer 120 (e.g., above the barrier layer 120). The buffer layer BFL can be provided for both the first region A1 and the second region A2. The buffer layer BFL can reduce or prevent the diffusion of metal atoms or foreign matter from the base layer 110 into the first semiconductor pattern. Furthermore, the buffer layer BFL can ensure that the first semiconductor pattern is formed substantially uniformly by controlling the rate at which heat is provided during the crystallization process used to form the first semiconductor pattern.

[0130] The buffer layer BFL may include multiple inorganic layers. For example, the buffer layer BFL may include a first sub-buffer layer comprising silicon nitride and a second sub-buffer layer comprising silicon oxide located on the first sub-buffer layer. The buffer layer BFL may at least partially not overlap with the transmission region TP. As another example, the buffer layer BFL may be spaced apart from the transmission region TP in a planar view. That is, an opening corresponding at least partially to the transmission region TP may be defined in the buffer layer BFL. Because the buffer layer BFL does not completely cover the transmission region TP, the transmittance of the transmission region TP can be further improved.

[0131] Circuit layer 130 may be located on buffer layer BFL, and component layer 140 may be located on circuit layer 130. Figure 8A A cross-sectional view of a portion of the light-emitting element ED1 (hereinafter, the first light-emitting element) and the first pixel circuit PDC1 located in the first region A1 is shown. Figure 8B A cross-sectional view of a portion of the light-emitting element ED2 (hereinafter, the second light-emitting element) and the second pixel circuit PDC2 located in the second region A2 is shown.

[0132] refer to Figure 8A The diagram shows the silicon thin-film transistor (S-TFT) and oxide thin-film transistor (O-TFT) of the first pixel circuit PDC1. (Reference) Figure 8B The diagram illustrates the silicon thin-film transistor (S-TFT) and oxide thin-film transistor (O-TFT) of the second pixel circuit PDC2. In the second region A2, the second lower photoblocking layer BML2 may overlap with some of the silicon-type transistors, but may not overlap with some of the other transistors. For example, the second lower photoblocking layer BML2 may overlap with a portion of the region where the second pixel circuit PDC2 is located, and the voltage supplied to the second lower photoblocking layer BML2 may be provided synchronously with the operation of the second pixel circuit PDC2.

[0133] The first semiconductor pattern may be located on the buffer layer BFL. The first semiconductor pattern may include a silicon semiconductor. For example, the silicon semiconductor may include amorphous silicon, polycrystalline silicon, etc. For example, the first semiconductor pattern may include low-temperature polycrystalline silicon.

[0134] Figure 8A and Figure 8BOnly a portion of the first semiconductor pattern located on the buffer layer BFL is shown, and the first semiconductor pattern may also be located in another region. The first semiconductor pattern may be arranged across multiple pixels PX (e.g., according to a specific or corresponding rule or arrangement pattern). Depending on whether it is doped, the first semiconductor pattern may have different electrical properties. The first semiconductor pattern may include a first region with high conductivity and a second region with low conductivity. The first region may be doped with N-type dopant or P-type dopant. A P-type transistor may include a doped region doped with P-type dopant, and an N-type transistor may include a doped region doped with N-type dopant. Compared to the first region, the second region may be an undoped region or a lightly doped region.

[0135] The conductivity of the first region can be greater than that of the second region, and the first region can essentially be used as an electrode or signal line. The second region can essentially correspond to the active region (or channel) of the transistor. In other words, a portion of the semiconductor pattern can be the active region of the transistor, another portion can be the source or drain of the transistor, and yet another portion can be a connecting electrode or a connecting signal line.

[0136] The source region SE1, active region AC1, and drain region DE1 of a silicon thin-film transistor (S-TFT) can be formed from a first semiconductor pattern. The source region SE1 and drain region DE1 can extend in opposite directions from the active region AC1 in a cross-section.

[0137] Figure 8B A portion of the connection signal line CSL formed by the first semiconductor pattern is shown.

[0138] Circuit layer 130 may include multiple inorganic layers and multiple organic layers. In one or more embodiments, the first insulating layer 10, the second insulating layer 20, the third insulating layer 30, the fourth insulating layer 40 and the fifth insulating layer 50, which are sequentially stacked on the buffer layer BFL, may be inorganic layers, and the sixth insulating layer 60, the seventh insulating layer 70 and the eighth insulating layer 80 may be organic layers.

[0139] The first insulating layer 10 may be located on (e.g., above) the buffer layer BFL. The first insulating layer 10 may cover the first semiconductor pattern. The first insulating layer 10 may be an inorganic layer and / or an organic layer, and may have a single-layer or multi-layer structure. The first insulating layer 10 may include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide. The first insulating layer 10 may be a single layer of silicon oxide. The insulating layers of the circuit layer 130, which will be described later, and the first insulating layer 10 may have a single-layer or multi-layer structure.

[0140] The gate electrode GT1 of the silicon thin-film transistor (S-TFT) is located on the first insulating layer 10. The gate electrode GT1 may be part of a metal pattern. The gate electrode GT1 overlaps with the active region AC1. The gate electrode GT1 may be used as a mask in the process of doping the first semiconductor pattern. The gate electrode GT1 may include, but is not particularly limited to, titanium, silver, silver-containing alloys, molybdenum, molybdenum-containing alloys, aluminum, aluminum-containing alloys, aluminum nitride, tungsten, tungsten nitride, copper, indium tin oxide, indium zinc oxide, etc.

[0141] The second insulating layer 20 may be located on the first insulating layer 10 and may cover the gate electrode GT1. The second insulating layer 20 may be an inorganic layer and may have a single-layer or multi-layer structure. The second insulating layer 20 may include at least one of silicon oxide, silicon nitride, and silicon oxynitride. The second insulating layer 20 may have a single-layer structure including a silicon nitride layer.

[0142] The third insulating layer 30 may be located on the second insulating layer 20. The third insulating layer 30 may be an inorganic layer and may have a single-layer or multi-layer structure. For example, the third insulating layer 30 may have a multi-layer structure including a silicon oxide layer and a silicon nitride layer. One electrode Csta of the first capacitor may be located between the second insulating layer 20 and the third insulating layer 30. Furthermore, the other electrode of the first capacitor (e.g., the gate electrode GT1) may be located between the first insulating layer 10 and the second insulating layer 20.

[0143] The second semiconductor pattern may be located on the third insulating layer 30. The second semiconductor pattern may include an oxide semiconductor. The oxide semiconductor may include multiple regions distinguished based on whether the metal oxide is reduced. Regions where the metal oxide is reduced (hereinafter, reduced regions) may have greater conductivity than regions where the metal oxide is not reduced (hereinafter, non-reduced regions). The reduced regions essentially serve as the source / drain of a transistor or signal lines. The non-reduced regions essentially correspond to the active region (or semiconductor region, channel) of a transistor. In other words, a portion of the second semiconductor pattern may be the active region of a transistor, another portion may be the source / drain region of a transistor, and yet another portion may be a signal transmission region.

[0144] The source region SE2, active region AC2, and drain region DE2 of an oxide thin-film transistor (O-TFT) can be formed from a second semiconductor pattern. The source region SE2 and drain region DE2 can extend in opposite directions from the active region AC2 in a cross-section.

[0145] The oxide thin-film transistor (O-TFT) located in the first region A1 can overlap with the first lower light-blocking layer BML1. Therefore, light incident from the lower part of the display panel DP can be blocked by the first lower light-blocking layer BML1 and can not be provided to the active region AC2 of the oxide thin-film transistor (O-TFT).

[0146] The oxide thin-film transistor O-TFT located in the second region A2 may not overlap with the second lower light-blocking layer BML2. Therefore, a layer can be added to block the lower portion of the oxide thin-film transistor O-TFT from light. For example, a third lower light-blocking layer BML3 can be positioned below the oxide thin-film transistor O-TFT located in the second region A2. The third lower light-blocking layer BML3 can be located between the second insulating layer 20 and the third insulating layer 30. The third lower light-blocking layer BML3 can be made of the same material as one electrode Csta of the first capacitor and can be formed by the same process.

[0147] The fourth insulating layer 40 may be located on the third insulating layer 30. The fourth insulating layer 40 may cover the second semiconductor pattern. The fourth insulating layer 40 may be an inorganic layer and may have a single-layer or multi-layer structure. The fourth insulating layer 40 may include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide. The fourth insulating layer 40 may have a single-layer structure comprising silicon oxide.

[0148] The gate electrode GT2 of the oxide thin-film transistor (O-TFT) is located on the fourth insulating layer 40. The gate electrode GT2 can be part of a metal pattern. The gate electrode GT2 overlaps with the active region AC2. The gate electrode GT2 can be used as a mask in the process of restoring the second semiconductor pattern.

[0149] The fifth insulating layer 50 may be located on the fourth insulating layer 40 and may cover the gate electrode GT2. The fifth insulating layer 50 may be an inorganic layer and / or an organic layer, and may have a single-layer or multi-layer structure. For example, the fifth insulating layer 50 may have a multi-layer structure including a silicon oxide layer and a silicon nitride layer.

[0150] First connecting electrode CNE10 (see...) Figure 8B The first connecting electrode CNE10 can be located on the fifth insulating layer 50. The first connecting electrode CNE10 can be connected to the connecting signal line CSL through the first contact hole CH1 passing through the first insulating layer 10, the second insulating layer 20, the third insulating layer 30, the fourth insulating layer 40 and the fifth insulating layer 50.

[0151] Second opening ILop (see Figure 8AThe second opening ILop can be defined in the buffer layer BFL and at least some of the multiple insulating layers 10, 20, 30, 40, 50, 60, 70, and 80 included in the circuit layer 130. For example, the second opening ILop can be defined in the buffer layer BFL and the first insulating layer 10, the second insulating layer 20, the third insulating layer 30, the fourth insulating layer 40, and the fifth insulating layer 50. The second opening ILop can be defined in the region overlapping with the transmission region TP. That is, because the portions of the buffer layer BFL and each of the first insulating layer 10, the second insulating layer 20, the third insulating layer 30, the fourth insulating layer 40, and the fifth insulating layer 50 that overlap with the transmission region TP are at least partially removed, the transmittance of the transmission region TP can be improved.

[0152] The minimum width of the second opening ILop can be less than the minimum width of the first opening BMop. The sidewalls of the second opening ILop, defined by the buffer layer BFL and the first insulating layer 10, second insulating layer 20, third insulating layer 30, fourth insulating layer 40 and fifth insulating layer 50, can protrude further toward the transmission region TP than the sidewalls of the first lower light blocking layer BML1.

[0153] A sixth insulating layer 60 may be located on the fifth insulating layer 50. The sixth insulating layer 60 may include an organic material, and may include a polyimide-based resin. For example, the sixth insulating layer 60 may include a photosensitive polyimide. The second connecting electrode CNE20 (see...) Figure 8B The first electrode CNE10 can be located on the sixth insulating layer 60. The second connecting electrode CNE20 can be connected to the first connecting electrode CNE10 through the second contact hole CH2 that penetrates the sixth insulating layer 60.

[0154] A sixth insulating layer 60 may be located in both the light-emitting region EP and the transmission region TP. The sixth insulating layer 60 may be referred to as a common organic layer. The sixth insulating layer 60 may fill the portion defining the second opening ILop. That is, the sixth insulating layer 60 may overlap with the transmission region TP. The sixth insulating layer 60 may be disposed in the transmission region TP, thereby reducing the step portion on the upper surface of the sixth insulating layer 60. When the step portion of the layer overlapping the transmission region TP is reduced, the diffraction of light incident on the transmission region TP can be mitigated (or reduced). Therefore, image distortion due to diffraction is reduced, and thus the image quality from the camera module CMM (see [link to CMM]) can be improved. Figure 4 The quality of the obtained image.

[0155] The seventh insulating layer 70 may be located on the sixth insulating layer 60 and may cover the second connecting electrode CNE20. The eighth insulating layer 80 may be located on the seventh insulating layer 70.

[0156] The sixth insulating layer 60, the seventh insulating layer 70, and the eighth insulating layer 80 may each be an organic layer. In this specification, the sixth insulating layer 60 may be referred to as the first organic insulating layer, the seventh insulating layer 70 as the second organic insulating layer, and the eighth insulating layer 80 as the third organic insulating layer. For example, the sixth insulating layer 60, the seventh insulating layer 70, and the eighth insulating layer 80 may each comprise a general polymer (such as benzocyclobutene (BCB), polyimide, hexamethyldisiloxane (HMDSO), polymethyl methacrylate (PMMA), or polystyrene (PS)), polymer derivatives having phenol-based groups, acrylate-based polymers, imide-based polymers, aryl ether-based polymers, amide-based polymers, fluorine-based polymers, p-xylene-based polymers, vinyl alcohol-based polymers, blends thereof, etc.

[0157] refer to Figures 8A to 8C The element layer 140, including light-emitting elements ED1 and ED2, first pixel defining film PDL1 and second pixel defining film PDL2, can be located on the circuit layer 130.

[0158] The first light-emitting element ED1 can be located in the first region A1 ( Figure 8A The second light-emitting element ED2 can be located in the second region A2. Figure 8B The first light-emitting element ED1 may include a first pixel electrode AE1, a first functional layer HFL, a first light-emitting layer EL1, a second functional layer EFL, and a common electrode CE (or cathode). The second light-emitting element ED2 may include a second pixel electrode AE2, a first functional layer HFL, a second light-emitting layer EL2, a second functional layer EFL, and a common electrode CE (or cathode). The first functional layer HFL, the second functional layer EFL, and the common electrode CE may be commonly disposed on the first light-emitting element ED1 and the second light-emitting element ED2, and may also be commonly disposed on other pixels PX.

[0159] The first pixel electrode AE1 and the second pixel electrode AE2 can be located on the eighth insulating layer 80. The first pixel electrode AE1 can be connected (or electrically connected) to the first pixel circuit PDC1. The second pixel electrode AE2 can be connected to the second pixel circuit PDC2. For example, the second pixel electrode AE2 can be connected to the second connection electrode CNE20 through the third contact hole CH3 penetrating the seventh insulating layer 70 and the eighth insulating layer 80.

[0160] Simultaneously, the first pixel circuit PDC1 can also be located in the second region A2. Optionally, the first pixel circuit PDC1 can also be shared with any of the second pixel circuits PDC2. Here, the first light-emitting element ED1 can be a replica of any of the second light-emitting elements ED2. In this case, as... Figure 8CAs shown, because the first pixel circuit PDC1 may not be located below the first light-emitting element ED1, the light transmittance of the first region A1 can be improved. However, this is only an example, and the connection between the first light-emitting element ED1 and the first pixel circuit PDC1 can be formed differently, and is not limited to any one implementation.

[0161] The first pixel electrode AE1 and the second pixel electrode AE2 can each be a (semi-)transmissive electrode or a reflective electrode. In one or more embodiments, the first pixel electrode AE1 and the second pixel electrode AE2 can each include a reflective layer formed of silver, magnesium, aluminum, platinum, palladium, gold, nickel, neodymium, iridium, chromium, or their compounds, and a transparent or semi-transparent electrode layer formed on the reflective layer. The transparent or semi-transparent electrode layer can include at least one selected from the group consisting of indium tin oxide, indium zinc oxide, indium gallium zinc oxide, zinc oxide, indium oxide, and aluminum-doped zinc oxide. For example, the first pixel electrode AE1 and the second pixel electrode AE2 can each include a multilayer structure in which silver indium tin oxide, silver, and indium tin oxide are sequentially stacked.

[0162] Pixel defining films (e.g., first pixel defining film PDL1 and / or second pixel defining film PDL2) may be located on the eighth insulating layer 80. The pixel defining films may have light-absorbing properties. For example, the pixel defining films may be black and may include a black colorant. The black colorant may include black dyes and black pigments. The black colorant may include carbon black, metals such as chromium, or oxides thereof.

[0163] The pixel defining film may include a first pixel defining film PDL1 and a second pixel defining film PDL2. The first pixel defining film PDL1 may be located in a first region A1. The first region A1 may include a transmissive region TP and a light-emitting region EP, and the first pixel defining film PDL1 may not overlap with the transmissive region TP and may overlap with the light-emitting region EP. The light-emitting region EP may be the region in which a first light-emitting element ED1 is positioned. A first pixel defining opening PDLop1, exposing at least a portion of the first pixel electrode AE1, may be defined in the first pixel defining film PDL1.

[0164] In one or more embodiments of this disclosure, a plurality of first pixel defining films (PDL1) may be provided. The plurality of first pixel defining films (PDL1) may be arranged spaced apart from each other in a first region A1. The first pixel defining films (PDL1) may be located in corresponding light-emitting units (EDUs). However, this is merely an example, and one or more embodiments of this disclosure are not limited thereto. For example, the first pixel defining films (PDL1) may also have an interconnection structure within the first region A1, similar to the separating layer 310.

[0165] This may include a first pixel-defining opening PDLop1 that exposes at least a portion of a first pixel electrode AE1, a second pixel-defining opening PDLop2 that exposes at least a portion of a second pixel electrode AE2, and a transmission-defining opening (e.g., a first opening BMop) that defines a transmission region TP. The light-emitting region EP of the first region A1 may be defined by the first pixel-defining opening PDLop1 defined in the first pixel-defining film PDL1, and the light-emitting region PXA of the second region A2 may be defined by the second pixel-defining opening PDLop2. For example, the light-emitting region PXA may be defined for the second light-emitting element ED2.

[0166] The second pixel defining film PDL2 may cover a portion of the second region A2 and the first region A1. For example, a second pixel defining opening PDLop2 may be defined in the second pixel defining film PDL2 in a one-to-one correspondence with the first pixel PXR, the second pixel PXG, and the third pixel PXB. The second pixel defining film PDL2 is shown to have a shape spaced apart from the first pixel defining film PDL1, but this is shown as an example. The pixel defining films (e.g., the first pixel defining film PDL1 and the second pixel defining film PDL2) may be configured as a single, integral shape, wherein the second pixel defining film PDL2 and the first pixel defining film PDL1 are connected, and this is not limited to any particular embodiment.

[0167] Spacer HSPC (see Figure 8B The second pixel defining film (PDL2) can be located on the second pixel defining film (PDL2). The spacer HSPC can cover a portion of the second region A2 and a portion of the first region A1 in the same manner as the second pixel defining film (PDL2). The protruding spacer SPC can be located in the second region A2. The protruding spacer SPC can be located on the spacer HSPC. The protruding spacer SPC can have a circular shape in a plane, but is not limited thereto.

[0168] The height (or thickness) of the protruding spacer SPC can be greater than the height (or thickness) of the spacer HSPC. The height of the spacer HSPC can be approximately 0.1. m to approximately 0.5 The height of the spacer HSPC and the protruding spacer SPC can be approximately 1.1 m. m to approximately 2.0 m. However, the height of the spacer HSPC and the total height of the spacer HSPC and the protruding spacer SPC are not limited to the examples described above.

[0169] The spacer HSPC and the protruding spacer SPC can have an integral shape and can be formed from the same material. For example, the spacer HSPC and the protruding spacer SPC can be formed using the same process with a halftone mask. However, this is merely an example, and the present disclosure is not limited thereto. For example, the spacer HSPC and the protruding spacer SPC can also comprise different materials and can also be formed using separate processes. Furthermore, this is shown as an example, and according to one or more embodiments of the present disclosure, at least one of the spacer HSPC and the protruding spacer SPC can be omitted in the display panel DP.

[0170] The first functional layer HFL may be located on a pixel electrode (e.g., a first pixel electrode AE1 and / or a second pixel electrode AE2), a pixel defining film (e.g., a first pixel defining film PDL1 and / or a second pixel defining film PDL2), a spacer HSPC, and a protruding spacer SPC. The first functional layer HFL may include a hole transport layer (HTL), may include a hole injection layer (HIL), or may include both a hole transport layer and a hole injection layer.

[0171] The light-emitting layers EL1 and EL2 may be located on the first functional layer HFL. The first light-emitting layer EL1 may be located in the region corresponding to the first pixel-defining opening PDLop1 of the first pixel-defining film PDL1, and the second light-emitting layer EL2 may be located in the region corresponding to the second pixel-defining opening PDLop2 of the second pixel-defining film PDL2. The light-emitting layers EL1 and EL2 may comprise organic materials, inorganic materials, or organic-inorganic materials that emit light of a color (e.g., a predetermined color). The first light-emitting layer EL1 may be located in the first region A1, and the second light-emitting layer EL2 may be located in the second region A2.

[0172] The second functional layer EFL can be located on the first functional layer HFL and can cover the light-emitting layers EL1 and EL2. The second functional layer EFL may include an electron transport layer (ETL), an electron injection layer (EIL), or both an electron transport layer and an electron injection layer. The second functional layer EFL can be located in either the first region A1 or the second region A2.

[0173] The common electrode CE may be located on the second functional layer EFL. The common electrode CE may be located in the first region A1 and the second region A2. In one or more embodiments of this disclosure, the first pixel defining film PDL1 may be located between the first pixel electrode AE1 and the common electrode CE. The electrode opening CEop, which overlaps with the first opening BMop, may be defined at least within the common electrode CE. As an example, the electrode opening CEop may be commonly defined by the first functional layer HFL, the second functional layer EFL, and the common electrode CE. The minimum width of the electrode opening CEop may be greater than the minimum width of the first opening BMop of the first lower light-blocking layer BML1.

[0174] The element layer 140 may also include a capping layer CPL located on the common electrode CE. Based on the concept of constructive interference, the capping layer CPL can be used to improve luminous efficiency. The capping layer CPL may comprise a material having a refractive index of about 1.6 or greater relative to light having a wavelength of, for example, about 589 nm. The capping layer CPL may be an organic capping layer containing organic materials, an inorganic capping layer containing inorganic materials, or a composite capping layer containing both organic and inorganic materials. For example, the capping layer may comprise carbocyclic compounds, heterocyclic compounds, compounds containing amino groups, porphyrin derivatives, phthalocyanine derivatives, naphthylphthalocyanine derivatives, alkali metal complexes, alkaline earth metal complexes, or any combination thereof. Carbocyclic compounds, heterocyclic compounds, and compounds containing amino groups may be selectively substituted with substituents including O, N, S, Se, Si, F, Cl, Br, I, or any combination thereof.

[0175] The portion of the capping layer CPL that overlaps with the electrode opening CEop of the common electrode CE can be removed. A portion of the capping layer CPL, including the portion overlapping with the transmission region TP, and the portion of the common electrode CE that overlaps with the transmission region TP, can be removed, thus further improving the transmittance of the transmission region TP.

[0176] The encapsulation layer 150 may be located on the component layer 140. The encapsulation layer 150 may include a first inorganic encapsulation layer 151, an organic encapsulation layer 152 and a second inorganic encapsulation layer 153 stacked in sequence, but the layers constituting the encapsulation layer 150 are not limited to these.

[0177] The first inorganic encapsulation layer 151 and the second inorganic encapsulation layer 153 can protect the component layer 140 from moisture and oxygen, and the organic encapsulation layer 152 can protect the component layer 140 from foreign matter such as dust particles. The first inorganic encapsulation layer 151 and the second inorganic encapsulation layer 153 may include a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, an aluminum oxide layer, etc. The organic encapsulation layer 152 may include an acrylate-based organic layer, but is not limited thereto.

[0178] In one or more embodiments of this disclosure, the maximum thickness of the portion of the organic encapsulation layer 152 that overlaps with the first region A1 may be greater than the maximum thickness of the portion of the organic encapsulation layer 152 that overlaps with the second region A2.

[0179] The sensor layer 200 may be located on the display layer 100. The sensor layer 200 may be referred to as a sensor, an input sensing layer, or an input sensing panel. The sensor layer 200 may include a sensor base layer 210, a first sensor conductive layer 220, an intermediate insulating layer 230, a second sensor conductive layer 240, and a cover layer 250.

[0180] The sensor base layer 210 can be directly located on the display layer 100. The sensor base layer 210 can be an inorganic layer comprising at least any one of silicon nitride, silicon oxynitride, and silicon oxide. Optionally, the sensor base layer 210 can be an organic layer comprising epoxy resin, acrylic resin, or an imide-based resin. The sensor base layer 210 can have a single-layer structure or a multilayer structure stacked along the third direction DR3.

[0181] The first sensor conductive layer 220 and the second sensor conductive layer 240 may each have a single-layer structure or a multi-layer structure stacked along the third direction DR3.

[0182] The conductive layer in a single-layer structure may include a metal layer or a transparent conductive layer. The metal layer may include molybdenum, silver, titanium, copper, aluminum, or alloys thereof. The transparent conductive layer may include transparent conductive oxides, such as indium tin oxide, indium zinc oxide, zinc oxide, or indium zinc tin oxide. Furthermore, the transparent conductive layer may include conductive polymers (such as PEDOT), metal nanowires, graphene, etc.

[0183] The conductive layer in a multilayer structure may include a metal layer. The metal layer may have a three-layer structure, such as titanium / aluminum / titanium. The conductive layer in a multilayer structure may include at least one metal layer and at least one transparent conductive layer.

[0184] The intermediate insulating layer 230 may be located between the first sensor conductive layer 220 and the second sensor conductive layer 240. The intermediate insulating layer 230 may include an inorganic film. The inorganic film may include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide.

[0185] Optionally, the intermediate insulating layer 230 may include an organic film. The organic film may include at least one of acrylate-based resins, methacrylate-based resins, polyisoprene-based resins, vinyl-based resins, epoxy-based resins, urethane-based resins, cellulose-based resins, siloxane-based resins, polyimide-based resins, polyamide-based resins, and dinoflagellated resins.

[0186] The capping layer 250 may be located on the intermediate insulating layer 230 and may cover the second sensor conductive layer 240. The second sensor conductive layer 240 may include a conductive pattern. The capping layer 250 may cover the conductive pattern to reduce or eliminate the possibility of damage to the conductive pattern during subsequent processes.

[0187] The capping layer 250 may include inorganic materials. For example, the capping layer 250 may include silicon nitride, but is not particularly limited thereto.

[0188] The anti-reflective layer 300 may be located on the sensor layer 200. The anti-reflective layer 300 may include a separating layer 310, a plurality of color filters 320, and a planarization layer 330. The separating layer 310 and the color filters 320 are not located in the transmission region TP of the first region A1.

[0189] In one or more embodiments of this disclosure, the separator layer 310 may be omitted. In this case, the function of the separator layer 310 may be replaced by the color filter 320. The cover layer 250 may be located between the separator layer 310 and the second sensor conductive layer 240. The separator layer 310 may reduce or prevent external light reflection caused by the second sensor conductive layer 240. The material constituting the separator layer 310 is not particularly limited, as long as the material absorbs light. The separator layer 310 may be a black layer, and in one or more embodiments, the separator layer 310 may include a black colorant. The black colorant may include black dyes and black pigments. The black colorant may include carbon black, metals such as chromium, or oxides thereof.

[0190] 310op of partition opening ( Figure 8B ) and transmission opening 310opt ( Figure 8A The light-emitting element ED1 or the second light-emitting element ED2 can be defined in the separation layer 310. The separation opening 310op can overlap with the first light-emitting element ED1 or the second light-emitting element ED2, and can overlap with the first pixel electrode AE1 or the second pixel electrode AE2.

[0191] The transmission opening 310opt of the separator layer 310 may overlap with the first opening BMop of the first lower light-blocking layer BML1. Furthermore, the transmission opening 310opt may not overlap with the first pixel electrode AE1 (e.g., it may be spaced apart from the first pixel electrode AE1 in a plan view). One end of the separator layer 310 in the region adjacent to the transmission region TP may protrude further toward the transmission region TP than one end of the first pixel defining film PDL1 and one end of the common electrode CE. The minimum width of the transmission opening 310opt of the separator layer 310 may be substantially the same as the minimum width of the first opening BMop of the first lower light-blocking layer BML1. That is, one end of the separator layer 310 in the region adjacent to the transmission region TP may be substantially aligned with one end of the first lower light-blocking layer BML1. Furthermore, in this specification, the phrases "substantially aligned" or "substantially the same" regarding the width of the components include not only cases where the components are completely aligned or have physically identical dimensions such as width, but also cases where the components are identical within tolerance ranges that occur during the manufacturing process, despite having the same design.

[0192] Color filter 320 can be positioned to overlap with the partition opening 310op. Color filter 320 can transmit light provided from the light-emitting layers EL1 and EL2 that overlap with color filter 320. Color filter 320 may include a transmission color filter 320t (hereinafter, a first transmission color filter 320Rt, a second transmission color filter 320Gt, and a third transmission color filter 320Bt) located in a first region A1, and a first color filter 320R, a second color filter 320G, and a third color filter 320B located in a second region A2. Color filter 320 is shown to include a color filter with three different colors, but the number of colors constituting color filter 320 can vary and is not limited to any one embodiment.

[0193] The first color filter 320R, the second color filter 320G, and the third color filter 320B can respectively filter incident light into a first color to a third color. The first color filter 320R, the second color filter 320G, and the third color filter 320B can include pigments or dyes having the first color to the third color. For example, the first color can be red, the second color can be green, and the third color can be blue, but one or more embodiments are not limited thereto. The first transmission color filter 320Rt, the second transmission color filter 320Gt, and the third transmission color filter 320Bt can each include pigments or dyes having colors corresponding to those of the first color filter 320R, the second color filter 320G, and the third color filter 320B.

[0194] The first transmission color filter 320Rt, the second transmission color filter 320Gt, and the third transmission color filter 320Bt can overlap with the corresponding first light-emitting element ED1 and with the first pixel-defined opening PDLop1 to have corresponding shapes. Furthermore, the first color filter 320R, the second color filter 320G, and the third color filter 320B can overlap with the corresponding second light-emitting element ED2 and have shapes corresponding to the second pixel-defined opening PDLop2. Therefore, the first color filter 320R, the second color filter 320G, and the third color filter 320B, as well as the first transmission color filter 320Rt, the second transmission color filter 320Gt, and the third transmission color filter 320Bt, can have different shapes on a plane relative to their corresponding colors. The first color filter 320R, the second color filter 320G, and the third color filter 320B may each have a circular shape in the plan view, and the first transmission color filter 320Rt, the second transmission color filter 320Gt, and the third transmission color filter 320Bt may each have a quadrilateral shape in the plan view (for example, see...). Figure 7 On a plane, the area of ​​each of the first transmission color filter 320Rt, the second transmission color filter 320Gt, and the third transmission color filter 320Bt can be smaller than the area of ​​the transmission region TP. Furthermore, the first transmission color filter 320Rt, the second transmission color filter 320Gt, and the third transmission color filter 320Bt can have a larger area on the plane relative to the corresponding color than the first color filter 320R, the second color filter 320G, and the third color filter 320B. However, this is shown as an example, and the shapes of the first color filter 320R, the second color filter 320G, and the third color filter 320B, as well as the first transmission color filter 320Rt, the second transmission color filter 320Gt, and the third transmission color filter 320Bt, can be formed into various shapes and sizes according to the corresponding light-emitting element. The above configuration is not limited to any one embodiment.

[0195] Planarization layer 330 may cover separator layer 310 and color filter 320. Planarization layer 330 may include organic material and provide a flat surface on its upper surface. In one or more embodiments, planarization layer 330 may be omitted.

[0196] The display panel DP according to one or more embodiments of this disclosure may include an enhanced pattern DMP (e.g., see...). Figure 8A and Figure 8C The reinforcing pattern DMP can be located on the separator layer 310 and can be covered by the planarization layer 330. The reinforcing pattern DMP can have a different shape on the plane than the separator layer 310. The reinforcing pattern DMP can have a closed loop shape on the plane, surrounding the edge of any one of the transmission color filters 320Rt, 320Gt and 320Bt located in the first region A1.

[0197] The reinforcing patterns DMP can be arranged in multiple spaced apart from each other. Each reinforcing pattern DMP can surround the second transmission filter 320Gt on a plane. Because the second transmission filter 320Gt has a quadrilateral shape, the reinforcing pattern DMP can be formed in a quadrilateral ring shape on the plane. However, this is shown as an example, and the shape of the reinforcing pattern DMP can vary depending on the shape of the transmission filter around which the reinforcing pattern surrounds, and is not limited to any one embodiment.

[0198] refer to Figure 8C The enhanced pattern DMP can be located in the first region A1, and may not be located in the second region A2 or may be omitted from the second region A2. Figure 8C The diagram shows a second color filter 320G in the second region A2 and a second transmission color filter 320Gt in the first region A1; these are corresponding color filters. The upper surface of the second transmission color filter 320Gt may have a different shape than the upper surface of the second color filter 320G. For example, the upper surface of the second color filter 320G may be relatively flat, and the upper surface of the second transmission color filter 320Gt may be relatively concave. Because the transmission opening 310opt exists in the first region A1, the area occupied by the separator layer 310 in the first region A1 may be relatively smaller than the area occupied by the separator layer 310 in the second region A2, making it potentially difficult to ensure sufficient thickness of the transmission color filter 320t. Therefore, the upper surface of the second transmission color filter 320Gt located in the first region A1 may be formed to be relatively concave.

[0199] However, the thickness TK1g of the second transmission color filter 320Gt can be the same as, or substantially equal to, the thickness TK2g of the second color filter 320G. According to this disclosure, the separator layer 310 and the reinforcing pattern DMP can be used as a partition wall for accommodating the second transmission color filter 320Gt. Compared to the second region A2, the first region A1 can accommodate the separator layer 310 at a relatively low density. Due to the reinforcing pattern DMP located in the first region A1, the thickness TK1g of the second transmission color filter 320Gt can be more appropriately ensured. Therefore, even when the second transmission color filter 320Gt has a relatively concave upper surface, the thickness TK1g can be formed to be equal to the thickness TK2g of the second color filter 320G because the height of the partition wall is increased by the separator layer 310 and the reinforcing pattern DMP. Therefore, the color filter can be formed to have a substantially uniform thickness relative to the corresponding color in the first region A1 and the second region A2, and thus can uniformly present the brightness and hue of the image.

[0200] Simultaneously, the reinforcing pattern DMP can be colored. That is, the reinforcing pattern DMP can include pigments or dyes. The reinforcing pattern DMP can have the same color as any of the transmission color filters 320Rt, 320Gt, and 320Bt, and can be formed from the same material as the color filter. The reinforcing pattern DMP can be red and can be formed from the same material as the first transmission color filter 320Rt. According to one or more embodiments of this disclosure, due to the reinforcing pattern DMP, a display panel DP in which the area of ​​the red color filter is significantly increased within the first region A1 can be provided. Therefore, the anti-reflective layer 300 can filter the image displayed in the display layer 100 to be more reddish. According to this disclosure, because of the further inclusion of the reinforcing pattern DMP, bluish images can be presented with a uniform hue. Therefore, the display panel DP can adjust the hue of the image displayed in the first region A1 by the arrangement and color design of the reinforcing pattern DMP, and can unify display characteristics by improving the color deviation with the second region A2. Furthermore, according to this disclosure, variations in color coordinates or forward contrast brightness in a white pattern based on angle, such as view position shift (VACS), can be improved, thereby providing improved display characteristics for the display panel DP.

[0201] Figure 9A This is a plan view showing a portion of a display panel according to one or more embodiments of the present disclosure. Figure 9B It is schematically shown along Figure 9A The line II-II' intercepted Figure 9A A sectional view of a portion of the area. For ease of explanation, Figure 9A and Figure 9B Only the first area A1 is shown (see Figure 7 The anti-reflective layer 300 in ) (see Figure 8A Some of the components. See below for reference. Figure 9A and Figure 9B This disclosure is described. Also, references... Figures 1 to 8C Components that are described in the same way will be represented by the same reference numerals or symbols, and repeated descriptions of them will be omitted.

[0202] like Figure 9AAs shown, transmission color filters 320Rt, 320Gt, and 320Bt can be arranged along a diagonal direction. For example, the first transmission color filter 320Rt and the second transmission color filter 320Gt can be arranged alternately along a right-hand diagonal direction (e.g., the first diagonal direction) intersecting the first direction DR1 and the second direction DR2. The second transmission color filter 320Gt and the third transmission color filter 320Bt can be arranged alternately along a left-hand diagonal direction (e.g., the second diagonal direction) intersecting the opposite direction to the first direction DR1 and the second direction DR2. The transmission region TP and the second transmission color filter 320Gt can be arranged alternately along a right-hand diagonal direction or a left-hand diagonal direction. Furthermore, the transmission region TP and the second transmission color filter 320Gt can be arranged alternately along the first direction DR1 or the second direction DR2.

[0203] Here, multiple reinforcement pattern DMPs can be set, and each of the reinforcement pattern DMPs can surround the second transmission color filter 320Gt on a plane. Figure 9A In the pixel arrangement shown, the first transmission color filter 320Rt can be located between the reinforcement patterns DMP arranged along the right diagonal direction, and the third transmission color filter 320Bt can be located between the reinforcement patterns DMP arranged along the left diagonal direction.

[0204] The second transmission filter 320Gt, located among the transmission filters 320t in the first region A1, may have a different thickness (e.g., thickness TK1g) than the other transmission filters 320Rt and 320Bt. The other transmission filters 320Rt and 320Bt may be filters located among the transmission filters 320t in the first region A1 that are not surrounded by the reinforcing pattern DMP. Figure 9B A cross-sectional view of the second transmission color filter 320Gt and the third transmission color filter 320Bt, which are adjacent to each other, is shown. The lower layer BLL (which is the layer on which the anti-reflective layer 300 is positioned) can correspond to the aforementioned sensor layer 200 (see Figure 8A (but not limited to this).

[0205] The thickness TK1g of the second transmission color filter 320Gt can be greater than the thickness TK1b of the third transmission color filter 320Bt. The thickness TK1g of the second transmission color filter 320Gt can also be greater than the thicknesses of the other transmission color filters 320Rt and 320Bt. The thickness TK1g of the second transmission color filter 320Gt can be controlled by the separator layer 310 and the reinforcing pattern DMP. Because the separator layer 310 and the reinforcing pattern DMP are stacked to serve as a partition wall for accommodating the second transmission color filter 320Gt, the thickness TK1g of the second transmission color filter 320Gt can be formed to be greater than the thickness of the separator layer 310.

[0206] The first width WD1 can correspond to the width of the reinforcing pattern DMP. The first width WD1 can be a major factor controlling the area occupied by the reinforcing pattern DMP on the plane. The first width WD1 can be approximately 6... m or larger. When the first width WD1 is too small, it may be difficult to ensure the supporting force as an isolation wall for accommodating the second transmission color filter 320Gt. When the first width WD1 is too large, it may be difficult to achieve tonal uniformity of the image in the first region A1, and the transmittance of the first region A1 may be reduced.

[0207] The second width WD2 can be the spacing between the inner side of the reinforcing pattern DMP and the inner side of the separator layer 310. Each of the inner side of the reinforcing pattern DMP and the inner side of the separator layer 310 can be the side that contacts the second transmission color filter 320Gt. The second width WD2 can be approximately 1... m or larger. When the second width WD2 is too small, the reinforcing pattern DMP may be located on the conical surface of the separator layer 310, which may reduce the effect of the significant increase in the height of the separator wall due to the formation of the reinforcing pattern DMP.

[0208] The third width WD3 can be the spacing between the outer side of the reinforcing pattern DMP and the outer side of the separator layer 310. The outer side of the reinforcing pattern DMP can be opposite to the inner side of the reinforcing pattern DMP. The outer side of the separator layer 310 can be the side that forms or defines the transmission opening 310opt (which defines the transmission region TP). The third width WD3 can be approximately 2 m or larger. When the third width WD3 is too small, the reinforcing pattern DMP may be located on the conical surface of the separator layer 310, or the reinforcing pattern DMP may flow downwards to the outside of the separator layer 310 when it is formed. Therefore, it can be ensured that the third width WD3 is sufficiently spaced so that the reinforcing pattern DMP is formed stably without intruding into the transmission region TP.

[0209] Meanwhile, the thickness of the reinforcing pattern DMP (e.g., the thickness in the thickness direction or on the third-direction DR3) can be about 1 μm or greater. According to this disclosure, the thickness TK1g of the second transmission color filter 320Gt can be controlled by the thickness of the reinforcing pattern DMP. Therefore, the reinforcing pattern DMP can ensure sufficient thickness so that the thickness TK1g of the second transmission color filter 320Gt reaches the desired design value, and by controlling the thickness of the reinforcing pattern DMP, the design of the thickness TK1g of the second transmission color filter 320Gt can be appropriately realized.

[0210] The thickness TK1b of the third transmission filter 320Bt can be less than the thickness TK1g of the second transmission filter 320Gt. The third transmission filter 320Bt can be formed with a large thickness by a reinforcing pattern DMP on the side adjacent to the second transmission filter 320Gt, but can be formed with a small thickness by a separator layer 310 in other areas. Therefore, the upper surface of the third transmission filter 320Bt (similarly, the upper surface of the first transmission filter 320Rt) can have a different shape than the upper surface of the second transmission filter 320Gt. Because the upper surface of the third transmission filter 320Bt is formed to be recessed, the actual thickness TK1b of the third transmission filter 320Bt can be less than the thickness TK1g of the second transmission filter 320Gt, and can also be less than the thickness of the separator layer 310.

[0211] According to this disclosure, the enhanced pattern DMP can have a shape that surrounds only the corresponding color filter 320Gt located within the transmission color filter 320t in the first region A1. Therefore, the second transmission color filter 320Gt can have a different thickness than the other transmission color filters 320Rt and 320Bt. According to this disclosure, the hue of the image displayed in the first region A1 can be controlled by selectively controlling the thickness of the transmission color filters 320t to make them different.

[0212] Simultaneously, the reinforcing pattern DMP can be formed to have the same color as the first transmission color filter 320Rt. The first transmission color filter 320Rt can be red. Therefore, the reinforcing pattern DMP can be red and can also be formed from the same material as the first transmission color filter 320Rt.

[0213] According to this disclosure, because an enhancement pattern DMP is further included, the area occupied by the red pattern can be increased within the first region A1. Therefore, the image displayed in the first region A1 may appear relatively reddish compared to the image displayed in the display layer 100. The display panel according to this disclosure can adjust the image's hue by selecting different colors of the enhancement pattern DMP. Therefore, a display panel capable of displaying an image with a uniform hue relative to the first region A1 and the second region A2 can be provided.

[0214] Figure 10A This is a plan view showing a portion of a display panel according to one or more embodiments of the present disclosure. Figure 10B It is schematically shown along Figure 10A The line III-III' intercepted Figure 10A A sectional view of a portion of the area. Figure 10A and Figure 10B Showing respectively with Figure 9A and Figure 9B The region corresponding to that region. See below for reference. Figure 10A and Figure 10B This disclosure is described. Also, references... Figures 1 to 9B Components that are described in the same way will be represented by the same reference numerals or symbols, and repeated descriptions of them will be omitted.

[0215] like Figure 10A and Figure 10B As shown, multiple reinforcing patterns DMP-1 can be configured, and each of the reinforcing patterns DMP-1 can surround the second transmission color filter 320Gt on a plane. Here, the reinforcing pattern DMP-1 can be formed to have the same color as the third transmission color filter 320Bt. The third transmission color filter 320Bt can be blue. Therefore, the reinforcing pattern DMP-1 can be blue and can also be formed from the same material as the third transmission color filter 320Bt.

[0216] According to this disclosure, because an enhancement pattern DMP-1 is further included, the area occupied by the blue pattern can be increased within the first region A1. Therefore, the image displayed in the first region A1 may appear relatively bluish compared to the image displayed in the display layer 100. The display panel according to this disclosure can adjust the hue of the image by selecting different colors for the enhancement pattern DMP-1. Therefore, a display panel that displays an image with a uniform hue relative to the first region A1 and the second region A2 can be provided.

[0217] Figures 11A to 11C This is a plan view showing a portion of display panels DP-A, DP-B, and DP-C according to one or more embodiments of the present disclosure. For ease of explanation, Figures 11A to 11C Only those corresponding to Figure 9A Anti-reflective layer 300 (see Figure 8A Some of the components of ). In the following text, reference will be made to Figures 11A to 11C Various pixel arrangements according to this disclosure are described. Meanwhile, in conjunction with reference... Figures 1 to 10B Components that are described in the same way will be represented by the same reference numerals or symbols, and repeated descriptions of them will be omitted.

[0218] like Figure 11AAs shown, in the first region A1 of the display panel DP-A, multiple light-emitting units (EDUt) can be alternately arranged with the transmission region TP along the first direction DR1 or the second direction DR2. The EDUts can be adjacent to the transmission region TP in the first direction DR1 and the second direction DR2. Each EDUt may include a first transmission color filter 320Rt, a second transmission color filter 320Gt spaced apart from the first transmission color filter 320Rt in the second direction DR2, and a third transmission color filter 320Bt spaced apart from the first transmission color filter 320Rt in the first direction DR1. The first and second transmission color filters 320Rt and 320Gt may have a rectangular shape with their long sides extending along the first direction DR1, and the third transmission color filter 320Bt may have a rectangular shape with its long side extending along the second direction DR2. The third transmission color filter 320Bt can be adjacent to both the first and second transmission color filters 320Rt and 320Gt in the first direction DR1. On a plane, the area of ​​each of the first transmission color filter 320Rt and the second transmission color filter 320Gt can be smaller than the area of ​​the third transmission color filter 320Bt.

[0219] The reinforcing pattern DMP can surround at least one of the first transmission color filter 320Rt, the second transmission color filter 320Gt, and the third transmission color filter 320Bt. The reinforcing pattern DMP can have a rectangular ring shape surrounding the edge of the second transmission color filter 320Gt.

[0220] like Figure 11B As shown, in the first region A1 of the display panel DP-B, the first transmission color filter 320Rt, the second transmission color filter 320Gt, and the third transmission color filter 320Bt can have an arrangement structure in a diagonal direction. The pixel arrangement structure in the first region A1 of the display panel DP-B can correspond to Figure 9A The pixel arrangement structure shown.

[0221] Here, the enhanced pattern DMP-2 can be placed around the second transmission color filter 320Gt. However, with Figure 9A Unlike the reinforcement pattern DMP shown, reinforcement pattern DMP-2 can be spaced apart from adjacent transmission filters 320Rt and 320Bt. Reinforcement pattern DMP-2 can contact only the second transmission filter 320Gt and may not contact the other transmission filters 320Rt and 320Bt.

[0222] Optionally, such as Figure 11CAs shown, the display panel DP-C may also include an additional reinforcing pattern DMP-3. The additional reinforcing pattern DMP-3 may surround at least one of the other transmissive color filters 320Rt and 320Bt. That is, the reinforcing pattern DMP-2 and the additional reinforcing pattern DMP-3 may each surround a transmissive color filter with a different color. The reinforcing pattern DMP-2 may surround a second transmissive color filter 320Gt, and the additional reinforcing pattern DMP-3 may surround a first transmissive color filter 320Rt. As an example, such as Figure 11C As shown, the reinforcing pattern DMP-2 may be spaced apart from at least any of the other transmission color filters 320Rt and 320Bt. As another example, the reinforcing pattern DMP-2 may be spaced apart from the first transmission color filter 320Rt surrounded by an attached reinforcing pattern DMP-3, and may contact the third transmission color filter 320Bt. According to this disclosure, an additional reinforcing pattern DMP-3 may be further included to control the thickness for ensuring sufficient thickness of two or more different color filters.

[0223] The enhancement pattern DMP-2 and the additional enhancement pattern DMP-3 can have different colors. Alternatively, the enhancement pattern DMP-2 and the additional enhancement pattern DMP-3 can also have the same color. According to this disclosure, the hue of the image in the first region A1 can be appropriately controlled by designing the colors of the enhancement pattern DMP-2 and the additional enhancement pattern DMP-3 differently. Therefore, the color deviation between the first region A1 and the second region A2 can be reduced, thereby providing a uniform hue for the display panel.

[0224] According to this disclosure, the color deviation between a first region including a transmissive region and a second region adjacent thereto can be reduced, and an image with uniform brightness can be displayed, thereby improving the display characteristics of electronic devices.

[0225] Furthermore, according to this disclosure, the hue of the first region can be appropriately controlled.

[0226] In the foregoing description, embodiments of this disclosure have been described with reference to the present disclosure. However, those skilled in the art will understand that various modifications and changes can be made to this disclosure, provided that such modifications and changes do not depart from the spirit and scope of this disclosure as set forth in the appended claims. Therefore, the scope of this disclosure is not limited to the content described in the detailed description herein, but should be determined by the claims and their functional equivalences included therein.

Claims

1. Electronic devices, including: The display panel includes a first region having a transmissive region and a luminescent region, and a second region adjacent to the first region; as well as The electronic module is located below the display panel and overlaps with the first area. The display panel includes: The first light-emitting element, in the light-emitting region of the first region. The second light-emitting element is located in the second region. A separating layer, located in the light-emitting region of the first region and in the second region. The transmission color filter, in the first region, overlaps with the first light-emitting element, and each has an area smaller than the transmission region, and includes a first transmission color filter and a second transmission color filter, wherein the thickness of the second transmission color filter is smaller than the thickness of the first transmission color filter. The color filter is located in the second region and overlaps with the second light-emitting element, and The reinforced pattern, in the first region, above the separating layer, and in a plan view, has a closed loop shape surrounding the edge of the first transmissive color filter.

2. The electronic device according to claim 1, wherein, The first transmission color filter has green color, and The reinforcing pattern is blue.

3. The electronic device according to claim 1, wherein, The first transmission color filter has green color, and The reinforcing pattern is red.

4. The electronic device according to claim 1, wherein, The enhanced pattern has the same color as the second transmission color filter.

5. The electronic device according to claim 1, wherein, The display panel also includes an additional reinforcing pattern surrounding a third transmission filter that has a different color from the first and second transmission filters.

6. The electronic device according to claim 1, wherein, The display panel also includes an additional reinforcing pattern, which has a different color from the original reinforcing pattern, and surrounds a third transmission filter that has a different color from the first and second transmission filters.

7. The electronic device according to claim 1, wherein, The display panel also includes an additional reinforcing pattern surrounding a third transmission filter that has a different color from the first and second transmission filters. The enhanced pattern is spaced apart from the second or the third transmission color filter.

8. The electronic device according to claim 1, wherein, The transmission color filter further includes a third transmission color filter, which has a different color from the first and second transmission color filters. The reinforcement pattern is spaced apart from the second or third transmission color filter in the plan view.

9. The electronic device according to claim 1, wherein, The transmission color filter further includes a third transmission color filter, which has a different color from the first and second transmission color filters. Wherein, the thickness of the first transmission color filter is equal to the thickness of the first color filter in the color filter, and the first transmission color filter has the same color as the first color filter in the color filter.

10. The electronic device according to claim 1, wherein, The transmission color filter is arranged along a diagonal direction, and The first transmission filter and the transmission area are arranged alternately along the horizontal or vertical direction.

11. The electronic device according to claim 1, wherein, The transmission color filter is arranged alternately with the transmission area along the horizontal or vertical direction. Wherein, the second transmission color filter is spaced apart from the first transmission color filter in the vertical direction, and The third transmission filter in the transmission filter is spaced apart from the first transmission filter and the second transmission filter in the horizontal direction.

12. Electronic devices, including: The display panel includes a first region having a transmissive area and a second region adjacent to the first region; as well as The electronic module is located below the display panel and overlaps with the first area. The display panel includes: A first light-emitting element is located in the first region; A second light-emitting element is located in the second region; A separating layer defines a first opening that overlaps with the first light-emitting element, a second opening that overlaps with the second light-emitting element, and a transmission opening that overlaps with the transmission region. Color filters are located in the second opening; A transmission color filter, each located in the first opening and including a first transmission color filter, wherein the upper surface of the first transmission color filter has a different shape than the upper surfaces of the other transmission color filters in the transmission color filter; and The reinforced pattern is located in the first region, above the separating layer, and has a closed loop shape surrounding the first transmissive color filter.

13. The electronic device according to claim 12, wherein, The reinforcing pattern comprises the same material as any of the transmission color filters.

14. The electronic device according to claim 13, wherein, The enhanced pattern comprises a different material from the first transmissive color filter and has either red or blue color.

15. The electronic device according to claim 12, wherein, The reinforcement pattern and the first transmission color filter are configured in multiple ways. The transmission color filter further includes a second transmission color filter, and The reinforcing pattern includes: First patterns, respectively surrounding the first transmissive color filter and spaced apart from each other; and The second pattern, spaced apart from the first pattern, surrounds the second transmission color filter and has the same color as the first pattern.

16. The electronic device according to claim 12, wherein, The reinforcement pattern and the first transmission color filter are configured in multiple ways. The transmission color filter further includes a second transmission color filter. The reinforcing pattern includes first patterns that are spaced apart from each other and surround the first transmissive color filter, and The reinforcing pattern further includes a second pattern, which is spaced apart from the first pattern, surrounds the second transmission color filter, and has a different color from the first pattern.

17. The electronic device according to claim 12, wherein, The first transmission color filter has a different thickness from the first color filter in the filter set, and The transmission filter further includes a second transmission filter with a different thickness than the first transmission filter.

18. The electronic device according to claim 12, wherein, The first transmission color filter is configured in multiple ways. The transmission color filter has a different arrangement from the first color filter, and also includes a second transmission color filter and a third transmission color filter with different colors from the first transmission color filter. Wherein, the first transmission color filter and the second transmission color filter are arranged alternately along the first oblique line direction, and The first and third transmission color filters are arranged alternately along a second oblique direction that intersects the first oblique direction.

19. The electronic device according to claim 12, wherein, The transmission color filter has a different arrangement than the color filter. The transmission color filter further includes a second transmission color filter and a third transmission color filter with different colors from the first transmission color filter, and The first and second transmission color filters have smaller areas than the third transmission color filter.

20. The electronic device according to claim 12, wherein, One of the transmission regions has an area larger than the first transmission color filter.