A method for improving aln etch and optimizing etch roughness based on a protective layer

Abstract

The application belongs to the technical field of semiconductor device manufacturing, and particularly relates to a method for improving ALN corrosion and optimizing etching roughness based on a protective layer. The ALN layer is a piezoelectric material layer of a MEMS piezoelectric sensor. A SiO2 thin film is first grown on the surface of the ALN layer at low temperature by chemical vapor deposition, then photoresist is coated, exposure and development operations are sequentially performed, and patterning is completed; dry etching is then performed; finally, the excess photoresist is removed, the SiO2 thin film is removed, and the etching of the ALN is completed. Through the SiO2 protective layer arranged on the surface of the ALN and the optimized etching method, the problem that the piezoelectric material ALN layer is easily corroded by the developing solution and the bottom electrode layer is damaged in the preparation of the piezoelectric sensor is effectively solved.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor manufacturing technology, specifically relating to a method for improving ALN layer etching and optimizing etching roughness based on a protective layer. Background Technology

[0002] Piezoelectric sensor chips are electronic components that combine the piezoelectric effect with semiconductor chip technology. They are typically involved in MEMS microcomputer systems or integrated circuits. They utilize the piezoelectric properties of certain materials to directly convert mechanical quantities, such as force, pressure, acceleration, vibration, and sound waves, into electrical signals (charge or voltage), or conversely, to convert electrical signals into mechanical quantities.

[0003] A typical structure of a piezoelectric sensor chip includes a piezoelectric material layer, an electrode layer, a substrate layer, and a signal processing circuit layer. In integrated piezoelectric MEMS sensors, the piezoelectric material is sandwiched in the electrode layer. Commonly used piezoelectric materials include piezoelectric ceramics (lead titanate PZT and its modified materials; high piezoelectric coefficient and high sensitivity); piezoelectric single crystals (quartz SiO2, lithium niobate LiNbO3, lithium titanate LiTaO3; good stability and low temperature coefficient); and piezoelectric thin films (aluminum nitride ALN, zinc oxide ZnO and doped modified materials).

[0004] As a common piezoelectric material, ALN, despite having a lower piezoelectric coefficient than PZT, has become an irreplaceable material in applications driven by high frequency, miniaturization, integration, high reliability, and environmental protection requirements. Furthermore, with the advancement of doping technology (SCALN), this performance gap has been further bridged, promoting the expansion of ALN into high-sensitivity sensor applications.

[0005] However, ALN is a very hard and chemically inert material, making efficient and selective etching challenging. Existing etching methods commonly include dry etching and wet etching, but after etching, cross-sectioning of the ALN film reveals a rough surface. Investigation revealed that the core problem lies in the development step. In fine dry or wet etching, a developer is needed to provide a photoresist pattern mask. However, TMAH (tetramethylammonium hydroxide) in commonly used developers is a strong base; TMAH dissociates in water, forming free hydroxide ions. (CH3)4NOH (CH3)4N + + OH -

[0006] ALN gradually corrodes and "dissolves" in a strongly alkaline environment, leading to surface defects: ALN + OH - → AL(OH)3 + NH3 Ultimately, this defect, once etched, exacerbates the formation of a rough surface on the ALN, with unevenness reaching approximately 300 nm. Furthermore, the rough surface of the ALN is replicated onto the underlying electrode layer (typically made of metals such as Au, Pt, Al, and Mo) during the photolithography process, causing the metal electrode surface to also become rough and affecting performance.

[0007] Therefore, in order to solve the corrosion problem of ALN, it is urgent to provide a new etching method to protect the integrity of the ALN piezoelectric material layer. This is of great significance for improving etching accuracy and enhancing the performance, reliability, stability and lifespan of piezoelectric sensors. Summary of the Invention

[0008] To address the aforementioned technical problems, this invention provides a method for improving sidewall corrosion in wet aluminum etching processes based on a protective layer.

[0009] The technical solution adopted in this invention is as follows: A method for improving ALN layer corrosion and optimizing etching roughness based on a protective layer, wherein the ALN layer is an ALN ​​thin film material layer for electrical devices, the method comprising the following steps: S1. A SiO2 thin film with a thickness of 500 Å is grown on the surface of ALN at low temperature using chemical vapor deposition; S2. Photolithography: The process of applying photoresist, exposure, and development is performed sequentially to complete the patterning. S3. Etching: Perform dry etching; S4. Remove excess photoresist, then rinse with buffered oxide etchant to remove the SiO2 film and complete the ALN etching.

[0010] In this method, the ALN layer is an aluminum nitride thin film material layer for electrical devices, including but not limited to various AlN thin films for semiconductors, power devices, and SAW filters, with the piezoelectric material layer of MEMS piezoelectric sensors being preferred.

[0011] Preferably, in step S1, a SiO2 thin film is grown using the PECVD method: tetraethoxysilane is used as a precursor and introduced into the reaction chamber at a rate of 0.8 g / min, with He as the carrier gas and a gas flow rate of 1200 sccm. The reaction gas is a mixture of O2 at 3400 sccm and N2 at 200 sccm. The reaction chamber pressure is 4.2 Torr, the electrode spacing is 8.2 mm, and the substrate temperature is 250 °C. A high-frequency power of 270 W is applied to the upper electrode, and a low-frequency power of 80 W is applied to the lower electrode to deposit a SiO2 thin film with a thickness of 500 Å.

[0012] The photolithography step can be performed using conventional methods, and this invention does not impose any special requirements on it. For example, it can be as follows: spin-coating a 3 μm layer of photoresist onto the wafer using a coating machine, then pre-baking the photoresist at 130°C for 3 min using a hot plate; exposing the photoresist using an exposure machine with an energy of 3500 J / m² and a focal length of 0; post-baking the photoresist at 120°C for 2 min using a developing machine with a hot plate, followed by development with developer for 90 s.

[0013] Preferably, the dry etching employs a segmented etching process, including an ignition stage, a protective layer etching, a main etching stage, and a remaining ALN etching stage. The ignition stage uses a mixed gas of Ar, He, Cl, and SF6, etched for 3 seconds at 9 mTorr, 900 W source power, and 135 W substrate power. The protective layer etching uses a mixed gas of Ar and Cl, etched for 10 seconds at 2 mTorr, 900 W source power, and 625 W substrate power. The main etching uses a mixed gas of Ar and Cl, etched for 90 seconds at 2 mTorr, 900 W source power, and 625 W substrate power. The remaining ALN etching uses a mixed gas of Ar and Cl, etched for 60 seconds at 2 mTorr, 500 W source power, and 100 W substrate power, thus completing the etching process.

[0014] Preferably, the flow rate ratio of Ar, He, Cl, and SF6 in the Ar, He, Cl, and SF6 mixed gas is 50 sccm : 120 sccm : 50 sccm : 30 sccm; and the flow rate ratio of Ar and Cl in the Ar and Cl mixed gas is 10 sccm : 65 sccm.

[0015] Preferably, an excess photoresist is removed using a plasma stripper. This step is a conventional method, and the present invention does not impose any special requirements on it. For example, it could be as follows: a mixture of O2 at 3000 sccm and 4 vol% H2 / N2 at 600 sccm is introduced, ionized into O plasma by a 900W RF power supply, and processed for 3 minutes under a controlled pressure of 1.3 torr.

[0016] Preferably, the buffer oxide etching solution is an HF acid buffer solution, prepared at a volume ratio of HF to NH4F of 6:1.

[0017] Preferably, the rinsing time for the buffer oxide etching solution is 10 s.

[0018] The beneficial effects of this invention are as follows: This method avoids ALN corrosion by adding a protective layer before patterning PZALN. After SiO2 film deposition, there is no contact issue between the developer and ALN, preventing the ALN film from being corroded by the developer. ALN retains a smooth surface, and the original surface roughness problem is not replicated to the underlying metal (usually Mo, Pt, etc.).

[0019] In this method, the SiO2 film deposition thickness was extensively verified, and the optimal thickness was finally determined to be 500 Å. This thickness not only protects the ALN layer, but also eliminates the need for additional steps to open the protective layer (to create an opening in the protective layer). Furthermore, the removal process is simple, quick, and does not affect production capacity or cause the etchant to have an adverse effect on other film layers.

[0020] Experiments show that using BOE (HF acid buffer solution HF:NH4F=6:1) has a corrosion rate >100 Å / s, a high selectivity for bare exposed layers, and a rinsing time of 10s can ensure the removal of SiO2 film without damaging ALN / MO.

[0021] Furthermore, this application optimizes the etching method. On mass production lines, considering capacity issues, ALN etching typically employs higher power processes to increase the ALN etching rate and thus improve throughput. However, high-power etching makes it difficult to guarantee the amount of damage to the electrode layer. In this application, to avoid damage to the underlying electrode layer and optimize the roughness of the bottom layer, a soft-landing (SL) process is added during the etching process. This involves adding a slower etching rate and weaker physical bombardment process when the etching is almost complete to finish the remaining ALN etching. The soft-landing solution combined with descum treatment effectively solves the problems of ALN corrosion and bottom layer damage. Attached Figure Description

[0022] Figure 1 This is a typical ALN patterning process flow for a piezoelectric sensor in the prior art. The left side shows the structure after photolithography, with a rough ALN (PZALN layer) surface; the right side shows the structure after etching, where the roughness of the ALN is replicated on the bottom electrode layer (BEMO layer).

[0023] Figure 2 To illustrate the patterning and etching results of ALN according to existing technology, Figure a shows the depth data of the step structure on the surface of the Mo layer measured by a profilometer after photolithography and development, and the unevenness can be observed; Figure b shows the SEM image of the surface of the Mo layer after photolithography and development; and Figure c shows the SEM image of the cross-section of the Mo layer after etching.

[0024] Figure 3The flowchart of the method of this application is shown in the figure. Figure a is a schematic diagram of growing PESIO2 on the PZ ALN layer to protect the underlying film layer from being corroded by the photolithography developer. Figure b is a schematic diagram of opening the PESIO2 through the ICP machine before etching the ALN. Figure c is a schematic diagram after etching the ALN.

[0025] Figure 4 This is a schematic diagram of the etching method in this method. In the figure, a is a schematic diagram after etching TEMO, b is a schematic diagram after the main etching is completed, and c is a schematic diagram after the final etching is completed.

[0026] Figure 5 To illustrate the patterning and etching results of the ALN layer using this method, figure a shows the SEM planar view of the PZ ALN layer after etching, and figure b shows the SEM cross-sectional view of the PZ ALN layer after etching. In figure b, 221.2 nm represents the initial thickness of BEMO, 178.1 nm represents the remaining thickness of BEMO after etching, 44.4 nm represents the angle of PZALN after etching, 879.5 nm represents the initial thickness of PZALN, and 51.2 nm represents the angle of PR after etching.

[0027] Figure 6 To compare the bottom layer optimization after etching using the conventional method and the method proposed in this figure, a) shows the thickness distribution of the single-layer Mo obtained by the conventional method, and b) shows the thickness distribution of the single-layer Mo obtained by the optimized etching method proposed in this figure.

[0028] Figure 7 This is a comparison of the Mo thickness of the underlying layer after etching using conventional methods and our method. Detailed Implementation

[0029] Unless otherwise stated, the terms used herein have the meanings commonly understood by those skilled in the art.

[0030] The technical solution of the present invention will be described in more detail below with reference to the embodiments.

[0031] Figure 1 This diagram shows the structure of a typical piezoelectric sensor, from bottom to top: Si (silicon substrate), THOX layer (thermal silicon oxide layer), LPNI layer (low-pressure furnace tube silicon nitride layer), BEMO layer (bottom electrode molybdenum layer), PZALN layer (piezoelectric aluminum nitride layer), and PR (photoresist). The structure after conventional fabrication is shown below. Figure 1 As shown, see Figure 1 In the context of ALN patterning, after the coating-photolithography-development process, the ALN film layer is exposed at the pattern openings. The alkaline TMAT (tetramethylammonium hydroxide) component in the developer will slightly corrode the ALN surface, causing surface roughness. For example... Figure 1As shown in b, ICP (inductively coupled plasma etching) is used to etch ALN. Due to the roughness of the ALN surface, the underlying material (Mo layer) will replicate the surface condition of ALN, resulting in higher roughness (the ALN surface is uneven, the low areas are etched clean first, and the high areas need to be etched clean, so the underlying material Mo will continue to be etched in the low areas).

[0032] Figure 2 This image shows the patterning and etching results of an ALN ​​layer for a MEMS piezoelectric sensor, performed using existing technology. The MEMS piezoelectric sensor, from top to bottom, consists of: TEMO (top electrode molybdenum layer), PZALN (composite piezoelectric layer), BEMO (bottom electrode molybdenum layer), and LPSIN (low-pressure silicon nitride). Figure a shows the results of a profilometer test on the bottom electrode (Mo layer) after photolithography and development, revealing unevenness; b is a SEM image of the Mo layer surface after photolithography and development; and c is a cross-sectional SEM image of the Mo layer after photolithography and development, again revealing unevenness. The results are consistent with... Figure 1 same.

[0033] Example 1

[0034] See Figure 3 A method for improving the corrosion and optimizing the etching roughness of an ALN ​​layer, wherein the ALN layer is a piezoelectric material layer of a MEMS piezoelectric sensor, includes the following steps: S1. A SiO2 thin film with a thickness of 500 Å is grown on the surface of ALN at low temperature using chemical vapor deposition; Specifically, SiO2 thin films were grown using the PECVD method: tetraethoxysilane was used as a precursor and introduced into the reaction chamber at a rate of 0.8 g / min, with He as the carrier gas at a flow rate of 1200 sccm. The reaction gas was a mixture of O2 at a flow rate of 3400 sccm and N2 at a flow rate of 200 sccm. The reaction chamber pressure was 4.2 Torr, the electrode spacing was 8.2 mm, and the substrate temperature was 250 °C. A high-frequency power of 270 W was applied to the upper electrode, and a low-frequency power of 80 W was applied to the lower electrode to deposit a SiO2 thin film with a thickness of 500 Å.

[0035] S2. Photolithography: This includes the processes of applying photoresist, exposure, and development to complete the patterning. In this embodiment, the specific operation of the photolithography process is as follows: a 3 μm photoresist is spin-coated onto the wafer using a coating machine, and then the photoresist is pre-baked at 130°C for 3 min using a hot plate; exposure is performed using an exposure machine with an energy of 3500 J / m2 and a focal length of 0; post-baking is performed using a developing machine with a hot plate at 120°C for 2 min, and then developing is performed by passing through a developing solution for 90 s.

[0036] S3. Etching: Dry etching is performed using a segmented etching process, including the ignition stage (STD), protective layer etching (OX), main etching (ALN), and residual ALN etching (SL). The ignition stage uses a mixed gas of Ar (50 sccm), He (120 sccm), Cl (50 sccm), and SF6 (30 sccm) for 3 seconds at 9 mTorr, 900 W source power, and 135 W substrate power. The protective layer etching uses a mixed gas of Ar (10 sccm) and Cl (65 sccm) for 10 seconds at 2 mTorr, 900 W source power, and 625 W substrate power. The main etching uses a mixed gas of Ar (10 sccm) and Cl (65 sccm) for 90 seconds at 2 mTorr, 900 W source power, and 625 W substrate power. The residual ALN etching uses a mixed gas of Ar (10 sccm) and Cl (65 sccm) for 90 seconds. The etching process was completed by etching a mixture of gas (sccm) at 2 mTorr, 500 W source power, and 100 W base power for 60 s.

[0037] The etching diagrams for this section can be found in Table 1. Figure 4 , Figure 4 In the diagram, a is a schematic diagram of the TEMO etching of the piezoelectric sensor film layer information, b is a schematic diagram of the SiO2 etching, c is a schematic diagram of the ALN etching of the base (mainly 90% of the thickness, relatively fast), and d is a schematic diagram of the remaining ALN etching (10% etching, slower etching rate, and higher selectivity for the underlying BEM, which can effectively control the loss of the underlying BEMO and solve the problem of underlying MO etching damage).

[0038] Table 1 Etching process

[0039] S4. Excess photoresist was removed using a plasma stripper. Specifically, a mixture of O2 at 3000 sccm and 4 vol% H2 / N2 at 600 sccm was introduced, ionized into O plasma by a 900W RF power supply, and processed for 3 minutes under a controlled voltage of 1.3 torr. Then, buffered oxide etchant (BOE) was used for rinsing to remove the SiO2 film, completing the ALN etching.

[0040] In this embodiment, the buffer oxide etching solution is an HF acid buffer solution, prepared at a volume ratio of HF to NH4F of 6:1; the total rinsing time is 10 s.

[0041] The MEMS piezoelectric sensor was inspected after etching. See [link / reference]. Figures 5-7 . Figure 5Image a is a planar SEM image of the PZ ALN layer after etching. It can be seen that the bottom layer is flat and the ALN is intact and not corroded by the developer. Image b is a cross-sectional SEM image of the PZ ALN layer after etching. It can be seen that the bottom layer is flat, the loss is small, and the ALN is intact and not corroded by the developer.

[0042] Figure 6 To compare the bottom layer optimization after etching using the conventional method and the method described in this figure, a is a schematic diagram of the thickness distribution of the single bottom layer Mo before optimization, and b is a schematic diagram of the thickness distribution of the single bottom layer Mo after optimization (with the addition of soft land).

[0043] Figure 7 To compare the Mo thickness of the underlying layer after etching using conventional methods and our method, the thickness of multiple sites was measured with 1800 Å as the baseline. The optimized method resulted in a lower Mo loss in the underlying layer compared to the conventional method.

[0044] It can be seen that there is no corrosion after ALN lithography using this method, and the roughness of the underlying layer is significantly improved. This indicates that this method can well meet the etching requirements of piezoelectric sensors and is beneficial to improving product life and performance.

[0045] The above are merely preferred embodiments of the present invention and are not intended to limit the scope of the invention. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A method for improving ALN layer corrosion and optimizing etching roughness based on a protective layer, characterized in that, The ALN layer is an ALN ​​thin film material layer for electrical devices, and the method includes the following steps: S1. A SiO2 thin film is grown on the surface of ALN at low temperature using chemical vapor deposition, wherein the thickness of the SiO2 thin film is 500 Å to 2000 Å; S2. Photolithography: The process of applying photoresist, exposure, and development is performed sequentially to complete the patterning. S3. Etching: Perform dry etching; S4. Remove excess photoresist, then rinse with buffered oxide etchant to remove the SiO2 film and complete the ALN etching.

2. The method for improving ALN layer corrosion and optimizing etching roughness based on a protective layer as described in claim 1, characterized in that, The thickness of the SiO2 thin film is 500 Å.

3. The method for improving ALN layer corrosion and optimizing etching roughness based on a protective layer as described in claim 1, characterized in that, In step S1, SiO2 thin films are grown using the PECVD method: tetraethoxysilane is used as a precursor and introduced into the reaction chamber at a rate of 0.8 g / min. The carrier gas is He, and the gas flow rate is 1200 sccm. The reaction gas is a mixture of O2 at 3400 sccm and N2 at 200 sccm. The reaction chamber pressure is 4.2 Torr, the electrode spacing is 8.2 mm, and the substrate temperature is 250 °C. A high-frequency power of 270 W is applied to the upper electrode, and a low-frequency power of 80 W is applied to the lower electrode to deposit the SiO2 thin film of the required thickness.

4. The method for improving ALN layer corrosion and optimizing etching roughness based on a protective layer as described in claim 1, characterized in that, The dry etching process employs a segmented etching method, including an ignition stage, a protective layer etching, a main etching, and a remaining ALN etching. The ignition stage uses a mixed gas of Ar, He, Cl, and SF6, and is etched for 3 seconds at 9 mTorr, 900W source power, and 135W base power. The protective layer was etched using a mixture of Ar and Cl gas at 2 mTorr, 900 W source power, and 625 W base power for 10 s. The main etching was performed using a mixture of Ar and Cl gas at 2 mTorr, 900 W source power, and 625 W base power for 90 s. The remaining ALN etching was performed using a mixture of Ar and Cl gas at 2 mTorr, 500 W source power, and 100 W base power for 60 s, thus completing the etching process.

5. The method for improving ALN layer corrosion and optimizing etching roughness based on a protective layer as described in claim 4, characterized in that, The flow rate ratio of Ar, He, Cl, and SF6 in the Ar, He, Cl, and SF6 mixture is 50 sccm : 120 sccm : 50 sccm : 30 sccm; the flow rate ratio of Ar and Cl in the Ar, Cl mixture is 10 sccm : 65 sccm.

6. The method for improving ALN layer corrosion and optimizing etching roughness based on a protective layer as described in claim 1, characterized in that, Excess photoresist is removed using a plasma stripper.

7. The method for improving ALN layer corrosion and optimizing etching roughness based on a protective layer as described in claim 1, characterized in that, The buffer oxide etching solution is an HF acid buffer solution, prepared at a volume ratio of HF to NH4F of 6:

1.

8. The method for improving ALN layer corrosion and optimizing etching roughness based on a protective layer as described in claim 1, characterized in that, The rinsing time for the buffer oxide etching solution is 10 s.

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