A room temperature nonlinear hall rectifier device based on graphene and a method for manufacturing the same

Abstract

The application discloses a room-temperature nonlinear Hall rectifier based on graphene and a preparation method thereof. The device comprises, from bottom to top, an insulating substrate, a single-layer graphene and a Hall electrode group. The single-layer graphene is attached to the surface of the insulating substrate, and the Hall electrode group is arranged on the surface of the single-layer graphene to form a Hall bar structure. The surface of the insulating substrate has a nanoscale roughness. The single-layer graphene is induced to generate a nanoscale disordered strain due to the nanoscale roughness. The disordered strain breaks the spatial inversion symmetry of the single-layer graphene, so that the Hall device can generate a second-harmonic transverse voltage and a direct-current transverse voltage when an alternating current is applied at room temperature, thereby realizing nonlinear Hall rectification or frequency multiplication application. The room-temperature nonlinear Hall conductivity reaches 2*10 ‑4 μm·S / V. The application does not need to stack a heterojunction or prepare a complex mole superlattice, and the preparation process is simple, and can be applied to room-temperature terahertz detection, wireless rectification or frequency multiplication.

Description

Technical Field

[0001] This invention belongs to the field of nonlinear electronic device technology, specifically relating to a device and its fabrication method that realizes room-temperature nonlinear Hall effect in monolayer graphene by substrate-induced strain. Background Technology

[0002] The Hall effect refers to the linear relationship between the applied current and the generated Hall voltage when the time-reversal symmetry of a system is broken. The nonlinear Hall effect, however, is a second-order nonlinear electrical transport phenomenon, manifested as a second-harmonic transverse voltage generated when an alternating current is applied. Its core lies in the breaking of spatial inversion symmetry, not in the breaking of time-reversal symmetry. In recent years, the nonlinear Hall effect has attracted widespread attention as a powerful tool for probing the quantum geometry of electronic states (such as Berry curvature dipoles and quantum metrics). However, known nonlinear Hall effect materials, such as topological materials like WTe2 and TaIrTe4, or moiré superlattices and twisted bilayer graphene, often require low temperatures (liquid helium temperatures) to operate, or rely on complex and difficult-to-scale-fabricate moiré heterostructures. This severely limits the practical application of the nonlinear Hall effect in room-temperature nonlinear electronics, terahertz detection, and energy harvesting.

[0003] As the first discovered two-dimensional material, monolayer graphene possesses extremely high carrier mobility and a tunable band structure, making it an ideal platform for studying higher-order transport. However, the intrinsic spatial inversion symmetry of monolayer graphene is not broken, preventing the direct generation of the nonlinear Hall effect. To break the spatial inversion symmetry of graphene, researchers have fabricated twisted bilayer structures or moiré superlattice structures, but these methods produce devices with poor reproducibility and fail to generate significant nonlinear signals at room temperature. Therefore, there is an urgent need for a graphene-based nonlinear Hall device that is simple in structure, easy to fabricate, and can operate stably at room temperature. Summary of the Invention

[0004] This invention aims to overcome the aforementioned shortcomings of the prior art and provide a room-temperature nonlinear Hall device based on substrate-induced disordered strain in monolayer graphene and its fabrication method. This Hall device exhibits a significant nonlinear Hall response at room temperature (300K) without the need for low temperatures or complex moiré superlattice structures.

[0005] To achieve the above objectives, the present invention provides the following technical solution: A graphene-based room-temperature nonlinear rectifier Hall device comprises, from bottom to top, an insulating substrate, a monolayer of graphene, and a Hall electrode assembly. The monolayer of graphene is bonded to the surface of the insulating substrate, and the Hall electrode assembly is disposed on the surface of the monolayer of graphene, forming a Hall rod structure. The surface of the insulating substrate has nanoscale roughness, and the monolayer of graphene is induced to generate nanoscale disordered strain due to the nanoscale roughness. The disordered strain breaks the spatial inversion symmetry of the monolayer of graphene, enabling the Hall device to generate a second harmonic transverse voltage and a DC transverse voltage when an alternating current is applied at room temperature, thereby realizing nonlinear Hall rectification or frequency doubling applications.

[0006] Furthermore, the insulating substrate is a SiO2 / Si substrate, comprising a SiO2 substrate and a Si substrate, wherein the SiO2 substrate is fixedly disposed on the Si substrate, the Si substrate is used as a back gate electrode, and the thickness of the SiO2 substrate is controlled at 250-300 nm.

[0007] Furthermore, the single-layer graphene is rectangular, with length and width dimensions controlled between 8μm×8μm and 12μm×12μm.

[0008] Furthermore, the Hall electrode assembly includes one source electrode, one drain electrode, and four Hall electrodes. The source electrode, drain electrode, and Hall electrode are Pd / Au bilayer metal electrodes, with a Pd bottom layer thickness of 5nm and an Au top layer thickness of 50nm. The source electrode and drain electrode are respectively disposed at both ends of the monolayer graphene along its length direction, and the Hall electrodes are symmetrically disposed at both ends of the monolayer graphene along its width direction, forming a six-electrode Hall rod structure.

[0009] Furthermore, the average compressive strain range of the nanoscale disordered strain in the monolayer graphene is -0.2% to -0.4%.

[0010] Furthermore, the Hall device exhibits a nonlinear Hall conductivity of 2 × 10⁻⁶ at room temperature. -4 μm·S / V.

[0011] Furthermore, the Hall device has a stable operating temperature range of 2K to 350K, and can output a significant second harmonic rectified signal at room temperature of 300K.

[0012] Furthermore, the Hall device is applied to room temperature terahertz detection, wireless rectification, or frequency multiplication.

[0013] The present invention also provides a method for fabricating the Hall device, comprising the following steps: 1) Substrate pretreatment: First, the SiO2 / Si substrate is cleaned using acetone and isopropanol according to standard, and then the organic residue is removed by oxygen plasma cleaning technology to obtain a substrate with a clean nano-rough surface. 2) Single-layer graphene transfer: Rectangular single-layer graphene is prepared on a SiO2 / Si substrate using natural graphite as raw material and mechanical exfoliation method. The single-layer graphene is preheated by a hot plate to adhere to the SiO2 / Si substrate. 3) Hall rod preparation: Six-electrode Hall rods were prepared on monolayer graphene using laser direct writing lithography and electron beam evaporation coating.

[0014] 4) High vacuum annealing: The Hall device with the Hall rod fabricated is placed in a high vacuum environment and annealed at 180℃ for 3 hours to remove impurities on the surface of the monolayer graphene and strengthen the bonding between the monolayer graphene and the SiO2 / Si substrate, inducing nanoscale disordered strain.

[0015] Compared with the prior art, the beneficial effects of the present invention are: 1. The Hall device of the present invention has a room temperature nonlinear Hall conductivity of up to 2×10-4μm•S / V, with excellent device performance comparable to that of topological materials at low temperatures, which greatly reduces the threshold for device use.

[0016] 2. The Hall device of this invention has a wide operating temperature range, from 2K to 350K, and can work effectively, achieving stable operation at room temperature, thus taking into account both basic scientific research at extremely low temperatures and industrial applications at normal temperature.

[0017] 3. The Hall device fabrication method of the present invention is simple, without the need for complex transfer steps or cornering processes. It only uses mechanical exfoliation of a single layer of graphene, and the substrate does not require additional nano-processing. It relies on the natural roughness to induce strain, and the fabrication has high repeatability.

[0018] 4. The mechanical stripping, laser direct writing, and electron beam evaporation processes used in this invention are all mature micro-nano fabrication technologies, compatible with silicon-based CMOS production lines, and conducive to large-scale applications. Attached Figure Description

[0019] Figure 1 This is a schematic diagram of the overall three-dimensional structure of the Hall device of the present invention; Figure 2 This is a frontal cross-sectional view of the Hall device of the present invention, illustrating the mechanism by which substrate surface roughness induces disordered strain in graphene; Figure 3 This is a physical image of the Hall device of the present invention; Figure 4 This is a curve showing the variation of the second harmonic voltage of the Hall device of the present invention with the amplitude of the first harmonic current at room temperature; Figure 5 The Hall device of this invention converts first harmonic current into DC voltage signal at room temperature; Figure 6 The diagram shows the spatial distribution of disordered strain (a) and the corresponding statistical histogram of compressive strain (b) of the Hall device of the present invention calculated by Raman spectroscopy 2D peak position. In the figure: 1-source electrode, 2-drain electrode, 3, 4, 5, 6-Hall electrodes, 7-monolayer graphene, 8-SiO2 substrate, 9-Si substrate. Detailed Implementation

[0020] The present invention will now be described in detail with reference to the accompanying drawings and specific embodiments.

[0021] Please see Figures 1-6 One embodiment provided by the present invention: A room-temperature nonlinear rectified Hall effect device based on graphene comprises, from bottom to top, an insulating substrate, a monolayer graphene 7, and a Hall electrode assembly. The insulating substrate is a SiO2 / Si substrate, including a SiO2 substrate 8 and a Si substrate 9. The SiO2 substrate 8 is fixedly disposed on the Si substrate 9, and the Si substrate 9 serves as a back gate electrode. The nonlinear Hall output amplitude can be flexibly adjusted by controlling the graphene carrier concentration through the gate voltage. The thickness of the SiO2 substrate 8 is controlled at 250-300 nm. The monolayer graphene 7 is attached to the surface of the insulating substrate. The monolayer graphene 7 is rectangular, with length and width dimensions controlled at 8 μm × 8 μm to 12 μm × 12 μm. The Hall electrode assembly is disposed on the surface of the monolayer graphene 7 and includes a source electrode 1 and a drain electrode. The device consists of four Hall electrodes 3-6. The source electrode 1, drain electrode 2, and Hall electrodes 3-6 are Pd / Au double-layer metal electrodes. The Pd bottom layer is 5nm thick, and the Au top layer is 50nm thick. The source electrode 1 and drain electrode 2 are respectively disposed at both ends of the monolayer graphene 7 along its length direction, and the Hall electrodes 3-6 are symmetrically disposed at both ends of the monolayer graphene 7 along its width direction, forming a six-electrode Hall rod structure. The surface of the insulating substrate has nanoscale roughness. Due to the nanoscale roughness, the monolayer graphene 7 generates nanoscale disordered strain. The disordered strain breaks the spatial inversion symmetry of the monolayer graphene 7, enabling the Hall device to generate a second harmonic transverse voltage and a DC transverse voltage when an alternating current is applied at room temperature, realizing nonlinear Hall rectification or frequency doubling applications.

[0022] The fabrication method of a room-temperature nonlinear rectified Hall device based on graphene includes the following steps: 1) Substrate pretreatment: First, the SiO2 / Si substrate was cleaned using acetone and isopropanol according to standard. Then, the organic residue was removed by oxygen plasma cleaning technology to obtain a clean substrate. The treatment conditions were: oxygen flow rate 20 sccm, power 18W, and treatment time 3 min. The Si substrate was used as the back gate electrode. The SiO2 substrate was 285 nm thick and its surface roughness was measured by atomic force microscopy to be approximately 1.0 nm. No additional processing was required.

[0023] 2) Single-layer graphene transfer: Using natural graphite (HQ Graphene) as raw material, the blue film tape was repeatedly peeled off by mechanical exfoliation to obtain fragments containing single-layer graphene. The graphene fragments on the tape were transferred to a SiO2 / Si substrate to form rectangular single-layer graphene. The length and width dimensions were identified as 9μm×9μm under an optical microscope, and the single-layer characteristics were verified by Raman spectroscopy.

[0024] During the transfer of monolayer graphene, the SiO2 / Si substrate needs to be placed on a hot plate at 180°C and heated for 20 minutes to ensure that the monolayer graphene fully adheres to the surface of the SiO2 / Si substrate.

[0025] 3) Hall rod fabrication: Photoresist was spin-coated onto a SiO2 / Si substrate. A laser direct-write lithography system was used to lithographically create the source electrode, drain electrode, and four Hall electrodes on a single layer of graphene. After development, the image was fixed in deionized water. Subsequently, the sample was placed in an electron beam evaporation coating machine under a vacuum of not less than 2 × 10⁻⁶. -5 Under Pa conditions, 5 nm Pd and 50 nm Au were deposited sequentially, with the evaporation rate controlled at 0.4 Å / s. Then, the material was peeled off to form a six-electrode Hall rod structure. The peeling was performed in hot acetone at 60 °C. Finally, the material was cleaned with isopropanol and dried with nitrogen.

[0026] 4) High vacuum annealing: Place the Hall device in a high vacuum annealing furnace, and anneal it under a vacuum better than 5 × 10⁻⁶. -4 Under Pa conditions, annealing at 180°C for 3 hours achieves a dual effect. On the one hand, annealing can remove moisture, oxygen, and PMMA photoresist residues adsorbed on the surface of monolayer graphene, improving electrical contact and carrier mobility. On the other hand, it enables the monolayer graphene to fully and tightly adhere to the SiO2 substrate. Because the surface roughness of the SiO2 substrate can generate nanoscale disordered compressive strain within the graphene lattice, this strain can break the spatial inversion symmetry of the monolayer graphene, thus generating a significant nonlinear Hall effect.

[0027] Performance Testing: The Hall effect device was installed in the temperature-controlled module of the superconducting magnet system (CFMS-12T-30VTI). A sinusoidal current with adjustable frequency and amplitude was applied using a Keithley 6221 AC current source. Simultaneously, two SR830 lock-in amplifiers were used to measure the second harmonic components of the longitudinal and transverse voltages, respectively. The lock-in amplifier phase was set to 180°, and the X component was acquired. The back-gate voltage was provided by a Keithley 2450 source meter, and leakage current was monitored. The curves showing the variation of the second harmonic voltage with the amplitude of the first harmonic current are shown below. Figure 4 As shown, the first harmonic current is converted into a DC voltage signal as follows: Figure 5 As shown, the spatial distribution of disordered strain and the corresponding compressive strain statistics calculated from the 2D peak positions of the Raman spectrum are as follows: Figure 6 As shown in ab.

[0028] Test results: 1. At room temperature (300 K), when a sinusoidal alternating current is applied, both a second harmonic transverse voltage and a second harmonic longitudinal voltage are generated simultaneously. The second harmonic transverse voltage is proportional to the square of the input alternating current amplitude, exhibiting a typical second-order nonlinear response, such as... Figure 4 As shown.

[0029] 2. The Hall effect device of this invention can directly convert AC excitation into a stable DC transverse voltage, achieving passive rectification, such as... Figure 5 As shown; 3. The nanoscale disordered strain in monolayer graphene has an average compressive strain range of -0.2% to -0.4%, such as... Figure 6 As shown.

[0030] 4. Calculations show that the room temperature nonlinear Hall conductivity is 2 × 10⁻⁶. -4 μm·S / V, where S is the unit of conductivity = 1 / Ω, and the specific calculation formula is as follows: In the formula The second-order nonlinear voltage signal measured experimentally is given by I, the injected AC current is given by R, the resistance of the graphene sample is given by L, and the width and length of the graphene sample are given by W, respectively. In this embodiment, =11.2μV, I=10μA, R=1712Ω, L=9μm, W=9μm.

[0031] 5. The device of this invention can detect clear second harmonic output in the temperature range from 2 K to 350 K, and has strong temperature range adaptability.

[0032] In summary, the Hall device of this invention has a stable operating temperature range of 2K to 350K, can output a significant second harmonic rectified signal at room temperature (300K), and achieves a room temperature nonlinear Hall conductivity of 2×10⁻⁶. -4 μm·S / V, a value comparable to the nonlinear Hall conductivity of topological materials such as WTe2 at liquid helium temperature. This invention does not require stacking heterojunctions or preparing complex molar superlattices, and the preparation process is simple. It can be applied to room temperature terahertz detection, wireless rectification, or frequency multiplication.

[0033] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A room-temperature nonlinear rectified Hall effect device based on graphene, characterized in that, From bottom to top, the device comprises an insulating substrate, a monolayer of graphene, and a Hall electrode assembly. The monolayer of graphene is bonded to the surface of the insulating substrate, and the Hall electrode assembly is disposed on the surface of the monolayer of graphene, forming a Hall rod structure. The surface of the insulating substrate has nanoscale roughness. Due to the nanoscale roughness, the monolayer of graphene generates nanoscale disordered strain. This disordered strain breaks the spatial inversion symmetry of the monolayer of graphene, enabling the Hall device to generate a second harmonic transverse voltage and a DC transverse voltage when an alternating current is applied at room temperature, thus realizing nonlinear Hall rectification or frequency doubling applications.

2. The Hall device according to claim 1, characterized in that, The insulating substrate is a SiO2 / Si substrate, comprising a SiO2 substrate and a Si substrate. The SiO2 substrate is fixedly disposed on the Si substrate, and the Si substrate is used as a back gate electrode. The thickness of the SiO2 substrate is controlled at 250-300 nm.

3. The Hall device according to claim 1, characterized in that, The single-layer graphene is rectangular, with length and width dimensions controlled between 8μm×8μm and 12μm×12μm.

4. The Hall device according to claim 1, characterized in that, The Hall electrode assembly includes one source electrode, one drain electrode, and four Hall electrodes. The source electrode, drain electrode, and Hall electrodes are Pd / Au bilayer metal electrodes with a Pd bottom layer thickness of 5nm and an Au top layer thickness of 50nm. The source electrode and drain electrode are respectively disposed at both ends of the monolayer graphene along its length direction, and the Hall electrodes are symmetrically disposed at both ends of the monolayer graphene along its width direction, forming a six-electrode Hall rod structure.

5. The Hall device according to claim 1, characterized in that, The average compressive strain range of the nanoscale disordered strain in the monolayer graphene is -0.2% to -0.4%.

6. The Hall device according to claim 1, characterized in that, The Hall device exhibits a nonlinear Hall conductivity of 2 × 10⁻⁶ at room temperature. -4 μm·S / V.

7. The Hall device according to claim 1, characterized in that, The Hall device has a stable operating temperature range of 2K to 350K, and can output a significant second harmonic rectified signal at room temperature of 300K.

8. The application of the Hall device according to any one of claims 1 to 7, characterized in that, Applications include room temperature terahertz detection, wireless rectification, and frequency multiplication.

9. A method for fabricating a Hall device according to any one of claims 1 to 7, characterized in that, Includes the following steps: 1) Substrate pretreatment: First, the SiO2 / Si substrate is cleaned using acetone and isopropanol according to standard, and then the organic residue is removed by oxygen plasma cleaning technology to obtain a substrate with a clean nano-rough surface. 2) Single-layer graphene transfer: Using natural graphite as raw material, long strips of single-layer graphene are prepared on SiO2 / Si substrate by mechanical exfoliation. The hot plate preheats the single-layer graphene to adhere to the SiO2 / Si substrate. 3) Hall rod fabrication: A six-electrode Hall rod was fabricated on a single layer of graphene using laser direct writing lithography and electron beam evaporation coating process; 4) High vacuum annealing: The Hall device with the Hall rod fabricated is placed in a high vacuum environment and annealed at 180℃ for 3 hours to remove impurities on the surface of the monolayer graphene and strengthen the bonding between the monolayer graphene and the SiO2 / Si substrate, inducing nanoscale disordered strain.

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