Semiconductor substrate, semiconductor epitaxial wafer, and method for manufacturing semiconductor substrate
Patent Information
- Application Number
- CN202610004808.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2025-03-19
- Filing Date
- 2026-01-05
- Publication Date
- 2026-09-22
AI Technical Summary
但是在专利文献1中,由于并非是防止半导体基板破裂或缺损的构造,因此存在改善的余地
[0010] According to this disclosure, it is possible to take into account both countermeasures against external extension crowns and prevention of breakage or damage starting from the terminal part.
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Figure CN122803593A_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to semiconductor substrates, semiconductor epitaxial wafers, and methods for manufacturing semiconductor substrates. Background Technology
[0002] During epitaxial growth onto a semiconductor substrate, turbulence and stagnation of the growth gas occur around the end of the semiconductor substrate due to the gap between the semiconductor substrate and the wafer holder, as well as the step difference. At this time, the concentration of the growth gas increases around the end, causing a partial increase in the epitaxial growth rate. This partial increase in the epitaxial growth rate results in a localized thickening of the semiconductor epitaxial film around the end of the semiconductor substrate, forming a crown shape. Hereinafter, the portion epitaxially grown into a crown shape will be referred to as the epitaxial crown.
[0003] After forming the surface structure of a semiconductor substrate through epitaxial growth, the back side is ground and polished to form the back structure. Before grinding and polishing the back side, a resin is coated on the surface and cured to protect the surface structure. Then, to prevent stress concentration on a portion of the surface during back structure formation, the cured resin is cut to flatten it. At this time, if the epitaxial crown is high, the cutting tool may come into contact with the epitaxial crown when cutting the resin, sometimes causing cracking or defects in the semiconductor substrate. Therefore, countermeasures need to be taken for the epitaxial crown during semiconductor substrate fabrication.
[0004] Previously, semiconductor substrates with inclined portions formed at the terminal portion have been disclosed (for example, see Patent Document 1).
[0005] Patent Document 1: Japanese Patent Application Publication No. 2002-83753
[0006] Patent Document 1 focuses on the fact that the epitaxial crown is caused by poor patterning of the resist mask, and in order to prevent such poor patterning, a tilted portion is provided at the end of the semiconductor substrate.
[0007] However, the terminal portion of a semiconductor substrate often becomes the starting point for breakage or damage. To prevent such breakage or damage, the semiconductor substrate can be optimized. However, in Patent Document 1, since the structure is not designed to prevent breakage or damage to the semiconductor substrate, there is room for improvement. Summary of the Invention
[0008] This disclosure was made to solve such problems, and aims to provide a method for manufacturing semiconductor substrates, semiconductor epitaxial wafers, and semiconductor substrates that can take into account both countermeasures against epitaxial crowns and prevention of cracking or damage starting from the terminal portion.
[0009] To address the aforementioned issues, the semiconductor substrate disclosed herein comprises: an effective region, which is a region for forming a semiconductor chip and has a first main surface; an ineffective region, which is located on the outer periphery of the first main surface and has a second main surface with a surface shape different from that of the first main surface; and an end-face processing portion, which is located on the outer periphery of the second main surface and is included in the ineffective region, wherein the surface height of the second main surface is lower than the surface height of the first main surface.
[0010] According to this disclosure, it is possible to take into account both countermeasures against external extension crowns and prevention of breakage or damage starting from the terminal part. Attached Figure Description
[0011] Figure 1 This is a cross-sectional view showing the structure of the semiconductor substrate according to Embodiment 1.
[0012] Figure 2 This is a top view showing the structure of the semiconductor substrate in Embodiment 1.
[0013] Figure 3 This is a cross-sectional view showing an example of the structure of the semiconductor substrate in Embodiment 2.
[0014] Figure 4 This is a cross-sectional view showing an example of the structure of the semiconductor substrate in Embodiment 2.
[0015] Figure 5 This is a cross-sectional view showing an example of the structure of the semiconductor substrate in Embodiment 2.
[0016] Figure 6 This is a cross-sectional view showing the structure of the semiconductor substrate in Embodiment 3.
[0017] Figure 7 This is a cross-sectional view showing the structure of the semiconductor epitaxial wafer in Embodiment 4.
[0018] Figure 8 This is a cross-sectional view showing the structure of the semiconductor epitaxial wafer in Embodiment 5.
[0019] Figure 9 This is a flowchart illustrating the manufacturing process of the semiconductor substrate in Embodiment 6.
[0020] Explanation of reference numerals in the attached figures
[0021] 1...SiC substrate; 2...First main surface; 3...Second main surface; 4...End face processing section; 5...SiC epitaxial film; 6...SiC epitaxial wafer; 7...Epitaxial crown. Detailed Implementation
[0022] <Implementation Method 1>
[0023] In this disclosure, a SiC substrate is used as an example of a semiconductor substrate, but a Si substrate can also be used. However, the epitaxial growth rate is easier to increase at the termination of a SiC substrate than at the termination of a Si substrate, thus epitaxial crowns are more easily formed at the termination of a SiC substrate. Furthermore, the term "SiC substrate" as used below is synonymous with "SiC wafer".
[0024] Figure 1 This is a cross-sectional view showing the structure of the SiC substrate 1 in Embodiment 1. Furthermore, in Figure 1 The image shows a portion of the terminal portion containing the SiC substrate 1. Figure 2 This is a top view showing the structure of SiC substrate 1. Although in Figure 2 In the example, an orientation plane is formed, but a notch can also be formed instead of an orientation plane. The structure of this disclosure (the first main surface 2, the second main surface 3, and the end face processing part 4 described below) can also be applied to the orientation plane or the notch portion.
[0025] SiC substrate 1 includes a first main surface 2, a second main surface 3, and an end-face processing portion 4. The first main surface 2, the second main surface 3, and the end-face processing portion 4 are each part of the surface of SiC substrate 1. The effective region includes the first main surface 2, and the ineffective region includes the second main surface 3 and the end-face processing portion 4. Here, the effective region is the region where a semiconductor chip (including a SiC semiconductor chip) is formed, and the ineffective region is the region where no semiconductor chip is formed.
[0026] The first main surface 2 is a horizontal surface on the surface of the SiC substrate 1.
[0027] The second main surface 3 is located on the outer periphery of the first main surface 2. Furthermore, the second main surface 3 slopes towards the terminal portion from its boundary with the first main surface 2. That is, the surface shape of the second main surface 3 is different from that of the first main surface 2. The surface height of the second main surface 3 is lower than the surface height of the first main surface 2. Here, the surface height of the first main surface 2 corresponds to the length from the back surface of the SiC substrate 1 to its surface (first main surface 2). Similarly, the surface height of the second main surface 3 corresponds to the length from the back surface of the SiC substrate 1 to its surface (second main surface 3).
[0028] The end face processing part 4 is equivalent to an inclined surface and is located on the outer periphery of the second main surface 3.
[0029] <Effect>
[0030] Because the surface height of the second main surface 3 is lower than that of the first main surface 2, the flow of growth gas is improved, and turbulence and stagnation of growth gas during epitaxial growth are reduced. Therefore, the epitaxial growth rate of the semiconductor epitaxial film becomes more uniform, and the formation of epitaxial crowns is suppressed. Here, suppressing the formation of epitaxial crowns means that epitaxial crowns are not formed at all or that epitaxial crowns with low height are formed.
[0031] After epitaxial growth, a resin is coated and cured to protect the surface structure. When the resin is cut, the effective area of the SiC substrate 1 can be made uniform. Therefore, the formation of the back surface structure does not negatively affect the shape of the effective area of the SiC substrate 1.
[0032] Because the formation of epitaxial crowns is suppressed, the likelihood of the cutting tool coming into contact with the epitaxial crowns when cutting the resin coated to protect the surface structure is reduced, thus reducing the risk of semiconductor substrate breakage or defects caused by contact.
[0033] Since the SiC substrate 1 is constructed by dividing it into a first main surface 2, a second main surface 3, and an end-face processing section 4, the functions of each part can be specially designed. For example, the second main surface 3 can be designed as a countermeasure against epitaxial crowns, and the end-face processing section 4 can be designed to suppress cracking or defects in the SiC substrate 1. In this way, the design of the SiC substrate 1 can be made more flexible.
[0034] Thus, according to Implementation Method 1, it is possible to take into account both countermeasures against the external crown and prevention of breakage or damage originating from the terminal portion.
[0035] <Implementation Method 2>
[0036] Figure 3 This is a cross-sectional view showing an example of the structure of the SiC substrate 1 in Embodiment 2. (See attached image.) Figure 3 As shown, the second main surface 3 of the SiC substrate 1 has a stepped shape. Specifically, the second main surface 3 includes a portion of height H1, which is the difference between the surface height of the first main surface 2 and the surface height of the second main surface 3, and a portion of height H2. Heights H1 and H2 are 4.5% to 21.5% of the thickness of the SiC substrate 1. The thickness of the SiC substrate 1 is 350 μm, which is equivalent to the length from the back side of the SiC substrate 1 to the surface (first main surface 2).
[0037] Figure 4 This is a cross-sectional view showing an example of the structure of the SiC substrate 1 in Embodiment 2. (See attached image.) Figure 4 As shown, the second main surface 3 of the SiC substrate 1 is conical. Specifically, the second main surface 3 includes a height H3 portion that is the difference between the surface height of the first main surface 2 and the surface height of the second main surface 3. The height H3 is 4.5% to 21.5% of the thickness of the SiC substrate 1.
[0038] Figure 5 This is a cross-sectional view showing an example of the structure of the SiC substrate 1 in Embodiment 2. (See attached image.) Figure 5As shown, the second main surface 3 of the SiC substrate 1 has an uneven shape. Specifically, the second main surface 3 includes a portion of height H4, which is the difference between the surface height of the first main surface 2 and the surface height of the second main surface 3, and a portion of height H5. Heights H4 and H5 are 4.5% to 21.5% of the thickness of the SiC substrate 1.
[0039] <Effect>
[0040] By dividing the SiC substrate 1 into a first main surface 2, a second main surface 3, and an end face processing section 4, the design flexibility of the SiC substrate 1 can be obtained. Therefore, the optimal substrate design corresponding to the manufacturing process or application can be carried out, and it can be adapted to various manufacturing conditions.
[0041] When a semiconductor epitaxial film with a thickness of approximately 30 μm is epitaxially grown on a conventional SiC substrate (a SiC substrate without the second main surface 3), an epitaxial crown with a height of approximately 15 μm is formed on the semiconductor epitaxial film. Furthermore, while a conventional epitaxial growth apparatus can continuously grow semiconductor epitaxial films with a thickness of approximately 150 μm, in this case, an epitaxial crown with a height of approximately 75 μm is formed on the semiconductor epitaxial film. On the other hand, 4.5% of the thickness of the SiC substrate 1 corresponds to approximately 15 μm, and 21.5% of the thickness of the SiC substrate 1 corresponds to approximately 75 μm. Therefore, by setting the heights H1, H2, H3, H4, and H5 according to the thickness of the semiconductor epitaxial film, it is possible to prevent the leading edge of the epitaxial crown formed on the semiconductor epitaxial film from being higher than the first main surface 2.
[0042] <Implementation Method 3>
[0043] Figure 6 This is a cross-sectional view showing the structure of the SiC substrate 1 in Embodiment 3. (Example) Figure 6 As shown, the boundary between the first main surface 2 and the second main surface 3, the boundary between the second main surface 3 and the end face processing part 4, and the boundary between the end face processing part 4 and the side surface of the SiC substrate 1 ( Figure 6 Each circle in the diagram is chamfered.
[0044] <Effect>
[0045] By performing chamfering on the boundaries between the first main surface 2 and the second main surface 3, the boundary between the second main surface 3 and the end face processing part 4, and the boundary between the end face processing part 4 and the side surface of the SiC substrate 1, it is possible to suppress cracking or damage to the SiC substrate 1.
[0046] <Implementation Method 4>
[0047] Figure 7 This is a cross-sectional view showing the structure of the SiC epitaxial wafer 6 (semiconductor epitaxial wafer) according to Embodiment 4. Furthermore, in Figure 7The image shows a portion including the terminal section of the SiC epitaxial wafer 6.
[0048] The SiC epitaxial wafer 6 includes a SiC substrate 1 and a SiC epitaxial film 5. The SiC substrate 1 can also be any one of the SiC substrates 1 in embodiments 1 to 3.
[0049] The SiC epitaxial film 5 is formed by epitaxially growing SiC on the SiC substrate 1. The thickness of the SiC epitaxial film 5 is 30 μm or more.
[0050] An epitaxial crown 7 (protrusion) is formed on the surface of the SiC epitaxial film 5 corresponding to the second main surface 3. The height H6 of the epitaxial crown 7 is 4.5% of the thickness of the SiC substrate 1. The height H6 of the epitaxial crown 7 is equivalent to the length between the surface of the SiC epitaxial film 5 corresponding to the first main surface 2 and the front end of the epitaxial crown 7.
[0051] <Effect>
[0052] In a SiC substrate lacking a second main surface 3, when a SiC epitaxial film with a thickness of approximately 30 μm is epitaxially grown on the SiC substrate, an epitaxial crown with a height of approximately 15 μm is formed on the SiC epitaxial film. On the other hand, the SiC substrate 1 of Embodiment 4 lacks a second main surface 3; therefore, when a SiC epitaxial film 5 with a thickness of approximately 30 μm is epitaxially grown on the SiC substrate 1, an epitaxial crown 7 with a height H6 of 15 μm or less is formed on the SiC epitaxial film 5. That is, according to Embodiment 4, the height of the epitaxial crown 7 formed on the SiC epitaxial film 5 can be suppressed.
[0053] <Implementation Method 5>
[0054] Figure 8 This is a cross-sectional view showing the structure of the SiC epitaxial wafer 6 in Embodiment 5. Additionally, in Figure 8 The image shows a portion including the terminal section of the SiC epitaxial wafer 6.
[0055] The SiC epitaxial wafer 6 includes a SiC substrate 1 and a SiC epitaxial film 5. The SiC substrate 1 can also be any one of the SiC substrates 1 in embodiments 1 to 3.
[0056] The SiC epitaxial film 5 is formed by epitaxial growth of SiC on the SiC substrate 1.
[0057] An epitaxial crown 7 is formed on the surface of the SiC epitaxial film 5 corresponding to the second main surface 3. The height H7 of the epitaxial crown 7 is 15 μm or less from the surface of the SiC epitaxial film 5 corresponding to the first main surface 2. Furthermore, the bottom of the epitaxial crown 7 is positioned below the surface of the SiC epitaxial film 5 corresponding to the first main surface 2. The height H7 of the epitaxial crown 7 corresponds to the length between the surface of the SiC epitaxial film 5 corresponding to the first main surface 2 and the front end of the epitaxial crown 7.
[0058] <Effect>
[0059] Since the SiC substrate 1 in Embodiment 5 has a second main surface 3, when a SiC epitaxial film 5 with a thickness of about 30 μm is epitaxially grown on the SiC substrate 1, an epitaxial crown 7 with a height H7 of 15 μm or less is formed on the SiC epitaxial film 5. That is, according to Embodiment 5, the height of the epitaxial crown 7 formed on the SiC epitaxial film 5 can be suppressed.
[0060] <Implementation Method 6>
[0061] Figure 9 This is a flowchart illustrating the manufacturing process of the SiC substrate 1 in Embodiment 6.
[0062] In the crystal growth process of step S1, SiC single crystals are grown to produce ingots.
[0063] In the orientation plane processing step S2, an orientation plane is formed in the SiC single crystal ingot. Alternatively, a notch can be formed in the ingot instead of an orientation plane.
[0064] In the wafer slicing process of step S3, the ingot is sliced to form the SiC substrate 1.
[0065] In the substrate grinding and polishing process of step S4, the surface of the SiC substrate 1 obtained by slicing is ground or polished. Specifically, the SiC substrate 1 is ground or polished to achieve the desired thickness.
[0066] In the wafer termination process of step S5, an end face processing part 4 is formed at the end of the SiC substrate 1.
[0067] In step S6, the CMP (Chemical Mechanical Polishing) process is used to flatten the surface of the SiC substrate 1.
[0068] In the epitaxial growth process of step S7, an epitaxial growth is performed on the SiC substrate 1 to form a SiC epitaxial film 5.
[0069] Steps S4 to S6 described above are wafer processing steps for processing the SiC substrate 1. In the wafer processing steps, a first main surface 2 (step S6), a second main surface 3, and an end face processing section 4 are formed (step S5). Furthermore, the formation of the second main surface 3 can be performed between steps S4 and S5 or between steps S5 and S6.
[0070] <Effect>
[0071] By forming a first main surface 2, a second main surface 3, and an end face processing portion 4 during the wafer processing steps, the surface shape of the SiC substrate 1 can be controlled, thereby suppressing the height of the epitaxial crown 7 formed on the SiC epitaxial film 5 after epitaxial growth from the surface (first main surface 2) of the SiC substrate 1.
[0072] Furthermore, within the scope of this disclosure, the various embodiments can be freely combined, or appropriately modified or omitted.
[0073] <Postscript>
[0074] The various methods disclosed herein are hereby recorded as appendices.
[0075] (Note 1) A semiconductor substrate, wherein:
[0076] The effective region is the area where a semiconductor chip is formed and has a first principal surface;
[0077] An invalid region, located on the outer periphery of the first main surface and having a second main surface with a surface shape different from the first main surface; and
[0078] The end face processing section is located on the outer periphery of the second main surface and is included in the invalid region.
[0079] The surface height of the second main surface is lower than the surface height of the first main surface.
[0080] (Note 2) According to the semiconductor substrate described in Note 1, wherein,
[0081] The semiconductor chip contains SiC.
[0082] (Note 3) The semiconductor substrate according to Note 1 or 2, wherein,
[0083] The second main surface is conical, stepped, or concave-convex.
[0084] (Appendix 4) The semiconductor substrate according to any one of Appendices 1 to 3, wherein,
[0085] The difference between the surface height of the first main surface and the surface height of the second main surface is 4.5% to 21.5% of the thickness of the semiconductor substrate.
[0086] (Appendix 5) The semiconductor substrate according to any one of Appendices 1 to 4, wherein,
[0087] The boundaries between the first main surface and the second main surface, the boundary between the second main surface and the end face processing part, and the boundary between the end face processing part and the side surface of the semiconductor substrate are respectively chamfered.
[0088] (Appendix 6) A semiconductor epitaxial wafer, wherein:
[0089] The semiconductor substrate described in any one of Notes 1 to 5; and
[0090] A semiconductor epitaxial film is disposed on the semiconductor substrate.
[0091] The thickness of the semiconductor epitaxial film is 30 μm or more.
[0092] The height of the protrusion formed on the surface of the semiconductor epitaxial film corresponding to the second main surface is 4.5% of the thickness of the semiconductor substrate.
[0093] (Appendix 7) A semiconductor epitaxial wafer, wherein:
[0094] The semiconductor substrate described in any one of Notes 1 to 5; and
[0095] A semiconductor epitaxial film is disposed on the semiconductor substrate.
[0096] The height of the protrusion formed on the surface of the semiconductor epitaxial film corresponding to the second main surface is less than 15 μm from the surface of the semiconductor epitaxial film corresponding to the first main surface.
[0097] The bottom of the protrusion is positioned below the surface of the semiconductor epitaxial film corresponding to the first main surface.
[0098] (Appendix 8) A method for manufacturing a semiconductor substrate, which is the method for manufacturing a semiconductor substrate described in any one of Appendices 1 to 5, wherein the method comprises the following steps:
[0099] Process a: The process of forming an orientation plane or notch in a single crystal ingot;
[0100] Step b: The step of slicing the ingot to form a semiconductor substrate;
[0101] Step c: A step of grinding or polishing the surface or terminals of the semiconductor substrate; and
[0102] Step d: The step of forming a semiconductor epitaxial film by epitaxial growth on the semiconductor substrate.
[0103] The process c includes the process of forming the first main surface, the second main surface, and the end face processing part.
Claims
1. A semiconductor substrate, characterized in that, have: The effective region is the area where a semiconductor chip is formed and has a first principal surface; An invalid region is located on the outer periphery of the first main surface and has a second main surface with a surface shape different from that of the first main surface. as well as The end face processing section is located on the outer periphery of the second main surface and is included in the invalid region. The surface height of the second main surface is lower than the surface height of the first main surface.
2. The semiconductor substrate according to claim 1, characterized in that, The semiconductor chip contains SiC.
3. The semiconductor substrate according to claim 1 or 2, characterized in that, The second main surface is conical, stepped, or concave-convex.
4. The semiconductor substrate according to any one of claims 1 to 3, characterized in that, The difference between the surface height of the first main surface and the surface height of the second main surface is 4.5% to 21.5% of the thickness of the semiconductor substrate.
5. The semiconductor substrate according to any one of claims 1 to 4, characterized in that, The boundaries between the first main surface and the second main surface, the boundary between the second main surface and the end face processing part, and the boundary between the end face processing part and the side surface of the semiconductor substrate are respectively chamfered.
6. A semiconductor epitaxial wafer, characterized in that, have: The semiconductor substrate according to any one of claims 1 to 5; and A semiconductor epitaxial film is disposed on the semiconductor substrate. The thickness of the semiconductor epitaxial film is 30 μm or more. The height of the protrusion formed on the surface of the semiconductor epitaxial film corresponding to the second main surface is 4.5% of the thickness of the semiconductor substrate.
7. A semiconductor epitaxial wafer, characterized in that, have: The semiconductor substrate according to any one of claims 1 to 5; and A semiconductor epitaxial film is disposed on the semiconductor substrate. The height of the protrusion formed on the surface of the semiconductor epitaxial film corresponding to the second main surface is less than 15 μm from the surface of the semiconductor epitaxial film corresponding to the first main surface. The bottom of the protrusion is positioned below the surface of the semiconductor epitaxial film corresponding to the first main surface.
8. A method for manufacturing a semiconductor substrate, comprising the method for manufacturing a semiconductor substrate according to any one of claims 1 to 5, characterized in that, It includes the following processes: Process a: The process of forming an orientation plane or notch in a single crystal ingot; Step b: The step of slicing the ingot to form a semiconductor substrate; Step c: A step of grinding or polishing the surface or terminals of the semiconductor substrate; and Step d: The step of forming a semiconductor epitaxial film by epitaxial growth on the semiconductor substrate. The process c includes the process of forming the first main surface, the second main surface, and the end face processing part.
Citation Information
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