A test structure and a test method for a dual-layer conductive via process window

Abstract

The application relates to the technical field of semiconductors and discloses a test structure and a test method for a double-layer conductive via process window, the test structure for the double-layer conductive via process window comprising a test metal layer, a first metal layer, a plurality of first conductive vias, a second metal layer and a plurality of second conductive vias, the test metal layer comprising a plurality of first test metal structures, a second electrode and a plurality of second test metal structures connected with the second electrode; the first metal layer comprising a first electrode and a plurality of first metal structures connected with the first electrode; the first conductive vias connecting the first test metal structures and the first metal structures; the second conductive vias connecting the second test metal structures and the second metal structures; the first conductive vias and the second conductive vias being alternately and spacedly arranged along a first direction; and the distance between adjacent first conductive vias and second conductive vias being a test distance. The application can test the offset connection of the conductive vias located at different layers, and improve the reliability and process accuracy of the double-layer conductive via structure.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and specifically to a test structure and test method for a double-layer conductive via process window. Background Technology

[0002] In the back-end process of integrated circuits, the alignment between vias and metal is particularly sensitive. When the via layout is dense, even a slight deviation in the alignment between the via and the metal can easily cause the arc-shaped vias on the upper and lower layers to pass through each other, thus forming a leakage path, increasing power consumption, or even causing device failure. Therefore, it is necessary to formulate reasonable via design rules and predict the process window in advance to avoid this situation.

[0003] Existing technologies mainly use via chains and Kelvin vias as wafer acceptance test (WAT) test keys to verify the process and quality of the process window. The disadvantages are that the location of the vias is relatively singular and can only observe the continuity of the vias, without providing three-dimensional morphological information. At the same time, it does not take into account the process interference relationship and via offset between the upper and lower layers of vias, and cannot evaluate the process and quality of the double-layer conductive via process window, nor can it evaluate the reliability and process accuracy of the double-layer conductive via structure. Summary of the Invention

[0004] In view of this, the present invention provides a test structure and test method for a double-layer conductive via process window, in order to solve the problem in the related art that it is impossible to test the process interference relationship and via offset between the upper and lower vias in the double-layer conductive via process window, which leads to the inability to evaluate the reliability and process accuracy of the double-layer conductive via structure.

[0005] In a first aspect, the present invention provides a test structure for a double-layer conductive via process window, the test structure comprising:

[0006] The test metal layer includes a plurality of first test metal structures and a plurality of second test metal structures alternately spaced in a first direction; the test metal layer also includes a second electrode connected to each second test metal structure; the lengths of the first test metal structures and the second test metal structures extend along the second direction.

[0007] A first metal layer is located on the side of the third-party upward test metal layer. The first metal layer includes a first electrode and a plurality of first metal structures, each of which is connected to the first electrode. The length of the first metal structure extends in a first direction.

[0008] Multiple first conductive vias are located between the first metal layer and the test metal layer; the first conductive vias are adapted to connect the first test metal structure and the first metal structure.

[0009] The second metal layer is located on the side of the third-party upward test metal layer that faces away from the first metal layer. The second metal layer includes a plurality of second metal structures. The length of the second metal structure extends in the first direction.

[0010] Multiple second conductive vias are located between the second metal layer and the test metal layer; the second conductive vias are adapted to connect the second test metal structure and the second metal structure; the first conductive vias and the second conductive vias are alternately spaced along a first direction.

[0011] The distance between adjacent first and second conductive vias is the test distance.

[0012] The test structure for a dual-layer conductive via process window provided by this invention comprises three metal layers and first and second conductive vias located between adjacent metal layers. It also includes a second electrode connected to each second test metal structure and a first electrode connected to each first metal structure. By connecting the first and second electrodes to a leakage current testing instrument, the continuity between the first and second test metal structures can be tested, thereby testing the connection between the first and second conductive vias located in different layers. This allows for monitoring the offset between the first and second conductive vias and verifying whether the test distance conforms to the design. Furthermore, this test structure can also be used to test the design limit distance between the first and second conductive vias, improving the accuracy of the dual-layer conductive via process window design rules and thus enhancing the reliability and process precision of the dual-layer conductive via structure.

[0013] In one alternative implementation, the second electrode is perpendicular to a plurality of first test metal structures; the second electrode is connected to one end of each first test metal structure.

[0014] The first electrode and the second electrode are adapted to be connected to a leakage current testing instrument, respectively, to test whether the first test metal structure and the second test metal structure are connected, and to test whether the test distance meets the design.

[0015] In one alternative implementation, the width of the first test metal structure is greater than or equal to the width of the first conductive via.

[0016] The width of the second test metal structure is greater than or equal to the width of the second conductive via.

[0017] In one optional embodiment, the projections of a plurality of first metal structures and the first test metal structure on the plane where the test metal layer is located intersect, and the intersection positions cover the projections of the first conductive vias on the plane where the test metal layer is located.

[0018] Multiple second metal structures intersect with the projections of the second test metal structure onto the plane of the test metal layer, and the intersection positions cover the projections of the second conductive vias onto the plane of the test metal layer.

[0019] In one alternative implementation, the first direction is perpendicular to the second direction;

[0020] Multiple first metal structures are arranged in parallel, and the projections of the multiple first metal structures and the first test metal structure onto the plane of the test metal layer are perpendicular to each other.

[0021] The first electrode is perpendicular to the plurality of first metal structures; the first electrode is connected to one end of each first metal structure.

[0022] Multiple second metal structures are arranged in parallel, and the projections of the multiple second metal structures and the second test metal structure onto the plane of the test metal layer are perpendicular to each other.

[0023] In one optional embodiment, the aperture of the first conductive via gradually decreases from top to bottom, and the first metal structure is connected to the side with the largest aperture of the first conductive via.

[0024] The diameter of the second conductive via gradually decreases from top to bottom, and the second test metal structure is connected to the side with the largest diameter of the second conductive via.

[0025] In one optional embodiment, the test structure further includes a dielectric layer that surrounds and fills the space between the first test metal structure and the second test metal structure and the second electrode in the test metal layer, the space between the first electrode and the first metal structure in the first metal layer, the space between the plurality of first conductive vias, the space between the plurality of second metal structures in the first metal layer, and the space between the plurality of second conductive vias.

[0026] In a second aspect, the present invention provides a testing method for a double-layer conductive via process window, used to test the test structure of the double-layer conductive via process window described in the first aspect, the testing method comprising:

[0027] A test structure is provided with a double-layer conductive via process window; the distance between adjacent first and second conductive vias is the test distance;

[0028] Connect the first electrode to the first potential;

[0029] Connect the second electrode to the second potential;

[0030] The current at one end of the second electrode is measured as the test current; when the test current is less than the first target current, the test distance is determined to meet the design; when the test current is greater than or equal to the first target current, the test distance is determined to not meet the design.

[0031] The present invention provides a testing method for a double-layer conductive via process window. The method uses the distance between adjacent first and second conductive vias in the test structure of the double-layer conductive via process window as the test distance. A first electrode and a second electrode are connected to a first potential and a second potential, respectively. By comparing the relationship between the test current and the first target current, it can be determined whether the test distance meets the design requirements, and the offset between the first and second conductive vias can be monitored. This testing method can test the process interference relationship and circuit continuity between the upper and lower vias in the double-layer conductive via process window, effectively evaluating the process and quality of the double-layer conductive via process window, thereby improving the reliability and process accuracy of the double-layer conductive via structure.

[0032] In one alternative implementation, the first potential is greater than the second potential.

[0033] In one alternative implementation, when the test current equals the first target current, the test distance at this time is recorded as the design limit distance.

[0034] When the test current is less than the second target current, the width of the first test metal structure and the width of the second test metal structure are determined to conform to the design rules; when the test current is greater than or equal to the second target current, the width of the first test metal structure and / or the width of the second test metal structure are determined to not conform to the design rules.

[0035] The testing method for a double-layer conductive via process window provided by this invention uses the distance between adjacent first and second conductive vias in the test structure of the double-layer conductive via process window as the test distance. The first electrode and the second electrode are connected to a first potential and a second potential, respectively. By changing the test distance, the test current is changed. When the test current is equal to the first target current, the design limit distance of the double-layer conductive via process window can be obtained. This can improve the accuracy of the design rules of the double-layer conductive via process window, ensure that the upper conductive via and the lower conductive via are not connected, and thus improve the reliability and process accuracy of the double-layer conductive via structure. Attached Figure Description

[0036] To more clearly illustrate the technical solutions in the specific embodiments or related technologies of the present invention, the drawings used in the description of the specific embodiments or related technologies will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0037] Figure 1 This is a schematic diagram of a structure used in the prior art to test a single-layer through-hole using a Via chain structure.

[0038] Figure 2 This is a schematic diagram of a structure used in the prior art to test a single through-hole using the Kelvin Via structure.

[0039] Figure 3 This is a top view schematic diagram of a test structure for a double-layer conductive via process window according to an embodiment of the present invention.

[0040] Figure 4 This is a cross-sectional schematic diagram of a test structure for a double-layer conductive via process window according to an embodiment of the present invention.

[0041] Figure 5 This is a flowchart illustrating a testing method for a double-layer conductive via process window according to an embodiment of the present invention.

[0042] Figure 6 This is a schematic diagram of a specific process for testing a double-layer conductive via process window according to an embodiment of the present invention.

[0043] Figure label:

[0044] 1. First metal line; 2. Second metal line; 3. Through hole; 100. First metal layer; 10. First electrode; 11. First metal structure; 200. Second metal layer; 21. Second metal structure; 300. Test metal layer; 30. Second electrode; 31. First test metal structure; 32. Second test metal structure; 40. First conductive through hole; 50. Second conductive through hole; x, first direction; y, second direction; z, third direction. Detailed Implementation

[0045] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and not intended to limit it. Furthermore, it should be noted that, for ease of description, the accompanying drawings show only the parts relevant to the invention, not the entire structure.

[0046] In the following description, descriptions of well-known structures and techniques are omitted to avoid unnecessarily obscuring the concepts of the present invention. Various structural schematic diagrams according to embodiments of the present invention are shown in the accompanying drawings. These drawings are not to scale, and some details are enlarged for clarity, and some details may be omitted. The shapes of the various regions and layers shown in the drawings, as well as their relative sizes and positional relationships, are merely exemplary and may deviate in practice due to manufacturing tolerances or technical limitations. Furthermore, those skilled in the art can design regions / layers with different shapes, sizes, and relative positions as needed. In the context of the present invention, when a layer / element is referred to as being "on" another layer / element, the layer / element may be directly on the other layer / element, or there may be an intermediate layer / element between them. Additionally, if a layer / element is "on" another layer / element in one orientation, then when the orientation is reversed, the layer / element may be "below" the other layer / element.

[0047] In the back-end process of integrated circuits, the alignment between vias and metal is particularly sensitive. When the via layout is dense, even a slight deviation in the alignment between the via and the metal can easily cause the arc-shaped vias on the upper and lower layers to pass through each other, thus forming a leakage path, increasing power consumption, or even causing device failure. Therefore, it is necessary to formulate reasonable via design rules and predict the process window in advance to avoid this situation.

[0048] Existing technologies mainly use via chains and Kelvin vias as wafer acceptance test (WAT) test keys to verify the process and quality of the process window. The disadvantages are that the location of the vias is relatively singular and can only observe the continuity of the vias, without providing three-dimensional morphological information. At the same time, it does not take into account the process interference relationship and circuit continuity between the upper and lower vias, and cannot evaluate the process and quality of the double-layer conductive via process window, nor can it evaluate the reliability and process accuracy of the double-layer conductive via structure.

[0049] Via chain and Kelvin Via are two common test structures used in semiconductor manufacturing for process monitoring and electrical testing. Their main purpose is to evaluate the process quality and electrical performance of vias and interconnect layers.

[0050] A via chain is a test structure consisting of multiple vias and metal lines connected in series, used to evaluate the connectivity and resistance characteristics of vias. For example... Figure 1As shown, a via chain is formed by alternating connections of multiple vias 3 and a first metal line 1 and a second metal line 2 to create a long chain. This chain is used to test the connection between the two metal lines and the vias 3. It can be used to detect the connectivity of vias (whether they are open or short-circuited), measure the total resistance of the via chain, evaluate the resistance contribution of vias and metal lines, and monitor the stability and consistency of the via process. The limitation of the via chain is that it can only measure the overall resistance of the via chain; it cannot extract the resistance of a single via, nor can it detect process interference between the upper and lower vias in a double-layer via structure.

[0051] The Kelvin Via is a four-terminal test structure used to accurately measure the resistance of a single via 3 between a first metal wire 1 and a second metal wire 2, eliminating the influence of test lead and contact resistance. Figure 2 As shown, the Kelvin Via uses four contact points: two for current injection and two for voltage measurement. By separating the current and voltage paths, it eliminates interference from lead resistance and contact resistance, allowing for accurate measurement of the resistance of a single via and evaluation of via process quality (such as contact resistance and interface resistance). However, the Kelvin Via has limitations. It can only measure the electrical performance of a single via and cannot reflect process interference issues between upper and lower vias in a dual-layer via structure. Furthermore, the Kelvin Via test structure is complex and occupies a large chip area.

[0052] like Figure 3 and Figure 4 As shown, this embodiment provides a test structure for a double-layer conductive via process window. The test structure for the double-layer conductive via process window includes:

[0053] The test metal layer 300 includes a plurality of first test metal structures 31 and a plurality of second test metal structures 32 alternately spaced in a first direction x; the test metal layer 300 also includes a second electrode 30 connected to each second test metal structure 32; the lengths of the first test metal structures 31 and the second test metal structures 32 extend along the second direction y.

[0054] The first metal layer 100 is located on the side of the test metal layer 300 in the third z direction. The first metal layer 100 includes a first electrode 10 and a plurality of first metal structures 11, each of which is connected to the first electrode 10. The length of the first metal structure 11 extends in the first direction.

[0055] Multiple first conductive vias 40 are located between the first metal layer 100 and the test metal layer 300; the first conductive vias 40 are adapted to connect the first test metal structure 31 and the first metal structure 11;

[0056] The second metal layer 200 is located on the side of the third direction z-test metal layer 300 that is away from the first metal layer 100. The second metal layer 200 includes a plurality of second metal structures 21. The length of the second metal structure 21 extends in the first direction.

[0057] Multiple second conductive vias 50 are located between the second metal layer 200 and the test metal layer 300; the second conductive vias 50 are adapted to connect the second test metal structure 32 and the second metal structure 21; the first conductive vias and the second conductive vias are alternately spaced along the first direction;

[0058] The distance between adjacent first conductive via 40 and second conductive via 50 is the test distance; the first electrode 10 and the second electrode 30 are adapted to be connected to a leakage current testing instrument respectively to test whether the first test metal structure 31 and the second test metal structure 32 are connected, and to test whether the test distance meets the design.

[0059] In practical implementation, the test structure for the double-layer conductive via process window includes three metal layers (top, middle, and bottom) and two vias between the three metal layers. Specifically, such as... Figure 3 and Figure 4 As shown, from top to bottom, it includes a first metal layer 100, a first conductive via 40, a test metal layer 300, a second conductive via 50, and a second metal layer 200. The first conductive via 40 connects the first metal structure 11 in the first metal layer 100 to the first test metal structure 31 in the test metal layer 300; the second conductive via 50 connects the second metal structure 21 in the second metal layer 200 to the second test metal structure 32 in the test metal layer 300. Figure 3 This is a top view schematic diagram of the test structure for a double-layer conductive via process window, showing the arrangement of the three metal layers. Figure 4 This is a cross-sectional schematic diagram of the test structure for a double-layer conductive via process window, showing the connection relationship between the three metal layers and the two conductive vias.

[0060] The distance between adjacent first conductive vias 40 and second conductive vias 50 refers to the minimum distance between the edge portions of the first conductive via 40 and the edge portions of the second conductive via 50. The first direction x is perpendicular to the third direction z, and the second direction y is also perpendicular to the third direction z. The plane formed by the first direction x and the second direction y is the plane containing the test metal layer, which is also the plane containing the first metal layer and the second metal layer.

[0061] The test structure for the dual-layer conductive via process window provided in this embodiment includes three metal layers and first and second conductive vias located between adjacent metal layers. A second electrode connected to each second test metal structure and a first electrode connected to each first metal structure are also included. By connecting the first and second electrodes to a leakage current testing instrument, the continuity between the first and second test metal structures can be tested, thereby testing the connection between adjacent first and second conductive vias. This allows monitoring of the offset between the first and second conductive vias and testing whether the test distance conforms to the design. Furthermore, this test structure can also be used to test the design limit distance between the first and second conductive vias, improving the accuracy of the dual-layer conductive via process window design rules and thus enhancing the reliability and process precision of the dual-layer conductive via structure.

[0062] In some alternative embodiments, the second electrode 30 is perpendicular to the plurality of first test metal structures 31; the second electrode 30 is connected to one end of each first test metal structure 31.

[0063] The first electrode 10 and the second electrode 30 are adapted to be connected to a leakage current testing instrument to test whether the first test metal structure and the second test metal structure are connected, and to test whether the test distance meets the design.

[0064] In specific implementation, multiple first test metal structures 31 and multiple second test metal structures 32 are arranged in parallel, and the multiple first test metal structures 31 and multiple second test metal structures 32 are arranged in an interdigital pattern, that is, each first test metal structure 31 and each second test metal structure 32 are adjacent to each other. This ensures that the first conductive via 40 and the second conductive via 50 are alternately spaced along the first direction, and multiple first test metal structures 31 can be connected and tested through the second electrode 30. This allows for the reasonable arrangement of the various structures of the test metal layer 300, preventing short circuits. At the same time, it allows for the measurement of whether any two adjacent first conductive vias and second conductive vias are connected, improving measurement efficiency and enhancing the accuracy and precision of the test structure.

[0065] In some alternative implementations, the width of the first test metal structure 31 is greater than or equal to the width of the first conductive via 40;

[0066] The width of the second test metal structure 32 is greater than or equal to the width of the second conductive via 50.

[0067] In some alternative embodiments, the projections of the plurality of first metal structures 11 and the first test metal structure 31 on the plane where the test metal layer 300 is located intersect, and the intersection positions cover the projection of the first conductive via 40 on the plane where the test metal layer 300 is located.

[0068] The projections of multiple second metal structures 21 and second test metal structures 32 on the plane of the test metal layer 300 intersect, and the intersection positions cover the projection of the second conductive via 50 on the plane of the test metal layer 300.

[0069] In some alternative implementations, the first direction is perpendicular to the second direction;

[0070] Multiple first metal structures 11 are arranged in parallel, and the projections of the multiple first metal structures 11 and the first test metal structure 31 onto the plane of the test metal layer 300 are perpendicular to each other.

[0071] The first electrode 10 is perpendicular to the plurality of first metal structures 11; the first electrode 10 is connected to one end of each first metal structure 11.

[0072] Multiple second metal structures 21 are arranged in parallel, and the projections of the multiple second metal structures 21 and the second test metal structure 32 on the plane of the test metal layer 300 are perpendicular to each other.

[0073] In some alternative embodiments, the aperture of the first conductive via 40 gradually decreases from top to bottom, and the first metal structure 11 is connected to the side of the first conductive via 40 with the largest aperture.

[0074] The diameter of the second conductive via 50 gradually decreases from top to bottom, and the second test metal structure 32 is connected to the side of the second conductive via 50 with the largest diameter.

[0075] In specific implementation, such as Figure 4 As shown, the side with the largest diameter of the first conductive via 40 and the second conductive via 50 is arc-shaped.

[0076] In some optional embodiments, the test structure further includes a dielectric layer (not shown in the figure) that surrounds and fills the space between the first test metal structure 31 and the second test metal structure 32 and the second electrode 30 in the test metal layer 300, the space between the first electrode 10 and the first metal structure 11 in the first metal layer 100, the space between the plurality of first conductive vias 40, the space between the plurality of second metal structures 21 in the second metal layer 200, and the space between the plurality of second conductive vias 50.

[0077] In some optional embodiments, the dielectric layer includes a first dielectric layer, a second dielectric layer, a third dielectric layer, a first via dielectric layer, and a second via dielectric layer;

[0078] Specifically, the third dielectric layer fills the space between the first test metal structure 31 and the second test metal structure 32 and the second electrode 30 in the test metal layer 300; the first dielectric layer fills the space between the first electrode 10 and the first metal structure 11 in the first metal layer 100; the second dielectric layer fills the space between multiple second metal structures 21 in the second metal layer 200; the first via dielectric layer fills the space between multiple first conductive vias 40; and the second via dielectric layer fills the space between multiple second conductive vias 50.

[0079] In some optional embodiments, a plurality of first conductive vias 40 and a first via dielectric layer form a first via layer; a plurality of second conductive vias 50 and a second via dielectric layer form a second via layer.

[0080] In some alternative embodiments, the second metal layer 200 further includes a third electrode, with each second metal structure connected to the first electrode. The first electrode 10 and the third electrode are adapted to be connected to a leakage current testing instrument, respectively, to test whether the first metal structure and the second metal structure are connected and whether the test distance meets the design requirements.

[0081] like Figure 5 As shown, this embodiment provides a testing method for a double-layer conductive via process window, the preparation method including but not limited to steps S101 to S104.

[0082] Step S101: Provide a test structure for a double-layer conductive via process window; the distance between adjacent first conductive via 40 and second conductive via 50 is the test distance;

[0083] Step S102: Connect the first electrode 10 to the first potential;

[0084] Step S103: Connect the second electrode 30 to the second potential;

[0085] Step S104: Measure the current at one end of the second electrode 30 as the test current; when the test current is less than the first target current, determine that the test distance meets the design; when the test current is greater than or equal to the first target current, determine that the test distance does not meet the design.

[0086] In practice, when the test current is less than the first target current, it indicates that there is no electrical connection between the adjacent first conductive via and the second conductive via, and it can be determined that the test distance meets the design and the via offset is within the target range; when the test current is greater than or equal to the first target current, it indicates that there is an electrical connection between the adjacent first conductive via and the second conductive via, and it can be determined that the test distance does not meet the design and the via offset exceeds the target range.

[0087] The testing method for the double-layer conductive via process window provided in this embodiment uses the distance between adjacent first and second conductive vias in the test structure of the double-layer conductive via process window as the test distance. The first electrode and the second electrode are connected to the first potential and the second potential, respectively. By comparing the relationship between the test current and the first target current, it can be determined whether the test distance meets the design and the offset between the first and second conductive vias can be monitored. This testing method can test the process interference relationship and circuit continuity between the upper and lower vias in the double-layer conductive via process window, and can effectively evaluate the process and quality of the double-layer conductive via process window, thereby improving the reliability and process accuracy of the double-layer conductive via structure.

[0088] In some alternative implementations, the first potential is greater than the second potential.

[0089] In practice, the first electrode and the second electrode can be connected to different potentials of the leakage current testing instrument. The first potential is greater than the second potential. By measuring the current of a section of the second electrode, it can be determined whether there is an electrical connection between the adjacent first conductive via and the second conductive via, thereby determining whether the test distance meets the design and monitoring the offset between the first conductive via and the second conductive via.

[0090] In some alternative implementations, the first target current is 5E-7A.

[0091] In one example, the first electrode is connected to a high potential (1.1V~2V), and the second electrode is connected to a low potential (0V). The test current at one end of the second electrode is measured. If no leakage occurs (i.e., the test current I < 5E-7A), the process window can cover this situation, and it can be determined that the test distance meets the design and the via offset is within the target range. If leakage occurs (i.e., the test current I ≥ 5E-7A), the process conditions are unreasonable, and it can be determined that the test distance does not meet the design and the via offset exceeds the target range, requiring correction.

[0092] In some alternative implementations, when the test current equals the first target current, the test distance at this point is recorded as the design limit distance.

[0093] In practice, the test distance is gradually reduced within a certain range, causing the test current to gradually increase until the test current increases to equal the first target current. The test distance at this point is recorded as the design limit distance.

[0094] In a specific example, a voltage (i.e., a first potential) is applied to the test unit through the first electrode 10, and no voltage is applied to pin 2 (i.e., the second potential is 0V). Normally, current flows from the first electrode 10 and the first metal structure 11 to the first test metal structure 31 through the first conductive via 40. Due to the high resistance of the dielectric layer between the first test metal structure 31 and the second test metal structure 32, the test current is very small. Assuming that the distance between the adjacent first conductive via 40 and the second conductive via 50 is the test distance a, if there is an offset between the first conductive via 40 and the second conductive via 50, the test distance a decreases, the dielectric layer between the two conductive vias becomes thinner, the resistance decreases, thereby increasing the test current at one end of the second electrode 30. Therefore, when the test distance a decreases to a1 and the test current increases to 5E-7A, it can be determined that when the distance between the first conductive via 40 and the second conductive via 50 is a1, the process window reaches the limit. The design rule can specify that when the distance a between the first conductive via 40 and the second conductive via 50 is less than a1, the layout is unreasonable. Further, to make the layout more reasonable, the design rule can be set such that the distance a between the first conductive via 40 and the second conductive via 50 should be greater than or equal to a1.

[0095] The test method for the process window of double-layer conductive vias provided in this embodiment takes the distance between the adjacent first conductive via and the second conductive via in the test structure of the process window of double-layer conductive vias as the test distance, connects the first electrode and the second electrode to a first potential and a second potential respectively, changes the test current by changing the test distance, and can obtain the design limit distance of the process window of double-layer conductive vias when the test current equals the first target current, which can improve the accuracy of the design rule for the process window of double-layer conductive vias, ensure that the upper conductive via and the lower conductive via are not connected, and further improve the reliability and process accuracy of the double-layer conductive via structure.

[0096] In some optional embodiments, when the test current is less than the second target current, it is determined that the width of the first test metal structure 31 and the width of the second test metal structure 32 conform to the design rule; when the test current is greater than or equal to the second target current, it is determined that the width of the first test metal structure 31 and / or the width of the second test metal structure 32 do / does not conform to the design rule.

[0097] In some optional embodiments, the first potential is greater than the second potential, and the second target current is 5E-7A.

[0098] In one example, the first electrode 10 is connected to a high potential (1.1V~2V), and the second electrode 30 is connected to a low potential (0V). The test current at one end of the second electrode is tested. If no leakage occurs (i.e., the test current I < 5E-7A), then the width b of the first test metal structure 31 and the width c of the second test metal structure 32 can be determined to conform to the design rules. If leakage occurs (i.e., the test current I ≥ 5E-7A), then the process conditions are unreasonable, and it can be determined that the width b of the first test metal structure 31 and / or the width c of the second test metal structure 32 do not conform to the design rules and need to be corrected.

[0099] like Figure 6 As shown, the present invention also provides a detailed flowchart of a test method for designing the limit distance in a double-layer conductive via process window, including the following steps:

[0100] Step S201: Provide a test structure for a double-layer conductive via process window; the distance between adjacent first conductive via 40 and second conductive via 50 is the test distance; the test distance can be adjusted within a certain range.

[0101] Step S202: Connect the first electrode 10 to the first potential.

[0102] Step S203: Connect the second electrode 30 to the second potential.

[0103] Step S204: Measure the current at one end of the second electrode 30 as the test current; when the test current is less than the first target current, determine that the test distance meets the design; when the test current is greater than or equal to the first target current, determine that the test distance does not meet the design.

[0104] Step S205: Gradually decrease the test distance within a certain range, thereby gradually increasing the test current until the test current equals the first target current. Record the test distance at this point as the design limit distance.

[0105] In the description of this specification, the references to terms such as "this embodiment," "an embodiment," "some embodiments," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Furthermore, those skilled in the art can combine and integrate the different embodiments or examples described in this specification and the features of different embodiments or examples without contradiction. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of the present invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0106] The above description does not provide detailed explanations of the technical aspects of each layer's patterning, etching, etc. However, those skilled in the art should understand that various technical means can be used to form layers and regions of the desired shape. Furthermore, to form the same structure, those skilled in the art can also design methods that are not entirely identical to those described above. Additionally, although various embodiments have been described above, this does not mean that the measures in the various embodiments cannot be used advantageously in combination.

[0107] The above description is merely a preferred embodiment of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described above, and various obvious changes, readjustments, combinations, and substitutions can be made without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments, and may include many other equivalent embodiments without departing from the concept of the present invention. The scope of protection of the present invention is determined by the scope of the appended claims.

Claims

1. A test structure for a double-layer conductive via process window, characterized in that, include: A test metal layer includes a plurality of first test metal structures and a plurality of second test metal structures alternately spaced in a first direction; the test metal layer also includes a second electrode connected to each of the second test metal structures. The lengths of the first test metal structure and the second test metal structure extend along a second direction; A first metal layer is located on one side of the test metal layer described above by the third party. The first metal layer includes a first electrode and a plurality of first metal structures, each of which is connected to the first electrode. The length of the first metal structure extends in the first direction; Multiple first conductive vias are located between the first metal layer and the test metal layer; The first conductive via is adapted to connect the first test metal structure to the first metal structure; The second metal layer is located on the side of the test metal layer opposite to the first metal layer, and the second metal layer includes a plurality of second metal structures; The length of the second metal structure extends in the first direction; Multiple second conductive vias are located between the second metal layer and the test metal layer; The second conductive via is adapted to connect the second test metal structure and the second metal structure; the first conductive via and the second conductive via are alternately spaced along the first direction; The distance between adjacent first conductive vias and second conductive vias is the test distance.

2. The test structure for the double-layer conductive via process window according to claim 1, characterized in that, The second electrode is perpendicular to the plurality of the first test metal structures; the second electrode is connected to one end of each of the first test metal structures; The first electrode and the second electrode are adapted to be connected to a leakage current testing instrument, respectively, to test whether the first test metal structure and the second test metal structure are connected, and to test whether the test distance meets the design.

3. The test structure for the double-layer conductive via process window according to claim 2, characterized in that, The width of the first test metal structure is greater than or equal to the width of the first conductive via. The width of the second test metal structure is greater than or equal to the width of the second conductive via.

4. The test structure for the double-layer conductive via process window according to claim 2, characterized in that, The projections of multiple first metal structures and the first test metal structure on the plane where the test metal layer is located intersect, and the intersection positions cover the projections of the first conductive vias on the plane where the test metal layer is located; Multiple second metal structures intersect with the projections of the second test metal structures on the plane where the test metal layer is located, and the intersection positions cover the projections of the second conductive vias on the plane where the test metal layer is located.

5. The test structure for the double-layer conductive via process window according to claim 4, characterized in that, The first direction is perpendicular to the second direction; Multiple first metal structures are arranged in parallel, and the projections of the multiple first metal structures and the first test metal structure onto the plane where the test metal layer is located are perpendicular to each other. The first electrode is perpendicular to the plurality of first metal structures; the first electrode is connected to one end of each of the first metal structures. Multiple second metal structures are arranged in parallel, and the projections of the multiple second metal structures and the second test metal structures on the plane where the test metal layer is located are perpendicular to each other.

6. The test structure for the double-layer conductive via process window according to claim 1, characterized in that, The diameter of the first conductive via gradually decreases from top to bottom, and the first metal structure is connected to the side with the largest diameter of the first conductive via. The diameter of the second conductive via gradually decreases from top to bottom, and the second test metal structure is connected to the side of the second conductive via with the largest diameter.

7. The test structure for the double-layer conductive via process window according to claim 1, characterized in that, The test structure further includes a dielectric layer, which surrounds and fills the space between the first test metal structure and the second test metal structure and the second electrode in the test metal layer, the space between the first electrode and the first metal structure in the first metal layer, the space between the plurality of first conductive vias, the space between the plurality of second metal structures in the first metal layer, and the space between the plurality of second conductive vias.

8. A test method for a double-layer conductive via process window, used to test the test structure of the double-layer conductive via process window as described in any one of claims 1 to 7, characterized in that, include: A test structure for a double-layer conductive via process window as described in any one of claims 1 to 7 is provided; The distance between adjacent first conductive vias and second conductive vias is the test distance; Connect the first electrode to the first potential; Connect the second electrode to the second potential; The current at one end of the second electrode is measured as the test current; When the test current is less than the first target current, the test distance is determined to meet the design requirements; when the test current is greater than or equal to the first target current, the test distance is determined to not meet the design requirements.

9. The test method for the double-layer conductive via process window according to claim 8, characterized in that, The first potential is greater than the second potential.

10. The test method for the double-layer conductive via process window according to claim 8, characterized in that, When the test current is equal to the first target current, the test distance at this time is recorded as the design limit distance; When the test current is less than the second target current, it is determined that the width of the first test metal structure and the width of the second test metal structure conform to the design rules; when the test current is greater than or equal to the second target current, it is determined that the width of the first test metal structure and / or the width of the second test metal structure do not conform to the design rules.

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