Through-silicon via process technology for tsinv silicon nitride ceramic wafer

Abstract

TSINV silicon nitride ceramic wafer via process technology; the technical field to which the invention belongs is: space computing power and space chip, chip heat dissipation, ceramic wafer, aerospace and satellite chip, fourth generation semiconductor processing, high-end AI chip (HY) stacking and (HBM) packaging technical field, related TSINV silicon nitride ceramic wafer via process technology is involved. The TSINV silicon nitride ceramic wafer via process technology No. 12 of Guo Biao Semiconductor can effectively make the via aperture reach 20 microns, the hole depth reach 300 microns, there is no edge collapse, the sidewall perpendicularity is 89+ / ‑1 degrees, the plating film thickness of the TSINV silicon nitride ceramic wafer surface and the inner hole wall of the via reaches 2‑5 nanometer level, the process technology is internationally leading, simple to operate, low in production cost, and high in production efficiency; the effective breakthrough of domestic semiconductor technology is realized and the neck is broken. The invention aims to break the monopoly and the neck, and is used for: high-precision chip manufacturing.

Description

Technical Field

[0001] Technical fields: integrated circuits and semiconductors; space computing power and space chips, chip heat dissipation, ceramic wafers, aerospace and satellite chips, fourth-generation semiconductor processing, high-end AI chip (HY) stacking and (HBM) packaging technology, involving related TSINV silicon nitride ceramic wafer through-hole process technology. Background Technology

[0002] Background technology: Currently, domestic TSINV silicon nitride ceramic wafer through-hole technology cannot process through-holes with a diameter of less than 30 micrometers when processing 300-micrometer-thick TSINV silicon nitride ceramic wafers, and the production cost is high and the production efficiency is low. Current problems with related technologies in China The current problems with related technologies in China are as follows: When Guobiao Semiconductor Company addresses these issues and shortcomings in the second half of 2025, it will encounter a shortage of professional engineers in the domestic semiconductor industry, a very small number of companies in China that produce and process TSINV silicon nitride ceramic wafer vias, and insufficient semiconductor equipment and materials. For example, in testing instruments, it is impossible to detect nanoscale and sub-nanometer-level features on the wafer surface. Technology maturity Maturity of the invention: The process technology of the invention is currently mature and can be mass-produced. Summary of the Invention Summary of the Invention: The technical solution of this invention is the three-step process technology for through-hole (TH) of Guobiao Semiconductor's GB-TSINV silicon nitride ceramic wafers, namely, through-hole, coating, and polishing. The specific process steps are as follows: 1. Through-hole: EUV violet laser through-hole. A femtosecond (or attosecond) violet-enhanced laser is used in a Class 1000 cleanroom environment, maintaining a stable constant temperature of 20 degrees Celsius. Currently, in China, our Guobiao Semiconductor's three-step process technology for through-hole (GB-TSINV) of 300-micron thick TSINV silicon nitride ceramic wafers achieves a minimum through-hole diameter of 20 microns, a hole depth of 300 microns, no edge chipping, and a sidewall perpendicularity of 89 + / - 1 degree. 2. High-purity copper layer coating: Magnetron sputtering deposition coating. The latest magnetron sputtering deposition coating equipment is used in a Class 1000 cleanroom environment, maintaining a stable constant temperature of 20 degrees Celsius. Currently, domestically, the coating used in TSINV silicon nitride ceramic wafer through-holes is conventional sputtering, resulting in very thick coatings. This often leads to excessively thick and uneven TSINV silicon nitride ceramic wafer surfaces, negatively impacting subsequent processes and chip manufacturing performance and cost. We utilize magnetron sputtering to deposit a high-purity copper layer, achieving a coating thickness of 2-5 nanometers on the TSINV silicon nitride ceramic wafer surface and the inner walls of the through-holes—a leading international standard. This facilitates subsequent process implementation, improves chip performance, and reduces chip manufacturing material and packaging costs. 3. Polishing: Chemical Mechanical Polishing (CMP). Our CMP polishing equipment is located in a Class 1000 cleanroom environment, maintaining a stable constant temperature of 20 degrees Celsius. We achieve a wafer-level surface roughness RA < 3nm through CMP polishing of the TSINV silicon nitride ceramic wafer surface. Purpose of the invention The purpose of this invention is to break the monopoly and bottlenecks. The three-step process of TSINV silicon nitride ceramic wafer through-hole (GB-TSINV) technology can effectively achieve breakthroughs in the fields of space computing power and space chips, chip heat dissipation, ceramic wafers, aerospace and satellite chips, fourth-generation semiconductor processing, high-end AI chip (HY) stacking and (HBM) packaging technology. Advantages and effects of the invention The advantages and effects of this invention are as follows: Guobiao Semiconductor's 3-step TSINV silicon nitride ceramic wafer through-hole (GB-TSINV) process technology can effectively achieve TSINV silicon nitride ceramic wafer through-holes smaller than 30 micrometers, reduce the thickness of the high-purity copper layer deposited on the surface of the TSINV silicon nitride ceramic wafer, and is simple to operate, has low production cost, and high production efficiency; moreover, the processing technology of Guobiao Semiconductor's 3-step TSINV silicon nitride ceramic wafer through-hole (GB-TSINV) process technology can effectively process TSINV silicon nitride ceramic wafer through-holes with a minimum diameter of 20 micrometers and a depth of 300 micrometers, achieving an effective breakthrough in domestic semiconductor technology and breaking through the bottleneck. Detailed Implementation Detailed Implementation: Example Description: The present invention will be further described below with reference to the embodiments. Guobiao Semiconductor takes a SiN silicon nitride ceramic wafer substrate, with dimensions of 180mm*170mm and a thickness of 300um, and first cuts it into small pieces with dimensions of 70mm in length, 35mm in width, and 300um in thickness. Then, it uses Guobiao Semiconductor's Guobiao Semiconductor TSINV silicon nitride ceramic wafer through-hole (GB-TSINV) process technology in a three-step process: through-hole, coating, and polishing. Finally, the final processed TSINV silicon nitride ceramic through-hole wafer is displayed. Attached Figure Description Figure 1 : Overall schematic diagram of Guobiao Semiconductor's TSINV silicon nitride ceramic wafer through-hole process technology flow; Figure 2 Guobiao Semiconductor's SIN silicon nitride ceramic wafer substrate has the following dimensions: 180mm long, 170mm wide, and 300um thick. A whole wafer is cut into smaller pieces, with the smaller pieces having the following parameters: 70mm long, 35mm wide, and 300um thick. Figure 3 This is a demonstration of the through-hole drilling and groove processing performed on the diced SiN silicon nitride ceramic wafer substrate by Guobiao Semiconductor. Figure 4 Guobiao Semiconductor performs magnetron sputtering deposition of a high-purity copper layer on the through-hole of TSINV silicon nitride ceramic wafers; and then performs MCP polishing on the high-purity copper layer on the TSINV surface; finally, the finished product is displayed as a whole; the product and process are internationally leading.

Claims

1. TSINV silicon nitride ceramic wafer through-hole process technology is a 3-step process, namely through-hole, coating and polishing.

2. TSINV silicon nitride ceramic wafer through-hole process technology; the specific process steps are as follows:

1. Through-hole: EUV violet laser through-hole. A femtosecond (or attosecond) violet-enhanced laser is used in the laser equipment, in a Class 1000 cleanroom environment, maintaining a stable constant temperature of 20 degrees Celsius. Our Guobiao Semiconductor TSINV silicon nitride ceramic wafer through-hole (GB-TSINV) process technology, using a 3-step method, produces through-holes with a minimum diameter of 20 micrometers, a depth of 300 micrometers, no edge chipping, and a sidewall perpendicularity of 89 + / - 1 degree.

2. High-purity copper layer deposition: Magnetron sputtering deposition. Utilizing state-of-the-art magnetron sputtering deposition equipment in a Class 1000 cleanroom environment, maintaining a stable constant temperature of 20 degrees Celsius. Currently, domestically, conventional sputtering deposition is used for through-hole deposition in TSINV silicon nitride ceramic wafers, resulting in very thick coatings. This often leads to excessively thick and uneven TSINV silicon nitride ceramic wafer surfaces, affecting subsequent processes and chip production performance and cost. We employ magnetron sputtering deposition to deposit a high-purity copper layer, achieving a coating thickness of 2-5 nanometers on the TSINV silicon nitride ceramic wafer surface and through-hole walls—an internationally leading technology. This facilitates subsequent process implementation, improves chip performance, and reduces chip production material and packaging costs.

3. Polishing: Chemical mechanical polishing (CMP). Utilizing chemical mechanical polishing (CMP) equipment in a Class 1000 cleanroom environment, maintaining a stable constant temperature of 20 degrees Celsius, we perform CMP polishing on the TSINV silicon nitride ceramic wafer surface to achieve a wafer-level surface roughness RA < 3nm.

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