Semiconductor device

Abstract

Embodiments provide a semiconductor device capable of improving heat dissipation. The semiconductor device of the embodiments includes a semiconductor chip, a first frame electrically connected to a first electrode disposed on an upper surface of the semiconductor chip, a second frame electrically connected to a second electrode disposed on a bottom surface of the semiconductor chip, and a sealing member that seals the semiconductor chip, the first frame including a first electrode portion configured in a planar shape and electrically connected to the first electrode, and a first lead extending from the first electrode portion, the first electrode portion being exposed from the sealing member, the second frame including a second electrode portion configured in a planar shape and electrically connected to the second electrode, a protruding portion bent in a manner of extending from the second electrode portion and protruding in a downward direction, and a second lead extending from the protruding portion.

Description

[0001] [Linked Application]

[0002] This application enjoys priority based on Japanese Patent Application No. 2025-043786 (filed on March 18, 2025). This application incorporates the entire contents of the basic application by reference to that basic application. Technical Field

[0003] Embodiments of the present invention relate to semiconductor devices. Background Technology

[0004] Semiconductor packages with top-side cooling structures have been commercialized in recent years due to their superior heat dissipation. However, such semiconductor packages, which are connected by connectors, suffer from technical problems such as (1) small size of the semiconductor chip they can accommodate, (2) small heat dissipation area, and (3) deterioration of on-resistance (Ron).

[0005] Typically, lead frames used in semiconductor packages include a base portion for mounting the semiconductor chip and pillar portions that serve as lead terminals. The base portion and pillar portions are constructed from the same component. For example, even if it is desired to increase the area of ​​the base portion, which has a heat dissipation function, there are limitations due to stamping process constraints. Summary of the Invention

[0006] An embodiment provides a semiconductor device capable of improving heat dissipation.

[0007] A semiconductor device according to an embodiment includes: a semiconductor chip; a first frame electrically connected to a first electrode disposed on an upper surface of the semiconductor chip; a second frame electrically connected to a second electrode disposed on a bottom surface of the semiconductor chip; and a sealing member for sealing the semiconductor chip; the first frame includes: a first electrode portion configured as a planar shape and electrically connected to the first electrode; and a first lead extending from the first electrode portion; the first electrode portion is exposed from the sealing member; the second frame includes: a second electrode portion configured as a planar shape and electrically connected to the second electrode; a protrusion bent in a downward direction extending from the second electrode portion; and a second lead extending from the protrusion. Attached Figure Description

[0008] Figure 1 This is a top view of the semiconductor device according to this embodiment.

[0009] Figure 2 It is a top view of the inside of a semiconductor device.

[0010] Figure 3 It is along Figure 1 A cross-sectional view of the semiconductor device shown by the AA′ line.

[0011] Figure 4 It is along Figure 1 A cross-sectional view of the semiconductor device shown with BB′ line.

[0012] Figure 5 It is Figure 3 The enlarged partial cross-sectional view of region C shown.

[0013] Figure 6 This is a cross-sectional view of a semiconductor integrated circuit. Detailed Implementation

[0014] Hereinafter, embodiments will be described with reference to the accompanying drawings. The several embodiments shown below illustrate apparatus and methods for embodying the technical concept of the present invention, and do not define the technical concept of the present invention by the shape, structure, or arrangement of the constituent components. Furthermore, in the following description, elements having the same function and structure will be labeled with the same reference numerals, and repeated descriptions will be omitted.

[0015] [1] Structure of semiconductor device 1

[0016] Figure 1 This is a top view of the semiconductor device 1 according to this embodiment. Figure 1 In the diagram, the X direction is the direction along one side of the semiconductor device 1, and the Y direction is the direction orthogonal to the X direction. Figure 2 This is an internal top view of semiconductor device 1. Figure 2 This indicates a structure in which the sealing component of semiconductor device 1 is omitted. Figure 3 It is along Figure 1 A cross-sectional view of semiconductor device 1 with AA′ line shown. Figure 4 It is along Figure 1 A cross-sectional view of the semiconductor device 1 with the BB′ line shown. Figure 5 It is Figure 3 The enlarged partial cross-sectional view of region C shown.

[0017] Semiconductor device 1 includes a semiconductor chip and a semiconductor package that seals the semiconductor chip. Semiconductor device 1 is, for example, composed of a metal oxide semiconductor field-effect transistor (MOSFET) or an insulated gate bipolar transistor (IGBT). In this embodiment, the case where semiconductor device 1 is a MOSFET will be described as an example.

[0018] Semiconductor device 1 is a component that generates heat through operation. Semiconductor device 1 is capable of handling large currents, requiring sophisticated heat dissipation measures. Semiconductor device 1 may include components primarily composed of Si, or components primarily composed of SiC, etc.

[0019] Semiconductor device 1 includes a semiconductor chip 10, a lead frame 11, a clamping frame 12, a clamping frame 13, and a sealing component 14. The lead frame 11 is also referred to as the first frame. The clamping frame 12 is also referred to as the second frame.

[0020] Semiconductor chip 10, for example, has a quadrilateral shape. Semiconductor chip 10 includes a MOSFET or an IGBT. Semiconductor chip 10, for example, has a source electrode and a gate electrode on its bottom surface and a drain electrode on its top surface.

[0021] The lead frame 11 includes an electrode portion 11A and a plurality of leads 11B. The lead frame 11 is made of, for example, copper (Cu). The electrode portion 11A and the plurality of leads 11B are integrally formed using the same material.

[0022] An electrode portion 11A is disposed on the semiconductor chip 10, separated by solder 15. The electrode portion 11A is planar. The electrode portion 11A is electrically connected to the drain electrode of the semiconductor chip 10. The area of ​​the electrode portion 11A is larger than the area of ​​the semiconductor chip 10. Figure 3 In the reversed state, the semiconductor chip 10 is mounted on the electrode portion 11A. The electrode portion 11A is also referred to as the base portion. The area of ​​the semiconductor chip 10 is limited by the area of ​​the electrode portion 11A. That is, if the area of ​​the electrode portion 11A can be increased, the area of ​​the semiconductor chip 10 can also be increased. The electrode portion 11A is exposed from the top of the sealing member 14. The electrode portion 11A has the function of dissipating heat generated on the semiconductor chip 10.

[0023] Multiple leads 11B extend from the electrode portion 11A along the Y direction. In this embodiment, four leads 11B are shown as an example. The shape of the leads 11B when viewed from the side is L-shaped (also called gull-wing shape).

[0024] The clamping frame 12 includes an electrode portion 12A, a protrusion 12B, and a lead wire 12C. The clamping frame 12 is made of, for example, copper (Cu). The electrode portion 12A, the protrusion 12B, and the lead wire 12C are integrally constructed using the same material.

[0025] An electrode portion 12A is disposed beneath the semiconductor chip 10, separated by solder 16. The electrode portion 12A is planar. The electrode portion 12A is electrically connected to the source electrode of the semiconductor chip 10. The area of ​​the electrode portion 12A is appropriately set according to the area of ​​the source electrode. The area of ​​the electrode portion 12A is smaller than the area of ​​the semiconductor chip 10. In addition, the area of ​​the electrode portion 12A is smaller than the area of ​​the electrode portion 11A.

[0026] The protrusion 12B is curved in a downward direction. The protrusion 12B is configured to be spaced downward from the end and side of the semiconductor chip 10. The protrusion 12B has the function of preventing the clamping frame 12 from contacting the side of the semiconductor chip 10 and causing a short circuit in the electrodes or wiring within the semiconductor chip 10.

[0027] Multiple leads 12C extend from the protrusion 12B in a direction opposite to the Y direction. In this embodiment, as an example, three leads 12C are shown. The leads 12C have an L-shaped shape when viewed from the side.

[0028] The clamping frame 13 includes an electrode portion 13A, a protrusion 13B, and a lead wire 13C. The clamping frame 13 is made of, for example, copper (Cu). The electrode portion 13A, the protrusion 13B, and the lead wire 13C are integrally constructed using the same material.

[0029] An electrode portion 13A is disposed beneath the semiconductor chip 10 via solder (not shown). The electrode portion 13A is electrically connected to the gate electrode of the semiconductor chip 10. The area of ​​the electrode portion 13A is appropriately set according to the area of ​​the gate electrode.

[0030] The protrusion 13B is curved in a downward direction. The protrusion 13B is configured to be spaced downward from the end and side of the semiconductor chip 10. The protrusion 13B has the function of preventing the clamping frame 13 from contacting the side of the semiconductor chip 10 and causing a short circuit in the electrodes or wiring within the semiconductor chip 10.

[0031] Lead 13C extends from protrusion 13B in a direction opposite to the Y direction. The shape of lead 13C when viewed from the side is L-shaped.

[0032] The sealing member 14 seals the semiconductor chip 10, a portion of the lead frame 11, a portion of the clamping frame 12, and a portion of the clamping frame 13. The sealing member 14 is made of resin. Multiple leads protrude from the sealing member 14. In addition, the upper surface of the electrode portion 11A of the lead frame 11 is exposed from the sealing member 14.

[0033] [2] Function

[0034] In this embodiment, the electrode portion 12A, the protrusion 12B, and the lead wire 12C of the clamping frame 12 are integrally constructed using the same material. Furthermore, the lead frame 11 and the clamping frame 12 are constructed as separate components. Therefore, the length of the electrode portion 11A in the X direction of the lead frame 11 is not limited. Thus, the length of the electrode portion 11A in the X direction of the lead frame 11 can be set to be relatively long.

[0035] For example, the lead frame 11 (specifically, the electrode portion 11A) can be extended to a position where it partially overlaps with the lead 12C (the portion forward of the protrusion 12B) in the clamp frame 12. Therefore, the length of the heat-dissipating electrode portion 11A can be increased, and its area can be enlarged. As a result, heat dissipation can be improved.

[0036] Furthermore, according to the specifications of the semiconductor device 1, the lead 12C of the clamp frame 12 and the electrode portion 11A of the lead frame 11 may not overlap.

[0037] Furthermore, the thickness of the electrode portion 11A of the lead frame 11 is set to be thicker than the thickness of the electrode portion 12A of the clamp frame 12. This improves the heat dissipation of the lead frame 11.

[0038] The material of the clamping frame 12 can be different from that of the lead frame 11. The lead frame 11 is electrically connected to the drain electrode of the semiconductor chip 10, and the clamping frame 12 is electrically connected to the source electrode of the semiconductor chip 10. In this structural example, for example, the conductivity of the clamping frame 12 can also be set to be higher than that of the lead frame 11.

[0039] The characteristics of the clamping frame 13 are the same as those of the clamping frame 12. In addition, the function of the clamping frame 13 is also the same as that of the clamping frame 12.

[0040] [3] Structural example of semiconductor integrated circuit 20

[0041] Next, an example of the structure of the semiconductor integrated circuit 20 on which the semiconductor device 1 is mounted will be described. Figure 6 This is a cross-sectional view of semiconductor integrated circuit 20.

[0042] The semiconductor integrated circuit 20 includes a semiconductor device 1, a printed circuit board 21, a heat sink 25, and a plurality of semiconductor chips 26. The semiconductor device 1 is configured as described above.

[0043] The printed circuit board 21 is constructed by forming wiring on an insulator substrate. The printed circuit board 21 includes a printed wiring board (PWB) and a printed circuit board (PCB). The printed circuit board 21 has multiple electrodes 22 on its upper and lower surfaces. The multiple electrodes 22 are exposed on the upper and lower surfaces of the printed circuit board 21. The electrodes 22 include solder surfaces and solder pads.

[0044] Semiconductor device 1 is mounted, for example, on the upper surface of printed circuit board 21. Multiple leads of semiconductor device 1 are electrically connected to multiple electrodes 22 of printed circuit board 21 via solder 23.

[0045] A heat sink 25 is disposed on the upper surface of the semiconductor device 1, separated by an insulating member 24. The insulating member 24 is made of an insulating material with heat dissipation properties. The heat sink 25 is made of a metal with heat dissipation properties and high thermal conductivity (i.e., low thermal resistance).

[0046] The electrode portion 11A of the lead frame 11 is in direct contact with the insulating component 24. Additionally, in Figure 6 The simplified diagram shows the lead frame 11 and the clamping frame 12.

[0047] Multiple semiconductor chips 26 are respectively mounted on the bottom surface of, for example, a printed circuit board substrate 21. The multiple semiconductor chips 26 include passive components and active components. Multiple leads of the semiconductor chips 26 are electrically connected to multiple electrodes 22 of the printed circuit board substrate 21 via solder 23.

[0048] In the semiconductor integrated circuit 20 configured in this way, the heat generated in the semiconductor device 1 is transferred to the heat sink 25 and dissipated through the heat sink 25. In this embodiment, the area of ​​the electrode portion 11A of the lead frame 11 can be further increased. As a result, when the semiconductor device 1 is mounted on the printed circuit board 21 or the like, the heat dissipation performance of the semiconductor device 1 can be improved.

[0049] According to this embodiment, the lead frame 11 and the clamping frame 12 are composed of different components. Therefore, the area of ​​the electrode portion 11A of the lead frame 11 can be increased without being restricted by the clamping frame 12. The electrode portion 11A is exposed from the sealing member 14 and has a heat dissipation function. As a result, the heat dissipation performance of the semiconductor device 1 can be improved.

[0050] In addition, since the area of ​​the electrode portion 11A of the lead frame 11 can be increased, the area of ​​the semiconductor chip 10 mounted on the electrode portion 11A can also be increased.

[0051] For example, in the case where the electrode portion and lead are made of different components and are electrically connected to the source electrode of the semiconductor chip 10, it is necessary to electrically connect the electrode portion and lead using solder or the like. On the other hand, in this embodiment, the electrode portion 12A, the protrusion 12B, and the lead 12C are integrally formed as the frame 12. As a result, the cost of the semiconductor device 1 can be reduced. In addition, the degradation of the on-resistance (Ron) can be suppressed.

[0052] Furthermore, the clamping frame 12 can be partially overlapped with the frame 11. Therefore, small-sized semiconductor packages can be manufactured without the thickness of the clamping frame 12 becoming locally thinner due to sharp-angle bending.

[0053] Furthermore, the clamping frame 12 can be integrally formed using processes such as stamping. Therefore, it is possible to prevent localized thinning of the clamping frame 12. Consequently, it is possible to suppress the degradation of the on-resistance (Ron) due to the shape of the clamping frame 12.

[0054] Furthermore, since the lead frame 11 and the clamp frame 12 are each made of a single integrated component, the number of components constituting the semiconductor device 1 can be reduced.

[0055] Several embodiments of the present invention have been described, but these embodiments are given by way of example and are not intended to limit the scope of the invention. These embodiments can be implemented in various other ways, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, as well as in the scope of the invention as set forth in the claims and its equivalents.

Claims

1. A semiconductor device comprising: Semiconductor chips; The first frame is electrically connected to a first electrode disposed on the upper surface of the semiconductor chip; The second frame is electrically connected to the second electrode disposed on the bottom surface of the semiconductor chip; as well as Sealing component, sealing the semiconductor chip, The first frame includes: a first electrode portion configured as a planar shape and electrically connected to the first electrode; and a first lead extending from the first electrode portion. The first electrode portion protrudes from the sealing component. The second frame includes: a second electrode portion configured as a planar shape and electrically connected to the second electrode; a protrusion that bends in a downward direction extending from the second electrode portion; and a second lead extending from the protrusion.

2. The semiconductor device according to claim 1, wherein, The second electrode portion, the protrusion, and the second lead that constitute the second frame are integrally formed from the same material.

3. The semiconductor device according to claim 1, wherein, The first electrode portion is configured to partially overlap with the second lead.

4. The semiconductor device according to claim 1, wherein, The area of ​​the first electrode portion is larger than the area of ​​the second electrode portion.

5. The semiconductor device according to claim 1, wherein, The area of ​​the first electrode portion is larger than the area of ​​the semiconductor chip.

6. The semiconductor device according to claim 1, wherein, The thickness of the first electrode portion is greater than the thickness of the second electrode portion.

7. The semiconductor device according to claim 1, wherein, It also has: A first solder is disposed between the semiconductor chip and the first electrode portion; and The second solder is disposed between the semiconductor chip and the second electrode portion.

8. The semiconductor device according to claim 1, wherein, The material of the second frame is the same as that of the first frame.

9. The semiconductor device according to claim 1, wherein, The material of the second frame is different from that of the first frame.

10. The semiconductor device according to claim 9, wherein, The conductivity of the second frame is higher than that of the first frame.

11. The semiconductor device according to claim 1, wherein, The first lead and the second lead include L-shaped electrode portions.

12. The semiconductor device according to claim 1, wherein, The semiconductor chip includes transistors.

13. The semiconductor device according to claim 12, wherein, The first frame is electrically connected to the drain electrode of the transistor. The second frame is electrically connected to the source electrode of the transistor.

14. The semiconductor device according to claim 1, wherein, It also has: An insulating component is disposed on the first electrode portion of the first frame; and A heat sink is mounted on the insulating component.

15. The semiconductor device according to claim 1, wherein, The first frame includes a plurality of first leads. The second frame includes multiple second leads.

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