Semiconductor device and method for manufacturing semiconductor device

Abstract

A semiconductor device and a manufacturing method of a semiconductor device for measuring a height of a conductor ball from a reference surface with high precision. The semiconductor device has a first circuit board, an electronic component provided on the first circuit board, a second circuit board opposed to the first circuit board with the electronic component interposed therebetween, and a connection component which is a combination of conductor balls mounted on the first circuit board and the second circuit board, for connecting the first circuit board and the second circuit board. The first circuit board has a wiring layer having a pad to which a conductor ball forming the connection component is joined, a first insulating layer covering the wiring layer and having a first opening portion exposing the pad, and a second insulating layer laminated on the first insulating layer and having a second opening portion exposing a surface of the first insulating layer around the pad and the first opening portion and a third opening portion exposing a surface of the first insulating layer at a position different from the second opening portion.

Description

Technical Field

[0001] This invention relates to a semiconductor device and a method for manufacturing a semiconductor device. Background Technology

[0002] In recent years, in order to achieve high-density component mounting, semiconductor devices that integrate electronic components such as semiconductor chips inside a substrate have attracted attention. Such semiconductor devices are configured, for example, to have two circuit boards, one of which mounts the electronic components such as semiconductor chips, which are sandwiched between the other circuit board.

[0003] Two circuit boards are connected by a connecting component. Specifically, conductive balls, such as solder balls, which are bonded to pads on one of the two circuit boards, are placed on pads on the other circuit board and bonded to the pads of the other circuit board by melting with heat and pressure. Thus, the two circuit boards are connected by a connecting component made of conductive balls.

[0004] In addition, a semiconductor device is known to have a double solder mask layer formed on the surface of a circuit board, the double solder mask layer having openings at the locations of pads contained in the wiring layer.

[0005] Patent Document 1: Japanese Patent No. 5058929

[0006] Patent Document 2: Japanese Patent Application Publication No. 2020-96041 Summary of the Invention

[0007] On the other hand, in semiconductor devices that integrate electronic components, the diameter of the conductive ball forming the connecting component depends on the thickness of the electronic component sandwiched between two circuit boards. In this case, the thicker the electronic component sandwiched between the two circuit boards, the longer the connecting component connecting the two circuit boards, and thus the larger the diameter of the conductive ball can be.

[0008] To address this issue and control the diameter of a single conducting sphere, it is possible to mount conducting spheres on two separate circuit boards and connect them using a connecting component formed by fusing the conducting spheres mounted on the two boards together. For a more reliable connection between the two circuit boards, measuring the height of the conducting sphere from the surface of the solder mask layer formed on the circuit board is particularly important.

[0009] One method for measuring the height of a conducting sphere is by using reflected light. In this method, light is shone onto the surface of the solder mask layer, which serves as a reference plane for height measurement, and onto the conducting sphere. The reflected light is then used to measure values ​​related to the height of the reference plane and the height of the conducting sphere, thereby allowing the calculation of the height of the conducting sphere from the reference plane.

[0010] If the aforementioned double-layer solder mask is formed on the surface of the circuit board, the surface of the lower layer of the double-layer solder mask is used as a reference plane to measure the height of the conductor ball from this reference plane. In this case, the value related to the height of the reference plane is measured using light reflected from the surface of the lower layer's solder mask surrounding the opening of the upper layer's solder mask.

[0011] However, the following problem exists: it is difficult to measure the height-related values ​​relative to the reference plane using reflected light for the surface of the lower solder mask exposed through an opening in the upper solder mask. Specifically, for the surface of the lower solder mask exposed through an opening in the upper solder mask, the area is small and the light is blocked by the conductor ball, making it impossible to accurately measure the height-related values ​​relative to the reference plane using reflected light. As a result, when a double layer of solder mask is formed on the surface of the circuit board, it is difficult to measure the height of the conductor ball from the reference plane with high precision.

[0012] The disclosed technology was developed in view of the above-mentioned problems, and its purpose is to provide a semiconductor device and a method for manufacturing the semiconductor device that can measure the height of a conductor ball from a reference plane with high accuracy.

[0013] The semiconductor device disclosed in this application includes, in one embodiment, a first circuit board, an electronic component, a second circuit board, and a connecting component. The electronic component is disposed on the first circuit board. The second circuit board is positioned opposite the first circuit board, sandwiching the electronic component. The connecting component is an assembly of conductive balls respectively mounted on the first and second circuit boards, used to connect the first and second circuit boards. The first circuit board has a wiring layer, a first insulating layer, and a second insulating layer. The wiring layer has pads, and the conductive balls forming the connecting component are bonded to the pads. The first insulating layer covers the wiring layer and has a first opening that exposes the pads. The second insulating layer is stacked on top of the first insulating layer and has a second opening and a third opening. The second opening exposes the surface of the first insulating layer around the pads and the first opening, and the third opening exposes the surface of the first insulating layer at a different location than the second opening.

[0014] According to one embodiment of the semiconductor device disclosed in this application, it is possible to perform high-precision measurement of the height of a conducting sphere measured from a reference plane. Attached Figure Description

[0015] Figure 1 This is a schematic cross-sectional view showing the structure of the semiconductor device according to the embodiment.

[0016] Figure 2 This is a top view showing the structure of the semiconductor device according to the embodiment.

[0017] Figure 3 This is a flowchart illustrating a method for manufacturing a first circuit board according to an embodiment.

[0018] Figure 4 This is a schematic diagram showing a cross-section of the first circuit board.

[0019] Figure 5 This diagram illustrates the process of forming the second protective insulation layer.

[0020] Figure 6 This diagram illustrates the solder ball mounting process.

[0021] Figure 7 This diagram illustrates the installation of electronic components.

[0022] Figure 8 This is a flowchart illustrating the ball height measurement process in the implementation method.

[0023] Figure 9 This is a flowchart illustrating a method for manufacturing a second circuit board according to an embodiment.

[0024] Figure 10 This is a schematic diagram showing a cross-section of the second circuit board.

[0025] Figure 11 This diagram illustrates the solder ball mounting process.

[0026] Figure 12 This is a flowchart illustrating a method for manufacturing a semiconductor device according to an embodiment.

[0027] Figure 13 This diagram illustrates the stacking of the first and second circuit boards.

[0028] Figure 14 This diagram illustrates the joining process.

[0029] Figure 15 This diagram illustrates the molding process.

[0030] Figure 16 This diagram illustrates the cutting process.

[0031] Figure 17 This is a top view showing the structure of the semiconductor device in Modified Example 1 of the embodiment.

[0032] Figure 18 This is a top view showing the structure of the semiconductor device in Modified Example 2 of the embodiment.

[0033] Figure 19 This is a top view showing the structure of the semiconductor device in Modified Example 3 of the embodiment.

[0034] Symbol Explanation

[0035] 100 Semiconductor Devices

[0036] 101 Encapsulating Resin

[0037] 110 First Circuit Board

[0038] 111, 121 substrate

[0039] 112 First protective insulation layer

[0040] Openings 112a, 112b, 114a, 116a, 116b, 116c, 122a, 124a

[0041] 113, 113a, 113b, 123 Top surface pads

[0042] 114, 122 Solder mask layer

[0043] 115, 125 Lower surface pads

[0044] 116 Second protective insulation layer

[0045] 120 Second Circuit Board

[0046] 124 Protective insulation layer

[0047] 130 Connecting components

[0048] Solder balls 131 and 132

[0049] 140 Electronic Components

[0050] 141 bumps

[0051] 142 Bottom Filling Material

[0052] 150 equipped area Detailed Implementation

[0053] Hereinafter, embodiments of the semiconductor device disclosed in this application will be described in detail based on the accompanying drawings. Furthermore, the disclosed technology is not limited to these embodiments.

[0054] Implementation

[0055] Figure 1 This is a schematic cross-sectional view showing the structure of the semiconductor device 100 according to the embodiment. Figure 2 This is a top view showing the structure of the semiconductor device 100 according to the embodiment. Figure 1 In the middle, it is schematically represented that Figure 2 A cross-section of the semiconductor device 100 on line II. Additionally, in Figure 2For ease of explanation, the illustrations of the second circuit board 120 and the connecting component 130 of the semiconductor device 100 are omitted.

[0056] Furthermore, for ease of explanation, in the following text, the direction from the first circuit board 110 toward the second circuit board 120 will be defined as the upward direction, and the direction from the second circuit board 120 toward the first circuit board 110 will be defined as the downward direction, and the vertical direction of the semiconductor device 100 will be defined accordingly. However, the semiconductor device 100 may also be manufactured or used by flipping it vertically, and can be manufactured and used in any orientation.

[0057] Figure 1 The semiconductor device 100 shown has a first circuit board 110 and a second circuit board 120 stacked together, and has an encapsulating resin 101 covering an electronic component 140, which is configured to be sandwiched between the first circuit board 110 and the second circuit board 120. Specifically, the semiconductor device 100 is configured to connect the first circuit board 110 and the second circuit board 120 via a connecting member 130. The connecting member 130 is a composite obtained by integrating solder balls respectively mounted on the first circuit board 110 and the second circuit board 120. Furthermore, the electronic component 140 is mounted on the upper surface of the first circuit board 110, sandwiched between the first circuit board 110 and the second circuit board 120, and covered by the encapsulating resin 101.

[0058] The encapsulating resin 101 is, for example, an insulating resin such as a thermosetting epoxy resin containing inorganic fillers such as alumina, silicon dioxide, aluminum nitride, or silicon carbide. The electronic component 140 is, for example, a semiconductor chip.

[0059] The first circuit board 110 includes: a substrate 111, a first protective insulating layer 112 (an example of the first insulating layer), upper surface pads 113, a solder resist layer 114, lower surface pads 115, and a second protective insulating layer 116 (an example of the second insulating layer). Furthermore, although in Figure 1 The illustration is omitted, but the upper surface pad 113 and the lower surface pad 115 are electrically connected through conductive lines provided in the substrate 111.

[0060] The substrate 111 is an insulating plate-shaped component and serves as the substrate of the first circuit board 110. The substrate 111 can be made of, for example, a thermosetting insulating resin, primarily composed of epoxy resin, impregnated into a reinforcing component, i.e., glass cloth (glass textile), and then cured into epoxy resin. The reinforcing component is not limited to glass cloth; for example, it can be made of glass nonwoven fabric, aramid fabric, liquid crystal polymer (LCP) fabric, and LCP nonwoven fabric. Furthermore, the thermosetting insulating resin, in addition to epoxy resin, can be made of, for example, polyimide resin and cyanate resin. Wiring layers, including upper surface pads 113 and lower surface pads 115, are formed on both surfaces of the substrate 111. The wiring layers can be made of, for example, copper or a copper alloy.

[0061] Furthermore, the substrate 111 is not limited to a single-layer insulating component, but can also be a multilayer substrate with a multi-layer structure obtained by stacking insulating layers and wiring layers. When the substrate 111 is a multilayer substrate, the wiring layer sandwiched in the middle of the insulating layer is electrically connected through a through-hole penetrating the insulating layer. The insulating layer material can be, for example, an insulating resin such as epoxy resin or polyimide resin, or a resin material incorporating fillers such as silica or alumina. The wiring layer material can be, for example, copper (Cu) or a copper alloy.

[0062] The first protective insulating layer 112 is an insulating layer that covers the wiring layer including the upper surface pads 113 on the upper surface of the substrate 111. The first protective insulating layer 112 has an opening 112a (an example of a first opening) at the location where the connecting member 130 is formed, exposing the upper surface pads 113a for connection with the connecting member 130 from the opening 112a. Additionally, the surface of the first protective insulating layer 112 has a mounting area 150 for mounting electronic components 140 (see [link to documentation]). Figure 2 An opening 112b is provided, through which the upper surface pads 113b for mounting electronic components 140 are exposed. The material of the first protective insulating layer 112 can be, for example, an insulating resin such as epoxy resin or acrylic resin.

[0063] Upper surface pads 113 are formed on the wiring layer of the upper surface of the substrate 111. For connection with the connector 130 and for mounting the electronic component 140, the upper surface pads 113 expose an opening in the first protective insulating layer 112. Specifically, the upper surface pad 113a of the upper surface pads 113 is connected to the connector 130. The first circuit board 110 and the second circuit board 120 are bonded via the connector 130. Before the first circuit board 110 and the second circuit board 120 are bonded, solder balls forming the connector 130 are bonded to the upper surface pads 113a. Additionally, the electronic component 140 is connected to the upper surface pads 113b of the upper surface pads 113. Specifically, for example, the electronic component 140 is connected to the upper surface pads 113b in a flip-chip manner via solder bumps 141. Then, an underfill material 142 is filled between the first circuit board 110 and the electronic component 140. The material for the upper surface pad 113 can be the same as that for the wiring layer, such as copper or a copper alloy.

[0064] The solder mask 114 is an insulating layer used to cover the lower surface of the substrate 111, including the wiring layer of the lower surface pads 115. An opening is provided in a portion of the solder mask 114, through which the lower surface pads 115 are exposed. The material of the solder mask 114 can be an insulating resin such as epoxy resin or acrylic resin.

[0065] The lower surface pad 115 is formed on the wiring layer on the lower surface of the substrate 111 and is exposed from the opening of the solder mask layer 114 to form external connection terminals. That is, the lower surface pad 115 is formed with external connection terminals (not shown), such as solder balls. The material of the lower surface pad 115 can be the same as that of the wiring layer, such as copper or a copper alloy.

[0066] The second protective insulating layer 116 is an insulating layer stacked on top of the first protective insulating layer 112. A portion of the second protective insulating layer 116 has an opening 116a (an example of a second opening), through which the surface of the first protective insulating layer 112 surrounding the upper surface pad 113a and the opening 112a is exposed. Additionally, another portion of the second protective insulating layer 116 has an opening 116b (an example of a fourth opening), through which the mounting area 150 on the surface of the first protective insulating layer 112 (see...) Figure 2 The first protective insulation layer 112 is exposed from opening 116b. Additionally, an opening 116c (an example of a third opening) is provided at a location different from the opening 116a of the second protective insulation layer 116, through which the surface of the first protective insulation layer 112 is exposed. The surface of the first protective insulation layer 112 exposed from this opening 116c serves as a reference surface for measuring the height of the conductor ball forming the connecting member 130.

[0067] In this embodiment, the opening 116c of the second protective insulating layer 116 is located at a different position than the opening 116a that exposes the surface of the first protective insulating layer 112 surrounding the opening 112a, thus exposing the surface of the first protective insulating layer 112, which serves as a reference plane for measuring the height of the solder ball. The surface of the first protective insulating layer 112 exposed from the opening 116c of the second protective insulating layer 116 is a relatively large area and does not have any obstructions that block the illumination light. Therefore, when light is irradiated onto the surface of the first protective insulating layer 112 exposed from the opening 116c, the value related to the height of the reference plane can be accurately measured by the light reflected from the surface of the first protective insulating layer 112, enabling high-precision measurement of the height of the solder ball from the reference plane.

[0068] The surface area of ​​the first protective insulating layer 112 exposed from the opening 116c is larger than the surface area of ​​the first protective insulating layer 112 exposed from the opening 116a. Therefore, the value related to the height of the reference plane can be accurately measured by the light reflected from the surface of the first protective insulating layer 112, enabling more precise measurement of the height of the solder ball from the reference plane.

[0069] Here, refer to Figure 2 The location of the opening 116c is explained.

[0070] like Figure 2 As shown, opening 116c is formed closer to opening 116b than opening 116a. Figure 2 In the example, opening 116b and the mounting area 150 exposed from opening 116b are located at the center of the first circuit board 110, and opening 116a is located at the outer periphery that sandwiches the center of the first circuit board 110. Therefore, opening 116c is formed closer to the center of the first circuit board 110 than opening 116a. The area sandwiched between opening 116a and opening 116b is relatively large, making it easy to ensure the opening width of opening 116c. Since opening 116c is formed closer to opening 116b than opening 116a, the opening width of opening 116c is wider, and the surface area of ​​the first protective insulating layer 112 exposed from opening 116c is larger. As a result, the value related to the height of the reference plane can be accurately measured by the light reflected from the surface of the first protective insulating layer 112, and the height of the solder ball measured from the reference plane can be measured with higher accuracy.

[0071] Additionally, the second protective insulating layer 116 may also have multiple layers formed at different locations (in... Figure 2In the example, there are four openings 116c. With this structure, light can be irradiated onto the surface of the first protective insulating layer 112 exposed from the multiple openings 116c. When light is irradiated onto the surface of the first protective insulating layer 112 exposed from the multiple openings 116c, the reflected light can be used to measure values ​​related to the height of the reference surface at different positions of the multiple openings 116c. Then, by calculating the average value of the height-related values ​​of the reference surface measured at different positions of the multiple openings 116c, the effect caused by the tilt of the reference surface can be averaged out. As a result, even when the reference surface is tilted, the height of the solder ball measured from the reference surface can be measured with high accuracy.

[0072] Alternatively, a plurality of upper surface pads 113a may be formed along two opposite edges of the surface of the first circuit board 110. In this case, a plurality of openings 112a are formed in the first protective insulating layer 112 corresponding to the plurality of upper surface pads 113a, and a plurality of openings 116a are formed in the second protective insulating layer 116 corresponding to the plurality of openings 112a. Figure 2 In the example, four openings 116c are formed at at least the corners of a rectangular region R sandwiched between an upper surface pad 113a formed along one of the two opposing sides of the surface of the first circuit board 110 and another upper surface pad 113a formed along the other side. In other words, multiple openings 116c are formed at least at the four corners of the region R on the surface of the first circuit board 110. Therefore, it is possible to measure the height-related values ​​of the reference surface at each of the four corners of the region R by reflecting light. The four corners of the region R are prone to tilting of the reference surface due to factors such as uneven thickness of the first circuit board 110 or warping of the first circuit board 110. By calculating the average of the height-related values ​​of the reference surface measured at the four corners of the region R, the effect of the tilting of the reference surface can be averaged out. As a result, even when the reference surface is tilted, the height of the solder ball measured from the reference surface can be measured with high accuracy.

[0073] Return to Figure 1 The second circuit board 120 includes: a substrate 121, a solder mask layer 122, upper surface pads 123, a protective insulating layer 124, and lower surface pads 125. Furthermore, although in Figure 1 The diagram is omitted, but the upper surface pad 123 and the lower surface pad 125 are electrically connected by conductive lines provided in the substrate 121.

[0074] The substrate 121 is an insulating plate-shaped component and serves as the base material for the second circuit board 120. The substrate 121 can be made of, for example, a thermosetting insulating resin, primarily composed of epoxy resin, impregnated with a reinforcing component, i.e., glass cloth (glass textile), and then cured into epoxy resin. The reinforcing component is not limited to glass cloth; for example, glass nonwoven fabric, aramid fabric, aramid nonwoven fabric, LCP fabric, and LCP nonwoven fabric can be used. Furthermore, the thermosetting insulating resin, in addition to epoxy resin, can be, for example, polyimide resin and cyanate resin. Wiring layers, including upper surface pads 123 and lower surface pads 125, are formed on both surfaces of the substrate 121. The wiring layers can be made of, for example, copper or a copper alloy.

[0075] Furthermore, the substrate 121 is not limited to a single-layer insulating component, but can also be a multilayer substrate with an insulating layer and a wiring layer stacked together. When the substrate 121 is a multilayer substrate, the wiring layer sandwiched in the middle of the insulating layer is electrically connected through a through-hole penetrating the insulating layer. The insulating layer material can be, for example, an insulating resin such as epoxy resin or polyimide resin, or a resin material incorporating fillers such as silica or alumina. The wiring layer material can be, for example, copper (Cu) or a copper alloy.

[0076] The solder mask 122 is an insulating layer used to cover the upper surface pads 123 on the upper surface of the substrate 121. An opening is provided in a portion of the solder mask 122, through which the upper surface pads 123 are exposed. The material of the solder mask 122 can be an insulating resin such as epoxy resin or acrylic resin.

[0077] The upper surface pad 123 is formed on the wiring layer on the upper surface of the substrate 121 and is exposed from the opening of the solder mask layer 122 to form external connection terminals. That is, the upper surface pad 123 is formed with external connection terminals (not shown), such as solder balls. The material of the upper surface pad 123 can be the same as that of the wiring layer, such as copper or copper alloy.

[0078] The protective insulating layer 124 is an insulating layer used to cover the lower surface pads 125 of the lower surface of the substrate 121. A portion of the protective insulating layer 124 has an opening through which the lower surface pads 125 are exposed. The material of the protective insulating layer 124 can be, for example, an insulating resin such as epoxy resin or acrylic resin.

[0079] A lower surface pad 125 is formed on the wiring layer of the lower surface of the substrate 121. For connection to the connecting member 130, the lower surface pad 125 is exposed through an opening in the protective insulating layer 124. That is, the lower surface pad 125 is connected to the connecting member 130. The first circuit board 110 and the second circuit board 120 are bonded through this connecting member 130. Before the first circuit board 110 and the second circuit board 120 are bonded, solder balls forming the connecting member 130 are bonded to the lower surface pad 125. The material of the lower surface pad 125 can be the same as that of the wiring layer, for example, copper or a copper alloy.

[0080] The connecting member 130 is formed, for example, by a conductor such as solder, and is used to connect the first circuit board 110 and the second circuit board 120. Specifically, the connecting member 130 is a composite formed by integrating solder balls mounted on the first circuit board 110 and solder balls mounted on the second circuit board 120. The connecting member 130 has a barrel shape in which the width of the lower end connected to the first circuit board 110 is greater than the width of the upper end connected to the second circuit board 120, and the sides bulge outwards.

[0081] Next, a method for manufacturing the semiconductor device 100 configured as described above will be explained. In the following description, after explaining the method for manufacturing the first circuit board 110 and the method for manufacturing the second circuit board 120, a method for manufacturing the semiconductor device 100 having the first circuit board 110 and the second circuit board 120 will be explained.

[0082] Figure 3 This is a flowchart illustrating a method for manufacturing the first circuit board 110 according to an embodiment.

[0083] First, wiring layers are formed on the upper and lower surfaces of the substrate 111 (step S101). Specifically, for example, wiring layers on the upper and lower surfaces of the substrate 111 are formed sequentially using a semi-additive method. The wiring layer on the upper surface of the substrate 111 includes upper surface pads 113, and the wiring layer on the lower surface of the substrate 111 includes lower surface pads 115. Then, a solder resist layer 114 is formed on the lower surface of the substrate 111 (step S102), the solder resist layer 114 having an opening at the position of the lower surface pad 115, and a first protective insulating layer 112 is formed on the upper surface of the substrate 111 (step S103), the first protective insulating layer 112 having an opening at the position of the upper surface pad 113. The first protective insulating layer 112 and the solder resist layer 114 are obtained, for example, by laminating a photosensitive resin film on the upper and lower surfaces of the substrate 111, or by coating a liquid or paste-like resin, and then patterning the laminated or coated resin into the desired shape by photolithography through exposure / development.

[0084] Through the above procedures, for example Figure 4As shown, a first circuit board 110 is formed, wherein, on the upper surface of the substrate 111, upper surface pads 113a and 113b are exposed from the openings 112a and 112b of the first protective insulating layer 112, and on the lower surface of the substrate 111, lower surface pads 115 are exposed from the openings 114a of the solder resist layer 114. Figure 4 This is a schematic diagram showing a cross-section of the first circuit board. Upper surface pad 113a is a pad connected to the connecting component 130. Upper surface pad 113b is a pad used to connect electronic components 140 in a flip-chip manner. The exposed areas of these upper surface pads 113a and 113b may also differ from each other.

[0085] After the first protective insulating layer 112 and the solder resist layer 114 are formed, a second protective insulating layer 116 is formed on the upper surface of the first protective insulating layer 112. The second protective insulating layer 116 is located at the position of the solder pad 113 on the upper surface and the mounting area 150 (see...). Figure 2 The second protective insulating layer 116 has an opening at a position closer to the mounting area 150 than the upper surface pad 113 (step S104). The second protective insulating layer 116 is obtained, for example, by laminating a photosensitive resin film or coating a liquid or paste resin on the upper surface of the first protective insulating layer 112, and then patterning the laminated or coated resin into the desired shape by photolithography through exposure / development.

[0086] Through the above procedures, for example Figure 5 As shown, on the upper surface of the first circuit board 110, the surface of the first protective insulating layer 112 around the upper surface pad 113a and the opening 112a is exposed through the opening 116a of the second protective insulating layer 116. The mounting area 150 of the surface of the first protective insulating layer 112 (see...) Figure 2 The surface of the first protective insulating layer 112, which serves as a reference surface for measuring the height of the solder balls forming the connecting member 130, is exposed from the opening 116b of the second protective insulating layer 116. Figure 5 This diagram illustrates the process of forming the second protective insulation layer.

[0087] After the second protective insulating layer 116 is formed, solder balls 131 for forming the connecting component 130 are mounted at the position of the upper surface pad 113a (step S105). Then, the solder balls 131 are bonded to the upper surface pad 113a by performing a reflow soldering process (step S106).

[0088] Through the above procedures, for example Figure 6 As shown, solder ball 131 (an example of a conductor ball) is bonded to upper surface pad 113a. Figure 6This diagram illustrates the solder ball mounting process.

[0089] After the solder ball 131 is bonded to the upper surface pad 113a, the height of the solder ball 131 is measured (step S107). That is, light is irradiated onto the surface of the first protective insulating layer 112, which serves as the reference surface, and the solder ball 131, respectively. The reflected light is used to measure the values ​​related to the height of the reference surface and the values ​​related to the height of the solder ball 131, thereby calculating the height of the solder ball 131 from the reference surface. Furthermore, the process of measuring the height of the solder ball 131 will be described in detail later.

[0090] Since the electronic component 140 is to be mounted on the upper surface pad 113b, solder paste is printed on the upper surface pad 113b (step S108). Then, the electronic component 140 is mounted at the position of the upper surface pad 113b (step S109). The electronic component 140 is reflow soldered (step S110) and mounted on the first circuit board 110. In addition, if necessary, a bottom filler material 142 formed of insulating resin is filled between the electronic component 140 and the upper surface of the first circuit board 110 (step S111).

[0091] Based on the above procedures, for example... Figure 7 As shown, on the upper surface of the first circuit board 110, an electronic component 140 is mounted via solder bumps 141 and connected to the upper surface pad 113b in a flip-chip manner. Thus, the first circuit board 110 forming the lower layer of the semiconductor device 100 is obtained. Figure 7 This diagram illustrates the installation of electronic component 140.

[0092] Furthermore, the first circuit board 110 is preferably manufactured as an assembly of multiple first circuit boards 110 arranged together, rather than manufactured individually. In the assembly, the first circuit boards 110 are manufactured, for example, as divided into grid-like sections.

[0093] Next, refer to Figure 8 The height measurement process of solder ball 131 will be explained in more detail. Figure 8 This is a flowchart illustrating the ball height measurement process of an implementation method. For example, the height of the solder ball 131 is measured using a height measuring device equipped with a light source, a light sensor, and a computing device.

[0094] After the solder ball 131 is bonded to the upper surface pad 113a, light is irradiated from the light source into the opening 116c of the second protective insulating layer 116. A photosensor detects the light reflected from the reference surface, i.e., from the surface of the first protective insulating layer 112 exposed from the opening 116c (step S201). When the photosensor detects the light reflected from the reference surface, a value related to the height of the reference surface can be measured. This value related to the height of the reference surface can be, for example, the distance between the photosensor and the surface of the first protective insulating layer 112 exposed from the opening 116c. Alternatively, the value related to the height of the reference surface can be measured using data representing the correspondence between the intensity of the reflected light and a value related to the height of the reference surface.

[0095] Furthermore, when the second protective insulating layer 116 has multiple openings 116c, light is irradiated onto the surface of the first protective insulating layer 112 exposed from the multiple openings 116c, and the reflected light is used to measure the height-related values ​​of the multiple openings 116c relative to the reference surface. Then, the average value of the height-related values ​​of the multiple openings 116c measured at different positions relative to the reference surface is calculated.

[0096] Next, light is shone from the light source onto each solder ball 131, and the light reflected from each solder ball 131 is detected by a light sensor (step S202). After the light reflected from each solder ball 131 is detected by the light sensor, a value related to the height of each solder ball 131 is measured. The value related to the height of each solder ball 131 can be, for example, the distance between the light sensor and each solder ball 131. Alternatively, the value related to the height of each solder ball 131 can also be measured using data representing the correspondence between the intensity of the reflected light and a value related to the height of the solder ball 131.

[0097] Then, based on the values ​​related to the height of the reference plane and the values ​​related to the height of each solder ball 131, the height of each solder ball 131 from the reference plane is calculated by the computing device (step S203).

[0098] Therefore, in this embodiment, the second protective insulating layer 116 forms an opening 116c at a position different from the opening 116a corresponding to the position of the opening 116a on the upper surface of the solder ball 131, and the surface of the first protective insulating layer 112 is exposed through the opening 116c. Thus, the surface of the first protective insulating layer 112 exposed through the opening 116c can be used as a reference surface for measuring the height of the solder ball 131, and the value related to the height of the reference surface can be accurately measured using light reflected from the reference surface. As a result, the height of the solder ball 131 measured from the reference surface can be performed with high precision.

[0099] Furthermore, when the height of the solder ball 131 measured from the reference plane exceeds the specified allowable range, the current solder ball 131 can be removed from the upper surface pad 113a, and another solder ball 131 can be mounted on the upper surface pad 113a. Additionally, the removal and mounting of solder balls 131 can be repeated until the height of the solder ball 131 measured from the reference plane is within the specified allowable range.

[0100] Figure 9 This is a flowchart illustrating a method for manufacturing the second circuit board 120 according to an embodiment.

[0101] First, wiring layers are formed on the upper and lower surfaces of the substrate 121 (step S301). Specifically, for example, wiring layers on the upper and lower surfaces of the substrate 121 are formed sequentially using a semi-additive method. The wiring layer on the upper surface of the substrate 121 includes upper surface pads 123, and the wiring layer on the lower surface of the substrate 121 includes lower surface pads 125. Then, a protective insulating layer 124 is formed on the lower surface of the substrate 121 (step S302), the protective insulating layer 124 having an opening at the position of the lower surface pad 125, and a solder resist layer 122 is formed on the upper surface of the substrate 121 (step S303), the solder resist layer 122 having an opening at the position of the upper surface pad 123. The solder resist layer 122 and the protective insulating layer 124 are obtained, for example, by laminating a photosensitive resin film on the upper and lower surfaces of the substrate 121, or by coating a liquid or paste-like resin, and then patterning the laminated or coated resin into the desired shape by photolithography through exposure / development.

[0102] Through the above procedures, for example Figure 10 As shown, a second circuit board 120 is formed, wherein, on the upper surface of the substrate 121, the upper surface pad 123 is exposed from the opening 122a of the solder resist layer 122, and on the lower surface of the substrate 121, the lower surface pad 125 is exposed from the opening 124a of the protective insulating layer 124. Figure 10 This is a schematic diagram showing a cross-section of the second circuit board. The lower surface pad 125 is the pad that connects to the connecting component 130.

[0103] To connect the lower surface pad 125 to the connecting component 130, solder balls 132 for forming the connecting component 130 are mounted at the position of the lower surface pad 125 (step S304). Then, the solder balls 132 are bonded to the lower surface pad 125 by performing a reflow soldering process (step S305).

[0104] Through the above procedures, for example Figure 11 As shown, solder balls 132 (an example of conductor balls) are bonded to the lower surface pads 125. Thus, a second circuit board 120 forming the upper layer of the semiconductor device 100 is obtained. Figure 11This diagram illustrates the solder ball mounting process.

[0105] Furthermore, the second circuit board 120 is preferably manufactured as an assembly of multiple second circuit boards 120 arranged together, rather than manufactured individually. Within the assembly, the second circuit boards 120 are manufactured, for example, as divided into grid-like sections.

[0106] then, Figure 12 This is a flowchart illustrating a method for manufacturing the semiconductor device 100 according to an embodiment. The semiconductor device 100 is manufactured using the first circuit board 110 and the second circuit board 120 described above.

[0107] Join the first circuit board 110 to the second circuit board 120 (step S401). First, for example, as Figure 13 As shown, solder balls 132 bonded to the lower surface pads 125 of the second circuit board 120 are positioned above solder balls 131 bonded to the upper surface pads 113a of the first circuit board 110, thereby stacking the second circuit board 120 on the first circuit board 110. Figure 13 This diagram illustrates the stacking of the first circuit board 110 and the second circuit board 120. An electronic component 140 is disposed between the first circuit board 110 and the second circuit board 120.

[0108] Next, through reflow soldering, solder balls 131 and 132 are fused together to form a connecting component 130 as a composite. Thus, for example... Figure 14 As shown, the first circuit board 110 and the second circuit board 120 are joined by the connecting component 130. Figure 14 This diagram illustrates the joining process.

[0109] Then, for example, by performing transfer molding (step S402), the space between the first circuit board 110 and the second circuit board 120 is filled with encapsulating resin 101. In transfer molding, the joined first circuit board 110 and second circuit board 120 are housed in a mold, and flowing encapsulating resin 101 is injected into the mold. Then, the encapsulating resin 101 is heated to a predetermined temperature (e.g., 175 degrees Celsius) to cure it. Thus, for example, Figure 15 As shown, the space between the first circuit board 110 and the second circuit board 120 is filled with encapsulating resin 101, and the connecting component 130 and the electronic component 140 are encapsulated. Figure 15 It is a diagram illustrating the molding process.

[0110] Through the above procedures, for example Figure 16As shown, a structure with the same structure as the semiconductor device 100 is obtained. The structure is composed of an assembly containing a plurality of first circuit boards 110 and an assembly containing a plurality of second circuit boards 120. Therefore, each of the first circuit boards 110 and the second circuit boards 120 is cut out and divided into individual pieces (step S403). Figure 16 This diagram illustrates the segmentation process. Specifically, at the dotted line A, located outside the connecting part 130, the material is cut, for example, by a dicing machine or slicer. Figure 16 The structure shown provides the semiconductor device 100.

[0111] Variations

[0112] Next, refer to Figures 17-19 Various variations of the embodiments will be described. Furthermore, in the variations shown below, the same symbols are sometimes used to mark the same parts as in the embodiments, thus omitting repeated descriptions.

[0113] For the semiconductor device 100 in the embodiment, an example is given where multiple openings 116c are formed at the four corners of region R on the surface of the first circuit board 110, but the positions of the openings 116c are not limited to this. Specifically, for example, as shown in the example... Figure 17 As shown, in the semiconductor device 100 of Modified Example 1, in addition to the four corners of region R on the surface of the first circuit board 110, a plurality of opposing openings 116c may also be formed near the center of each side of region R. Figure 17 This is a top view showing the structure of the semiconductor device 100 of the modified embodiment 1.

[0114] In addition, for example, Figure 18 As shown, in the semiconductor device 100 of Modified Example 2, the opening 116c can also be connected to the outer periphery of the first circuit board 110. Figure 18 This is a top view showing the structure of the semiconductor device 100 according to a modified example 2 of the embodiment. Figure 18 In the example, the opening 116c is a cut-out at the outer periphery of the first circuit board 110.

[0115] In addition, for example, Figure 19 As shown, in the semiconductor device 100 of Modified Example 3, the opening 116c may also be formed at a position farther away from the opening 116b than the opening 116a. Figure 19 This is a top view showing the structure of the semiconductor device 100 according to a modified example 3 of the embodiment. Figure 19 In the example, multiple openings 116c are formed at the four corners of the surface of the first circuit board 110.

[0116] As described above, the semiconductor device of the embodiment (as an example, semiconductor device 100) includes: a first circuit board (as an example, first circuit board 110), an electronic component (as an example, electronic component 140), a second circuit board (as an example, second circuit board 120), and a connection component (as an example, connection component 130). The electronic component is disposed on the first circuit board. The second circuit board is positioned opposite the first circuit board, sandwiching the electronic component. The connection component is an assembly of conductor balls (as an example, solder balls 131, 132) respectively mounted on the first circuit board and the second circuit board, for connecting the first circuit board and the second circuit board. The first circuit board includes: a wiring layer, a first insulating layer (as an example, first protective insulating layer 112), and a second insulating layer (as an example, second protective insulating layer 116). The wiring layer has pads (as an example, upper surface pad 113a), which are bonded to conductor balls (as an example, solder balls 131) forming the connection component. A first insulating layer covers the wiring layer and has a first opening (as an example, opening 112a) that exposes the pads. A second insulating layer is stacked on top of the first insulating layer and has a second opening (as an example, opening 116a) and a third opening (as an example, opening 116c). The second opening exposes the surface of the first insulating layer around the pads and the first opening, while the third opening exposes the surface of the first insulating layer at a different location than the second opening. This allows for high-precision measurement of the height of a conductor ball (as an example, solder ball 131) measured from a reference plane.

[0117] Furthermore, the surface of the first insulating layer exposed from the third opening can serve as a reference plane for measuring the height of the conducting sphere. This allows for high-precision measurement of the height of the conducting sphere from the reference plane.

[0118] Furthermore, the surface area of ​​the first insulating layer exposed through the third opening can be larger than the surface area of ​​the first insulating layer exposed through the second opening. This allows for even higher precision measurement of the height of the conducting sphere from the reference plane.

[0119] Furthermore, the surface of the first insulating layer may have a mounting area for electronic components (as an example, mounting area 150). The second insulating layer may have a fourth opening that exposes the mounting area in the surface of the first insulating layer (as an example, opening 116b). A third opening may be formed closer to the fourth opening than the second opening. This allows for further high-precision measurement of the height of the conductor sphere from the reference plane.

[0120] Alternatively, the third opening can be formed at a position farther away from the fourth opening than the second opening. Therefore, the surface of the first insulating layer exposed from the third opening, which is formed at a position farther away from the fourth opening than the second opening, can be effectively used as a reference surface.

[0121] Furthermore, the second insulating layer can have multiple third openings formed at different locations. This allows for high-precision measurement of the solder ball height from the reference plane, even when the reference plane is tilted.

[0122] Additionally, multiple pads can be formed along two opposite edges of the surface of the first circuit board. The first insulating layer can have multiple first openings, each corresponding to one of the multiple pads. The second insulating layer can have multiple second openings, each corresponding to one of the multiple first openings. Multiple third openings can be formed at at least the corners of a region (for example, region R) sandwiched between a pad formed along one of the two edges and a pad formed along the other edge of the multiple pads. Thus, even when the reference plane is tilted, the height of the solder ball measured from the reference plane can be measured with high precision.

Claims

1. A semiconductor device, characterized in that, have: First circuit board; Electronic components are disposed on the first circuit board; The second circuit board is positioned opposite the first circuit board, sandwiching the electronic component; as well as The connecting component is an assembly of conductive balls respectively mounted on the first circuit board and the second circuit board, used to connect the first circuit board and the second circuit board. The first circuit board has: A wiring layer having pads for bonding conductor balls that form the connection components; A first insulating layer covers the wiring layer and has a first opening that exposes the pads; as well as A second insulating layer, which is stacked on top of the first insulating layer, has a second opening and a third opening. The second opening exposes the surface of the first insulating layer around the pad and the first opening. The third opening exposes the surface of the first insulating layer at a different location than the second opening.

2. The semiconductor device according to claim 1, characterized in that, The surface of the first insulating layer exposed from the third opening serves as a reference plane for measuring the height of the conductor sphere.

3. The semiconductor device according to claim 1, characterized in that, The surface area of ​​the first insulating layer exposed from the third opening is greater than the surface area of ​​the first insulating layer exposed from the second opening.

4. The semiconductor device according to claim 1, characterized in that, The surface of the first insulating layer has a mounting area for mounting the electronic component. The second insulating layer has a fourth opening that exposes the mounting area on the surface of the first insulating layer. The third opening is formed closer to the fourth opening than the second opening.

5. The semiconductor device according to claim 1, characterized in that, The surface of the first insulating layer has a mounting area for mounting the electronic component. The second insulating layer has a fourth opening that exposes the mounting area on the surface of the first insulating layer. The third opening is formed at a position farther away from the fourth opening than the second opening.

6. The semiconductor device according to claim 1, characterized in that, The second insulating layer has a plurality of the third openings formed at different locations.

7. The semiconductor device according to claim 6, characterized in that, A plurality of pads are formed along two opposite edges of the surface of the first circuit board. The first insulating layer has a plurality of first openings formed corresponding to the plurality of pads. The second insulating layer has a plurality of second openings formed corresponding to the plurality of first openings. The plurality of third openings are formed at at least at the corner of the region between a pad formed along one of the two sides and a pad formed along the other side of the two sides.

8. A method for manufacturing a semiconductor device, characterized in that, The process includes the following steps: Manufacturing the first circuit board containing electronic components; Clamping the electronic components, the second circuit board is stacked on top of the first circuit board; and The first circuit board and the second circuit board are joined together by a connecting component consisting of conductor balls respectively mounted on the first circuit board and the second circuit board. The process of manufacturing the first circuit board includes the following steps: A wiring layer is formed, the wiring layer having pads, the pads being bonded to conductor balls forming the connection components; A first insulating layer is formed, the first insulating layer covering the wiring layer and having a first opening that exposes the pads; as well as A second insulating layer is formed, which is stacked on top of the first insulating layer and has a second opening and a third opening. The second opening exposes the surface of the first insulating layer around the pad and the first opening. The third opening exposes the surface of the first insulating layer, which serves as a reference plane for measuring the height of the conductor ball, at a different location from the second opening.

9. The method for manufacturing a semiconductor device according to claim 8, characterized in that, The process of manufacturing the first circuit board also includes the following steps: Join the conductor ball to the pad; and Measure the height of the conductor ball bonded to the pad. The process of measuring the height of the conducting sphere includes the following steps: Light is irradiated onto the third opening, and reflected light from the reference surface exposed from the third opening is detected; The conductor sphere is illuminated with light, and the reflected light from the conductor sphere is detected. as well as The height of the conductor sphere, measured from the reference surface, is calculated based on a value related to the height of the reference surface measured using the reflected light detected from the reference surface, and a value related to the height of the conductor sphere measured using the reflected light detected from the conductor sphere.

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