Custom rf inductors for rf modules

Abstract

The present disclosure relates to custom RF inductors for RF modules. Embodiments of a radio frequency (RF) package are disclosed that include a package laminate and a surface mount device mounted to a mounting surface of the package laminate. The package laminate includes a first laminate substrate and a metal structure integrated with the first laminate substrate. An electronic component is mounted to the mounting surface of the first laminate substrate. The surface mount device includes a second laminate substrate and an inductor integrated with the second laminate substrate. A bounded physical region is defined by at least one of a surface of the electronic component and the metal structure that bounds the bounded physical region. The surface mount device is sized to fit within the bounded physical region. In this way, the surface mount device allows for a more compact RF package with a higher quality factor.

Description

[0001] Related applications

[0002] This application claims the benefit of provisional patent application serial number 63 / 774,819, filed on March 20, 2025, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] This disclosure relates in general to surface mount devices, and more particularly to surface mount devices including inductor components in a radio frequency (RF) package. Background Technology

[0004] The trend in mobile device electronics, particularly in radio frequency (RF) front-end (FE) modules, is driven by the need for increased functionality in smaller form factors. This trend has intensified with the introduction of fifth-generation (5G) technology. To support the extensive carrier aggregation and bandwidth enhancements required for 5G, these modules now incorporate a greater number of acoustic filters, such as bulk acoustic wave (BAW) filters or surface acoustic wave (SAW) filters, forming large and complex multiplexer networks. These networks are further complemented by switches, power amplifiers (PAs), and low-noise amplifiers (LNAs).

[0005] This pursuit of enhanced functionality and miniaturization, coupled with the need to maintain low costs, often pushes the physical limitations of processing, packaging, and manufacturing. Furthermore, this pursuit frequently encounters various technical hurdles in packaging. The drive for more functionality in a smaller form factor can potentially impact system performance, thus posing significant challenges for engineers and manufacturers.

[0006] To address these challenges, the industry is adopting innovative solutions. Advanced packaging technologies, such as double-sided molded ball grid array (DSMBGA) and double-sided molded pad grid array (DSMLGA), are being used to improve integration. Manufacturers are also developing new circuit designs to reduce RF noise, improve efficiency, and enable multiple radio transmitters to coexist within the limited space of modern smartphones. Additionally, the use of advanced materials in acoustic filters and other components helps improve performance while maintaining a compact size. Filtering components, such as the size and spacing occupied by inductors, are particularly important in providing compact RF packages with adequate filtering capabilities. Summary of the Invention

[0007] Implementation Scheme 1. A radio frequency (RF) package comprising: a package laminate including: a first laminated substrate defining a mounting surface; and a metal structure integrated with the first laminated substrate; an electronic component mounted to the mounting surface of the first laminated substrate; a surface mount device mounted to the mounting surface, the surface mount device including: a second laminated substrate; and an inductor integrated with the second laminated substrate; and a bounded physical region defined by at least one of a surface of the electronic component and the metal structure defining the boundary of the bounded physical region, the surface mount device being sized to fit within the bounded physical region.

[0008] Implementation Scheme 2. The RF package according to Implementation Scheme 1, wherein: the bounded physical region is defined by one or more traces formed by the metal structure; the mounting surface is a first mounting surface; the second laminated substrate defines a second mounting surface; and the dimensions of the surface mount device are designed to fit within the bounded physical region, including such that the dimensions of the second mounting surface are designed to fit within the bounded physical region.

[0009] Implementation Scheme 3. The RF package according to Implementation Scheme 2, wherein: the metal structure defines a first inductor coil; and the surface mount device is mounted on the first mounting surface above the first inductor coil.

[0010] Implementation Scheme 4. The RF package according to Implementation Scheme 3, wherein the inductor defines a second inductor coil, wherein the first shape of the first inductor coil is the same as the second shape of the second inductor coil.

[0011] Implementation Scheme 5. The RF package according to Implementation Scheme 1, wherein: the bounded physical region is defined by a first vertical surface of the electronic component; the surface mount device defines a second vertical surface; and the dimensions of the surface mount device are designed to fit within the bounded physical region including such that the dimensions of the second vertical surface are designed to fit within the first vertical surface.

[0012] Implementation Scheme 6. The RF package according to Implementation Scheme 5, wherein the electronic components include an acoustic filter.

[0013] Implementation Scheme 7. The RF package according to Implementation Scheme 1, wherein the inductor includes a plurality of inductor coils, each of the plurality of inductor coils being formed in a different metal layer within the second laminated substrate.

[0014] Implementation Scheme 8. The RF package according to Implementation Scheme 1, wherein the surface mount device further includes a metal Faraday cage surrounding the inductor.

[0015] Implementation Scheme 9. The RF package according to Implementation Scheme 1, wherein: the inductor is a first inductor; and the surface mount device further includes a second inductor configured to be electromagnetically coupled to the first inductor to form a transformer or a balun.

[0016] Implementation Scheme 10. The RF package according to Implementation Scheme 1 further includes an overlay molding formed above the mounting surface to cover the surface mount device.

[0017] Implementation Scheme 11. A method of manufacturing a radio frequency (RF) package, comprising: providing a laminate having an inductor integrated into the laminate; dicing the laminate to form a surface mount device having a device laminate including the inductor, the surface mount device being sized to fit within a bounded physical region; mounting electronic components onto a mounting surface of the package laminate, a metal structure being integrated into the package laminate; and mounting the surface mount device onto the mounting surface, wherein the bounded physical region is defined by at least one of a surface of the electronic components and the metal structure defining the boundary of the bounded physical region.

[0018] Implementation Scheme 12. A user element including a radio frequency (RF) package, the RF package comprising: a package laminate including: a first laminated substrate defining a mounting surface; and a metal structure integrated with the first laminated substrate; an electronic component mounted to the mounting surface of the first laminated substrate; a surface mount device mounted to the mounting surface, the surface mount device including: a second laminated substrate; and an inductor integrated with the second laminated substrate; and a bounded physical region defined by at least one of a surface of the electronic component and the metal structure defining the boundary of the bounded physical region, the surface mount device being sized to fit within the bounded physical region.

[0019] Implementation Scheme 13. The user element according to Implementation Scheme 12, wherein: the bounded physical region is defined by one or more traces formed by the metal structure; the mounting surface is a first mounting surface; the second laminated substrate defines a second mounting surface; and the dimensions of the surface mount device are designed to fit within the bounded physical region, including such that the dimensions of the second mounting surface are designed to fit within the bounded physical region.

[0020] Implementation Scheme 14. The user element according to Implementation Scheme 13, wherein: the metal structure defines a first inductor coil; and the surface mount device is mounted on the first mounting surface above the first inductor coil.

[0021] Implementation Scheme 15. The user element according to Implementation Scheme 14, wherein the inductor defines a second inductor coil, wherein the first shape of the first inductor coil is the same as the second shape of the second inductor coil.

[0022] Implementation Scheme 16. The user component according to Implementation Scheme 12, wherein: the bounded physical region is defined by a first vertical surface of the electronic component; the surface mount device defines a second vertical surface; and the dimensions of the surface mount device are designed to fit within the bounded physical region including such that the dimensions of the second vertical surface are designed to fit within the first vertical surface.

[0023] Implementation Scheme 17. The user component according to Implementation Scheme 16, wherein the electronic component includes an acoustic filter.

[0024] Implementation Scheme 18. The user element according to Implementation Scheme 12, wherein the inductor includes a plurality of inductor coils, each of the plurality of inductor coils being formed in a different metal layer within the second laminated substrate.

[0025] Implementation Scheme 19. The user element according to Implementation Scheme 12, wherein the surface mount device further includes a metal Faraday cage surrounding the inductor.

[0026] Implementation Scheme 20. The user element according to Implementation Scheme 12, wherein: the inductor is a first inductor; and the surface mount device further includes a second inductor configured to be electromagnetically coupled to the first inductor to form a transformer or a balun.

[0027] Implementation Scheme 21. A method for designing a surface mount device, the method comprising: defining an available surface area for mounting a computer-simulated surface mount device based on adjacent computer-simulated components on a computer-simulated package substrate of a computer-simulated RF package; identifying components of computer-simulated grounding and computer-simulated metal structures surrounding the available surface area, such that the performance of a computer-simulated inductor of the computer-simulated surface mount device can be optimized by reducing parasitic capacitance; performing an electromagnetic simulation of computer-simulated surface mount devices from a database to select one or more candidate computer-simulated surface mount devices based on the electromagnetic simulation, wherein the dimensions of each of the one or more candidate computer-simulated surface mount devices have been designed to be mounted within the available physical area; and empirically verifying at least one physical surface mount device formed based on at least one of the one or more candidate computer-simulated surface mount devices to determine whether the at least one physical surface mount device meets design specifications.

[0028] Those skilled in the art will recognize the scope of this disclosure and understand its other aspects after reading the following detailed description of preferred embodiments and the accompanying drawings. Attached Figure Description

[0029] The accompanying drawings, which are incorporated in and form a part of this specification, illustrate several aspects of this disclosure and, together with embodiments, serve to explain the principles of this disclosure.

[0030] Figure 1 Radio frequency (RF) packages according to some embodiments are shown;

[0031] Figure 2A and Figure 2B A surface-mount device according to some embodiments is shown;

[0032] Figure 3 Another surface-mount device according to some embodiments is shown;

[0033] Figure 4 Another surface-mount device according to some embodiments is shown;

[0034] Figure 5 Another surface-mount device according to some embodiments is shown;

[0035] Figures 6A to 6E The process steps for manufacturing RF packages according to some embodiments are shown;

[0036] Figure 7 This is a flowchart of a method for designing surface-mount devices based on some implementation schemes;

[0037] Figure 8 It is a computer device according to some implementation schemes; and

[0038] Figure 9 User components according to some implementation schemes are shown. Detailed Implementation

[0039] The embodiments described below represent the information necessary to enable those skilled in the art to practice the embodiments and demonstrate the best mode of practice. After reading the following description with reference to the accompanying drawings, those skilled in the art will understand the concepts of this disclosure and will appreciate the application of these concepts, even if not specifically set forth herein. It should be understood that these concepts and applications fall within the scope of this disclosure and the appended claims.

[0040] It should be understood that although the terms first, second, etc., may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used only to distinguish one element from another. For example, without departing from the scope of this disclosure, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0041] It should also be understood that when a component is referred to as "connected" or "coupled" to another component, it may be directly connected or coupled to the other component, or there may be intermediate components. Conversely, when a component is referred to as "directly connected" or "directly coupled" to another component, there are no intermediate components.

[0042] It should be understood that although the terms “upper,” “lower,” “bottom,” “middle,” “center,” “top,” etc., may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used only to distinguish one element from another. For example, without departing from the scope of this disclosure, a first element may be referred to as an “upper” element, and similarly, a second element may be referred to as an “upper” element, depending on the relative orientation of these elements.

[0043] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit this disclosure. As used herein, unless the context clearly indicates otherwise, the singular forms “a,” “an,” and “described” are also intended to include the plural forms. It should also be understood that, when used herein, the terms “comprises,” “comprising,” “includes,” and / or “including” specify the presence of the stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0044] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. It should be further understood that the terms used herein shall be interpreted as having the same meaning as they have in the context of this specification and the relevant field, and shall not be interpreted in an idealized or overly formal sense unless expressly defined herein.

[0045] Implementation schemes for radio frequency (RF) packages are disclosed. The RF package includes a package laminate and various RF devices mounted on the package laminate. At least one of these devices is a surface mount device comprising one or more inductors. More specifically, the inductors are laminate-based inductors. The size of the surface mount device can be selected to assemble the surface mount device within a bounded physical area on the package laminate. In this way, surface mount devices can be provided to be mounted within a custom space of the RF package while providing a relatively high quality (Q) factor.

[0046] Figure 1 An RF package 100 according to some embodiments is shown.

[0047] RF package 100 is configured to house one or more electronic components. In this embodiment, the electronic components include a surface mount device 102, an acoustic filter 104, a power amplifier (PA) 106, a low noise amplifier (LNA) 108, and a switching device 110, all of which are part of an RF circuit (e.g., an RF front-end (FE) circuit). Other embodiments of RF package 100 may have any combination of electronic components for RF circuitry. In this embodiment, each electronic component includes a substrate and conductive components. Examples of surface mount devices 102 include inductors, external connectors, and laminates, as will be explained in further detail below. Acoustic filter 104 may include a piezoelectric substrate and conductive components. The piezoelectric substrate is used to form an acoustic resonator in the RF filter circuit, while the conductive components may include external connectors. Examples of acoustic filters 104 may include bulk acoustic wave (BAW) filters, surface acoustic wave (SAW) filters, etc.

[0048] PA 106 is formed in a semiconductor substrate (e.g., a gallium arsenide (GaAs) substrate) and includes conductive components. The conductive components include an external connector. LNA 108 is formed in a semiconductor substrate (e.g., a silicon-on-insulator (SOI) substrate) and includes conductive components. The conductive components may include an external connector. Switching device 110 is formed in a semiconductor substrate (e.g., an SOI substrate) and includes conductive components. The conductive components may include an external connector.

[0049] RF package 100 includes a package laminate 112. The package laminate 112 includes a laminate substrate 114 (forming the body of the package laminate 112). Different types of laminates that can be used to form the laminate substrate 114 include epoxy-based laminates (e.g., flame-retardant (FR)-4 ​​laminates), high glass transition temperature epoxy laminates, bismaleimide-triazine (BT) laminates, polyimide laminates, polytetrafluoroethylene (PTFE) laminates, copper-clad laminates (CCL), and halogen-free laminates. A metal structure 116 is integrated with the laminate substrate 114. In some embodiments, the metal structure 116 includes various metal layers.

[0050] The Z-axis is oriented relative to the stacking direction. The Z-axis is a vertical axis, and any vertical plane includes lines parallel to the Z-axis. The X-axis is orthogonal to the Z-axis, and the Y-axis is orthogonal to both the Z-axis and X-axis. Any horizontal plane includes lines parallel to the X-axis and lines parallel to the Y-axis. Any vertical plane has lines parallel to the Z-axis and lines parallel to either the X-axis or the Y-axis.

[0051] The metal layers in metal structure 116 are stacked relative to the Z-axis, but each metal layer extends in a horizontal plane. The metal layers can be connected via metal vias that vertically connect to the structure formed by the metal layers. Furthermore, metal structure 116 may include external connectors that allow the RF package 100 to be connected from the outside. For example, the external connectors may be connected to a printed circuit board (PC).

[0052] The laminated substrate 114 defines an upper mounting surface 118 and a lower mounting surface 120 opposite to the upper mounting surface 118. In other embodiments, the laminated substrate 114 includes only one mounting surface. Surface mount devices 102, acoustic filters 104, and PA 106 are mounted to the upper mounting surface 118, thereby connecting to the metal structure 116. LNA 108 and switching devices 110 are mounted to the lower mounting surface 120, thereby connecting to the metal structure 116. Note that in some embodiments, capacitors, inductor coils, and other passive electronic components may be formed from the metal structure 116.

[0053] In this embodiment, an overmolded member 122 is formed over the upper mounting surface 118 to cover the surface mount device 102, the acoustic filter 104, and the PA 106. A lower molded member 124 is formed over the lower mounting surface 120 to cover the LNA 108 and the switching device 110. The overmolded member 122 and the lower molded member 124 may be formed of a dielectric material such as an elastomeric material, thermoplastic material, and / or thermosetting material. A conductive shield 126 covers the overmolded member 122. In contrast, external connectors for external connections to the outside of the RF package 100 are exposed from the lower molded member 124.

[0054] Surface mount devices 102 incorporate discrete inductors sized to fit within bounded physical regions. For example, a metal structure 116 may define a bounded region (such as a coil or trace) that at least partially defines a region, such as the region of an upper mounting surface 118. Surface mount devices 102 may be sized to fit within these bounded physical regions. In another example, electronic components (such as an acoustic filter 104) may define a surface, and one of the surface mount devices 102 may be sized to fit within a bounded physical region. As explained below, the configuration of surface mount devices 102 significantly enhances the performance of the RF FE module while improving system functionality and package density.

[0055] Key benefits of the RF circuitry described above and herein include improved RF performance due to the increased Q factor of the inductor provided in surface mount device 102, reduced overall size of the RF package 100, and potential cost savings in manufacturing and materials. Furthermore, during the design phase, the design of surface mount device 102 can optimize system isolation and leakage performance through careful selection of its geometry and design.

[0056] Figure 2A and Figure 2B A surface mount device 200 according to some embodiments is shown.

[0057] Specifically, Figure 2A A perspective transparent top view of the surface mount device 200 is shown, while Figure 2B A cross-sectional view of the surface mount device 200 is shown. Figure 1 One or more of the surface mount devices 102 shown can be used with Figure 2A and Figure 2B The surface mount device 200 shown is provided in the same manner.

[0058] The surface mount device 200 includes a laminated substrate 202 and an inductor 204 integrated with the laminated substrate 202. More specifically, the laminated substrate 202 has nine metal layers M1-M9 integrated into the laminated substrate 202 (see [link to documentation]). Figure 2B Different types of laminates that can be used to form the laminated substrate 202 include epoxy-based laminates (e.g., FR-4), high glass transition temperature epoxy laminates, BT laminates, PTFE laminates, CCL, and halogen-free laminates.

[0059] Metal layers M1-M9 are stacked vertically, and conductive via layers V1-V8 (see...) Figure 2B A metal layer is disposed between adjacent metal layers M1-M9 to connect the structure formed by the metal layers M1-M9. Metal layer M1 is formed on the upper surface 206 of the laminated substrate 202 (see...). Figure 2B The metal layer M9 is formed on the lower surface 208 of the laminated substrate 202 (see [reference]). Figure 2B The metal layers M2-M8 and the conductive via layers V1-V8 are located inside the laminated substrate 202. It should be noted that in other embodiments, the surface mount device 200 may have any number of metal layers and conductive via layers.

[0060] Inductor 204 includes four inductor coils 210, 212, 214, and 216. In this embodiment, each of the inductor coils 210, 212, 214, and 216 is circular, but in other embodiments, the inductor coils 210, 212, 214, and 216 can be of any suitable shape. Inductor coil 210 is formed in metal layer M1. Input / output terminals 218 for inductor coil 210 (see...) Figure 2A The input / output terminal 218 is formed in the metal layer M9. It is connected to the post stack 220 of the inductor coil 210 (see [link]). Figure 2A Part of the structure. Inductor coil 210 is connected to inductor coil 212 via conductive via 222 in conductive via layer V1. Inductor coil 212 is formed in metal layer M2. Inductor coil 212 is connected to inductor coil 214 via conductive via 224 in conductive via layer V2. Inductor coil 214 is formed in metal layer M3. Inductor coil 214 is connected to inductor coil 216 via conductive via 226 in conductive via layer V3. Inductor coil 216 is formed in metal layer M4. Pillar stack 228 connects inductor coil 216 to input / output terminal 230 formed in metal layer M9.

[0061] Surface mount device 200 can be custom-sized for mounting within a desired bounded physical area while maintaining an improved Q factor. In one embodiment, metal layers M1-M9 are 10 micrometers (µm) thick along the Z-axis, and the dielectric material between metal layers M1-M9 is 21µm thick with a dielectric constant of 3.5 farads per meter (F / m). Inductor coils 210, 212, 214, and 216 have a width of 35µm in the XY plane. Analog displays show that inductor 204 has an inductance of 2.1 nanohenries (nH) and a Q factor of 38 at 2 gigahertz (GHz).

[0062] Figure 3 Another surface mount device 300 according to some embodiments is shown.

[0063] Figure 1 One or more of the surface mount devices 102 shown may be provided in the same manner as surface mount device 300. Surface mount device 300 and Figure 2A and Figure 2B The surface mount device 200 shown is the same, except that... Figure 2A and Figure 2B The inductor 204 shown is surrounded by a Faraday cage 302, and Figure 2A and Figure 2B The inductor coils 210, 212, 214, and 216 shown are formed in metal layers M6-M9 (see...). Figure 2B -Metal layers M1 and M9 are in Figure 3The orientation of the surface mount device 300 is specifically marked (instead of the metal layers M1-M4) rather than the metal layers M1-M4 (see [reference]). Figure 2B ),and Figure 2A and Figure 2B The conductive via 222 shown is located in the conductive via layer V6 (see [link]). Figure 2B ), Figure 2A and Figure 2B The conductive via 224 shown is located in the conductive via layer V7 (see [link]). Figure 2B ),and Figure 2A and Figure 2B The conductive via 226 shown is located in the conductive via layer V8 (see [link]). Figure 2B The Faraday cage 302 is formed of a stack of conductive pillars 304 (not all are shown for clarity), each of which is formed by metal layers M1-M9 and conductive via layers V1-V8. In this embodiment, the Faraday cage 302 has a square cross-section in the XY plane. Other embodiments of the Faraday cage 302 may have any suitable shape.

[0064] Figure 4 Another surface mount device 400 according to some embodiments is shown.

[0065] Surface mount device 400 includes the above reference. Figure 2A and Figure 2B The laminated substrate 202 and inductor coils 210, 212, 214, and 216 are described. However, the inductor coils 210, 212, 214, and 216 are... Figure 4 China and Israel Figure 2A and Figure 2B Different ways of connecting.

[0066] More specifically, conductive via 222 and conductive via 226 are provided, both as follows: Figure 2A and Figure 2B As shown. However, Figure 4 No information provided in China Figure 2A and Figure 2B The conductive via 224 is shown. Therefore, inductor coils 210 and 212 are connected to each other to form inductor 402, and inductor coils 214 and 216 are connected to each other to form inductor 404. Inductor coils 212 and 214 are not connected to each other. Instead, inductors 402 and 404 are electromagnetically coupled through magnetic and / or electric flux. Once current is generated through inductors 402 and 404, magnetic and / or electric flux is generated, thus forming a transformer or balun.

[0067] In this embodiment, the conductive post 406 is formed by metal layers M1-M9 and conductive via layers V1-V8, wherein the conductive post 406 includes an input / output terminal 407A at the metal layer M1 and an input / output terminal 407B at the metal layer M9. The conductive post 406 is connected to the inductor coil 210.

[0068] Additionally, conductive posts 408 are formed by metal layers M1-M9 and conductive via layers V1-V8, wherein conductive posts 408 include input / output terminals 409A at metal layer M1 and input / output terminals 409B at metal layer M9. Conductive posts 408 are connected to inductor coil 212. In this way, RF signals can be applied to inductor 402 through conductive posts 406 and 408.

[0069] In this embodiment, the conductive post 410 is formed by metal layers M1-M9 and conductive via layers V1-V8, wherein the conductive post 410 includes an input / output terminal 411A at the metal layer M1 and an input / output terminal 411B at the metal layer M9. The conductive post 410 is connected to the inductor coil 214.

[0070] Additionally, conductive posts 412 are formed by metal layers M1-M9 and conductive via layers V1-V8, wherein conductive posts 412 include input / output terminals 413A at metal layer M1 and input / output terminals 413B at metal layer M9. Conductive posts 412 are connected to inductor coil 216. In this way, RF signals can be applied to inductor 404 through conductive posts 410, 412. Therefore, surface mount device 400 includes a transformer or balun formed by inductors 402, 404.

[0071] Figure 5 Another surface mount device 500 according to some embodiments is shown.

[0072] Figure 1 One or more of the surface mount devices 102 shown may be provided in the same manner as surface mount device 500. Surface mount device 500 includes a laminate 502 and an inductor 504 formed in the laminate 502.

[0073] Metal layers M1-M3 are integrated with laminate 502. Metal layer M1 is formed on surface 506 of laminate 502, while metal layers M2 and M3 are located inside laminate 502. Inductor coil 508 is formed in metal layer M2, and inductor coil 510 is formed in metal layer M3. Conductive via 512 in conductive via layer V2 connects inductor coil 508 and inductor coil 510. Conductive post 514 has input / output terminal 516, at which the conductive post 514 is connected to inductor coil 508. Conductive post 518 has input / output terminal 520, at which the conductive post 518 is connected to inductor coil 510.

[0074] Figures 6A to 6E The process steps for manufacturing RF packages according to some implementation schemes are shown.

[0075] exist Figure 6A The document provides an encapsulation laminate 600. In some embodiments, the encapsulation laminate 600 is... Figure 1 The encapsulation laminate 112 is shown. The encapsulation laminate 600 includes a laminated substrate 601 defining a mounting surface 602. In some embodiments, the laminated substrate 601 is... Figure 1 The laminated substrate 114 shown is shown, and the mounting surface 602 is... Figure 1 The upper mounting surface 118 is shown. Various electronic components 604 are mounted to the mounting surface 602. For example, the electronic component 604 may include... Figure 1 The acoustic filter 104 shown is or Figure 1 PA 106 is shown. Other examples of electronic component 604 may include PA 106. Figure 1 The LNA 108 shown Figure 1 The switching device 110 shown.

[0076] The encapsulation laminate 600 includes a metal structure 605. In some embodiments, the metal structure 605 is... Figure 1 The metal structure 116 is shown. Metal structure 605 includes a trace 606 defining a bounded physical region 608. The trace 606 surrounds an inductor coil 610 mounted on a mounting surface 602. Furthermore, the trace 611, a face 612 designated IR of one of the electronic components 604, and an edge 614 of the mounting surface 602 define the bounded physical region 616. Similarly, the edge 618 of the mounting surface 602 and the trace 620 define a bounded physical region 622. Finally, the face 624 designated IR of the electronic component 604 and the edge 614 define a bounded physical region 626.

[0077] exist Figure 6A In this context, one or more of the electronic components 604 may be acoustic filters (such as...) Figure 1The acoustic filter 104 shown is arranged such that it allows the use of electronic components 604 with laminated integrated inductors (such as inductor coil 610) and surface mount devices 300 (which will be described below) Figure 6C (Further details will be provided below) Surface mount devices 200A and 200B (which will be explained in more detail below) Figure 6D (explained in the text), surface mount device 500 (which will be explained below) Figure 6E (The explanation is incomplete) to implement a multiplexing network between the multiplexing element and the capacitor. The better the Q factor achieved by the multiplexing element, the lower the network loss. Therefore, in most cases, the maximum possible volume is used in the laminate (such as...). Figure 1 The laminated substrate shown Figure 2A The laminated substrate shown and Figure 5 Implementing those inductors on the laminate 502 (shown) provides optimal results by reducing parasitic capacitance through the elimination of nearby grounding. On the other hand, most of the available space is occupied by electronic component 604, which is constrained in terms of size and the wiring and implementation of other circuitry required by the system. This can be achieved through customization. Figure 2A and Figure 2B The surface mount device 200 shown Figure 3 The surface mount device 300 shown Figure 4 The surface mount device 400 and shown Figure 5 The surface mount device 500 shown occupies available space, enabling a more compact RF package design while allowing for... Figure 2A and Figure 2B The surface mount device 200 shown Figure 3 The surface mount device 300 shown Figure 4 The surface mount device 400 and shown Figure 5 The Q factor of the surface mount device 500 shown is maximized.

[0078] exist Figure 6B The laminate 628 is provided, which has an inductor 630 integrated into the laminate 628 (not all are shown for clarity). The inductor 630 can have various designs, such as Figure 2A , Figure 2B and Figure 4 The designs of inductors 204, 402, and 404 are shown, along with others. Each of the inductors 630 is formed in a laminate 628. The laminate 628 is then cut along a cut edge 632 (not all are shown for clarity) to form surface mount devices, such as... Figure 2A and Figure 2B The surface mount device 200 shown Figure 3 The surface mount device 300 shown Figure 4The surface mount device 400 and shown Figure 5 The surface mount device 500 is shown.

[0079] Figure 6C A surface mount device 300 is shown mounted on a mounting surface 602 according to some embodiments, such that the surface mount device 300 occupies a bounded physical region 608.

[0080] like Figure 6C As shown, the surface mount device 300 is sized to fit within a bounded physical region 608. Furthermore, the surface mount device 300 is connected to the inductor coil 610, such that... Figure 2A and Figure 2B The inductor 204 shown is connected to the inductor coil 610. In this way, Figure 4 The surface mount device 400 shown can be used with an inductor coil 610 formed by the encapsulation laminate 600 to form an inductor structure.

[0081] Figure 6D Surface mount devices 200A and 200B are shown mounted on a mounting surface 602 according to some embodiments, such that surface mount device 200A occupies a bounded physical region 616 and surface mount device 200B occupies a bounded physical region 622.

[0082] Surface mount device 200A with Figure 2A and Figure 2B The surface mount device 200 shown is provided in the same manner. Similarly, the surface mount device 200B is provided in the same manner as... Figure 2A and Figure 2B The surface mount device 200 shown is provided in the same manner. The surface mount device 200A is sized to fit within a bounded physical region 616, and the surface mount device 200B is sized to fit within a bounded physical region 622.

[0083] Figure 6E A surface mount device 500 is shown mounted on a mounting surface 602 according to some embodiments, such that the surface mount device 500 occupies a bounded physical region 626.

[0084] The dimensions of the surface mount device 500 have been designed to fit within a bounded physical region 626.

[0085] Notice, Figure 6A The electronic component 604 shown has been pre-mounted on the mounting surface 602. By understanding the arrangement of the electronic component 604 and the encapsulation laminate 600, Figure 2A and 2B The surface mount device 200 shown Figure 3 The surface mount device 300 shown Figure 4 The surface mount device 400 and shown Figure 5 The surface mount device 500 shown can be designed to be assembled in different areas of available space, thereby providing a mounting layer 600, electronic components 604, etc. Figure 2A and Figure 2B The surface mount device 200 shown Figure 3 The surface mount device 300 shown Figure 4 The surface mount device 400 and shown Figure 5 The surface mount device 500 shown forms an RF package that provides a more compact arrangement. Subsequently, an overmolded component (such as...) can be provided on the mounting surface 602. Figure 1 The shown encapsulation molded part 122 (or lower molded part, such as...) Figure 1 The lower mold (124) and shielding are shown to form an RF package.

[0086] Figure 2A and Figure 2B The surface mount device 200 shown Figure 3 The surface mount device 300 shown Figure 4 The surface mount device 400 and shown Figure 5 The applications of the surface mount device 500 shown, as well as other devices within the scope of this disclosure, are diverse. For example, custom coils in surface mount devices can be designed with custom dimensions, nominal values, improved Q factors, and shielding. Surface mount devices with multiplexed coils can be formed on multiplexed coils on an encapsulation laminate (see, for example, see...). Figure 6A (Inductor coil 610 shown). Furthermore, the thermal behavior of the acoustic filter can be improved by replacing the integrated grounding coil with a surface-mount device having a custom coil within the laminate, thus allowing more space for thermal vias. Improved isolation is achieved due to the custom coil design (field radiation generated outside the inductor can be easily controlled). Finally, coupling inductors and impedance transformers (for PA output matching, etc.) can be designed into the surface-mount device.

[0087] Figure 7 This is a flowchart 700 of a method for designing surface-mount devices according to some implementation schemes.

[0088] In some implementation schemes, Figure 1 Surface mount device 102 in Figure 1 and surface mount device 200 in Figure 2 (including Figure 6D Surface mount devices 200A, 200B) Figure 3 Surface mount devices 300 Figure 4 Surface mount device 400 and Figure 5 The surface mount device 500 can be designed according to flowchart 700.

[0089] At box 702, the available surface area for mounting the computer-simulated surface mount device (CSMD) is defined based on the spacing of adjacent computer-simulated components on the computer-simulated package substrate of the computer-simulated RF package and the height of the computer-simulated surface mount device. At box 704, components surrounding the available surface area of ​​the computer-simulated ground and computer-simulated metal structure are identified so that the performance of the computer-simulated inductor of the computer-simulated surface mount device can be optimized by reducing (e.g., eliminating) parasitic capacitance. For example, by identifying components surrounding the computer-simulated ground and computer-simulated metal structure, the design rules, clearances, parasitic effects, couplings, ground paths, and other characteristics of the identified computer-simulated ground and computer-simulated metal structure can be considered and used in electromagnetic simulations and calculations to optimize the computer-simulated surface mount device. At boxes 706A and 706B, it is determined whether the computer-simulated inductor of the computer-simulated surface mount device will be used in conjunction with one or more computer-simulated windings of the computer-simulated package substrate (box 706A), or whether the computer-simulated inductor will not have computer-simulated windings in the computer-simulated package substrate (box 706B). Electrical connection points are also parameters to be considered during the design process.

[0090] At box 708, an electromagnetic simulation of a computer-simulated surface mount device (CMP) from a database is performed, and one or more candidate CMPs are selected based on the electromagnetic simulation. When performing the electromagnetic simulation, the dimensions of the CMPs from the database are designed to fit within the available surface area. Specifically, the electromagnetic simulation is used to select one or more candidate CMPs that have the best performance parameters when compared to design specifications. Considerable performance parameters include Q-factor, winding orientation, inductance, and manufacturing tolerances. Trade-offs regarding how the performance during simulation meets system-level design specifications can be programmed when considering the performance of the CMPs in the database and comparing them to design specifications. More than one CMP from the system library may have performance parameters considered to meet design specifications within design tolerances. The dimensions of one or more candidate CMPs have been designed to fit within the available surface area. In the case of more than one suitable candidate CMP, the designer selects at least one candidate CMP from the one or more candidate CMPs at box 710 for empirical verification. In this manner, the designer selects which candidate surface mount device (SMD) will be used to design experiments for a physical surface mount device (PMD) formed based on the candidate computer-simulated SMD. The PMD can then be further evaluated through additional simulations or laboratory characterization (i.e., experimental design). In box 712, one or more PMDs formed based on the selected computer-simulated SMD are experimentally validated to determine if at least one PMD meets design specifications. These PMDs are sized to fit within available physical areas. Examples of design specifications include system losses, ISO / LKG performance, manufacturing stability, cost, etc. In box 714, the experimentally validated computer-simulated SMD is fabricated into a PMD to manufacture an RF package.

[0091] Figure 8 It is an implementation scheme of computer equipment 800 based on some implementation schemes.

[0092] Computer device 800 includes one or more processors 802 and one or more non-transitory computer-readable media 804 (e.g., memory). The non-transitory computer-readable media 804 stores a computer simulation model 806 and computer-executable instructions 808. The computer simulation model 806 includes the instructions described above. Figure 7 The computer-simulated surface mount device model, computer-simulated substrate package, and computer-simulated RF package discussed herein. In response to executing computer-executable instructions 808, processor 802 executes the above-described... Figure 7 The method described in [the document / article].

[0093] Figure 9 User element 900 according to some implementation schemes is shown.

[0094] refer to Figure 9 The above concepts can be implemented in various types of user element 900, such as mobile terminals, smartwatches, tablets, computers, navigation devices, access points, and similar wireless communication devices that support wireless communication (such as cellular, wireless local area network (WLAN), Bluetooth, and near field communication). User element 900 will typically include a control system 902, a baseband processor 904, transmission circuitry 906, receiving circuitry 908, antenna switching circuitry 910, multiple antennas 912, and user interface circuitry 914. In a non-limiting example, control system 902 may be a field-programmable gate array (FPGA) or an application-specific integrated circuit (ASIC). In this respect, control system 902 may include at least a microprocessor, embedded memory circuitry, and a communication bus interface. Receiving circuitry 908 receives radio frequency signals from one or more base stations via antenna 912 and via antenna switching circuitry 910. An LNA and filter cooperate to amplify and remove broadband interference from the received signal for processing. Then, down-conversion and digitization circuitry (not shown) down-converts the filtered received signal to an intermediate or baseband frequency signal, and then uses an analog-to-digital converter (ADC) to digitize the signal into one or more digital streams.

[0095] The baseband processor 904 processes the digitized received signal to extract the transmitted information or data bits. This processing typically includes demodulation, decoding, and error correction operations, which will be discussed in more detail below. The baseband processor 904 is typically implemented in one or more digital signal processors (DSPs) and application-specific integrated circuits (ASICs).

[0096] For transmission, baseband processor 904 receives digitized data, representing voice, data, or control information, encoded by control system 902 for transmission. The encoded data is output to transmission circuitry 906, where a digital-to-analog converter (DAC) converts the digitally encoded data into an analog signal, and a modulator modulates the analog signal onto a carrier signal at the desired transmission frequency or multiple frequencies. PA amplifies the modulated carrier signal to a level suitable for transmission and delivers it to antenna 912 via antenna switching circuitry 910. Multiple antennas 912, along with repeated transmit circuitry 906 and receive circuitry 908, can provide spatial diversity. Those skilled in the art will understand the modulation and processing details.

[0097] Those skilled in the art will recognize improvements and modifications to the preferred embodiments of this disclosure. All such improvements and modifications are considered to be within the scope of the concepts disclosed herein and the following claims.

Claims

1. A radio frequency (RF) package, comprising: Encapsulation laminate, the encapsulation laminate comprising: A first laminated substrate, the first laminated substrate defining a mounting surface; and A metal structure, wherein the metal structure is integrated with the first laminated substrate; An electronic component, the electronic component being mounted to the mounting surface of the first laminated substrate; Surface mounting device, the surface mounting device being mounted to the mounting surface, the surface mounting device comprising: Second laminated substrate; and An inductor, said inductor being integrated with the second laminated substrate; and A bounded physical region, defined by at least one of the surface of the electronic component and the metal structure defining the boundary of the bounded physical region, wherein the surface mount device is sized to fit within the bounded physical region.

2. The RF package according to claim 1, wherein: The bounded physical region is defined by one or more traces formed by the metal structure; The mounting surface is the first mounting surface; The second laminated substrate defines the second mounting surface; and The dimensions of the surface mount device are designed to fit within the bounded physical region, including the dimensions of the second mounting surface being designed to fit within the bounded physical region.

3. The RF package according to claim 2, wherein: The metal structure defines the first inductor coil; and The surface mount device is mounted on the first mounting surface above the first inductor coil.

4. The RF package of claim 3, wherein the inductor defines a second inductor coil, wherein the first shape of the first inductor coil is the same as the second shape of the second inductor coil.

5. The RF package according to claim 1, wherein: The bounded physical region is defined by the first vertical surface of the electronic component; The surface mounting device defines a second vertical surface; and The dimensions of the surface mount device are designed to fit within the bounded physical region, including such that the dimensions of the second vertical surface are designed to fit within the first vertical surface.

6. The RF package of claim 5, wherein the electronic component includes an acoustic filter.

7. The RF package of claim 1, wherein the inductor comprises a plurality of inductor coils, each of the plurality of inductor coils being formed in a different metal layer within the second laminated substrate.

8. The RF package of claim 1, wherein the surface mount device further comprises a metal Faraday cage surrounding the inductor.

9. The RF package according to claim 1, wherein: The inductor is a first inductor; and The surface mount device further includes a second inductor configured to be electromagnetically coupled to the first inductor to form a transformer or a balun.

10. The RF package of claim 1, further comprising an overlay molding formed above the mounting surface to cover the surface mount device.

11. A method for manufacturing a radio frequency (RF) package, comprising: A laminate is provided, the laminate having an inductor integrated into the laminate; The laminate is cut to provide a surface mount device forming a device laminate including the inductor, the surface mount device being sized to fit within a bounded physical region; Electronic components are mounted on the mounting surface of the encapsulation laminate, and a metal structure is integrated into the encapsulation laminate. as well as The surface mount device is mounted to the mounting surface, wherein the bounded physical region is defined by at least one of the surface of the electronic component and the metal structure defining the boundary of the bounded physical region.

12. A user element including a radio frequency (RF) package, the RF package comprising: Encapsulation laminate, the encapsulation laminate comprising: A first laminated substrate, the first laminated substrate defining a mounting surface; and A metal structure, wherein the metal structure is integrated with the first laminated substrate; An electronic component, the electronic component being mounted to the mounting surface of the first laminated substrate; Surface mounting device, the surface mounting device being mounted to the mounting surface, the surface mounting device comprising: Second laminated substrate; and An inductor, said inductor being integrated with the second laminated substrate; and A bounded physical region, defined by at least one of the surface of the electronic component and the metal structure defining the boundary of the bounded physical region, wherein the surface mount device is sized to fit within the bounded physical region.

13. The user element according to claim 12, wherein: The bounded physical region is defined by one or more traces formed by the metal structure; The mounting surface is the first mounting surface; The second laminated substrate defines the second mounting surface; and The dimensions of the surface mount device are designed to fit within the bounded physical region, including the dimensions of the second mounting surface being designed to fit within the bounded physical region.

14. The user element according to claim 13, wherein: The metal structure defines the first inductor coil; and The surface mount device is mounted on the first mounting surface above the first inductor coil.

15. The user element of claim 14, wherein the inductor defines a second inductor coil, wherein the first shape of the first inductor coil is the same as the second shape of the second inductor coil.

16. The user element according to claim 12, wherein: The bounded physical region is defined by the first vertical surface of the electronic component; The surface mounting device defines a second vertical surface; and The dimensions of the surface mount device are designed to fit within the bounded physical region, including such that the dimensions of the second vertical surface are designed to fit within the first vertical surface.

17. The user component of claim 16, wherein the electronic component includes an acoustic filter.

18. The user element of claim 12, wherein the inductor comprises a plurality of inductor coils, each of the plurality of inductor coils being formed in a different metal layer within the second laminated substrate.

19. The user element of claim 12, wherein the surface mount device further comprises a metal Faraday cage surrounding the inductor.

20. The user element according to claim 12, wherein: The inductor is a first inductor; and The surface mount device further includes a second inductor configured to be electromagnetically coupled to the first inductor to form a transformer or a balun.

21. A method for designing surface mount devices, the method comprising: The available surface area for assembling computer-simulated surface mount devices is defined by adjacent computer-simulated components on the computer-simulated package substrate of the computer-simulated RF package. The components that identify the computer-simulated ground and computer-simulated metal structure surrounding the available surface area enable the optimization of the performance of the computer-simulated inductor of the computer-simulated surface mount device by reducing parasitic capacitance; Perform electromagnetic simulations of computer-simulated surface-mount devices from a database to select one or more candidate computer-simulated surface-mount devices based on the electromagnetic simulations, wherein the dimensions of each of the one or more candidate computer-simulated surface-mount devices have been designed to fit within the available physical area; as well as Empirically verify at least one physical surface mount device formed based on at least one of the one or more candidate computer-simulated surface mount devices to determine whether the at least one physical surface mount device meets the design specifications.

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