Semiconductor module and method for manufacturing a semiconductor module
Patent Information
- Application Number
- CN202511815275.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2025-03-21
- Filing Date
- 2025-12-04
- Publication Date
- 2026-09-22
AI Technical Summary
在这样的半导体模块中,如果在密封部件中使用有机硅凝胶,则侵入到密封部件的水分到达电极,存在容易发生故障的问题
[0004]发明所要解决的技术问题
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Figure CN122803755A_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present invention relate to a semiconductor module and a method for manufacturing a semiconductor module. Background Technology
[0002] Semiconductor modules are known to have sealing components on electrodes disposed on semiconductor elements. In such semiconductor modules, if silicone gel is used in the sealing component, moisture that penetrates the sealing component can reach the electrodes, potentially causing malfunctions.
[0003] Existing technical documents Patent documents Patent Document 1: Japanese Patent No. 7267468 Summary of the Invention
[0004] The technical problem that the invention aims to solve The problem to be solved by the present invention is to provide a semiconductor module capable of suppressing moisture that has penetrated into the sealing component from reaching the electrode, and a method for manufacturing the semiconductor module.
[0005] Technical solutions for solving technical problems The semiconductor module of this embodiment includes a semiconductor element, an electrode, and a sealing component. The electrode is electrically connected to the semiconductor element. The sealing component covers at least a portion of the electrode. The sealing component has a SiN layer and a silicone gel layer. The SiN layer contains Si-N-Si bonds. The silicone gel layer contains silicone gel. Attached Figure Description
[0006] Figure 1 This is a schematic cross-sectional view of the semiconductor module according to the first embodiment.
[0007] Figure 2 This is a cross-sectional view schematically showing a portion of the semiconductor module of the first embodiment.
[0008] Figure 3 This is a cross-sectional view schematically showing a portion of the semiconductor module of the first embodiment.
[0009] Figure 4 This is a cross-sectional view schematically showing a portion of the semiconductor module of the second embodiment.
[0010] Figure 5 This is a cross-sectional view schematically showing a portion of the semiconductor module of the third embodiment.
[0011] Figure 6 (a) ~ Figure 6 (e) is a cross-sectional view schematically illustrating a method for manufacturing a semiconductor module according to the first embodiment.
[0012] Figure 7 (a) ~ Figure 7 (d) is a cross-sectional view schematically illustrating a modified example of the manufacturing method of the semiconductor module according to the first embodiment.
[0013] Figure 8 (a) ~ Figure 8 (e) is a cross-sectional view schematically illustrating a method for manufacturing a semiconductor module according to the second embodiment.
[0014] Figure 9 (a) ~ Figure 9 (e) is a cross-sectional view schematically illustrating a modified example of the manufacturing method of the semiconductor module according to the second embodiment.
[0015] Figure 10 (a) ~ Figure 10 (d) is a cross-sectional view schematically illustrating a method for manufacturing a semiconductor module according to a third embodiment.
[0016] Figure 11 (a) ~ Figure 11 (d) is a cross-sectional view schematically illustrating a modified example of the semiconductor module manufacturing method of the third embodiment. Detailed Implementation
[0017] Hereinafter, various embodiments of the present invention will be described with reference to the accompanying drawings.
[0018] The accompanying drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the ratio of the size between parts, etc., may not be the same as in reality. Even when representing the same part, there may be cases where the dimensions and ratios of each other are represented differently according to the accompanying drawings.
[0019] In this application specification and the various figures, the same reference numerals are used for elements that are the same as those mentioned with respect to previously presented figures, and detailed descriptions are omitted where appropriate.
[0020] <Semiconductor Module> (First Implementation) Figure 1 This is a schematic cross-sectional view of the semiconductor module according to the first embodiment.
[0021] Figure 2 This is a cross-sectional view schematically showing a portion of the semiconductor module of the first embodiment.
[0022] Figure 3 This is a cross-sectional view schematically showing a portion of the semiconductor module of the first embodiment.
[0023] Figure 2 yes Figure 1 An enlarged view of region R1 shown.
[0024] Figure 3 yes Figure 2 An enlarged view of region R2 shown.
[0025] like Figures 1-3 As shown, the semiconductor module 100 of the first embodiment includes a semiconductor element 10, an electrode 20, a protective film 30, a sealing component 40, a base plate 81, a frame 82, a first component 83, a second component 84, a third component 85, and a wire 86.
[0026] In the following description, the direction from semiconductor element 10 toward electrode 20 is referred to as "up" and the direction from electrode 20 toward semiconductor element 10 is referred to as "down". In addition, the direction orthogonal to the up and down direction is referred to as "side".
[0027] A base plate 81 is located at the lower part of the semiconductor module 100. A frame 82 surrounds the outer periphery of the base plate 81 and extends upward. A first component 83, a second component 84, and a third component 85 are disposed on the base plate 81 within the space surrounded by the frame 82. The first component 83, the second component 84, and the third component 85 cover at least a portion of the upper surface of the base plate 81. The first component 83 is disposed on the base plate 81 via a first adhesive 83a. The first component 83 covers at least a portion of the upper surface of the base plate 81. The second component 84 is disposed on the first component 83. The second component 84 covers at least a portion of the upper surface of the first component 83. The third component 85 is disposed on the second component 84. The third component 85 covers at least a portion of the upper surface of the second component 84. A semiconductor element 10 is disposed on the third component 85 via a second adhesive 10a. The semiconductor element 10 covers at least a portion of the upper surface of the third component 85. The base plate 81, frame 82, first component 83, second component 84, and third component 85 are provided as needed and can be omitted.
[0028] The base plate 81 comprises, for example, at least one of aluminum, silicon carbide, and copper. The frame 82 comprises, for example, at least one of polyamide and PPS (polyphenylene sulfide). The first component 83 comprises, for example, at least one of copper and aluminum. The second component 84 comprises, for example, at least one of aluminum nitride, silicon nitride, and aluminum oxide. The third component 85 comprises, for example, copper. The first adhesive 83a comprises, for example, tin. The second adhesive 10a comprises, for example, at least one of lead, tin, and silver.
[0029] Semiconductor element 10 is, for example, a so-called power semiconductor element such as an IGBT (insulated gate bipolar transistor) or a MOSFET (metal-oxide-semiconductor field-effect transistor). Semiconductor element 10 may contain materials such as silicon carbide and gallium nitride, which have a wider bandgap than silicon.
[0030] An electrode 20 is disposed on a semiconductor element 10. The electrode 20 covers at least a portion of the upper surface of the semiconductor element 10. The electrode 20 is electrically connected to the semiconductor element 10. The electrode 20 has an outer peripheral portion 20a and a central portion 20b. The outer peripheral portion 20a includes the outer peripheral end 20e of the electrode 20. The central portion 20b is located inside the outer peripheral portion 20a when viewed from above. The central portion 20b is surrounded by the outer peripheral portion 20a. That is, the outer peripheral portion 20a is located to the side of the central portion 20b. The central portion 20b, for example, includes the center of the electrode 20. A wire 86 is disposed on the central portion 20b. The wire 86 is electrically connected to the electrode 20. The wire 86 is provided as needed and can be omitted.
[0031] Electrode 20 comprises, for example, at least one of aluminum and copper. The thickness of electrode 20 is, for example, more than 1 μm and less than 10 μm (e.g., about 4 μm).
[0032] In the semiconductor module 100, a terminating oxide film 60 is also provided on the semiconductor element 10. The terminating oxide film 60 covers a portion of the upper surface of the semiconductor element 10. The terminating oxide film 60 is located to the side of the outer periphery 20a of the electrode 20. A portion of the terminating oxide film 60 is located below a portion of the outer periphery 20a of the electrode 20. The terminating oxide film 60 is provided as needed and can be omitted.
[0033] The terminal oxide film 60 comprises, for example, at least one of silicon oxide and silicon nitride. The thickness of the terminal oxide film 60 is, for example, 0.1 μm or more and 5 μm or less (e.g., about 1.2 μm).
[0034] A protective film 30 is disposed on the electrode 20. The protective film 30 covers at least a portion of the upper surface of the electrode 20. The protective film 30 is disposed between the electrode 20 and the sealing member 40 (the SiN layer 41 described later). In the semiconductor module 100, the protective film 30 is disposed on the side of the outer peripheral portion 20a of the electrode 20 and on the outer peripheral portion 20a. The protective film 30 covers at least a portion of the side of the outer peripheral portion 20a of the electrode 20 and at least a portion of the upper surface of the outer peripheral portion 20a. In the semiconductor module 100, the protective film 30 covers the entire upper surface of the outer peripheral portion 20a. In the semiconductor module 100, the protective film 30 is disposed on the outer peripheral portion 20a and on the terminal oxide film 60. In addition, the protective film 30 is not disposed on the central portion 20b. That is, the protective film 30 covers at least a portion of the upper surface of the outer peripheral portion 20a of the electrode 20, but does not cover the upper surface of the central portion 20b. The protective film 30 protects the outer peripheral portion 20a of the electrode 20.
[0035] The protective film 30 may contain, for example, polyimide resin. The thickness of the protective film 30 may be, for example, 1 μm or more and 10 μm or less (e.g., about 5 μm). The protective film 30 may be provided as needed and may be omitted.
[0036] A sealing member 40 is disposed on the electrode 20. The sealing member 40 covers at least a portion of the upper surface of the electrode 20. In the semiconductor module 100, the sealing member 40 is disposed on the protective film 30. The sealing member 40 is disposed on the central portion 20b and the protective film 30. The sealing member 40 covers at least a portion of the upper surface of the central portion 20b and at least a portion of the upper surface of the protective film 30. In the semiconductor module 100, the sealing member 40 covers the entire upper surface of the protective film 30. The sealing member 40 only needs to cover at least a portion of the upper surface of the protective film 30. In other words, the sealing member 40 may not cover a portion of the upper surface of the protective film 30. Furthermore, when the protective film 30 is not disposed, the sealing member 40 is disposed on the electrode 20. The sealing member 40 is disposed, for example, on the side of the outer peripheral portion 20a and on the outer peripheral portion 20a.
[0037] The sealing member 40 has a SiN layer 41 and a silicone gel layer 42. In the semiconductor module 100, the SiN layer 41 is disposed above the protective film 30. The SiN layer 41 covers at least a portion of the upper surface of the protective film 30. The silicone gel layer 42 is disposed on the SiN layer 41. That is, in the semiconductor module 100, the SiN layer 41 is disposed below the silicone gel layer 42. The silicone gel layer 42 covers at least a portion of the upper surface of the SiN layer 41. The SiN layer 41 is in contact with the silicone gel layer 42. In the semiconductor module 100, the SiN layer 41 is disposed at the bottommost part of the sealing member 40.
[0038] In the semiconductor module 100, the SiN layer 41 has a first portion 41a and a second portion 41b. The first portion 41a is disposed on the protective film 30. The second portion 41b is disposed on the side of the protective film 30. In the semiconductor module 100, the second portion 41b is also disposed on the side of the terminal oxide film 60.
[0039] SiN layer 41 contains Si-N-Si bonds. A Si-N-Si bond is a structure in which a nitrogen atom (N) is bonded to two silicon atoms (Si). In other words, a Si-N-Si bond is a structure in which one nitrogen atom (N) is located between two silicon atoms (Si). For example, a Si-N-Si bond is a siloxane bond (Si-O-Si bond) in which the oxygen atom (O) is replaced by a nitrogen atom (N). SiN layer 41 is formed, for example, by nitriding an organosilicon resin layer containing siloxane bonds using plasma treatment. SiN layer 41 may also contain Si-N bonds in its side chains, provided that Si-N-Si bonds are present in the main chain. SiN layer 41 may also be formed by chemical vapor deposition (CVD).
[0040] Whether the SiN layer 41 contains Si-N-Si bonds can be determined, for example, by the position of the bonding energy of the nitrogen (N) peak measured by X-ray photoelectron spectroscopy (XPS). For example, in XPS measurements, the 1s peaks of the nitrogen (N) atoms in Si-N-Si bonds, Si-N bonds, and CN bonds appear at different bonding energy positions. Therefore, if a 1s peak appears at a specified bonding energy position, it can be determined that Si-N-Si bonds are present; if no 1s peak appears at a specified bonding energy position, it can be determined that Si-N-Si bonds are not present.
[0041] SiN layer 41 contains at least silicon atoms (Si) and nitrogen atoms (N). SiN layer 41 may contain, for example, silicon atoms (Si), nitrogen atoms (N) and oxygen atoms (O). SiN layer 41 may contain, for example, Si-N-Si bonds and siloxane bonds (Si-O-Si bonds).
[0042] The nitrogen content of the SiN layer 41 is, for example, the elemental composition (atom%) in XPS, which is more than 2 relative to Si (N / Si≥2).
[0043] The silicone gel layer 42 contains silicone gel. The silicone gel contains siloxane bonds (Si-O-Si bonds).
[0044] The thickness of the SiN layer 41 is, for example, thinner than the thickness of the silicone gel layer 42. Furthermore, the thickness of the sealing member 40 is the sum of the thicknesses of the SiN layer 41 and the silicone gel layer 42.
[0045] In the semiconductor module 100, the silicone gel layer 42 covers a portion of the upper surface of the base plate 81, the side of the first adhesive 83a, the side of the first component 83, a portion of the upper surface of the second component 84, the side of the second component 84, a portion of the upper surface of the third component 85, the side of the third component 85, the side of the second adhesive 10a, a portion of the upper surface of the semiconductor element 10, the side of the semiconductor element 10, the side of the terminal oxide film 60, the side of the protective film 30, and the side of the SiN layer 41 within the space surrounded by the frame 82. Additionally, a line 86 is disposed within the silicone gel layer 42. The sealing member 40 (silicone gel layer 42) seals the semiconductor element 10.
[0046] The effects of the semiconductor module 100 in the first embodiment will be explained below.
[0047] In a semiconductor module in which an electrode 20 is disposed on a semiconductor element 10, if an organosilicon gel is used in the sealing component 40, moisture that has penetrated the sealing component 40 will reach the electrode 20, which may cause malfunctions.
[0048] In contrast, in the semiconductor module 100, the sealing member 40 has a SiN layer 41, which can suppress the diffusion of moisture in the sealing member 40. Therefore, it is possible to prevent moisture that has penetrated the sealing member 40 from reaching the electrode 20, and to suppress the occurrence of faults in the semiconductor module 100.
[0049] In addition, in the semiconductor module 100, by placing the SiN layer 41 under the silicone gel layer 42, it is possible to suppress the moisture that penetrates the silicone gel layer 42 from reaching the electrode 20.
[0050] In addition, in the semiconductor module 100, the SiN layer 41 contains silicon atoms, nitrogen atoms and oxygen atoms, thereby suppressing moisture from reaching the electrode 20.
[0051] In addition, the semiconductor module 100 has a protective film 30, which can improve the withstand voltage when voltage is applied.
[0052] Furthermore, in the semiconductor module 100, a protective film 30 is disposed on the side and on the outer periphery 20a of the electrode 20, thereby protecting the outer periphery 20a of the electrode 20. Additionally, by disposing a sealing member 40 on the central portion 20b and on the protective film 30, the semiconductor element 10 can be protected from external factors such as heat, moisture, and light. Furthermore, the intrusion of liquids and gases can be reduced.
[0053] In addition, in the semiconductor module 100, the SiN layer 41 has a first portion 41a disposed on the protective film 30 and a second portion 41b disposed on the side of the protective film 30, thereby not only inhibiting the intrusion of moisture from the protective film 30, but also inhibiting the intrusion of moisture from the side of the protective film 30.
[0054] (Second Implementation) Figure 4 This is a cross-sectional view schematically showing a portion of the semiconductor module of the second embodiment.
[0055] like Figure 4 As shown, the semiconductor module 200 of the second embodiment is substantially the same as the semiconductor module 100 of the first embodiment, except that the position of the SiN layer 41 is different.
[0056] In the semiconductor module 200, a SiN layer 41 is disposed inside a silicone gel layer 42. The silicone gel layer 42 has a first region 42a and a second region 42b. The first region 42a is located below the SiN layer 41. The second region 42b is located above the SiN layer 41. In the semiconductor module 200, the first region 42a is disposed above the protective film 30, the SiN layer 41 is disposed above the first region 42a, and the second region 42b is disposed above the SiN layer 41. In the semiconductor module 200, the first region 42a covers at least a portion of the upper surface of the protective film 30, the SiN layer 41 covers at least a portion of the upper surface of the first region 42a, and the second region 42b covers at least a portion of the upper surface of the SiN layer 41.
[0057] The thickness of the first region 42a can be thinner than the thickness of the second region 42b, or it can be thicker than the thickness of the second region 42b, or it can be the same as the thickness of the second region 42b.
[0058] The semiconductor module 200 can also achieve the same effect as the semiconductor module 100.
[0059] In the semiconductor module 200, by placing the SiN layer 41 inside the silicone gel layer 42, it is possible to suppress the moisture that penetrates the silicone gel layer 42 (second region 42b) from reaching the electrode 20.
[0060] (Third Implementation) Figure 5 This is a cross-sectional view schematically showing a portion of the semiconductor module of the third embodiment.
[0061] like Figure 5 As shown, the semiconductor module 300 of the third embodiment is substantially the same as the semiconductor module 100 of the first embodiment, except that the position of the SiN layer 41 is different.
[0062] In the semiconductor module 300, a SiN layer 41 is disposed on top of a silicone gel layer 42. In the semiconductor module 300, a silicone gel layer 42 is disposed on top of a protective film 30, and a SiN layer 41 is disposed on top of the silicone gel layer 42. In the semiconductor module 300, the SiN layer 41 is disposed at the uppermost part of the sealing member 40. In the semiconductor module 300, the silicone gel layer 42 covers at least a portion of the upper surface of the protective film 30, and the SiN layer 41 covers at least a portion of the upper surface of the silicone gel layer 42.
[0063] The semiconductor module 300 can also achieve the same effect as the semiconductor module 100.
[0064] In the semiconductor module 300, by placing the SiN layer 41 on the silicone gel layer 42, it is possible to suppress the intrusion of moisture into the silicone gel layer 42.
[0065] Furthermore, in the first to third embodiments described above, the case where the sealing member 40 includes one SiN layer 41 was used as an example for explanation, but the sealing member 40 may also include two or more SiN layers 41. In this case, an organosilicon gel layer 42 is provided between the two SiN layers 41. Additionally, the SiN layer 41 may be provided, for example, below and inside the organosilicon gel layer 42, below and above the organosilicon gel layer 42, inside and above the organosilicon gel layer 42, or below, inside and above the organosilicon gel layer 42.
[0066] <Semiconductor module manufacturing method> (First Implementation) Figure 6 (a) ~ Figure 6 (e) is a cross-sectional view schematically illustrating a method for manufacturing a semiconductor module according to the first embodiment.
[0067] like Figure 6 (a) ~ Figure 6 As shown in (e), the semiconductor module manufacturing method of the first embodiment includes a first step and a second step. Figure 6(a) indicates the first process. Figure 6 (b) ~ Figure 6 (e) indicates the second process.
[0068] In the first process, such as Figure 6 As shown in (a), an electrode 20 is disposed on the semiconductor element 10. The electrode 20 is electrically connected to the semiconductor element 10. The electrode 20 has an outer peripheral portion 20a and a central portion 20b (see Figure 1). Figure 2 ).exist Figure 6 In example (a), a terminating oxide film 60 is also provided on the semiconductor element 10. More specifically, first, a terminating oxide film 60 is provided on the semiconductor element 10, and then an electrode 20 is provided such that a portion (outer periphery 20a) overlaps with the terminating oxide film 60. The terminating oxide film 60 is provided as needed and can be omitted.
[0069] In the second process, such as Figure 6 (b) ~ Figure 6 As shown in (e), a sealing member 40 having a SiN layer 41 containing Si-N-Si bonds and an organosilicon gel layer 42 containing organosilicon gel is disposed on the electrode 20. The sealing member 40 is disposed in such a way that it covers at least a portion of the upper surface of the electrode 20.
[0070] In the second process, firstly, as Figure 6 As shown in (b), a protective film 30 is provided on the side and above the outer peripheral portion 20a of the electrode 20. The protective film 30 is provided such that it covers at least a portion of the side surface of the outer peripheral portion 20a of the electrode 20 and at least a portion of the upper surface of the outer peripheral portion 20a. As described above, the protective film 30 comprises polyimide resin. Figure 6 In example (b), a protective film 30 is provided on the outer peripheral portion 20a and on the terminal oxide film 60. For example, the protective film 30 can be formed by coating the sides and outer peripheral portion 20a of the electrode 20 with a material containing polyimide resin. If the protective film 30 is not provided, it can be omitted. Figure 6 The process of (b).
[0071] In the second process, then, as Figure 6 As shown in (c), a silicone resin layer 45 containing siloxane bonds is provided on the protective film 30. The silicone resin layer 45 is provided in such a way that it covers at least a portion of the upper surface of the protective film 30. For example, a silicone resin layer 45 having a first portion 45a provided on the protective film 30 and a second portion 45b provided on the side of the protective film 30 is provided. The silicone resin layer 45 may be formed of the same material as the silicone gel layer 42, or it may be formed of a different material from the silicone gel layer 42.
[0072] In the second process, then, as Figure 6 As shown in (d), a SiN layer 41 is formed by nitriding an organosilicon resin layer 45 using plasma treatment. Through plasma treatment, oxygen atoms (O) in the siloxane bonds (Si-O-Si bonds) contained in the organosilicon resin layer 45 are replaced with nitrogen atoms (N), resulting in a SiN layer 41 containing Si-N-Si bonds. The first portion 45a of the organosilicon resin layer 45 becomes the first portion 41a of the SiN layer 41. The second portion 45b of the organosilicon resin layer 45 becomes the second portion 41b of the SiN layer 41. At this time, only a portion (e.g., the surface) of the organosilicon resin layer 45 can be designated as the SiN layer 41, or the entire organosilicon resin layer 45 can be designated as the SiN layer 41. The plasma treatment is performed, for example, under atmospheric pressure plasma or low-temperature plasma under vacuum, using a gas containing N2 and NH3. For example, by changing the plasma treatment conditions, the substitution rate from oxygen atoms to nitrogen atoms (i.e., the nitrogen content of the SiN layer 41) can be made to a desired value.
[0073] In the second process, then, as Figure 6 As shown in (e), an organosilicon gel layer 42 is provided on the central portion 20b of the electrode 20 and on the SiN layer 41. The organosilicon gel layer 42 is provided in such a way that it covers at least a portion of the upper surface of the central portion 20b of the electrode 20 and at least a portion of the upper surface of the SiN layer 41. For example, the organosilicon gel layer 42 can be formed by coating a material containing organosilicon gel on the central portion 20b of the electrode 20, on the SiN layer 41, and on the semiconductor device 10.
[0074] Thus, through Figure 6 The first process shown in (a) Figure 6 (b) ~ Figure 6 The second process shown in (e) is capable of manufacturing the semiconductor module 100 of the first embodiment.
[0075] (A variation of the first embodiment) Figure 7 (a) ~ Figure 7 (d) is a cross-sectional view schematically illustrating a modified example of the manufacturing method of the semiconductor module according to the first embodiment.
[0076] like Figure 7 (a) ~ Figure 7 As shown in (d), the variation of the semiconductor module manufacturing method of the first embodiment differs from the method of forming the SiN layer 41 in the second process in the following ways: Figure 6 (a) ~ Figure 6 The manufacturing method is the same as that of the semiconductor module in the first embodiment shown in (e). Figure 7 (a) indicates the first process. Figure 7 (b) ~ Figure 7 (d) indicates the second process.
[0077] In a variation of the semiconductor module manufacturing method of the first embodiment, instead of Figure 6 (c) and Figure 6 The process of (d) is carried out. Figure 7 The process of (c). Figure 7 of (a) Figure 7 (b) and Figure 7 The process of (d) and Figure 6 of (a) Figure 6 (b) and Figure 6 The process of (e) is essentially the same, so the explanation is omitted.
[0078] In a variation of the semiconductor module manufacturing method of the first embodiment, in the second step, such as Figure 7 As shown in (c), a SiN layer 41 is formed on and to the side of the protective film 30 by chemical vapor deposition (CVD). CVD is performed, for example, by plasma CVD using gases such as N2, NH3, N2O, SiH4, and H2. For example, by changing the CVD conditions, the nitrogen content of the SiN layer 41 can be made to a desired value.
[0079] Thus, through Figure 7 The first process shown in (a) Figure 7 (b) ~ Figure 7 The second process shown in (d) is capable of manufacturing the semiconductor module 100 of the first embodiment.
[0080] (Second Implementation) Figure 8 (a) ~ Figure 8 (e) is a cross-sectional view schematically illustrating a method for manufacturing a semiconductor module according to the second embodiment.
[0081] like Figure 8 (a) ~ Figure 8 As shown in (e), the manufacturing method of the semiconductor module in the second embodiment is substantially the same as that in the first embodiment, except for the difference in the second process. Figure 8 (a) indicates the first process. Figure 8 (b) ~ Figure 8 (e) indicates the second process.
[0082] In the semiconductor module manufacturing method of the second embodiment, instead of Figure 6 (c)~ Figure 6The (e) process is carried out. Figure 8 (c)~ Figure 8 The process of (e). Figure 8 (a) and Figure 8 The process of (b) and Figure 6 (a) and Figure 6 The process in (b) is essentially the same, so the explanation is omitted.
[0083] In the semiconductor module manufacturing method of the second embodiment, in the second step, such as Figure 8 As shown in (c), a portion (first region 42a) of an organosilicon gel layer 42 is disposed on the central portion 20b of the electrode 20 and on the protective film 30. The portion (first region 42a) of the organosilicon gel layer 42 is disposed such that it covers at least a portion of the upper surface of the central portion 20b of the electrode 20 and at least a portion of the upper surface of the protective film 30. For example, the first region 42a of the organosilicon gel layer 42 can be formed by coating a material containing organosilicon gel on the central portion 20b of the electrode 20, on the protective film 30, and on the semiconductor element 10.
[0084] In the semiconductor module manufacturing method of the second embodiment, in the second step, then, as... Figure 8 As shown in (d), a portion of the first region 42a of the silicone gel layer 42 is nitrided by plasma treatment, thereby forming a SiN layer 41 on the first region 42a of the silicone gel layer 42. The SiN layer 41 is formed in such a way that it covers at least a portion of the upper surface of the first region 42a of the silicone gel layer 42. By plasma treatment, the oxygen atoms (O) in the siloxane bonds (Si-O-Si bonds) contained in the first region 42a of the silicone gel layer 42 are replaced with nitrogen atoms (N), resulting in a SiN layer 41 containing Si-N-Si bonds. The conditions for plasma treatment can be, for example, the same as those described above.
[0085] In the semiconductor module manufacturing method of the second embodiment, in the second step, then, as... Figure 8 As shown in (e), another portion (second region 42b) of the silicone gel layer 42 is formed on the SiN layer 41. The other portion (second region 42b) of the silicone gel layer 42 is formed in such a way that it covers at least a portion of the upper surface of the SiN layer 41. For example, the second region 42b of the silicone gel layer 42 can be formed by coating the SiN layer 41 with a material containing silicone gel.
[0086] Thus, through Figure 8 The first process shown in (a) Figure 8 (b) ~ Figure 8The second process shown in (e) enables the manufacture of the semiconductor module 200 of the second embodiment.
[0087] (A variation of the second embodiment) Figure 9 (a) ~ Figure 9 (e) is a cross-sectional view schematically illustrating a modified example of the manufacturing method of the semiconductor module according to the second embodiment.
[0088] like Figure 9 (a) ~ Figure 9 As shown in (e), the variation of the semiconductor module manufacturing method of the second embodiment differs from the method of forming the SiN layer 41 in the second process in the following ways: Figure 8 (a) ~ Figure 8 The manufacturing method of the semiconductor module in the second embodiment shown in (e) is the same. Figure 9 (a) indicates the first process. Figure 9 (b) ~ Figure 9 (e) indicates the second process.
[0089] In a variation of the semiconductor module manufacturing method of the second embodiment, instead of Figure 8 The (d) process is carried out. Figure 9 The process of (d). Figure 9 (a) ~ Figure 9 (c) and Figure 9 The process of (e) and Figure 8 (a) ~ Figure 8 (c) and Figure 8 The process of (e) is essentially the same, so the explanation is omitted.
[0090] In a variation of the semiconductor module manufacturing method of the second embodiment, in the second step, such as Figure 9 As shown in (d), a SiN layer 41 is formed over the first region 42a of the silicone gel layer 42 by chemical vapor deposition (CVD). The CVD conditions can be, for example, the same as those described above. The SiN layer 41 is formed in such a way that it covers at least a portion of the upper surface of the first region 42a of the silicone gel layer 42.
[0091] Thus, through Figure 9 The first process shown in (a) Figure 9 (b) ~ Figure 9 The second process shown in (e) enables the manufacture of the semiconductor module 200 of the second embodiment.
[0092] (Third Implementation) Figure 10 (a) ~ Figure 10(d) is a cross-sectional view schematically illustrating a method for manufacturing a semiconductor module according to a third embodiment.
[0093] like Figure 10 (a) ~ Figure 10 As shown in (d), the manufacturing method of the semiconductor module in the third embodiment is substantially the same as that in the first embodiment, except for the second step. Figure 10 (a) indicates the first process. Figure 10 (b) ~ Figure 10 (d) indicates the second process.
[0094] In the semiconductor module manufacturing method of the third embodiment, instead of Figure 6 (c)~ Figure 6 The (e) process is carried out. Figure 10 (c) and Figure 10 The process of (d). Figure 10 (a) and Figure 10 The process of (b) and Figure 6 (a) and Figure 6 The process in (b) is essentially the same, so the explanation is omitted.
[0095] In the semiconductor module manufacturing method of the third embodiment, in the second step, such as Figure 10 As shown in (c), an organosilicon gel layer 42 is provided on the central portion 20b of the electrode 20 and on the protective film 30. The organosilicon gel layer 42 is provided in such a way that it covers at least a portion of the upper surface of the central portion 20b of the electrode 20 and at least a portion of the upper surface of the protective film 30. For example, the organosilicon gel layer 42 can be formed by coating a material containing organosilicon gel on the central portion 20b of the electrode 20, on the protective film 30, and on the semiconductor element 10.
[0096] In the semiconductor module manufacturing method of the third embodiment, in the second step, then, as... Figure 10 As shown in (d), a portion of the silicone gel layer 42 is nitrided by plasma treatment, thereby forming a SiN layer 41 on the silicone gel layer 42. The SiN layer 41 is formed in such a way that it covers at least a portion of the upper surface of the silicone gel layer 42. Through plasma treatment, the oxygen atoms (O) in the siloxane bonds (Si-O-Si bonds) contained in the silicone gel layer 42 are replaced with nitrogen atoms (N), resulting in a SiN layer 41 containing Si-N-Si bonds. The conditions for plasma treatment can be, for example, the same as those described above.
[0097] Thus, through Figure 10 The first process shown in (a) Figure 10 (b) ~ Figure 10The second process shown in (d) enables the manufacture of the semiconductor module 300 of the third embodiment.
[0098] (A variation of the third embodiment) Figure 11 (a) ~ Figure 11 (d) is a cross-sectional view schematically illustrating a modified example of the semiconductor module manufacturing method of the third embodiment.
[0099] like Figure 11 (a) ~ Figure 11 As shown in (d), the variation of the semiconductor module manufacturing method of the third embodiment differs from the method of forming the SiN layer 41 in the second process in the following ways: Figure 10 (a) ~ Figure 10 The manufacturing method of the semiconductor module in the third embodiment shown in (d) is the same. Figure 11 (a) indicates the first process. Figure 11 (b) ~ Figure 11 (d) indicates the second process.
[0100] In a variation of the semiconductor module manufacturing method of the third embodiment, instead of Figure 10 The (d) process is carried out. Figure 11 The process of (d). Figure 11 (a) ~ Figure 11 The process of (c) and Figure 10 (a) ~ Figure 10 The process in (c) is essentially the same, so the explanation is omitted.
[0101] In a variation of the semiconductor module manufacturing method of the third embodiment, in the second step, such as Figure 11 As shown in (d), a SiN layer 41 is formed on the silicone gel layer 42 by chemical vapor deposition (CVD). The SiN layer 41 is formed in such a way that it covers at least a portion of the upper surface of the silicone gel layer 42. The CVD conditions can be, for example, the same as those described above.
[0102] Thus, through Figure 11 The first process shown in (a) Figure 11 (b) ~ Figure 11 The second process shown in (d) enables the manufacture of the semiconductor module 300 of the third embodiment.
[0103] The implementation method may also include the following configuration.
[0104] (Component 1) A semiconductor module, comprising: Semiconductor components; Electrodes, electrically connected to the semiconductor element; and A sealing component that covers at least a portion of the electrode. The sealing component has a SiN layer containing Si-N-Si bonds and an organosilicon gel layer containing organosilicon gel.
[0105] (Component 2) According to the semiconductor module described in configuration 1, the SiN layer comprises silicon atoms, nitrogen atoms, and oxygen atoms.
[0106] (Component 3) According to the semiconductor module comprising 1 or 2, wherein the silicone gel layer covers at least a portion of the SiN layer.
[0107] (Component 4) According to the semiconductor module described in configuration 3, the SiN layer is disposed in connection with the organosilicon gel layer.
[0108] (Component 5) According to any one of the semiconductor modules comprising 1 to 4, wherein the SiN layer is disposed inside the organosilicon gel layer.
[0109] (Composition 6) According to any one of the semiconductor modules comprising 1 to 5, wherein the SiN layer covers at least a portion of the organosilicon gel layer.
[0110] (Component 7) The semiconductor module according to any one of 1 to 6 further comprises a protective film disposed between the electrode and the SiN layer, the protective film comprising a polyimide resin. The sealing component covers at least a portion of the protective film.
[0111] (Composition 8) According to the semiconductor module described in configuration 7, the electrode has: an outer peripheral portion including an outer peripheral end; and a central portion located, in plan view, inside the outer peripheral portion. The protective film covers at least a portion of the side surface of the outer peripheral portion and at least a portion of the upper surface of the outer peripheral portion. The sealing component covers at least a portion of the central portion and at least a portion of the protective film.
[0112] (Composition 9) According to the semiconductor module described in configuration 7 or 8, the SiN layer has a first portion covering at least a portion of the upper surface of the protective film and a second portion covering at least a portion of the side surface of the protective film.
[0113] (Composition 10) A method for manufacturing a semiconductor module, comprising: The first step involves setting electrodes that are electrically connected to the semiconductor element; and The second step involves setting a sealing component, which has a SiN layer containing Si-N-Si bonds and an organosilicon gel layer containing organosilicon gel, and covers at least a portion of the electrode.
[0114] (Composition 11) According to the manufacturing method of the semiconductor module comprising 10, in the second step, an organosilicon resin layer containing siloxane bonds is formed, and the organosilicon resin layer is nitrided by plasma treatment, thereby forming the SiN layer. (Composition 12) According to the manufacturing method of the semiconductor module constituting 10, in the second step, the SiN layer is formed by chemical vapor deposition.
[0115] (Composition 13) According to the manufacturing method of the semiconductor module comprising any one of 10 to 12, in the second step, a SiN layer covering at least a portion of the electrode is provided, and an organosilicon gel layer covering at least a portion of the SiN layer is provided.
[0116] (Composition 14) According to the manufacturing method of the semiconductor module comprising any one of 10 to 13, in the second step, a portion of the silicone gel layer covering at least a portion of the electrode is provided, a SiN layer covering a portion of the silicone gel layer is provided, and another portion of the silicone gel layer covering at least a portion of the SiN layer is provided.
[0117] (Composition 15) According to the manufacturing method of the semiconductor module comprising any one of 10 to 14, in the second step, the silicone gel layer covering at least a portion of the electrode is provided, and the SiN layer covering at least a portion of the silicone gel layer is provided.
[0118] (Composition 16) According to the manufacturing method of the semiconductor module comprising any one of 10 to 15, in the second step, a protective film comprising polyimide resin covering at least a portion of the electrode is provided, and a sealing member covering at least a portion of the protective film is provided.
[0119] (Composition 17) According to the manufacturing method of the semiconductor module comprising 16, in the first step, an electrode having an outer peripheral portion and a central portion and electrically connected to the semiconductor element is provided, the outer peripheral portion including an outer peripheral end, and the central portion being located further inward than the outer peripheral portion when viewed from above. In the second step, a protective film is provided covering at least a portion of the side surface of the outer peripheral portion and at least a portion of the upper surface of the outer peripheral portion, and a sealing member is provided covering at least a portion of the central portion and at least a portion of the protective film. As described above, according to the embodiments, a semiconductor module capable of suppressing moisture that has penetrated into the sealing component from reaching the electrode and a method for manufacturing the semiconductor module can be provided.
[0120] The embodiments of the present invention have been illustrated above, but these embodiments are provided as examples and are not intended to limit the scope of the invention. This new embodiment can be implemented in various other ways, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. This embodiment and its variations are included within the scope or spirit of the invention, and are included within the scope of the invention as described in the claims and its equivalents.
[0121] Explanation of reference numerals in the attached figures 10: Semiconductor components 10a: Second adhesive 20: Electrode 20a: Peripheral part 20b: Central Department 20e: Peripheral end 30: Protective film 40: Sealing components 41: SiN layer 41a: Part One 41b: Part Two 42: Organosilicon gel layer 42a: First Region 42b: Second Region 45: Silicone resin layer 45a: Part One 45b: Part Two 60: Terminal oxide film 81: Base plate 82: Framework 83: First component 83a: First adhesive 84: Second component 85: Third component 86: Line 100, 200, 300: Semiconductor modules.
Claims
1. A semiconductor module, characterized in that, have: Semiconductor components; Electrodes, electrically connected to the semiconductor element; and A sealing component that covers at least a portion of the electrode. The sealing component has a SiN layer containing Si-N-Si bonds and an organosilicon gel layer containing organosilicon gel.
2. The semiconductor module according to claim 1, characterized in that, The SiN layer contains silicon atoms, nitrogen atoms, and oxygen atoms.
3. The semiconductor module according to claim 1, characterized in that, The silicone gel layer covers at least a portion of the SiN layer.
4. The semiconductor module according to claim 3, characterized in that, The SiN layer is disposed in connection with the organosilicon gel layer.
5. The semiconductor module according to claim 1, characterized in that, It also includes a protective film disposed between the electrode and the SiN layer, comprising polyimide resin. The sealing component covers at least a portion of the protective film.
6. The semiconductor module according to claim 5, characterized in that, The electrode has: an outer peripheral portion including an outer peripheral end; and a central portion located, in top view, inside the outer peripheral portion. The protective film covers at least a portion of the side surface of the outer peripheral portion and at least a portion of the upper surface of the outer peripheral portion. The sealing component covers at least a portion of the central portion and at least a portion of the protective film.
7. The semiconductor module according to claim 5, characterized in that, The SiN layer has a first portion covering at least a portion of the upper surface of the protective film and a second portion covering at least a portion of the side surface of the protective film.
8. A method for manufacturing a semiconductor module, characterized in that, have: The first step involves setting electrodes that are electrically connected to the semiconductor element; and The second step involves setting a sealing component, which has a SiN layer containing Si-N-Si bonds and an organosilicon gel layer containing organosilicon gel, and covers at least a portion of the electrode.
9. The method for manufacturing a semiconductor module according to claim 8, characterized in that, In the second step, an organosilicon resin layer containing siloxane bonds is formed, and the organosilicon resin layer is nitrided by plasma treatment, thereby forming the SiN layer.
10. The method for manufacturing a semiconductor module according to claim 8, characterized in that, In the second step, a SiN layer covering at least a portion of the electrode is provided, and an organosilicon gel layer covering at least a portion of the SiN layer is provided.
11. The method for manufacturing a semiconductor module according to claim 8, characterized in that, In the second step, a protective film containing polyimide resin is provided covering at least a portion of the electrode, and a sealing component is provided covering at least a portion of the protective film.
12. The method for manufacturing a semiconductor module according to claim 11, characterized in that, In the first step, an electrode is provided having an outer peripheral portion and a central portion and being electrically connected to the semiconductor element. The outer peripheral portion includes an outer peripheral end, and the central portion is located further inward than the outer peripheral portion when viewed from above. In the second step, a protective film is provided that covers at least a portion of the side surface of the outer peripheral portion and at least a portion of the upper surface of the outer peripheral portion, and a sealing member is provided that covers at least a portion of the central portion and at least a portion of the protective film.