Packaging structure and method for manufacturing a packaging structure

CN122803756APending Publication Date: 2026-09-22CHIPMORE TECH CORP LTD +1
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Patent Information

Application Number
CN202610994384.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-07-06
Publication Date
2026-09-22

AI Technical Summary

Technical Problem

[0003]本发明提供一种封装结构和封装结构的制备方法,其目的在于解决现有技术中,采用“Face to Face”的封装方式时,基板与中介层之间的间隔较大,电性连接基板与中介层的导电结构在封装过程中容易发生变形、断裂等问题

Benefits of technology

本发明提供的封装结构和封装结构的制备方法中,第一芯片和第二芯片分别设置于中介层的两侧,相比将第一芯片和第二芯片只设置于中介层一侧的设计,本发明中,第一芯片和第二芯片沿高度方向重叠,能够减小封装结构的占用面积,并且,中介层与基板之间设置有支撑结构,支撑结构整体上具有较高的结构强度,在封装过程中不易发生变形、断裂等问题,能够可靠地实现基板与中介层之间的电性连接,降低了封装结构失效的风险。

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Abstract

This invention discloses a packaging structure and a method for fabricating the packaging structure. The packaging structure includes a substrate; an interposer layer located on one side of the substrate, having a first surface facing away from the substrate and a second surface facing the substrate; a chipset including a first chip and a second chip, the first chip being electrically connected to the first surface and the second chip being electrically connected to the second surface; a first molding compound layer encapsulating at least the second chip; and a support structure disposed between the substrate and the interposer layer, the support structure including a conductive element and a support body covering the outer periphery of the conductive element, the two ends of the conductive element being electrically connected to the substrate and the interposer layer, respectively. The packaging structure and the method for fabricating the packaging structure provided by this invention can reduce the area occupied by the packaging structure, and the support structure as a whole has high structural strength, making it less prone to deformation and breakage during the packaging process, thus reducing the risk of packaging structure failure.
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Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a packaging structure and a method for preparing the packaging structure. Background Technology

[0002] In existing technologies, when packaging multiple chips, a "face-to-face" packaging method is used to reduce the overall size of the package structure. This method involves placing an interposer layer on top of the substrate and connecting multiple chips to both sides of the interposer layer. With this packaging method, an electrical connection needs to be achieved between the substrate and the interposer layer. However, the large gap between the substrate and the interposer layer makes the conductive structure connecting them prone to deformation and breakage during the packaging process. This reduces the reliability of the electrical connection between the substrate and the interposer layer and increases the risk of package structure failure. Summary of the Invention

[0003] This invention provides a packaging structure and a method for preparing the packaging structure. Its purpose is to solve the problems in the prior art where, when using the "Face to Face" packaging method, the gap between the substrate and the interlayer is large, and the conductive structure that electrically connects the substrate and the interlayer is prone to deformation and breakage during the packaging process.

[0004] To achieve the above objectives, the present invention provides a packaging structure, comprising:

[0005] substrate; An interposer layer located on one side of the substrate, having a first surface facing away from the substrate and a second surface facing the substrate; A chipset, the chipset including a first chip and a second chip, the first chip being electrically connected to a first surface and the second chip being electrically connected to a second surface; A first molding layer, wherein the first molding layer at least molds the second chip; The packaging structure further includes a support structure disposed between the substrate and the interposer layer. The first molding layer encapsulates the second chip and the support structure. The support structure includes a conductive element and a support body that wraps around the outer peripheral surface of the conductive element. The two ends of the conductive element are electrically connected to the substrate and the interposer layer, respectively.

[0006] As an improvement of the present invention, the conductive element is a metal pillar, and the support is made of silicon or glass.

[0007] As an improvement of the present invention, the packaging structure further includes a thermally conductive adhesive layer, which is formed on the side of the substrate facing the interposer, and the second chip is thermally connected to the substrate through the thermally conductive adhesive layer.

[0008] As an improvement of the present invention, a heat conduction structure is formed inside the substrate. The heat conduction structure includes a plurality of first heat conduction portions spaced apart and a second heat conduction portion connecting the plurality of first heat conduction portions. At least a portion of the heat conduction adhesive layer is formed on the second heat conduction portion.

[0009] As an improvement of the present invention, the intermediary layer includes an intermediate layer, a first electrical connection layer formed on the side of the intermediate layer facing the substrate, and a bridge structure embedded in the intermediate layer. The conductive element and the second chip are both electrically connected to the first electrical connection layer, and the bridge structure electrically connects the first chip and the first electrical connection layer.

[0010] As an improvement of the present invention, the intermediate layer has a third surface facing the substrate and a fourth surface facing away from the substrate, the first electrical connection layer is formed on the third surface, the intermediate layer further includes a second electrical connection layer formed on the fourth surface, a portion of the bridge structure extends beyond the fourth surface, the top surface of the portion of the bridge structure extending beyond the fourth surface and the top surface of the second electrical connection layer are at the same height, and the first chip is electrically connected to the bridge structure and the second electrical connection layer.

[0011] As an improvement of the present invention, the intermediate layer includes a carrier and a plurality of conductive pillars made of metal. Each conductive pillar includes a top surface, a bottom surface, and an outer peripheral surface. The top surface and the bottom surface are arranged opposite to each other. The carrier wraps around the outer peripheral surfaces of the plurality of conductive pillars. The top surface of each conductive pillar is connected to the second electrical connection layer, and the bottom surface is connected to the first electrical connection layer.

[0012] The present invention also provides a method for preparing a packaging structure, the method comprising the following steps: An intermediary layer is provided, the intermediary layer having a first surface and a second surface disposed opposite to each other; The first chip is electrically connected to the first surface, and the second chip is electrically connected to the second surface; A support structure is provided, the support structure including a conductive element and a support body that surrounds the outer peripheral surface of the conductive element; A substrate is provided, and the substrate and the interposer are electrically connected through the conductive elements of the support structure, forming a first molding layer that encapsulates the support structure and the second chip.

[0013] As an improvement to the present invention, the step of "electrically connecting the substrate and the interposer through the conductive elements of the support structure" includes the following steps: Before performing the step of “forming a first molding layer for molding the support structure and the second chip”, one end of the conductive element is electrically connected to the interposer layer; After performing the step of “forming a first molding layer for molding the support structure and the second chip”, the other end of the conductive element is electrically connected to the substrate.

[0014] As an improvement to the present invention, the step of "providing an intermediary layer" includes the following steps: A first electrical connection layer is formed, the first electrical connection layer having a fifth surface; A plurality of conductive pillars are formed on the fifth surface; Connect the bridge structure to the fifth surface; A carrier is formed, which encloses the bridge structure and the plurality of conductive pillars.

[0015] As an improvement to the present invention, the step of "forming a carrier" includes the following steps: A molding container is provided, and after the inner wall of the molding container is coated with a liquid isolation layer material, a liquid carrier material is filled into the molding container. The bridge structure and the plurality of conductive pillars are immersed in the carrier material, and the fifth surface is in contact with the carrier material. The height of the plurality of conductive pillars is not less than the distance from the fifth surface to the isolation layer material. The end of the bridge structure away from the first electrical connection layer is higher than the plurality of conductive pillars. Solidify the carrier material and the isolation layer material; Remove the material from the molded container and the insulating layer so that the top surfaces of the bridge structure and the plurality of conductive pillars can be exposed to the outside of the carrier.

[0016] Beneficial effects: In the packaging structure and its preparation method provided by this invention, the first chip and the second chip are respectively disposed on both sides of the interposer. Compared with the design where the first chip and the second chip are disposed on only one side of the interposer, in this invention, the first chip and the second chip overlap along the height direction, which can reduce the area occupied by the packaging structure. Furthermore, a support structure is provided between the interposer and the substrate. The support structure as a whole has high structural strength and is not prone to deformation or breakage during the packaging process. It can reliably realize the electrical connection between the substrate and the interposer, reducing the risk of packaging structure failure. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of the packaging structure connected to a circuit board according to an embodiment of the present invention; Figure 2-8 This is a schematic flowchart illustrating a method for fabricating a packaging structure according to an embodiment of the present invention. Figure 9 This is a schematic diagram of the substrate structure in one embodiment of the present invention; Figure 10 This is a schematic diagram of the structure of the intermediary layer in one embodiment of the present invention; Figure 11 This is a schematic diagram of the structure of the intermediary layer in another embodiment of the present invention; Figure 12 for Figure 11 Schematic diagram of the middle bridge structure; Figure 13 This is a schematic diagram of the packaging structure provided in an embodiment of the present invention; Figure 14 This is a schematic diagram of the structure of the intermediary layer, the first chip, and the second packaging layer in another embodiment of the present invention; Figure 15 This is a schematic diagram of the packaging structure provided in an embodiment of the present invention; Figure 16-21 A flowchart illustrating some steps in a method for preparing a packaging structure according to an embodiment of the present invention; Figure 22-23 A flowchart illustrating some steps in the method for preparing the packaging structure according to another embodiment of the present invention; In the picture: 100. Packaging structure; 10. Substrate; 11. Second fixing layer; 20. Intermediate layer; 201. First surface; 202. Second surface; 21. Intermediate layer; 2101. Third surface; 2102. Fourth surface; 211. Carrier; 211'. Carrier material; 2111. Encapsulation; 2112. Receiving hole; 2113. Encapsulation; 212. Conductive post; 22. First electrical connection layer; 221. Fifth surface; 23. Second electrical connection layer; 24. Bridge structure; 241. Bridge substrate; 242. Conductor; 25. First fixing layer; 30. Chipset; 31. First chip; 311. Second molding compound; 32. Second chip; 321. First molding compound; 3201. Bump; 40. Supporting structure; 41. Conductive component; 42. Support body; 50. Heat conduction structure; 51. First heat conduction part; 52. Second heat conduction part; 60. Thermally conductive adhesive layer; 200. Circuit board; 300. Molded containers; 400. Material of the isolation layer. Detailed Implementation

[0018] The present invention will now be described in detail with reference to the embodiments shown in the accompanying drawings. However, these embodiments do not limit the present invention, and any modifications to the mechanism, method, or function made by those skilled in the art based on these embodiments are included within the scope of protection of the present invention.

[0019] The terms used herein, such as "up," "down," "left," "right," "front," and "back," indicating spatial relative position, are for illustrative purposes to describe the relationship of one feature relative to another, as shown in the accompanying drawings. It is understood that, depending on the product's placement, these terms may be intended to include different orientations besides those shown in the figures, and should not be construed as limiting the claims. Furthermore, the descriptive term "horizontal" used herein is not entirely equivalent to being perpendicular to the direction of gravity, and allows for a certain angle of inclination.

[0020] like Figure 1 As shown, an embodiment of the present invention provides a packaging structure 100, which includes a substrate 10, an interposer 20, a chipset 30, and a first molding compound 321. The interposer 20 is disposed on one side of the substrate 10 and has a gap between it and the substrate 10. The interposer 20 has a first surface 201 facing away from the substrate 10 and a second surface 202 facing the substrate 10. The chipset 30 includes a first chip 31 and a second chip 32, which are respectively located on both sides of the interposer 20. The first chip 31 is electrically connected to the first surface 201, and the second chip 32 is electrically connected to the second surface 202. The first chip 31 and the second chip 32 can be interconnected through the interposer 20. The first molding compound 321 at least molds the second chip 32 to protect the second chip 32.

[0021] The packaging structure 100 also includes a support structure 40. The support structure 40 is disposed between the substrate 10 and the interposer 20. The first molding compound 321 molds the second chip 32 and the support structure 40, providing support and protection for the second chip 32 and the support structure 40.

[0022] The support structure 40 includes a conductive element 41 and a support body 42. The support body 42 covers the outer peripheral surface of the conductive element 41. The two ends of the conductive element 41 are electrically connected to the substrate 10 and the interposer layer 20, respectively. After the conductive element 41 is electrically connected to the substrate 10 and the interposer layer 20, both the first chip 31 and the second chip 32 can be electrically connected to the substrate 10 through the interposer layer 20 and the conductive element 41. The support body 42 covers the outer peripheral surface of the conductive element 41, providing support and protection for the conductive element 41, thus giving the support structure 40 high overall structural strength.

[0023] In the packaging structure 100 provided in this embodiment, the first chip 31 and the second chip 32 are respectively disposed on both sides of the interposer layer 20. Compared with the design where the first chip 31 and the second chip 32 are disposed on only one side of the interposer layer 20, in this embodiment, the first chip 31 and the second chip 32 overlap along the height direction, which can reduce the area occupied by the packaging structure 100. In addition, a support structure 40 is provided between the interposer layer 20 and the substrate 10. The support structure 40 has high structural strength as a whole and is not prone to deformation or breakage during the packaging process. It can reliably realize the electrical connection between the substrate 10 and the interposer layer 20, reducing the risk of failure of the packaging structure 100.

[0024] The packaging structure 100 also includes a second molding layer 311 formed on the first surface 201, which molds the first chip 31 and can protect the first chip 31.

[0025] In one embodiment of the present invention, the conductive element 41 is a metal pillar, which can be made of metals such as copper or silver to have good electrical conductivity. The support 42 is made of silicon. Silicon has a certain structural strength and can effectively support the conductive element 41.

[0026] Furthermore, the thermal expansion coefficient of silicon is similar to that of the first chip 31 and the second chip 32. During the fabrication of the package structure 100, it can effectively reduce the stress caused by the mismatch of thermal expansion coefficients, thereby reducing warping or deformation on the package structure 100 and ensuring the stability of the package structure 100.

[0027] In one embodiment of the present invention, the support 42 may also be made of glass. Glass has a certain structural strength and a coefficient of thermal expansion similar to that of the first chip 31 and the second chip 32. Furthermore, glass is inexpensive and easy to process; using glass for the support 42 can reduce the manufacturing cost of the encapsulation structure 100.

[0028] When manufacturing the molded support structure 40, holes can be made in the silicon or glass first, and then the conductive element 41 can be embedded in the holes.

[0029] After the packaging structure 100 is fabricated, the substrate 10 can be soldered onto the circuit board 200. The circuit board 200 can be electrically connected to the first chip 31 and the second chip 32 in sequence through the substrate 10, the support structure 40 and the interposer layer 20.

[0030] The second chip 32 generates heat during operation. In one embodiment of the present invention, the second chip 32 is thermally connected to the substrate 10, and the heat generated by the second chip 32 during operation can be transferred to the substrate 10 for heat dissipation. In this way, the temperature of the second chip 32 can be effectively reduced, ensuring that the second chip 32 can work normally.

[0031] Combination Figure 1 , 7 As shown, the packaging structure 100 also includes a thermally conductive adhesive layer 60. The thermally conductive adhesive layer 60 is formed on the side of the substrate 10 facing the interposer 20, and the second chip 32 is thermally connected to the substrate 10 through the thermally conductive adhesive layer 60. The thermally conductive adhesive layer 60 can fill the gap between the substrate 10 and the second chip 32, so that the heat of the second chip 32 can be efficiently transferred to the substrate 10.

[0032] A thermally conductive structure 50 is formed inside the substrate 10. At least a portion of the thermally conductive adhesive layer 60 is formed on the thermally conductive structure 50. When the second chip 32 is in operation, the heat generated on it is transferred to the thermally conductive structure 50 through the thermally conductive adhesive layer 60, thereby reducing the temperature of the second chip 32.

[0033] The heat conduction structure 50 includes a plurality of spaced-apart first heat-conducting portions 51 and a plurality of second heat-conducting portions 52 connecting the plurality of first heat-conducting portions 51. At least a portion of the thermally conductive adhesive layer 60 is formed on the second heat-conducting portion 52. The plurality of spaced-apart first heat-conducting portions 51 ensure the heat conduction effect of the heat conduction structure 50 and also make the entire heat conduction structure 50 easy to deform. When the substrate 10 is deformed by heat, the heat conduction structure 50 can adaptably deform, thereby avoiding delamination between the heat conduction structure 50 and other parts of the substrate 10.

[0034] The heat conduction structure 50 can be made of materials with good thermal conductivity, such as copper or silver.

[0035] like Figure 9 As shown, in one embodiment of the present invention, the heat conduction structure 50 can also be an integral block structure. Thus, the heat conduction structure 50 has better thermal conductivity.

[0036] In one embodiment of the present invention, the thermally conductive adhesive layer 60 may be omitted, and the second chip 32 may be in direct contact with the thermally conductive structure 50 (specifically the second thermally conductive part 52).

[0037] like Figure 1 As shown, one end of the conductive element 41 can be soldered to the interposer layer 20 to achieve electrical connection with the interposer layer 20. The encapsulation structure 100 may also include a first fixing layer 25 disposed between the interposer layer 20 and the support structure 40. The first fixing layer 25 can connect the interposer layer 20 and the support structure 40, so that the position of the support structure 40 relative to the interposer layer 20 can remain stable.

[0038] The other end of the conductive element 41 can be soldered to the substrate 10 to achieve electrical connection with the substrate 10. The package structure 100 may also include a second fixing layer 11 disposed between the substrate 10 and the support structure 40. The second fixing layer 11 can connect the substrate 10 and the support structure 40, so that the position of the support structure 40 relative to the substrate 10 can remain stable.

[0039] like Figure 2 As shown, in one embodiment of the present invention, the interposer 20 includes an intermediate layer 21, a first electrical connection layer 22, and a second electrical connection layer 23. The intermediate layer 21 has a third surface 2101 facing the substrate 10 and a fourth surface 2102 facing away from the substrate 10. The first electrical connection layer 22 is disposed on the third surface 2101, and the second electrical connection layer 23 is disposed on the fourth surface 2102.

[0040] The intermediate layer 21 electrically connects the first electrical connection layer 22 and the second electrical connection layer 23. It includes a carrier 211 and several conductive pillars 212 made of metal. The conductive pillars 212 are made of metals such as copper or silver, and each pillar includes a top surface, a bottom surface, and an outer peripheral surface, with the top and bottom surfaces facing each other. The top surface of each conductive pillar 212 connects to the second electrical connection layer 23, and the bottom surface connects to the first electrical connection layer 22. The first electrical connection layer 22 and the second electrical connection layer 23 are electrically connected through the conductive pillars 212.

[0041] The first surface 201 is formed on the second electrical connection layer 23, and the first chip 31 is electrically connected to the second electrical connection layer 23. The second surface 202 is formed on the first electrical connection layer 22, and the second chip 32 and the conductive element 41 are both electrically connected to the first electrical connection layer 22. In this embodiment, both the first electrical connection layer 22 and the second electrical connection layer 23 are redistribution layers.

[0042] With the above configuration, the first chip 31 and the second chip 32 can be stably interconnected through the interposer layer 20, and both the first chip 31 and the second chip 32 can be electrically connected to the substrate 10 through the conductive element 41 of the support structure 40.

[0043] like Figure 10 As shown, in one embodiment of the present invention, the carrier 211 includes at least one encapsulation body 2111, and the encapsulation body 2111 is provided with a plurality of receiving holes 2112, and the plurality of conductive posts 212 are respectively embedded in the plurality of receiving holes 2112. The encapsulation body 2111 can effectively define the position of the plurality of conductive posts 212, ensuring the positional accuracy of the plurality of conductive posts 212. After the plurality of conductive posts 212 are respectively embedded in the plurality of receiving holes 2112, the encapsulation body 2111 is connected to the first electrical connection layer 22, and the plurality of conductive posts 212 can be electrically connected to the first electrical connection layer 22, which is relatively convenient to operate. The main body of the first electrical connection layer 22 can be made of materials such as silicon and glass, and a conductive structure is formed on its surface or inside.

[0044] In one embodiment of the present invention, the package 2111 is made of silicon. The coefficient of thermal expansion of silicon is similar to that of the first chip 31 and the second chip 32. When the first chip 31 and the second chip 32 are mounted by high-temperature processes such as soldering, the stress caused by the mismatch of the coefficients of thermal expansion can be effectively reduced. The package 2111 and the entire intermediate layer 21 are less prone to warping, which can ensure the stability of the package structure 100.

[0045] In one embodiment of the present invention, the package 2111 is made of glass. The coefficient of thermal expansion of glass is similar to that of the first chip 31 and the second chip 32. When the first chip 31 and the second chip 32 are mounted using high-temperature processes such as soldering, the stress caused by the mismatch in thermal expansion coefficients can be effectively reduced. This prevents warping of the package 2111 and the entire intermediate layer 21, ensuring the stability of the encapsulation structure 100. Furthermore, glass is inexpensive and easy to process; using glass for the package 2111 reduces the manufacturing cost of the encapsulation structure 100.

[0046] In one embodiment of the present invention, the encapsulation 2111 is made of resin. The coefficient of thermal expansion of the resin is similar to that of the conductive pillar 212, and the intermediate layer 21 can prevent delamination between the encapsulation 2111 and the conductive pillar 212 when subjected to high temperatures.

[0047] In one embodiment of the present invention, the carrier 211 further includes a molding compound 2113, which encapsulates at least one package 2111. The molding compound 2113 is made of resin. The molding compound 2113 can protect the package 2111, reducing the impact of external mechanical shocks, vibrations, or environmental factors on the package 2111 and the conductive post 212. When multiple packages 2111 are provided, the molding compound 2113 can also connect and fix the multiple packages 2111.

[0048] When selecting resins for the packaging body 2111 and the encapsulation body 2113, PP (polypropylene) can be selected.

[0049] like Figure 10 As shown, in one embodiment of the present invention, a single package 2111 is provided, meaning the package 2111 is configured as a single unit. The package 2111 has a plurality of receiving holes 2112 formed thereon, and a plurality of conductive posts 212 are embedded within the plurality of receiving holes 2112. The single unit configuration of the package 2111 facilitates connection with the first electrical connection layer 22, reducing the manufacturing cost of the encapsulation structure 100.

[0050] In one embodiment of the present invention, multiple packages 2111 may be provided. Compared to the case where the packages 2111 are provided as a single unit, when multiple packages 2111 are provided, the size of each individual package 2111 is smaller, and the number of receiving holes 2112 formed thereon is also smaller. For example, the receiving hole 2112 on a single package 2111 is provided as at least one.

[0051] With multiple smaller encapsulated bodies 2111, the intermediate layer 21 experiences less thermal deformation when subjected to high temperatures. The thermal stress generated by the thermal expansion of multiple encapsulated bodies 2111 is more dispersed, and the encapsulating body 2113 can restrict the position of multiple encapsulated bodies 2111. Thus, the structure of the intermediate layer 21 can remain stable and will not warp.

[0052] like Figure 11-13 As shown, in one embodiment of the present invention, the intermediary layer 20 further includes a bridge structure 24 embedded in the intermediate layer 21. A portion of the bridge structure 24 extends beyond the fourth surface 2102. The top surface of the portion of the bridge structure 24 extending beyond the fourth surface 2102 is at the same height as the top surface of the second electrical connection layer 23. The first chip 31 is electrically connected to the bridge structure 24 and the second electrical connection layer 23.

[0053] The top surface of the bridge structure 24 extending beyond the fourth surface 2102 and the top surface of the second electrical connection layer 23 are at the same height, which facilitates the simultaneous electrical connection of the first chip 31 to the bridge structure 24 and the second electrical connection layer 23. The first chip 31 can form a stable electrical connection with the second electrical connection layer 23 and the bridge structure 24.

[0054] When molding the bridge structure 24 and the second electrical connection layer 23, positional and dimensional errors are inevitable. Therefore, the statement that "the top surface of the portion of the bridge structure 24 extending beyond the fourth surface 2102 and the top surface of the second electrical connection layer 23 are at the same height" should not be interpreted as the top surface of the portion of the bridge structure 24 extending beyond the fourth surface 2102 and the top surface of the second electrical connection layer 23 being absolutely coplanar. A certain height difference between the two should be allowed.

[0055] like Figure 8 As shown, a plurality of bumps 3201 are formed on the side of the first chip 31 facing the second electrical connection layer 23. The first chip 31 can be electrically connected to related structures through the plurality of bumps 3201. The bumps 3201 can be made of metal materials such as copper and gold with good conductivity.

[0056] The tops of several bumps 3201 are at the same height, and the first chip 31 is simultaneously connected to the second electrical connection layer 23 and the bridge structure 24 through several bumps 3201.

[0057] Since the top surface of the portion of the bridge structure 24 extending beyond the fourth surface 2102 is at the same height as the top surface of the second electrical connection layer 23, and the tops of the bumps 3201 are at the same height, the first chip 31 can achieve a stable connection with the second electrical connection layer 23 and the bridge structure 24 through the bumps 3201. The bumps 3201 of the second chip 32 do not need to be made at different heights, which reduces the manufacturing cost of the package structure 100.

[0058] like Figure 12 As shown, the bridge structure 24 includes a bridge substrate 241 and conductors 242. The bridge substrate 241 is embedded in the intermediate layer 21 and can be made of silicon; therefore, the bridge structure 24 can be called a "silicon bridge". Conductors 242 are disposed within the bridge substrate 241, and multiple conductors 242 can be provided. The first chip 31 and the first electrical connection layer 22 are electrically connected through multiple conductors 242. The conductors 242 are made of metals with good conductivity, such as copper or gold. Both ends of the conductors 242 extend beyond the bridge substrate 241.

[0059] like Figure 14-15 As shown, in one embodiment of the present invention, the interposer 20 includes an intermediate layer 21, a first electrical connection layer 22, and a bridge structure 24. The first electrical connection layer 22 is formed on the side of the intermediate layer 21 facing the substrate 10, and the bridge structure 24 is embedded in the intermediate layer 21. The conductive element 41 and the second chip 32 are both electrically connected to the first electrical connection layer 22. The bridge structure 24 electrically connects the first chip 31 and the first electrical connection layer 22.

[0060] With the above configuration, the first chip 31 can be electrically connected to the first electrical connection layer 22 through the bridge structure 24, and the first electrical connection layer 22 can be electrically connected to the substrate 10 through the conductive element 41. In this way, the first chip 31 can be electrically connected to the substrate 10 in sequence through the bridge structure 24, the first electrical connection layer 22 and the conductive element 41, and the electrical connection of each part of the packaging structure 100 is stable and reliable.

[0061] The present invention also provides a method for preparing a packaging structure 100, which is used to prepare the above-mentioned packaging structure 100. It should be noted that the order in which the steps of the preparation method of the packaging structure 100 are described in this document does not strictly represent the execution order of the preparation method of the packaging structure 100.

[0062] The method for fabricating the packaging structure 100 includes the following steps: like Figure 2 As shown, an intermediary layer 20 is provided, the intermediary layer 20 having a first surface 201 and a second surface 202 disposed opposite to each other.

[0063] like Figure 3-5As shown, the first chip 31 is electrically connected to the first surface 201, and the second chip 32 is electrically connected to the second surface 202. The first chip 31 and the second chip 32 can be interconnected through the interposer layer 20.

[0064] A support structure 40 is provided, which includes a conductive element 41 and a support body 42 that wraps around the outer periphery of the conductive element 41.

[0065] like Figure 6 , 8 As shown, the substrate 10 and the interposer 20 are electrically connected by the conductive element 41 of the support structure 40, and a first molding layer 321 of the molding support structure 40 and the second chip 32 is formed.

[0066] In the package structure 100 prepared by the above method, the first chip 31 and the second chip 32 are respectively disposed on both sides of the interposer 20. Compared with the design where the first chip 31 and the second chip 32 are disposed on only one side of the interposer 20, the first chip 31 and the second chip 32 overlap along the height direction, which can reduce the area occupied by the package structure 100. In addition, a support structure is provided between the interposer 20 and the substrate 10, so that the support structure 40 has high structural strength as a whole. The conductive element 41 can reliably realize the electrical connection between the substrate 10 and the interposer 20, reducing the risk of failure of the package structure 100.

[0067] The above step of "electrically connecting the substrate 10 and the interposer 20 through the conductive element 41 of the support structure 40" includes the following steps: Before performing the step of “forming the first molding layer 321 of the molding support structure 40 and the second chip 32”, one end of the conductive element 41 is electrically connected to the interposer layer 20. After performing the step of “forming the first molding layer 321 of the molding support structure 40 and the second chip 32”, the other end of the conductive element 41 is electrically connected to the substrate 10.

[0068] In the above steps, one end of the conductive element 41 of the support structure 40 is first electrically connected to the interposer layer 20, and then a first molding layer 321 for the molding support structure 40 and the second chip 32 is formed. With the position of the support structure 40 and the second chip 32 fixed by the first molding layer 321, the other end of the conductive element 41 of the support structure 40 is connected to the substrate 10, so that the position of the support structure 40 and the second chip 32 can remain stable.

[0069] When forming the first molding layer 321, the first molding layer 321 can first cover the support structure 40 and the side of the second chip 32 away from the interposer layer 20. Then, the first molding layer 321 is ground to expose the side of the support structure 40 and the second chip 32 away from the interposer layer 20.

[0070] like Figure 3 As shown, the method for preparing the packaging structure 100 provided by the present invention further includes the following steps: A second molding layer 311 is formed to encapsulate the first chip 31. The second molding layer 311 can protect the first chip 31.

[0071] like Figure 7 As shown, prior to the step of "electrically connecting the substrate 10 and the interposer 20 through the conductive element 41 of the support structure 40", the method for fabricating the encapsulation structure 100 further includes the following steps: A thermally conductive adhesive layer 60 is applied at a predetermined position on the side of the substrate 10 facing the interposer layer 20.

[0072] After the substrate 10 and the interposer 20 are electrically connected by the conductive element 41 of the support structure 40, the thermally conductive adhesive layer 60 can fill the gap between the substrate 10 and the second chip 32, and can effectively transfer the heat of the second chip 32 to the substrate 10.

[0073] The above step "Providing Intermediary Layer 20" includes the following steps: like Figure 16 As shown, a first electrical connection layer 22 is formed. The first electrical connection layer 22 has a fifth surface 221. The main body of the first electrical connection layer 22 can be made of materials such as silicon or glass, and a conductive structure is formed on its surface or inside. The fifth surface is located on the side of the first electrical connection layer facing the intermediate layer.

[0074] like Figure 17 As shown, a plurality of conductive pillars 212 are formed on the fifth surface 221. The plurality of conductive pillars 212 can be formed on the fifth surface 221 by gradient plating, or the plurality of conductive pillars 212 can be prefabricated and then soldered to the first electrical connection layer 22.

[0075] like Figure 18 As shown, the bridge structure 24 is connected to the fifth surface 221.

[0076] like Figure 11 , 19 As shown in -21, a carrier 211 is formed, which encloses the bridge structure 24 and several conductive pillars 212.

[0077] Using the above steps, the intermediate layer 21 is formed directly on the first electrical connection layer 22, and when forming the intermediate layer 21, the bridge structure 24 is also embedded in the carrier 211 of the intermediate layer 21, which simplifies the preparation process of the encapsulation structure 100.

[0078] The aforementioned second electrical connection layer 23 may subsequently be formed on the side of the intermediate layer 21 opposite to the first electrical connection layer 22.

[0079] The above step "forming carrier 211" includes the following steps: like Figures 19-20 As shown, a molding container 300 is provided. After a liquid isolation layer material 400 is coated on the inner wall of the molding container 300, a liquid carrier material 211' is filled into the molding container 300. The isolation layer material 400 and the carrier material 211' are immiscible, and the isolation layer material 400 can isolate the molding container 300 and the liquid carrier material 211'.

[0080] like Figure 21 As shown, the bridge structure 24 and several conductive pillars 212 are immersed in the carrier material 211', and the fifth surface 221 of the first electrical connection layer 22 is in contact with the carrier material 211'. In the above steps, the height of each of the conductive pillars 212 is not less than the distance from the fifth surface 221 to the insulating layer material 400, and the end of the bridge structure 24 away from the first electrical connection layer 22 is higher than the conductive pillars 212. Thus, when the fifth surface 221 of the first electrical connection layer 22 contacts the carrier material 211', the conductive pillars 212 can contact the insulating layer material 400, and the end of the bridge structure 24 away from the first electrical connection layer 22 can extend beyond the carrier material 211'.

[0081] The carrier material 211' and the isolation layer material 400 are cured. After the carrier material 211' is cured, it is formed into the carrier 211 described above.

[0082] Remove the molding container 300 to separate it from the insulating layer material 400. Then, remove the insulating layer material 400. The top surfaces of the bridge structure 24 and the plurality of conductive pillars 212 can be exposed to the outside of the carrier 211 (e.g., Figure 11 (As shown).

[0083] In the above steps, the bridge structure 24 and several conductive pillars 212 are first immersed in the carrier material 211', and then the carrier material 211' is cured to form a carrier 211 that encapsulates the bridge structure 24 and several conductive pillars 212, making the encapsulation process relatively convenient. An isolation layer material 400 is provided between the carrier material 211' and the molding container 300, so that the bridge structure 24 and several conductive pillars 212 can extend beyond the carrier material 211' to the side facing away from the first electrical connection layer 22, thereby forming the required intermediary layer structure.

[0084] In one embodiment of the present invention, a first electrical connection layer 22 is provided, which is a complete and independent substrate. In this way, the intermediary layer structure is simple, easy to manufacture, and can reduce the manufacturing cost of the packaging structure 100.

[0085] like Figure 22-23 As shown, in one embodiment of the present invention, the first electrical connection layer 22 has a plurality of substrate blocks, which are spaced apart. Each substrate block may be connected to a bridge structure 24 and have a plurality of conductive pillars 212 formed thereon.

[0086] During the formation of the carrier 211, multiple conductive pillars 212 and multiple bridge structures 24 on multiple substrate blocks are immersed together into the carrier material 211'. The formed carrier 211 encapsulates the first electrical connection layer 22, multiple conductive pillars 212 and multiple bridge structures 24.

[0087] In this embodiment, the carrier 211 encapsulates multiple substrate blocks, which can fix the positions of the multiple substrate blocks. When multiple smaller substrate blocks are provided, the thermal deformation of a single substrate block is small when the intermediate layer 21 is subjected to high temperature, the thermal stress generated by the thermal expansion of multiple substrate blocks is more dispersed, and the carrier 211 can restrict the positions of multiple substrate blocks. In this way, the structure of the intermediate layer 21 can remain stable and will not warp.

[0088] It should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This way of describing the specification is only for clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

[0089] The above embodiments are only used to illustrate the technical solutions of this application and are not intended to limit it. Although this application has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of this application without departing from the spirit and scope of the technical solutions of this application.

Claims

1. A packaging structure, comprising: substrate; An interposer layer located on one side of the substrate, having a first surface facing away from the substrate and a second surface facing the substrate; A chipset, the chipset including a first chip and a second chip, the first chip being electrically connected to a first surface and the second chip being electrically connected to a second surface; A first molding layer, wherein the first molding layer at least molds the second chip; The packaging structure is characterized in that it further includes a support structure disposed between the substrate and the interlayer, the first molding layer encapsulates the second chip and the support structure, the support structure includes a conductive element and a support body that wraps around the outer peripheral surface of the conductive element, and the two ends of the conductive element are electrically connected to the substrate and the interlayer respectively.

2. The packaging structure according to claim 1, characterized in that, The conductive component is a metal pillar, and the support is made of silicon or glass.

3. The packaging structure according to claim 1, characterized in that, The packaging structure further includes a thermally conductive adhesive layer, which is formed on the side of the substrate facing the interposer, and the second chip is thermally connected to the substrate through the thermally conductive adhesive layer.

4. The packaging structure according to claim 3, characterized in that, The substrate has a heat conduction structure inside, which includes a plurality of first heat conduction parts spaced apart and a second heat conduction part connecting the plurality of first heat conduction parts, and at least a portion of the heat conduction adhesive layer is formed on the second heat conduction part.

5. The packaging structure according to any one of claims 1-4, characterized in that, The intermediate layer includes an intermediate layer, a first electrical connection layer formed on the side of the intermediate layer facing the substrate, and a bridge structure embedded in the intermediate layer. The conductive element and the second chip are both electrically connected to the first electrical connection layer, and the bridge structure electrically connects the first chip and the first electrical connection layer.

6. The packaging structure according to claim 5, characterized in that, The intermediate layer has a third surface facing the substrate and a fourth surface facing away from the substrate. The first electrical connection layer is formed on the third surface. The intermediate layer also includes a second electrical connection layer formed on the fourth surface. A portion of the bridge structure extends beyond the fourth surface. The top surface of the portion of the bridge structure extending beyond the fourth surface and the top surface of the second electrical connection layer are at the same height. The first chip is electrically connected to the bridge structure and the second electrical connection layer.

7. The packaging structure according to claim 6, characterized in that, The intermediate layer includes a carrier and a plurality of conductive pillars made of metal. Each conductive pillar has a top surface, a bottom surface, and an outer peripheral surface. The top surface and the bottom surface are arranged opposite to each other. The carrier wraps around the outer peripheral surfaces of the conductive pillars. The top surface of each conductive pillar is connected to the second electrical connection layer, and the bottom surface is connected to the first electrical connection layer.

8. A method for preparing a packaging structure, characterized in that, The preparation method includes the following steps: An intermediary layer is provided, the intermediary layer having a first surface and a second surface disposed opposite to each other; The first chip is electrically connected to the first surface, and the second chip is electrically connected to the second surface; A support structure is provided, the support structure including a conductive element and a support body that surrounds the outer peripheral surface of the conductive element; A substrate is provided, and the substrate and the interposer are electrically connected through the conductive elements of the support structure, forming a first molding layer that encapsulates the support structure and the second chip.

9. The preparation method according to claim 8, characterized in that, The step of "electrically connecting the substrate and the interposer through the conductive elements of the support structure" includes the following steps: Before performing the step "forming a first molding layer for encapsulating the support structure and the second chip", one end of the conductive element is electrically connected to the interposer layer; After performing the step "forming a first molding layer for molding the support structure and the second chip", the other end of the conductive element is electrically connected to the substrate.

10. The preparation method according to claim 8, characterized in that, The step of "providing an intermediary layer" includes the following steps: A first electrical connection layer is formed, the first electrical connection layer having a fifth surface; A plurality of conductive pillars are formed on the fifth surface; Connect the bridge structure to the fifth surface; A carrier is formed, which encloses the bridge structure and the plurality of conductive pillars.

11. The preparation method according to claim 10, characterized in that, The step of "forming a carrier" includes the following steps: A molding container is provided, and after the inner wall of the molding container is coated with a liquid isolation layer material, a liquid carrier material is filled into the molding container. The bridge structure and the plurality of conductive pillars are immersed in the carrier material, and the fifth surface is in contact with the carrier material. The height of the plurality of conductive pillars is not less than the distance from the fifth surface to the isolation layer material. The end of the bridge structure away from the first electrical connection layer is higher than the plurality of conductive pillars. Solidify the carrier material and the isolation layer material; Remove the material from the molded container and the insulating layer so that the top surfaces of the bridge structure and the plurality of conductive pillars can be exposed to the outside of the carrier.