Electronic device

CN122803761APending Publication Date: 2026-09-22INNOLUX CORP
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Patent Information

Application Number
CN202510310680.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-03-17
Publication Date
2026-09-22

AI Technical Summary

Technical Problem

[0003]然而,目前的接合元件仍存在可靠性不佳等问题,容易导致电子装置的合格率下降和/或提高生产成本

Benefits of technology

[0017]以下是通过特定的具体实施例说明本发明的实施方式,熟习此技艺之人士可由本说明书所揭示的内容轻易地了解本发明的其他优点与效果。本发明也可通过其他不同的具体实施例加以施行或应用,本说明书中的各项细节也可针对不同观点与应用,在不悖离本发明的精神下进行各种修饰与变更。

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Abstract

The present application provides an electronic device, characterized in that comprising: a substrate, having an active region and a peripheral region, the peripheral region adjacent to the active region; an electronic component, disposed on the substrate and located in the active region; and a first bonding element, disposed on the substrate and located in the peripheral region, wherein the first bonding element comprises a first bonding layer and a second bonding layer, the second bonding layer is disposed on the first bonding layer, and the second bonding layer covers a side surface and an upper surface of the first bonding layer.
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Description

Technical Field

[0001] The present invention relates to an electronic device, and more particularly to an electronic device having a first bonding element. Background Technology

[0002] In the manufacturing process of electronic devices, such as during packaging, the upper substrate and the lower substrate are typically assembled. Bonding elements and / or bonding materials are often used in the process to achieve the assembly of the upper substrate and the lower substrate.

[0003] However, current bonding components still suffer from problems such as poor reliability, which can easily lead to a decrease in the yield rate of electronic devices and / or an increase in production costs. Therefore, there is an urgent need to provide an electronic device that can improve upon these known defects. Summary of the Invention

[0004] The present invention provides an electronic device, characterized in that it comprises: a substrate having an active region and a peripheral region adjacent to the active region; an electronic component disposed on the substrate and located in the active region; and a first bonding element disposed on the substrate and located in the peripheral region, wherein the first bonding element comprises a first bonding layer and a second bonding layer, the second bonding layer being disposed on the first bonding layer and covering one side surface and an upper surface of the first bonding layer. Attached Figure Description

[0005] Figure 1A This is a top view schematic diagram of a portion of the electronic device according to an embodiment of the present invention.

[0006] Figure 1B for Figure 1A A cross-sectional diagram of line segment A-A'.

[0007] Figure 2 This is a cross-sectional schematic diagram of a portion of an electronic device according to an embodiment of the present invention.

[0008] Figure 3A This is a cross-sectional schematic diagram of a portion of the first bonding layer according to an embodiment of the present invention.

[0009] Figure 3B This is a cross-sectional schematic diagram of a portion of the first bonding layer according to another embodiment of the present invention.

[0010] Figure 4 This is a cross-sectional schematic diagram of a portion of an electronic device according to an embodiment of the present invention.

[0011] Figure 5 This is a cross-sectional schematic diagram of a portion of an electronic device according to an embodiment of the present invention.

[0012] Figure 6 This is a cross-sectional schematic diagram of a portion of an electronic device according to an embodiment of the present invention.

[0013] Figure 7A This is a top view schematic diagram of a portion of the electronic device according to an embodiment of the present invention.

[0014] Figure 7B for Figure 7A A cross-sectional diagram of line segment B-B'.

[0015] The meanings of the reference numerals in the above figures are as follows:

[0016] Substrate 1; Circuit layer 11; First material layer 12; Second material layer 13; Third material layer 14; Another insulating layer 15; First bonding element 2; First bonding layer 21; Side surface 21s1; Upper surface 21s2; Lower surface 21s3; Protrusion 211; Second bonding layer 22; First portion 22A; Second portion 22B; Third portion 23C; Sidewall 22s1; Upper surface 22s2; Lower surface 22s3; Insulating layer 221; Metal layer 222; First portion 222A; Second portion 222B; Fourth material layer 223 Fifth material layer 224; Third bonding layer 23; First part 23A; Second part 23B; Arc-shaped sidewall 23s1; Upper surface 23s2; Lower surface 23s3; Cover plate 3; Body 31; Second bonding element 32; Bonding material 4; Active area AA; Peripheral area B; Thicknesses D, D1, D2, D3, D4, D5; Electronic component E; Openings H1, H2; First opening H3; Second opening H4; Spacing S; Sealed space SP; Widths W1, W2, W3, W4, W5, W6; Acute angle θ; Direction X, Y, Z. Detailed Implementation

[0017] The following describes the implementation of the present invention through specific embodiments. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different embodiments, and various details in this specification can be modified and changed in various ways for different viewpoints and applications without departing from the spirit of the present invention.

[0018] It should be noted that, unless otherwise specified herein, the use of the word "a" element is not limited to having a single element, but may include one or more of the elements. Furthermore, the use of ordinal numbers such as "first" and "second" in the specification and claims to modify elements of a claim does not in itself imply or represent any prior ordinal number for that claimed element, nor does it represent the order of one claimed element with another, or the order of manufacturing processes. The use of these ordinal numbers is solely for the purpose of clearly distinguishing one claimed element with a given name from another claimed element with the same name.

[0019] Throughout this specification and the appended claims, certain terms are used to refer to specific elements. Those skilled in the art will understand that electronic device manufacturers may use different names to refer to the same element. This document is not intended to distinguish between elements that have the same function but different names. In the following specification and claims, words such as “comprising,” “containing,” and “having” are open-ended terms and should therefore be interpreted as “containing but not limited to.” Thus, when the terms “comprising,” “containing,” and / or “having” are used in the description of this invention, they specify the presence of the corresponding feature, area, step, operation, and / or component, but do not exclude the presence of one or more of the corresponding feature, area, step, operation, and / or component.

[0020] In this text, the terms "about," "approximately," "substantially," and "roughly" typically indicate that a given value or range is within 10%, 5%, 3%, 2%, 1%, or 0.5%. The given quantity is an approximate quantity; that is, even without specific mention of "about," "approximately," "substantially," or "roughly," the meaning of these terms is implied. Furthermore, the phrases "range from the first value to the second value" or "range between the first value and the second value" indicate that the range includes the first value, the second value, and other values ​​in between.

[0021] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. It is understood that these terms, such as those defined in commonly used dictionaries, shall be interpreted as having a meaning consistent with the background or context of the relevant art and the present invention, and shall not be interpreted in an idealized or overly formal manner, unless specifically defined herein.

[0022] Furthermore, relative terms such as "below" or "bottom" and "above" or "top" may be used in the embodiments to describe the relative relationship of one element to another in the figures. It is understood that if the apparatus in the figures is flipped upside down, the element described as being on the "below" side will become the element on the "above" side. When a corresponding component (e.g., a membrane or region) is referred to as "on another component," it can be directly on the other component, or there may be other components between them. On the other hand, when a component is referred to as "directly on another component," there are no components between them. Additionally, when a component is referred to as "on another component," there is a vertical relationship between them in the top view, and this component can be above or below the other component, depending on the orientation of the apparatus.

[0023] In this invention, the thickness, length, width, or distance and angle between components can be measured using an optical microscope (OM), a scanning electron microscope (SEM), an alpha-step thickness gauge, an ellipsometry, or other suitable methods. Specifically, according to some embodiments, a scanning electron microscope can be used to obtain cross-sectional images of the structure and measure the thickness, length, width, or distance and angle between components. Furthermore, any two values ​​or directions used for comparison may have a certain degree of error. If the first value equals the second value, it implies an error of approximately 10% between the two values; if the first direction is perpendicular to the second direction, the angle between the first and second directions may be between 80 and 100 degrees; if the first direction is parallel to the second direction, the angle between the first and second directions may be between 0 and 10 degrees.

[0024] The embodiments of the present invention can be understood in conjunction with the accompanying drawings, which are also considered part of the invention description. It should be understood that the drawings of the present invention are not drawn to scale; in fact, the dimensions of the elements may be arbitrarily enlarged or reduced to clearly illustrate the features of the present invention.

[0025] It should be noted that the technical solutions provided in the different embodiments below can be substituted for, combined or mixed with each other to constitute another embodiment without violating the spirit of the present invention.

[0026] The electronic device of the present invention may include, for example, a light-emitting device, a display device, a sensing device, an antenna device, a touch device, a splicing device, or other suitable electronic devices, but is not limited thereto. The display device of the present invention may include light-emitting diodes, color conversion layers, or other suitable materials or combinations thereof, but is not limited thereto. The electronic device may be, for example, a bendable, stretchable, foldable, rollable, and / or flexible electronic device, but is not limited thereto. The display device may be applied, for example, to laptops, public displays, splicing displays, automotive displays, touch displays, transparent displays, double-sided displays, virtual reality displays, augmented reality displays, 3D displays, monochrome displays, color displays, televisions, monitors, smartphones, tablet computers, light source modules, lighting equipment, military equipment, or, for example, electronic devices applied to the above products, but is not limited thereto. The display device may include, for example, liquid crystal molecules, light-emitting diodes, color conversion layers, other suitable display media, or combinations thereof, but is not limited thereto. The color conversion layer may include wavelength conversion materials and / or filter materials. For example, the color conversion layer may include fluorescent materials, phosphorescent materials, quantum dot (QD) materials, other suitable materials, or combinations thereof, but is not limited to these. The display device may include liquid crystal display devices, electrophoretic display devices, or other suitable devices, but is not limited to these. The sensing device may be, for example, a sensing device for detecting capacitance changes, light, or ultrasound, but is not limited to these. The sensing device may include, for example, a biosensor, a touch sensor, a fingerprint sensor, other suitable sensors, or combinations of the above types of sensors. The antenna device may be, for example, a liquid crystal antenna or other types of antennas, but is not limited to these. The splicing device may include, for example, a splicing display device or a splicing antenna device, but is not limited to these. Furthermore, the shape of the electronic device may be, for example, rectangular, circular, polygonal, a shape with curved edges, curved, or other suitable shapes. The electronic device may have peripheral systems such as a drive system, a control system, a light source system, and a shelving system. It should be noted that the electronic device of the present invention may be various combinations of the above-described devices, but is not limited thereto.

[0027] Figure 1A This is a top view schematic diagram of a portion of the electronic device according to an embodiment of the present invention. Figure 1B for Figure 1A A cross-sectional diagram of line segment A-A'.

[0028] In one embodiment of the present invention, such as Figure 1A and Figure 1B As shown, the electronic device may include: a substrate 1 having an active region AA and a peripheral region B, the peripheral region B being adjacent to the active region AA; an electronic element E disposed on the substrate 1 and located in the active region AA; and a first bonding element 2 disposed on the substrate 1 and located in the peripheral region B, wherein the first bonding element 2 includes a first bonding layer 21 and a second bonding layer 22, the second bonding layer 22 being disposed on the first bonding layer 21, and the second bonding layer 22 covering one side surface 21s1 and an upper surface 21s2 of the first bonding layer 21.

[0029] More specifically, in the top view Z, the first bonding element 2 may include an opening H1 corresponding to the active region AA of the substrate 1, i.e., the projected area of ​​the opening H1 on the substrate 1 may be approximately equal to the area of ​​the active region AA, and the first bonding element 2 may surround the electronic component E. In the top view Z, the first bonding element 2 may be arranged around the active region AA; therefore, in the top view Z, the first bonding element 2 may have a ring structure. In the cross-sectional view, as shown... Figure 1B As shown, the second bonding layer 22 may include a first portion 22A and a second portion 22B. The first portion 22A covers the side surface 21s1 of the first bonding layer 21, and the second portion 22B covers the upper surface 21s2 of the first bonding layer 21. By providing the first bonding layer 21 and the second bonding layer 22, this invention can reduce the degradation caused by the first bonding layer 21 coming into contact with moisture or air in the environment, thereby improving the reliability of the first bonding element 2. In this invention, the "upper surface 21s2" is, for example, the surface of the first bonding layer 21 away from the substrate 1. In this invention, as... Figure 1B As shown in the cross-sectional view, the second bonding layer 22 may include two opposing first portions 22A, a second portion 22B disposed between the two first portions 22A, and the two first portions 22A respectively cover the two side surfaces 21s1 of the first bonding layer 21. In this invention, "one element covering another element" may, for example, mean that one element completely covers another element or, for example, mean that one element at least partially covers another element.

[0030] In one embodiment of the present invention, such as Figure 1B As shown, the electronic device may further include a first material layer 12, a second material layer 13, and a third material layer 14 disposed on the substrate 1, wherein the second material layer 13 is disposed between the first material layer 12 and the third material layer 14. The first material layer 12, the second material layer 13, and the third material layer 14 can form an electronic element E, wherein the electronic element E is electrically isolated from the first bonding element 2, therefore, current will not flow from the electronic element E to the first bonding element 2. In this invention, Figure 1BThis example uses two electronic components E, but the invention is not limited to this; the number of electronic components E can be adjusted (increased or decreased) as needed. Furthermore, Figure 1B The electronic component E in the example is exemplified by three material layers (e.g., a first material layer 12, a second material layer 13, and a third material layer 14), but the invention is not limited thereto. In other forms of the invention, the number of material layers can be increased or decreased as needed. In one embodiment of the invention, the electronic component E includes a sensor, a frequency transmitting unit, a signal receiving unit, a light-emitting unit, other suitable electronic components, or combinations thereof, but the invention is not limited thereto. In one embodiment of the invention, as... Figure 1B As shown, in the peripheral area B, the first bonding element 2 may be disposed on the first material layer 12, but the present invention is not limited thereto.

[0031] In this invention, the substrate 1 may be made of glass, quartz, sapphire, ceramic, polycarbonate (PC), polyimide (PI), polypropylene (PP), polyethylene terephthalate (PET), polymethyl methacrylate (PMMA), other suitable materials, or combinations thereof, but the invention is not limited thereto. In this invention, the size of the active region AA is not particularly limited; the size of the active region AA can be adjusted as needed, but the invention is not limited thereto. The "size of the active region AA" refers, for example, to the maximum width or length of the active region AA in one direction (e.g., the X direction). In this invention, the "peripheral region B" is, for example, the area outside the active region AA.

[0032] In this invention, the first material layer 12, the second material layer 13, and the third material layer 14 may each comprise a metal, an alloy thereof, a metal oxide, an insulating material, an organic material, an inorganic material, or a combination thereof. Suitable metals include, for example, gold (Au), silver (Ag), copper (Cu), palladium (Pd), platinum (Pt), ruthenium (Ru), aluminum (Al), cobalt (Co), nickel (Ni), titanium (Ti), molybdenum (Mo), manganese (Mn), zinc (Zn), or combinations thereof, but the invention is not limited thereto. Suitable metal oxides include, for example, zinc oxide (ZnO), titanium oxide (TiO2), or combinations thereof, but the invention is not limited thereto. Suitable insulating materials include, for example, silicon oxide (SiO2). x Silicon nitride (SiN) y ), silicon oxynitride (SiO) x N yOther suitable materials or combinations thereof may be used, but the invention is not limited thereto. Furthermore, the first material layer 12, the second material layer 13, and the third material layer 14 may each be a single-layer or multi-layer structure.

[0033] In this invention, the material of the first bonding layer 21 may include aluminum (Al), copper (Cu), alloys thereof, or combinations thereof, but the invention is not limited thereto. The material of the second bonding layer 22 may include nickel (Ni), phosphorus (P), silicon carbide (SiC), molybdenum (Mo), palladium (Pd), gold (Au), cobalt (Co), alloys thereof, or combinations thereof, but the invention is not limited thereto. Furthermore, the first bonding layer 21 and the second bonding layer 22 may each be a single-layer or multi-layer structure. In one embodiment of the invention, the second bonding layer 22 may comprise a multi-layer structure of amorphous nickel or crystalline nickel, or alternating stacks of both, thereby improving the reliability of the first bonding element 2, but the invention is not limited thereto. In this invention, the thickness D1 of the first bonding layer 21 can be between 0.4 μm and 1.2 μm (i.e., 0.4 μm ≤ D1 ≤ 1.2 μm), for example, between 0.4 μm and 1.1 μm (i.e., 0.4 μm ≤ D1 ≤ 1.1 μm), between 0.4 μm and 1.0 μm (i.e., 0.4 μm ≤ D1 ≤ 1.0 μm), or between 0.4 μm and 0.8 μm (i.e., 0.4 μm ≤ D1 ≤ 0.8 μm), but the invention is not limited thereto. When the thickness D1 of the first bonding layer 21 meets the above definition, peeling phenomenon can be reduced, thereby increasing the reliability of the first bonding element 2. In this invention, the thickness D of the first portion 22A of the second bonding layer 22 may be less than or equal to 100 μm, less than or equal to 50 μm, less than or equal to 30 μm, less than or equal to 10 μm, or less than or equal to 8 μm, but the invention is not limited thereto. In one embodiment of the invention, the thickness D2 of the second portion 22B of the second bonding layer 22 may, for example, be between 1.6 μm and 6.3 μm (i.e., 1.6 μm ≤ D2 ≤ 6.3 μm), between 1.6 μm and 5.3 μm (i.e., 1.6 μm ≤ D2 ≤ 5.3 μm), or between 1.7 μm and 5.2 μm (i.e., 1.7 μm ≤ D2 ≤ 5.2 μm), thereby improving the stability of the first bonding element 2. In one embodiment of the present invention, when the material of the second bonding layer 22 comprises nickel and palladium, the thickness of the nickel layer may be between 1.5 μm and 5 μm, and the thickness of the palladium layer may be between 0.1 μm and 0.3 μm (or between 0.2 μm and 0.3 μm), thereby improving the stability of the first bonding element 2. In one embodiment of the present invention, when the material of the second bonding layer 22 comprises gold, the thickness of the gold layer may be between 0.4 μm and 1.0 μm (i.e., 0.4 μm ≤ thickness ≤ 1.0 μm), for example, between 0.4 μm and 0.8 μm (i.e., 0.4 μm ≤ thickness ≤ 0.8 μm) or between 0.5 μm and 0.7 μm (i.e., 0.5 μm ≤ thickness ≤ 0.7 μm), thereby improving the stability of the first bonding element 2.The "thickness D1 of the first bonding layer 21" refers, for example, the maximum distance between the lower surface 21s3 and the upper surface 21s2 of the first bonding layer 21 in a cross-sectional view, but the invention is not limited thereto. The lower surface 21s3 of the first bonding layer 21 refers, for example, the surface adjacent to the substrate 1 and in contact with the first material layer 12, and the upper surface 21s2 of the first bonding layer 21 refers, for example, the surface opposite to the lower surface 21s3 and away from the substrate 1, and the side surface 21s1 of the first bonding layer 21 is connected to the upper surface 21s2 and the lower surface 21s3 of the first bonding layer 21, respectively. The "thickness D2 of the second portion 22B of the second bonding layer 22" refers, for example, the maximum distance between the point where the second bonding layer 22 contacts the upper surface 21s2 of the first bonding layer 21 in the normal direction (e.g., the Z direction) of the substrate 1 and the upper surface 22s2 of the second bonding layer 22. The upper surface 22s2 of the second bonding layer 22 refers, for example, to the surface of the second bonding layer 22 away from the substrate 1, and the lower surface 22s3 of the second bonding layer 22 refers, for example, to the surface opposite to the upper surface 22s2 and adjacent to the substrate 1, and the sidewalls 22s1 of the second bonding layer 22 are connected to the upper surface 22s2 and the lower surface 22s3 of the second bonding layer 22, respectively. The "thickness D of the first portion 22A of the second bonding layer 22" refers, for example, to the maximum distance in the X direction between the sidewall 22s1 of the second bonding layer 22 and the side surface 21s1 of the first bonding layer 21 on the same side in a cross-sectional view.

[0034] In this invention, the order in which the first material layer 12, the second material layer 13, the third material layer 14, the first bonding layer 21, and the second bonding layer 22 are arranged is not particularly limited. For example, the first material layer 12, the second material layer 13, and the third material layer 14 can be formed sequentially, followed by the first bonding layer 21 and the second bonding layer 22. However, in other embodiments, the first bonding layer 21 can be formed first after the first material layer 12 is formed, followed by the formation of the other layers. In this invention, suitable methods can be used to form the aforementioned layers. Suitable methods may include, for example, electroplating, chemical plating, chemical vapor deposition, physical vapor deposition, atomic deposition (ALD), sputtering, lamination, coating, photolithography, lift-off technology, or combinations thereof, but this invention is not limited to these. The "coating method" may be, for example, dip coating, spin coating, roller coating, blade coating, spray coating, or combinations thereof, but this invention is not limited to these.

[0035] In one embodiment of the present invention, such as Figure 1A and Figure 1BAs shown, the electronic device may further include a circuit layer 11 disposed on the substrate 1, with the electronic component E and the first bonding element 2 respectively disposed on the circuit layer 11. In one embodiment of the present invention, the circuit layer 11 disposed in the peripheral region B may be electrically separated from the first material layer 12, but the present invention is not limited thereto. In the present invention, the circuit layer 11 may include an insulating layer, a metal layer, a semiconductor layer, a circuit, a wire, a conductor pad, a driving circuit, other suitable elements, or a combination thereof. Suitable elements may include passive elements, active elements, or a combination thereof, such as capacitors, resistors, inductors, diodes, transistors, etc., but the present invention is not limited thereto. Diodes may include light-emitting diodes or photodiodes. Light-emitting diodes include organic light-emitting diodes (OLEDs), sub-millimeter light-emitting diodes (mini LEDs), micro light-emitting diodes (micro LEDs), or quantum dot light-emitting diodes (quantum dot, QD, such as QLEDs, QDLEDs) or other suitable materials or any arrangement and combination of the above materials, but the present invention is not limited thereto. In one embodiment of the present invention, the circuit layer 11 corresponding to the active region AA may include a transistor, wherein the transistor may be electrically connected to the electronic element E, thereby driving the electronic element E.

[0036] Figure 2 This is a cross-sectional schematic diagram of a portion of an electronic device according to an embodiment of the present invention. Figure 2 electronic devices and Figure 1B Similar, except for the following differences.

[0037] In one embodiment of the present invention, such as Figure 2 As shown, the first bonding element 2 can be directly disposed on the circuit layer 11, that is, the first bonding layer 21 can directly contact the circuit layer 11, but the present invention is not limited thereto. Therefore, in this embodiment, the lower surface 21s3 of the first bonding layer 2 refers, for example, to the surface adjacent to the substrate 1 and in contact with the circuit layer 11.

[0038] In this invention, the order in which the first material layer 12, the second material layer 13, the third material layer 14, the first bonding layer 21, and the second bonding layer 22 are formed is not particularly limited. For example, the first material layer 12, the second material layer 13, and the third material layer 14 can be formed sequentially, followed by the first bonding layer 21 and the second bonding layer 22. However, in other embodiments, the first bonding layer 21 can be formed before the first material layer 12, followed by the formation of the other layers. In this invention, suitable methods can be used to form the aforementioned layers, and suitable methods are as described above and will not be repeated here.

[0039] In this invention, other detailed features of the electronic device are as described above and will not be repeated here. Furthermore, Figure 2A top view of an electronic device can be, for example... Figure 1A As shown, it will not be elaborated further here.

[0040] Figure 3A This is a cross-sectional schematic diagram of a portion of the first bonding layer 21 according to an embodiment of the present invention. Figure 3B This is a cross-sectional schematic diagram of a portion of the first bonding layer 21 according to another embodiment of the present invention.

[0041] In this invention, Figure 1B and Figure 2 The morphology of the first bonding layer 21 shown is merely an example; in other embodiments of the invention, the first bonding layer may also have such a shape. Figure 3A or Figure 3B Its appearance.

[0042] More specifically, in one embodiment of the invention, as Figure 3A As shown in a cross-sectional view, the first bonding layer 21 may have a trapezoidal shape, that is, the width W2 of the lower surface 21s3 of the first bonding layer 21 may be greater than the width W1 of the upper surface 21s2 of the first bonding layer 21. In one embodiment of the present invention, as... Figure 3A As shown, the lower surface 21s3 of the first bonding layer 21 and the side surface 21s1 of the first bonding layer 21 can form an acute angle θ, and the acute angle θ can be between 20° and 85°, but the present invention is not limited thereto.

[0043] In one embodiment of the present invention, such as Figure 3B As shown in a cross-sectional view, a protrusion 211 may be present between the upper surface 21s2 and the side surface 21s1 of the first bonding layer 21. The protrusion 211 may extend from the upper surface 21s2 of the first bonding layer 21 along the substrate 1 (e.g., Figure 2 The normal direction (e.g., the Z direction) of the substrate 1 (as shown) is away from the substrate 1. Figure 2 It protrudes in the direction shown.

[0044] Figure 4 This is a cross-sectional schematic diagram of a portion of an electronic device according to an embodiment of the present invention. Figure 4 electronic devices and Figure 1B Similar, except for the following differences.

[0045] In one embodiment of the present invention, such as Figure 4 As shown, the electronic device may further include another insulating layer 15 disposed between the substrate 1 and the first bonding element 2, and the width W3 of the other insulating layer 15 is greater than the width W4 of the first bonding layer 21. The term "width of the element" refers, for example, to the maximum lateral dimension of the element in a cross-sectional view (e.g., the maximum dimension in the X direction). In one embodiment of the invention, as... Figure 4As shown, the width W4 of the first bonding layer 21 refers, for example, to the width of the lower surface 21s3 of the first bonding layer 21, but the invention is not limited thereto. In this invention, the material of the other insulating layer 15 may be the same as that of the first material layer 12, and the other insulating layer 15 may be formed simultaneously with the first material layer 12 in the same step, thus simplifying the process steps. The material of the other insulating layer 15 may, for example, include silicon oxide, silicon nitride, silicon oxynitride, other suitable materials, or combinations thereof, but the invention is not limited thereto. Furthermore, the first material layer 12 and the other insulating layer 15 may be a single-layer or multi-layer structure.

[0046] In this invention, such as Figure 4 As shown, the first bonding element 2 may include a first bonding layer 21 and a second bonding layer 22 disposed on the first bonding layer 21, wherein the composition (e.g., material) and structural features (e.g., thickness) of the first bonding layer 21 and the second bonding layer 22 may be as follows: Figure 1B The details described above will not be repeated here. In one embodiment of the present invention, the thickness D1 of the first bonding layer 21 may be between 0.4 μm and 1.2 μm (i.e., 0.4 μm ≤ D1 ≤ 1.2 μm), for example, between 0.4 μm and 1.1 μm (i.e., 0.4 μm ≤ D1 ≤ 1.1 μm), between 0.4 μm and 1.0 μm (i.e., 0.4 μm ≤ D1 ≤ 1.0 μm), or between 0.4 μm and 0.8 μm (i.e., 0.4 μm ≤ D1 ≤ 0.8 μm), but the present invention is not limited thereto. When the thickness D1 of the first bonding layer 21 meets the above definition, peeling phenomenon can be reduced, thereby increasing the reliability of the first bonding element 2. In one embodiment of the present invention, the thickness D of the first portion 22A of the second bonding layer 22 may be less than or equal to 100 μm, less than or equal to 50 μm, less than or equal to 30 μm, less than or equal to 10 μm, or less than or equal to 8 μm, but the present invention is not limited thereto. In one embodiment of the present invention, the thickness D2 of the second portion 22B of the second bonding layer 22 may, for example, be between 1.6 μm and 6.3 μm (i.e., 1.6 μm ≤ D2 ≤ 6.3 μm), between 1.6 μm and 5.3 μm (i.e., 1.6 μm ≤ D2 ≤ 5.3 μm), or between 1.7 μm and 5.2 μm (i.e., 1.7 μm ≤ D2 ≤ 5.2 μm), thereby improving the stability of the first bonding element 2.

[0047] In one embodiment of the present invention, such as Figure 4As shown, the first bonding element 2 may further include a third bonding layer 23, wherein the third bonding layer 23 includes a first portion 23A and a second portion 23B, the first portion 23A being disposed on the second bonding layer 22, and the second portion 23B being disposed between the second bonding layer 22 and another insulating layer 15. In this invention, the second bonding layer 22 and the other insulating layer 15 may have a gap S, or the second bonding layer 22 and the other insulating layer 15 may be in discontinuous contact (for example, the lower surface 22s3 of the second bonding layer 22 and the lower surface 23s3 of the third bonding layer 23 are in discontinuous contact), therefore, the second bonding layer 22 will not be in direct contact with the other insulating layer 15. In one embodiment of the invention, as Figure 4 As shown, the third bonding layer 23 may further include a third portion 23C, disposed on the second bonding layer 22, wherein the first portion 23A of the third bonding layer 23 connects the second portion 23B and the third portion 23C respectively. In this invention, the first portion 23A of the third bonding layer 23 refers to the portion of the third bonding layer 23 covering the sidewall 22s1 of the second bonding layer 22, the second portion 23B of the third bonding layer 23 refers to the portion of the third bonding layer 23 disposed within the interval S, and the third portion 23C of the third bonding layer 23 refers to the portion of the third bonding layer 23 covering the upper surface 22s2 of the second bonding layer 22. In this invention, as... Figure 4 As shown in the cross-sectional view, the third bonding layer 23 may include two opposing first portions 23A, the third portion 23C is disposed between the two first portions 23A, and the two first portions 23A respectively cover the two sidewalls 22s1 of the second bonding layer 22.

[0048] In one embodiment of the present invention, such as Figure 4 As shown, the second bonding layer 22 may include an arcuate sidewall, that is, the sidewall 22s1 of the second bonding layer 22 may have an arcuate shape, but the present invention is not limited thereto. The third bonding layer 23 may be disposed along the second bonding layer 22, therefore, the third bonding layer 23 has a cross-sectional shape similar to that of the second bonding layer 22, that is, the third bonding layer 23 may also include an arcuate sidewall 23s1. The third bonding layer 23 includes a lower surface 23s3 adjacent to the substrate 1 and in contact with another insulating layer 15; and an upper surface 23s2 opposite to the lower surface 23s3 and away from the substrate 1, wherein the arcuate sidewall 23s1 of the third bonding layer 23 may be connected to the upper surface 23s2 and the lower surface 23s3 of the third bonding layer 23 respectively. In one embodiment of the present invention, as Figure 4 As shown, the projection of the upper surface 23s2 of the third bonding layer 23 onto the substrate 1 can overlap with the projection of the upper surface 21s2 of the first bonding layer 21 onto the substrate 1. In other words, the projected area of ​​the upper surface 23s2 of the third bonding layer 23 onto the substrate 1 can be less than or equal to the projected area of ​​the upper surface 21s2 of the first bonding layer 21 onto the substrate 1. In one embodiment of the present invention, as... Figure 4 As shown, the projection of the arcuate sidewall 23s1 of the third bonding layer 23 onto the substrate 1 may be located outside the projection of the upper surface 21s2 of the first bonding layer 21 onto the substrate 1. In other words, in the normal direction (e.g., the Z direction) of the substrate 1, the projection of the arcuate sidewall 23s1 of the third bonding layer 23 onto the substrate 1 does not overlap with the projection of the upper surface 21s2 of the first bonding layer 21 onto the substrate 1. In one embodiment of the present invention, as... Figure 4 As shown, the projection of the upper surface 22s2 of the second bonding layer 22 onto the substrate 1 can overlap with the projection of the upper surface 21s2 of the first bonding layer 21 onto the substrate 1. In other words, the projected area of ​​the upper surface 22s2 of the second bonding layer 22 onto the substrate 1 can be less than or equal to the projected area of ​​the upper surface 21s2 of the first bonding layer 21 onto the substrate 1. In one embodiment of the present invention, as... Figure 4 As shown, the projection of the sidewall 22s1 of the second bonding layer 22 onto the substrate 1 may be located outside the projection of the upper surface 21s2 of the first bonding layer 21 onto the substrate 1. In other words, in the normal direction (e.g., the Z direction) of the substrate 1, the projection of the sidewall 22s1 of the second bonding layer 22 onto the substrate 1 does not overlap with the projection of the upper surface 21s2 of the first bonding layer 21 onto the substrate 1.

[0049] In this invention, the material of the third bonding layer 23 may include nickel, phosphorus, silicon carbide, molybdenum, palladium, gold, cobalt, alloys of the above, or combinations thereof, but the invention is not limited thereto. The third bonding layer 23 may be a single-layer or multi-layer structure. Furthermore, the method of forming the third bonding layer 23 may include, for example, electroplating, chemical plating, chemical vapor deposition, physical vapor deposition, atomic deposition (ALD), sputtering, lamination, coating, photolithography, lift-off technology, or combinations thereof, but the invention is not limited thereto. In this invention, the thickness D3 of the first portion 23A of the third bonding layer 23 may be greater than the thickness D4 of the second portion 23B of the third bonding layer 23. The "thickness D3 of the first portion 23A of the third bonding layer 23" refers, for example, the maximum distance in the X direction between the sidewall 22s1 of the second bonding layer 22 and the arcuate sidewall 23s1 of the third bonding layer 23 on the same side, in a cross-sectional view. The "thickness D4 of the second portion 23B of the third bonding layer 23" refers, for example, the maximum distance between the lower surface 23s3 of the third bonding layer 23 and the lower surface 22s3 of the second bonding layer 22 in a cross-sectional view. When the thickness of the third bonding layer 23 conforms to the above description, the stability of the first bonding element 2 can be improved. In this invention, the thickness D5 of the third portion 23C of the third bonding layer 23 can be between 0.4 μm and 1.0 μm (i.e., 0.4 μm ≤ D5 ≤ 1.0 μm), for example, between 0.4 μm and 0.8 μm (i.e., 0.4 μm ≤ D5 ≤ 0.8 μm) or between 0.5 μm and 0.7 μm (i.e., 0.5 μm ≤ D5 ≤ 0.7 μm), but the invention is not limited thereto. The “thickness D5 of the third portion 23C of the third bonding layer 23” refers, for example, the maximum distance between the point where the third bonding layer 23 contacts the upper surface 22s2 of the second bonding layer 22 in the normal direction (e.g., the Z direction) of the substrate 1 and the upper surface 23s2 of the third bonding layer 23.

[0050] In this invention, other detailed features of the electronic device are as described above and will not be repeated here.

[0051] Figure 5 This is a cross-sectional schematic diagram of a portion of an electronic device according to an embodiment of the present invention. Figure 5 electronic devices and Figure 1B Similar, except for the following differences.

[0052] In one embodiment of the present invention, such as Figure 5As shown, the second bonding layer 22 may include an insulating layer 221 and a metal layer 222. The insulating layer 221 is disposed on the first bonding layer 21, and the metal layer 222 is disposed on the insulating layer 221. The insulating layer 221 covers the side surface 21s1 of the first bonding layer 21 and includes an opening H2. The opening H2 exposes a portion of the upper surface 21s2 of the first bonding layer 21, and the metal layer 222 of the second bonding layer 22 contacts the upper surface 21s2 of the first bonding layer 21 through the opening H2. More specifically, the metal layer 222 of the second bonding layer 22 may include a first portion 222A and a second portion 222B. The first portion 222A may cover the opening H2, and the second portion 222B is disposed in the opening H2. In this way, the degradation caused by the first bonding layer 21 coming into contact with moisture, air, or solvents can be reduced, thereby improving the reliability of the first bonding element 2.

[0053] In this invention, the material of the insulating layer 221 can be the same as that of the third material layer 14, and the insulating layer 221 and the third material layer 14 can be formed simultaneously in the same step, thus simplifying the process steps. The material of the insulating layer 221 may, for example, include silicon oxide, silicon nitride, silicon oxynitride, other suitable materials, or combinations thereof, but the invention is not limited thereto. In this invention, the material of the metal layer 222 may include nickel, molybdenum, palladium, gold, cobalt, alloys of the above, or combinations thereof, but the invention is not limited thereto. In this invention, the width W5 of the first portion 222A of the metal layer 222 may be greater than or equal to the width W6 of the second portion 222B. The “width W5 of the first portion 222A of the metal layer 222” refers, for example, to the maximum lateral dimension (e.g., the maximum dimension in the X direction) of the first portion 222A of the metal layer 222 in a cross-sectional view. The “width of the second portion 222B of the metal layer 222” refers, for example, to the maximum lateral dimension (e.g., the maximum dimension in the X direction) of the second portion 222B of the metal layer 222 in a cross-sectional view. In one embodiment of the invention, as... Figure 5 As shown in the cross-sectional view, the opening H2 may have an inverted trapezoidal shape, but the present invention is not limited to this. In other embodiments, the opening H2 may have a rectangular, regular trapezoidal or other irregular shape.

[0054] In one embodiment of the present invention, such as Figure 5As shown, the electronic device may further include another insulating layer 15 disposed between the substrate 1 and the first bonding element 2, and the width W3 of the other insulating layer 15 is greater than the width W4 of the first bonding layer 21. In this invention, the material of the other insulating layer 15 may be the same as that of the first material layer 12, and the other insulating layer 15 may be formed simultaneously with the first material layer 12 in the same step, thus simplifying the process steps. The material of the other insulating layer 15 may, for example, include silicon oxide, silicon nitride, silicon oxynitride, other suitable materials, or combinations thereof, but the invention is not limited thereto. The term "width of the element" refers, for example, to the maximum lateral dimension of the element in a cross-sectional view (e.g., the maximum dimension in the X direction).

[0055] In this invention, other detailed features of the electronic device are as described above and will not be repeated here.

[0056] Figure 6 This is a cross-sectional schematic diagram of a portion of an electronic device according to an embodiment of the present invention. Figure 6 electronic devices and Figure 1B Similar, except for the following differences.

[0057] In one embodiment of the present invention, such as Figure 6 As shown, the second bonding layer 22 may include a fourth material layer 223, a fifth material layer 224, and a metal layer 222. The fourth material layer 223 and the fifth material layer 224 are disposed on the first bonding layer 21, and the metal layer 222 is disposed on the fourth material layer 223 and the fifth material layer 224. The fourth material layer 223 covers the side surface 21s1 of the first bonding layer 21 and includes a first opening H3, which exposes a portion of the upper surface 21s2 of the first bonding layer 21. The fifth material layer 224 is disposed on the fourth material layer 223 and includes a second opening H4, which communicates with the first opening H3. The metal layer 222 of the second bonding layer 22 contacts the upper surface 21s2 of the first bonding layer 21 through the first opening H3 and the second opening H4. More specifically, the metal layer 222 of the second bonding layer 22 may include a first portion 222A and a second portion 222B. The first portion 222A may cover the second opening H4, and the second portion 222B is disposed in the first opening H3 and the second opening H4. In this way, the deterioration caused by the first bonding layer 21 coming into contact with moisture, air, or solvents can be reduced, thereby improving the reliability of the first bonding element 2.

[0058] In this invention, the material of the fourth material layer 223 can be the same as that of the second material layer 13, and the fourth material layer 223 can be formed simultaneously with the second material layer 13 in the same step, thus simplifying the process steps. The material of the fifth material layer 224 can be the same as that of the third material layer 14, and the fifth material layer 224 can be formed simultaneously with the third material layer 14 in the same step, thus simplifying the process steps. The materials of the second material layer 13 and the third material layer 14 can be as described above, and will not be repeated here. In this invention, the material of the metal layer 222 can include nickel, molybdenum, palladium, gold, cobalt, alloys of the above, or combinations thereof, but the invention is not limited thereto. In this invention, the width W5 of the first portion 222A of the metal layer 222 can be greater than or equal to the width W6 of the second portion 222B. The "width W5 of the first portion 222A of the metal layer 222" refers, for example, to the maximum lateral dimension (e.g., the maximum dimension in the X direction) of the first portion 222A of the metal layer 222 in a cross-sectional view. The phrase "width W6 of the second portion 222B of metal layer 222" refers, for example, to the maximum lateral dimension (e.g., the maximum dimension in the X direction) of the second portion 222B of metal layer 222 in a cross-sectional view. In one embodiment of the invention, as... Figure 6 As shown in the cross-sectional view, the first opening H3 and the second opening H4 can together form an inverted trapezoidal shape. However, the present invention is not limited to this. In other embodiments, the first opening H3 and the second opening H4 can together form, for example, a rectangular shape, a regular trapezoid, or other irregular shapes.

[0059] In one embodiment of the present invention, such as Figure 6 As shown, the electronic device may further include another insulating layer 15 disposed between the substrate 1 and the first bonding element 2, and the width W3 of the other insulating layer 15 is greater than the width W4 of the first bonding layer 21. In this invention, the material of the other insulating layer 15 may be the same as that of the first material layer 12, and the other insulating layer 15 may be formed simultaneously with the first material layer 12 in the same step, thus simplifying the process steps. The material of the other insulating layer 15 may, for example, include silicon oxide, silicon nitride, silicon oxynitride, other suitable materials, or combinations thereof, but the invention is not limited thereto. The term "width of the element" refers, for example, to the maximum lateral dimension of the element in a cross-sectional view (e.g., the maximum dimension in the X direction).

[0060] In this invention, other detailed features of the electronic device are as described above and will not be repeated here.

[0061] Figure 7A This is a top view schematic diagram of a portion of the electronic device according to an embodiment of the present invention. Figure 7B for Figure 7A A cross-sectional view of line segment B-B'.

[0062] In one embodiment of the present invention, such as Figure 7A and Figure 7B As shown, a cover plate 3 is provided, and the cover plate 3 is corresponding to the following: Figure 1A The first bonding element 2 shown has an opening H1. Next, a bonding material 4 is applied between the substrate 1 and the cover plate 3, allowing the cover plate 3 to be connected to the substrate 1 via the bonding material 4. Afterwards, the substrate 1 and the circuit layer 11 are cut along the dotted line, thereby forming a structure as shown... Figure 7A right side and Figure 7B The electronic device shown. Therefore, as Figure 7B As shown, the electronic device may further include a cover plate 3 and a bonding material 4. The cover plate 3 can be connected to the substrate 1 via the bonding material 4, thereby achieving the purpose of assembling the cover plate 3 and the substrate 1. More specifically, the cover plate 3 includes a body 31 and a second bonding element 32. The second bonding element 32 is disposed between the body 31 and the bonding material 4. The first bonding element 2 and the second bonding element 32 can be bonded to each other via the bonding material 4, so that a sealed space SP is formed between the substrate 1 and the cover plate 3. In this invention, the bonding material 4 can flow along the position of the first bonding element 2 and / or the second bonding element 32, which can reduce the possibility of the bonding material 4 overflowing into the sealed space SP, thereby reducing the impact or interference of the overflowing bonding material 4 on the shape of the component (e.g., electronic component E) disposed in the active area AA.

[0063] In this invention, the material of the cover plate 3 may include silicon, germanium (Ge), zinc sulfide (ZnS), zinc selenide (ZnSe), gallium arsenide (GaAs), chalcogenide, or a combination thereof, but this invention is not limited thereto. Figure 7B The first connecting element 2 in is Figure 4 The structure is illustrated below; therefore, the features of the first bonding element 2 can be referred to the foregoing description and will not be repeated here. However, the present invention is not limited thereto. In other embodiments of the present invention, the structure of the first bonding element 2 may be as follows: Figures 1B to 6 As shown in any of the examples, further details will not be repeated here. In this invention, the second bonding element 32 may have the same or different structure as the first bonding element 2, that is, the structure of the second bonding element 32 may be selectively as shown in the example. Figures 1B to 6 The first bonding element 2 is shown and will not be described again here. In this invention, the bonding material 4 may comprise solder, solder paste, or a combination thereof, but the invention is not limited thereto. In this invention, the bonding material 4 may comprise tin, tin alloy, or a combination thereof, but the invention is not limited thereto. In this invention, the sealed space SP may be a vacuum or near-vacuum state to reduce interference from other external environments (such as moisture, air, etc.) on the electronic components within the active area AA.

[0064] In one embodiment of the present invention, such as Figure 7BAs shown, the electronic device may further include another insulating layer 15 disposed between the substrate 1 and the first bonding element 2. In this invention, the material and other characteristics of the other insulating layer 15 may be as described above and will not be repeated here. Furthermore, other detailed features of the electronic device may also be as described above and will not be repeated here.

[0065] By incorporating a first bonding layer 21 and a second bonding layer 22, this invention reduces the degradation of the first bonding layer 21 caused by contact with moisture or air in the environment, thereby improving the reliability of the first bonding element 2. Furthermore, the first bonding element 2 may optionally include a third bonding layer 23 to enhance its stability.

[0066] The specific embodiments described above should be interpreted as merely illustrative and not as limiting the remainder of the invention in any way.

Claims

1. An electronic device, characterized in that, Include: A substrate having an active region and a peripheral region adjacent to the active region; An electronic component is disposed on the substrate and located in the active region; and A first bonding element is disposed on the substrate and located in the peripheral region, wherein the first bonding element includes a first bonding layer and a second bonding layer, the second bonding layer is disposed on the first bonding layer, and the second bonding layer covers one side surface and an upper surface of the first bonding layer.

2. The electronic device according to claim 1, characterized in that, The second bonding layer includes a first portion that covers the side surface of the first bonding layer, and the thickness of the first portion is less than or equal to 100 μm.

3. The electronic device according to claim 1, characterized in that, The material of the first bonding layer includes aluminum, copper, alloys thereof, or combinations thereof.

4. The electronic device according to claim 1, characterized in that, The material of the second bonding layer includes nickel, phosphorus, silicon carbide, molybdenum, palladium, gold, cobalt, alloys of the above, or combinations thereof.

5. The electronic device according to claim 1, characterized in that, The second bonding layer includes an arcuate sidewall.

6. The electronic device according to claim 1, characterized in that, The second bonding layer includes an insulating layer and a metal layer. The insulating layer is disposed on the first bonding layer, and the metal layer is disposed on the insulating layer. The insulating layer covers the side surface of the first bonding layer and includes an opening that exposes a portion of the upper surface of the first bonding layer. The metal layer of the second bonding layer contacts the upper surface of the first bonding layer through the opening.

7. The electronic device according to claim 1, characterized in that, It also includes another insulating layer disposed between the substrate and the first bonding element, and the width of the other insulating layer is greater than the width of the first bonding layer.

8. The electronic device according to claim 7, characterized in that, The first bonding element further includes a third bonding layer, wherein the third bonding layer includes a first portion and a second portion, the first portion being disposed on the second bonding layer and covering one sidewall of the second bonding layer, and the second portion being disposed between the second bonding layer and the other insulating layer.

9. The electronic device according to claim 8, characterized in that, The thickness of the first portion of the third bonding layer is greater than the thickness of the second portion of the third bonding layer.

10. The electronic device according to claim 8, characterized in that, The material of the third bonding layer includes nickel, phosphorus, silicon carbide, molybdenum, palladium, gold, cobalt, alloys of the above, or combinations thereof.

11. The electronic device according to claim 1, characterized in that, In a cross-sectional view, the width of the lower surface of the first bonding layer is greater than the width of the upper surface of the first bonding layer.

12. The electronic device according to claim 11, characterized in that, In this cross-sectional view, the lower surface of the first bonding layer and the side surface of the first bonding layer form an acute angle, and the acute angle is between 20° and 30°. Up to 85 between.

13. The electronic device according to claim 11, characterized in that, In the cross-sectional view, there is a protrusion between the upper surface of the first bonding layer and the side surface of the first bonding layer.

14. The electronic device according to claim 1, characterized in that, It also includes a cover plate and a bonding material, the cover plate being connected to the substrate via the bonding material.

15. The electronic device according to claim 14, characterized in that, The cover plate includes a body and a second engaging element disposed between the body and the engaging material.