A driving circuit and a driving method thereof, a tactile feedback system, and a display device

Abstract

The application provides a driving circuit and a driving method thereof, a tactile feedback system and a display device. The driving circuit comprises a waveform generation circuit and a differential conversion circuit. The waveform generation circuit is configured to output a first driving signal according to preset data. The differential conversion circuit comprises a first differential conversion sub-circuit and a second differential conversion sub-circuit. The first differential conversion sub-circuit is configured to generate a second driving signal according to the first driving signal. The second differential conversion sub-circuit is configured to generate a third driving signal according to the first driving signal. At least one piezoelectric actuator is configured to vibrate under the common driving of the second driving signal and the third driving signal. The frequency of the second driving signal and the third driving signal is the same, the amplitude of the second driving signal and the third driving signal is the same, and the phase of the second driving signal and the third driving signal is opposite. The driving circuit effectively improves the driving voltage amplitude loaded on the piezoelectric actuator, thereby improving the vibration feeling of the tactile feedback system.

Description

A driving circuit and driving method thereof, a tactile feedback system, and a display device. Technical Field

[0001] This application relates to the field of display technology, and in particular to a driving circuit and driving method thereof, a haptic feedback system, and a display device. Background Technology

[0002] With the development of display technology, the variety of display products has gradually increased, and performance requirements have also risen. Haptic feedback systems can provide users with a richer human-computer interaction experience, becoming a development trend in electronic products. Among related technologies, how to provide clear touch feedback is currently a research hotspot. Summary of the Invention

[0003] The technical solution adopted in this application is as follows:

[0004] In a first aspect, embodiments of this application provide a driving circuit applied to a haptic feedback system, comprising:

[0005] A waveform generation circuit is configured to store preset data and output a first drive signal according to the preset data;

[0006] The differential conversion circuit includes a first differential conversion sub-circuit and a second differential conversion sub-circuit, the first differential conversion sub-circuit and the second differential conversion sub-circuit being electrically connected to the waveform generation circuit respectively, the first differential conversion sub-circuit being configured to generate a second driving signal based on the first driving signal, and the second differential conversion sub-circuit being configured to generate a third driving signal based on the first driving signal.

[0007] The first differential converter sub-circuit and the second differential converter sub-circuit are respectively electrically connected to at least one piezoelectric actuator, which is configured to vibrate under the combined drive of the second drive signal and the second drive signal;

[0008] The second driving signal and the third driving signal have the same frequency, the same amplitude, and opposite phase.

[0009] In some driving circuits provided in embodiments of this application, the driving circuit further includes:

[0010] A power amplifier circuit includes a first amplification sub-circuit and a second amplification sub-circuit. The first amplification sub-circuit is electrically connected to a first differential conversion sub-circuit and a first terminal of at least one of the piezoelectric actuators, respectively. The second amplification sub-circuit is electrically connected to a second differential conversion sub-circuit and a second terminal of the same piezoelectric actuator, respectively.

[0011] The first amplification sub-circuit is configured to amplify the power of the second drive signal; the second amplification sub-circuit is configured to amplify the power of the third drive signal.

[0012] In some driving circuits provided in embodiments of this application, the driving circuit further includes:

[0013] A path selection circuit, electrically connected to the waveform generation circuit, the power amplifier circuit, and the at least one piezoelectric actuator, is configured to, under the control of the waveform generation circuit, open the path between the power amplifier circuit and the at least one piezoelectric actuator.

[0014] In some driving circuits provided in embodiments of this application, the waveform generation circuit includes:

[0015] A first controller is electrically connected to the differential conversion circuit and the path selection circuit. The first controller is configured to store the preset data and output the first drive signal according to the preset data. The first controller is also configured to output a first control signal, which is configured to control the path selection circuit and connect the path between the power amplifier circuit and at least one of the piezoelectric actuators.

[0016] In some driving circuits provided in embodiments of this application, the waveform generation circuit includes:

[0017] Second controller and digital-to-analog converter,

[0018] The second controller is electrically connected to the digital-to-analog converter and the path selection circuit, respectively. The second controller is configured to store the preset data and output a first control signal and a second control signal. The first control signal is configured to control the path selection circuit and conduct the path between the power amplifier circuit and at least one of the piezoelectric actuators. The second control signal is configured to instruct the digital-to-analog converter to output the first drive signal.

[0019] The digital-to-analog converter is electrically connected to the second controller and the differential conversion circuit, respectively, and is configured to output the first drive signal under the control of the second control signal output by the second controller.

[0020] In some driving circuits provided in the embodiments of this application, the preset data includes at least one of square wave signal, sine wave signal and cosine wave signal.

[0021] In some driving circuits provided in the embodiments of this application, at least a portion of the structures of the first differential converter sub-circuit and the second differential converter sub-circuit are the same;

[0022] The first input terminal of the first differential converter sub-circuit is electrically connected to the output terminal of the waveform generation circuit, and the second input terminal of the second differential converter sub-circuit is electrically connected to the output terminal of the waveform generation circuit.

[0023] In some driving circuits provided in embodiments of this application, the first differential converter sub-circuit includes a voltage follower, and the second differential converter sub-circuit includes an inverting amplifier;

[0024] The voltage follower includes a first operational amplifier, a first input terminal of the first operational amplifier electrically connected to the output terminal of the waveform generation circuit, a second input terminal of the first operational amplifier electrically connected to the output terminal of the first operational amplifier, a third input terminal of the first operational amplifier electrically connected to a first power input terminal, and a fourth input terminal of the first operational amplifier electrically connected to a second power input terminal.

[0025] The inverting amplifier includes a second operational amplifier, a first resistor, and a second resistor. The first input terminal of the second operational amplifier is electrically connected to a ground terminal. The second input terminal of the second operational amplifier is electrically connected to the first terminal of the first resistor and the first terminal of the second resistor, respectively. The second terminal of the first resistor is electrically connected to the output terminal of the waveform generation circuit. The second terminal of the second resistor is electrically connected to the output terminal of the second operational amplifier. The third input terminal of the second operational amplifier is electrically connected to the first power input terminal. The fourth input terminal of the second operational amplifier is electrically connected to the second power input terminal.

[0026] In some driving circuits provided in the embodiments of this application, the resistance values ​​of the first resistor and the second resistor are the same.

[0027] In some driving circuits provided in the embodiments of this application, the first differential converter sub-circuit and the second differential converter sub-circuit have the same structure.

[0028] In some driving circuits provided in the embodiments of this application, the first differential converter sub-circuit includes a first operational amplifier, a first resistor, a second resistor, a third resistor, and a fourth resistor;

[0029] The first input terminal of the first operational amplifier is electrically connected to the first terminal of the first resistor and the first terminal of the second resistor, respectively. The second terminal of the first resistor is electrically connected to the output terminal of the waveform generation circuit. The second terminal of the second resistor is electrically connected to the ground terminal. The second input terminal of the first operational amplifier is electrically connected to the first terminal of the third resistor and the first terminal of the fourth resistor, respectively. The second terminal of the third resistor is electrically connected to the reference voltage input terminal. The second terminal of the fourth resistor is electrically connected to the output terminal of the first operational amplifier. The third input terminal of the first operational amplifier is electrically connected to the first power supply input terminal. The fourth input terminal of the second operational amplifier is electrically connected to the second power supply input terminal.

[0030] In some driving circuits provided in embodiments of this application, the second differential converter sub-circuit includes a second operational amplifier, a fifth resistor, a sixth resistor, a seventh resistor, and an eighth resistor;

[0031] The first input terminal of the second operational amplifier is electrically connected to the first terminal of the fifth resistor and the first terminal of the sixth resistor, respectively. The second terminal of the fifth resistor is electrically connected to the reference voltage input terminal. The second terminal of the sixth resistor is electrically connected to the ground terminal. The second input terminal of the second operational amplifier is electrically connected to the first terminal of the seventh resistor and the first terminal of the eighth resistor, respectively. The second terminal of the seventh resistor is electrically connected to the output terminal of the waveform generation circuit. The second terminal of the eighth resistor is electrically connected to the output terminal of the second operational amplifier. The third input terminal of the second operational amplifier is electrically connected to the first power supply input terminal. The fourth input terminal of the second operational amplifier is electrically connected to the second power supply input terminal.

[0032] In some driving circuits provided in embodiments of this application, the ratio of the resistance values ​​of the first resistor and the second resistor is equal to the ratio of the resistance values ​​of the third resistor and the fourth resistor;

[0033] The ratio of the resistance values ​​of the fifth resistor and the sixth resistor is equal to the ratio of the resistance values ​​of the seventh resistor and the eighth resistor.

[0034] In some driving circuits provided in the embodiments of this application, the resistance ratios of the first resistor and the second resistor, the third resistor and the fourth resistor, the fifth resistor and the sixth resistor, and the seventh resistor and the eighth resistor are all equal.

[0035] In some driving circuits provided in the embodiments of this application, the first amplification sub-circuit includes a third operational amplifier, a first switching transistor, a second switching transistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, and a fifteenth resistor.

[0036] The first input terminal of the third operational amplifier is electrically connected to the output terminal of the first differential conversion sub-circuit and the first terminal of the fifteenth resistor, respectively. The second terminal of the fifteenth resistor is electrically connected to the ground terminal. The second input terminal of the third operational amplifier is electrically connected to the first terminal of the fourteenth resistor and the first terminal of the thirteenth resistor, respectively. The second terminal of the fourteenth resistor is electrically connected to the ground terminal. The second terminal of the thirteenth resistor is electrically connected to the output terminal of the first amplification sub-circuit. The third input terminal of the third operational amplifier is electrically connected to the third power supply input terminal. The fourth input terminal of the third operational amplifier is electrically connected to the fourth power supply input terminal.

[0037] The output terminal of the third operational amplifier is electrically connected to the control terminal of the first switching transistor, the control terminal of the second switching transistor, and the first terminal of the tenth resistor, respectively; the source of the first switching transistor is electrically connected to the third power input terminal, and the drain of the first switching transistor is electrically connected to the first terminal of the ninth resistor; the source of the second switching transistor is electrically connected to the fourth power input terminal, and the drain of the second switching transistor is electrically connected to the first terminal of the eleventh resistor; the second terminals of the tenth resistor, the ninth resistor, and the eleventh resistor are respectively electrically connected to the first terminal of the twelfth resistor, and the second terminal of the twelfth resistor is respectively electrically connected to the second terminal of the thirteenth resistor and the output terminal of the first amplification sub-circuit.

[0038] In some driving circuits provided in the embodiments of this application, the first amplification sub-circuit and the second amplification sub-circuit have the same structure;

[0039] The second amplification sub-circuit includes a fourth operational amplifier, a third switching transistor, a fourth switching transistor, a sixteenth resistor, a seventeenth resistor, an eighteenth resistor, a nineteenth resistor, a twentieth resistor, a twenty-first resistor, and a twenty-second resistor.

[0040] The first input terminal of the fourth operational amplifier is electrically connected to the output terminal of the second differential converter sub-circuit and the first terminal of the twelfth resistor, respectively. The second terminal of the twelfth resistor is electrically connected to the ground terminal. The second input terminal of the fourth operational amplifier is electrically connected to the first terminal of the eleventh resistor and the first terminal of the twentieth resistor, respectively. The second terminal of the eleventh resistor is electrically connected to the ground terminal. The second terminal of the twentieth resistor is electrically connected to the output terminal of the second amplifier sub-circuit. The third input terminal of the fourth operational amplifier is electrically connected to the third power supply input terminal. The fourth input terminal of the fourth operational amplifier is electrically connected to the fourth power supply input terminal.

[0041] The output terminal of the fourth operational amplifier is electrically connected to the control terminal of the third switch, the control terminal of the fourth switch, and the first terminal of the seventeenth resistor, respectively; the source of the third switch is electrically connected to the third power input terminal, and the drain of the third switch is electrically connected to the first terminal of the sixteenth resistor; the source of the fourth switch is electrically connected to the fourth power input terminal, and the drain of the fourth switch is electrically connected to the first terminal of the eighteenth resistor; the second terminals of the seventeenth, sixteenth, and eighteenth resistors are electrically connected to the first terminal of the nineteenth resistor, and the second terminal of the nineteenth resistor is electrically connected to the second terminal of the twentieth resistor and the output terminal of the second amplification sub-circuit, respectively.

[0042] In some driving circuits provided in embodiments of this application, the path selection circuit includes:

[0043] The first terminals of the twenty-third resistor, the twenty-fourth resistor, and the twenty-fifth resistor are all electrically connected to the fifth power input terminal.

[0044] The first relay includes a first single-pole double-throw switch and a second single-pole double-throw switch;

[0045] The second relay includes the third single-pole double-throw switch;

[0046] The third relay includes the fourth single-pole double-throw switch;

[0047] The fifth, sixth, and seventh switching transistors are respectively electrically connected to the waveform generation circuit.

[0048] The source of the fifth switch is electrically connected to the second terminal of the twenty-third resistor, the source of the sixth switch is electrically connected to the second terminal of the twenty-fourth resistor, and the source of the seventh switch is electrically connected to the second terminal of the twenty-fifth resistor; the drain of the fifth switch is electrically connected to the first relay, the drain of the sixth switch is electrically connected to the second relay, and the drain of the seventh switch is electrically connected to the third relay.

[0049] In some driving circuits provided in embodiments of this application, the driving circuit is used to drive a first piezoelectric actuator, a second piezoelectric actuator, and a third piezoelectric actuator;

[0050] The input terminal of the first single-pole double-throw switch is electrically connected to the output terminal of the first amplifier sub-circuit; the first output terminal of the first single-pole double-throw switch is electrically connected to the positive terminal of the first piezoelectric actuator, the first input terminal of the third single-pole double-throw switch, and the first input terminal of the fourth single-pole double-throw switch, respectively; the second output terminal of the first single-pole double-throw switch is electrically connected to the positive terminal of the third piezoelectric actuator.

[0051] The input terminal of the second single-pole double-throw switch is electrically connected to the output terminal of the second amplifier sub-circuit; the first output terminal of the second single-pole double-throw switch is electrically connected to the negative terminal of the first piezoelectric actuator, the second input terminal of the third single-pole double-throw switch, and the second input terminal of the fourth single-pole double-throw switch; the second output terminal of the second single-pole double-throw switch is electrically connected to the negative terminal of the third piezoelectric actuator.

[0052] The output terminal of the third single-pole double-throw switch is electrically connected to the positive terminal of the second piezoelectric actuator, and the output terminal of the fourth single-pole double-throw switch is electrically connected to the negative terminal of the second piezoelectric actuator.

[0053] In some driving circuits provided in embodiments of this application, when the third piezoelectric actuator vibrates,

[0054] The input terminal of the first single-pole double-throw switch is connected to the second output terminal of the first single-pole double-throw switch, and the input terminal of the second single-pole double-throw switch is connected to the second output terminal of the second single-pole double-throw switch.

[0055] In some driving circuits provided in embodiments of this application, when the first piezoelectric actuator vibrates,

[0056] The input terminal of the first single-pole double-throw switch is connected to the first output terminal of the first single-pole double-throw switch, and the input terminal of the second single-pole double-throw switch is connected to the first output terminal of the second single-pole double-throw switch.

[0057] In some driving circuits provided in the embodiments of this application, when the second piezoelectric actuator and the first piezoelectric actuator vibrate simultaneously, the input terminal of the first single-pole double-throw switch is connected to the first output terminal of the first single-pole double-throw switch, and the input terminal of the second single-pole double-throw switch is connected to the first output terminal of the second single-pole double-throw switch.

[0058] The first input terminal of the third single-pole double-throw switch is connected to the output terminal of the third single-pole double-throw switch, and the second input terminal of the fourth single-pole double-throw switch is connected to the output terminal of the fourth single-pole double-throw switch.

[0059] Alternatively, the second input terminal of the third single-pole double-throw switch is connected to the output terminal of the third single-pole double-throw switch, and the first input terminal of the fourth single-pole double-throw switch is connected to the output terminal of the fourth single-pole double-throw switch.

[0060] In some driving circuits provided in embodiments of this application, the path selection circuit includes multiple control sub-circuits, one of which is electrically connected to one of the piezoelectric actuators; the control sub-circuit includes:

[0061] A relay group includes two single-pole double-throw (SPDT) switches; the output terminal of one SPDT switch is electrically connected to the positive terminal of the piezoelectric actuator, and the output terminal of the other SPDT switch is electrically connected to the negative terminal of the piezoelectric actuator; the first input terminals of both SPDT switches are electrically connected to the output terminal of the first amplification subcircuit, and the second input terminals of both SPDT switches are electrically connected to the output terminal of the second amplification subcircuit.

[0062] A resistor, which is electrically connected to the fifth power input terminal and the switching transistor respectively;

[0063] The number of the switching transistors, the number of the resistors, and the number of the single-pole double-throw switches are the same; the switching transistors are electrically connected to the waveform generation circuit, the resistors, and the single-pole double-throw switches respectively; the switching transistors are configured to conduct the path between the fifth power input terminal and the single-pole double-throw switches under the control of the first control signal output by the waveform generation circuit.

[0064] In a second aspect, embodiments of this application provide a tactile feedback system, including at least one piezoelectric actuator and a driving circuit as described in any one of the first aspects, the driving circuit being used to drive the at least one piezoelectric actuator to vibrate.

[0065] Thirdly, embodiments of this application provide a display device including a haptic feedback system as described in the second aspect.

[0066] Fourthly, embodiments of this application provide a driving method applied to a driving circuit as described in any one of the first aspects, the method comprising:

[0067] The waveform generation circuit outputs a first drive signal and a first control signal;

[0068] The differential conversion circuit generates a second drive signal and a third drive signal based on the first drive signal;

[0069] The power amplifier circuit amplifies the power of the second drive signal and the third drive signal;

[0070] Under the control of the first control signal output by the waveform generation circuit, the path selection circuit applies the amplified second drive signal and the amplified third drive signal to the positive and negative terminals of at least one piezoelectric actuator, respectively, according to the first control signal.

[0071] The second driving signal and the third driving signal have the same frequency, the same amplitude, and opposite phase.

[0072] The above description is only an overview of the technical solution of this application. In order to better understand the technical means of this application and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this application more obvious and understandable, specific embodiments of this application are given below. Attached Figure Description

[0073] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0074] Figures 1 to 4 are simplified structural diagrams of three driving circuits provided in the embodiments of this application;

[0075] Figure 5 is a schematic diagram of the equivalent output signal of the differential driving signal provided in an embodiment of this application;

[0076] Figures 6 and 7 are schematic diagrams of the waveform generation circuit provided in the embodiments of this application;

[0077] Figures 8 and 9 are schematic diagrams of the circuit structures of two differential conversion circuits provided in the embodiments of this application;

[0078] Figures 10 and 11 are schematic diagrams of the circuit structures of two power amplifier circuits provided in the embodiments of this application;

[0079] Figure 12 is a schematic diagram of the circuit structure of the first path selection circuit provided in the embodiment of this application;

[0080] Figures 13 to 16 are illustrations of four different conduction states of the circuit structure shown in Figure 12;

[0081] Figure 17 is a schematic diagram of the circuit structure of the second path selection circuit provided in the embodiment of this application;

[0082] Figure 18 is a complete structural schematic diagram of a driving circuit provided in an embodiment of this application;

[0083] Figure 19 is a schematic diagram showing the installation position of a piezoelectric actuator in a display device according to an embodiment of this application. Detailed Implementation

[0084] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0085] In the embodiments of this application, the terms "first", "second", "third", "fourth" are used to distinguish the same or similar items with essentially the same function and effect, only for the purpose of clearly describing the technical solution of the embodiments of this application, and should not be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated.

[0086] In the embodiments of this application, the terms "upper" and "lower" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0087] In the description of this specification, the terms "one embodiment," "some embodiments," "exemplary embodiment," "example," "specific example," or "some examples," etc., are intended to indicate that a particular feature, structure, material, or characteristic associated with that embodiment or example is included in at least one embodiment or example of this application. The illustrative representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics mentioned may be included in any suitable manner in any one or more embodiments or examples.

[0088] In the embodiments of this application, "multiple" means two or more, and "at least one" means one or more, unless otherwise explicitly defined.

[0089] The features such as "parallel," "perpendicular," and "identical" used in the embodiments of this application include features in the strict sense of "parallel," "perpendicular," and "identical," as well as cases where "approximately parallel," "approximately perpendicular," and "approximately identical" include certain tolerances. Taking into account the measurement and the tolerances associated with the measurement of a specific quantity (e.g., limitations of the measurement system), they represent the acceptable deviation range for a specific value as determined by a person skilled in the art. For example, "approximately" can mean within one or more standard deviations, or within 3% or 5% of said value.

[0090] Unless the context otherwise requires, throughout the specification and claims, the term "comprising" is interpreted as open and encompassing, that is, "including, but not limited to".

[0091] In this specification, "electrical connection" and "coupling" include situations where components are connected together by elements that have some electrical function. There are no particular limitations on what constitutes an "electrical function," as long as it allows for the transmission and reception of electrical signals between the connected components. Examples of "electrical functions" include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, and other components with various functions.

[0092] The fusion of visual, auditory, and tactile sensations is of great significance and value in enhancing operational safety and efficiency, and enriching user experience. Currently, displays in automotive and consumer electronics are increasingly incorporating haptic feedback to provide users with a richer human-computer interaction experience. Compared to traditional haptic actuator solutions such as ERM (eccentric rotating mass) and LRA (linear resonant actuators), piezoelectric haptic feedback solutions can produce clearer tactile feedback effects, enabling different tactile feedback for different application scenarios. Specifically, the virtual haptic feedback system of piezoelectric actuators features faster startup time, higher bandwidth, and stronger vibration amplitude, thus producing a clearer tactile feedback effect.

[0093] However, piezoelectric actuators require high driving voltages. In related technologies, piezoelectric haptic feedback systems typically use single-ended signal drive for the piezoelectric actuator, resulting in low driving voltages and weak haptic feedback vibrations. Single-ended signal drive refers to having only one signal input terminal; that is, one end of the piezoelectric actuator is connected to the signal input terminal, and the other end is grounded, with the two forming a complete driving signal.

[0094] Based on this, embodiments of this application provide a driving circuit and driving method thereof, a haptic feedback system, and a display device. The driving circuit includes a waveform generation circuit and a differential conversion circuit. The waveform generation circuit is configured to output a first driving signal according to preset data. The differential conversion circuit includes a first differential conversion sub-circuit and a second differential conversion sub-circuit. The first differential conversion sub-circuit is configured to generate a second driving signal according to the first driving signal, and the second differential conversion sub-circuit is configured to generate a third driving signal according to the first driving signal. At least one piezoelectric actuator is configured to vibrate under the combined drive of the second driving signal and the third driving signal. The second driving signal and the third driving signal have the same frequency, the same amplitude, and opposite phase.

[0095] Since the piezoelectric actuator vibrates under the combined drive of the second and third drive signals, and the second and third drive signals have the same frequency, the same amplitude, and opposite phase, the voltage difference of the drive signals applied across the piezoelectric actuator is twice the voltage amplitude of the second drive signal, which effectively increases the drive voltage and enhances the tactile feedback vibration.

[0096] The driving circuit and driving method, haptic feedback system, and display device provided in the embodiments of this application will be described and explained in detail below with reference to the accompanying drawings.

[0097] An embodiment of this application provides a driving circuit applied to a haptic feedback system, as shown in FIG1, the driving circuit includes:

[0098] The waveform generation circuit 10 is configured to store preset data and output a first drive signal according to the preset data;

[0099] The differential conversion circuit 20 includes a first differential conversion sub-circuit 21 and a second differential conversion sub-circuit 22 as shown in FIG2. The first differential conversion sub-circuit 21 and the second differential conversion sub-circuit 22 are electrically connected to the waveform generation circuit 10, respectively. The first differential conversion sub-circuit 21 is configured to generate a second driving signal according to a first driving signal, and the second differential conversion sub-circuit 22 is configured to generate a third driving signal according to the first driving signal.

[0100] The first differential converter sub-circuit 21 and the second differential converter sub-circuit 22 are respectively electrically connected to at least one piezoelectric actuator 30, and the at least one piezoelectric actuator 30 is configured to vibrate under the combined drive of the second drive signal and the second drive signal.

[0101] The second and third driving signals have the same frequency, the same amplitude, and opposite phase.

[0102] In an exemplary embodiment, the waveform generation circuit 10 can store preset data based on the tactile feedback effect.

[0103] The specific circuit structure of the waveform generation circuit 10, the first differential conversion sub-circuit 21, and the second differential conversion sub-circuit 22 is not limited here. Any circuit and sub-circuit that can achieve the above functions can be applied here.

[0104] Furthermore, this does not limit whether the specific circuit structures of the first differential converter sub-circuit 21 and the second differential converter sub-circuit 22 are the same, but it limits the second drive signal and the third drive signal output by the two sub-circuits.

[0105] Among them, the second and third driving signals with the same frequency, the same amplitude, and opposite phase can be called differential driving signals.

[0106] In the embodiments of this application, since the piezoelectric actuator 30 is configured to vibrate under the combined drive of the second drive signal and the third drive signal, and the second drive signal and the third drive signal have the same frequency, the same amplitude and opposite phase, the voltage difference of the drive signal applied to both ends of the piezoelectric actuator is twice the voltage amplitude of the second drive signal (or twice the voltage amplitude of the third drive signal), which effectively increases the drive voltage, enhances the vibration of the tactile feedback, and thus produces a clear touch feedback effect.

[0107] Figure 5 provides a schematic diagram of a second driving signal and a third driving signal with the same frequency, the same amplitude, and opposite phase. When the piezoelectric actuator 30 is driven by the differential driving signal, the voltage value across the piezoelectric actuator 30 can be equivalent to the single-ended signal marked "equivalent output signal" in Figure 5. It should be noted that the voltage value of the single-ended signal marked "equivalent output signal" is equivalent to twice the voltage value of the single-ended signal in the related art.

[0108] In some driving circuits provided in embodiments of this application, as shown in Figures 3 and 4, the driving circuit further includes:

[0109] The power amplifier circuit 40 includes a first amplification sub-circuit 41 and a second amplification sub-circuit 42. The first amplification sub-circuit 41 is electrically connected to the first terminal of the first differential conversion sub-circuit 21 and at least one piezoelectric actuator 30, respectively. The second amplification sub-circuit 42 is electrically connected to the second differential conversion sub-circuit 22 and the second terminal of the same piezoelectric actuator 30, respectively.

[0110] The first amplification sub-circuit 41 is configured to amplify the power of the second drive signal to increase the voltage and current values ​​of the second drive signal; the second amplification sub-circuit 42 is configured to amplify the power of the third drive signal to increase the voltage and current values ​​of the third drive signal.

[0111] In an exemplary embodiment, the first amplification sub-circuit 41 and the second amplification sub-circuit 42 have the same circuit structure to achieve the same power and voltage amplification effect on the second driving signal and the third driving signal.

[0112] Because piezoelectric actuators have high requirements for drive voltage and current, achieving stronger tactile feedback vibration requires a high-voltage, high-current output from the drive circuit. This is achieved by configuring a power amplifier circuit 40, including a first amplification sub-circuit 41 and a second amplification sub-circuit 42. The first amplification sub-circuit 41 is configured to amplify the power of the second drive signal to increase its voltage value; the second amplification sub-circuit 42 is configured to amplify the power of the third drive signal to increase its voltage value. This results in a high-voltage differential drive signal. Consequently, the voltage difference between the drive signals applied across the piezoelectric actuator 30 is twice the voltage amplitude of the second drive signal (or twice the voltage amplitude of the third drive signal), effectively increasing the drive voltage and enhancing the tactile feedback vibration. The differential drive signal includes both the second and third drive signals.

[0113] In some driving circuits provided in embodiments of this application, as shown in FIG3 or FIG4, the driving circuit further includes:

[0114] The path selection circuit 50, which is electrically connected to the waveform generation circuit 10, the power amplifier circuit 40 and at least one piezoelectric actuator 30, is configured to conduct the path between the power amplifier circuit 40 and at least one piezoelectric actuator 30 under the control of the waveform generation circuit 10.

[0115] The path selection circuit 50 can control the path conduction between the power amplifier circuit 40 and at least one of the multiple piezoelectric actuators 30. When applied to control multiple piezoelectric actuators 30, the path selection circuit 50 can select one or more piezoelectric actuators 30 to work simultaneously, thereby enabling the function of adjusting the vibration of the haptic feedback system according to needs and improving the flexibility of the haptic feedback system.

[0116] In some driving circuits provided in embodiments of this application, as shown in FIG6, the waveform generation circuit 10 includes:

[0117] The first controller 11 is electrically connected to the differential conversion circuit 20 and the path selection circuit 50. The first controller 11 is configured to store preset data and output a first drive signal according to the preset data. The first controller 11 is also configured to output a first control signal, which is configured to control the path selection circuit 50 to conduct the path between the power amplifier circuit 40 and at least one piezoelectric actuator 30.

[0118] In an exemplary embodiment, the first controller 11 can be a microcontroller. For example, the microcontroller can integrate the function of a digital-to-analog converter, so that the first controller 11 can output a first control signal, store preset data, and output a first drive signal according to the preset data.

[0119] The first driving signal can be a single-ended signal.

[0120] In this specification, single-ended signal refers to the traditional signal transmission technique of using one signal line and one ground line; a single-ended signal is the signal transmitted on that single signal line. Differential signal transmits signals on both lines, with the two signals having the same amplitude but opposite phase; the signals transmitted on these two lines are called differential signals.

[0121] In some driving circuits provided in embodiments of this application, as shown in FIG7, the waveform generation circuit 10 includes:

[0122] The second controller 12 and the digital-to-analog converter 13,

[0123] The second controller 12 is electrically connected to the digital-to-analog converter 13 and the path selection circuit 50 respectively. The second controller 12 is configured to store preset data and output a first control signal and a second control signal. The first control signal is configured to control the path selection circuit 50 and conduct the path between the power amplifier circuit 40 and at least one piezoelectric actuator 30. The second control signal is configured to instruct the digital-to-analog converter 13 to output a first drive signal.

[0124] The digital-to-analog converter 13 is electrically connected to the second controller 12 and the differential conversion circuit 20 respectively, and is configured to output a first drive signal under the control of the second control signal output by the second controller 12.

[0125] The first control signal and the second control signal can both be called command signals or indication signals. The first control signal is used to indicate the conduction of the circuit or device in the path selection circuit 50, and the second control signal is used to indicate the output of the first drive signal by the digital-to-analog converter 13.

[0126] For example, the second controller 12 can be an FPGA (Field Programmable Gate Array) chip or an MCU (Microcontroller Unit).

[0127] A digital-to-analog converter (DAC), also known as a D / A converter, is a converter that transforms discrete signals in binary digital form into analog signals based on a standard (or reference) quantity. A D / A converter basically consists of four parts: a weighted resistor network, an operational amplifier, a reference power supply, and analog switches.

[0128] In the embodiments of this application, the waveform generation circuit 10 can generate a first driving signal in the driving circuit, which is then used in the differential conversion circuit to convert the first driving signal into a second driving signal and a third driving signal (the second driving signal and the third driving signal are collectively referred to as the differential signal) with the same frequency, the same amplitude and opposite phase.

[0129] In some driving circuits provided in the embodiments of this application, the preset data includes at least one of square wave signal, sine wave signal and cosine wave signal.

[0130] For example, in waveform generation circuit 10, multiple signals can be pre-stored so that one type can be selected according to the actual application.

[0131] In an exemplary embodiment, since the preset data includes at least one of a square wave signal, a sine wave signal, and a cosine wave signal, and the waveform generation circuit 10 outputs a first driving signal according to the preset data, the first driving signal can be one of a square wave signal, a sine wave signal, and a cosine wave signal.

[0132] In some driving circuits provided in the embodiments of this application, as shown in FIG8 and FIG9, at least part of the structure of the first differential converter sub-circuit 21 and the second differential converter sub-circuit 22 is the same.

[0133] The first input terminal (+) of the first differential converter sub-circuit 21 is electrically connected to the output terminal (e.g., DAC-OUT) of the waveform generation circuit 10, and the second input terminal (-) of the second differential converter sub-circuit is electrically connected to the output terminal (e.g., DAC-OUT) of the waveform generation circuit 10.

[0134] In the embodiments of this application, on the one hand, the output terminal (e.g., DAC-OUT) of the waveform generation circuit 10 is electrically connected to the first input terminal (+) of the first differential conversion sub-circuit 21, and on the other hand, the output terminal (e.g., DAC-OUT) of the waveform generation circuit 10 is electrically connected to the second input terminal (-) of the second differential conversion sub-circuit. In this way, when the first driving signal output by the waveform generation circuit 10 is input to the differential conversion circuit 2, the second driving signal and the third driving signal, which are inverted, can be output from the first differential conversion sub-circuit 21 and the second differential conversion sub-circuit 22, respectively, and the frequency and amplitude of the second driving signal and the third driving signal are the same.

[0135] In some driving circuits provided in the embodiments of this application, as shown in FIG8, the first differential converter sub-circuit 21 includes a voltage follower, and the second differential converter sub-circuit 22 includes an inverting amplifier;

[0136] In Figure 8, the voltage follower includes a first operational amplifier U1, the first input terminal (+) of the first operational amplifier U1 is electrically connected to the output terminal (e.g., DAC-OUT) of the waveform generation circuit 10, the second input terminal (-) of the first operational amplifier U1 is electrically connected to the output terminal (Vout+) of the first operational amplifier U1, the third input terminal of the first operational amplifier U1 is electrically connected to the first power input terminal VCCAMPP, and the fourth input terminal of the first operational amplifier U1 is electrically connected to the second power input terminal VCCAMPN.

[0137] It should be noted that in some embodiments of this application, the first power input terminal VCCAMPP can provide a positive power signal to the differential conversion circuit 20, and the second power input terminal VCCAMPN can provide a negative power signal to the differential conversion circuit 20.

[0138] As shown in Figure 8, in the first differential converter sub-circuit 21, a wire is used to electrically connect the second input terminal (﹣) and the output terminal (Vout+) of the first operational amplifier U1. Thus, the signal output from the output terminal (Vout+) of the first operational amplifier U1 is the same as the signal input to the first input terminal (+) of the first operational amplifier U1. Since the first input terminal (+) of the first operational amplifier U1 is electrically connected to the output terminal (e.g., DAC-OUT) of the waveform generation circuit 10, the signal Vout+ output from the first differential converter sub-circuit 21 is the same as the signal (e.g., the DAC-OUT signal) input to the first differential converter sub-circuit 21 from the output terminal (e.g., DAC-OUT) of the waveform generation circuit 10, i.e., Vout+ = Vout+. DAC-OUT At this time, the first differential converter circuit 21 acts as a signal buffer, which can reduce signal distortion and improve the signal's anti-interference ability.

[0139] In Figure 8, the inverting amplifier includes a second operational amplifier U2, a first resistor R1, and a second resistor R2. The first input terminal (+) of the second operational amplifier U2 is electrically connected to the ground terminal GND. The second input terminal (-) of the second operational amplifier U2 is electrically connected to the first terminal of the first resistor R1 and the first terminal of the second resistor R2. The second terminal of the first resistor R1 is electrically connected to the output terminal (e.g., DAC-OUT) of the waveform generation circuit 10. The second terminal of the second resistor R2 is electrically connected to the output terminal (Vout-) of the second operational amplifier U2. The third input terminal of the second operational amplifier U2 is electrically connected to the first power input terminal VCCAMPP. The fourth input terminal of the second operational amplifier U2 is electrically connected to the second power input terminal VCCAMPN.

[0140] Additionally, in Figure 8, the input signal (e.g., the DAC-OUT signal) in the second differential converter sub-circuit 22 is input to the second input terminal (﹣) of the second operational amplifier U2 via the first resistor R1, and the output signal of the second operational amplifier U2 is superimposed on the second input terminal (﹣) of the second operational amplifier U2 via the second resistor R2. Thus, Vout -=-(R2 / R1)*V DAC-OUT ;

[0141] In some driving circuits provided in the embodiments of this application, the resistance values ​​of the first resistor R1 and the second resistor R2 are set to be the same, and in this case, R2 / R1 = 1;

[0142] Therefore, Vout - = -(R2 / R1)*V DAC-OUT =-V DAC-OUT ;

[0143] Thus, the signal output by the first differential converter circuit 21 (the second drive signal) Vout+=V DAC-OUT The signal output by the second differential converter circuit 22 (the third drive signal) is Vout - = -V DAC-OUT At this time, the second driving signal and the third driving signal have the same frequency, the same amplitude, and opposite phase.

[0144] In some driving circuits provided in the embodiments of this application, as shown in FIG9, the first differential converter sub-circuit 21 and the second differential converter sub-circuit 22 have the same structure.

[0145] In some driving circuits provided in the embodiments of this application, as shown in FIG9, the first differential converter sub-circuit 21 includes a first operational amplifier U1, a first resistor R1, a second resistor R2, a third resistor R3 and a fourth resistor R4.

[0146] The first input terminal (+) of the first operational amplifier U1 is electrically connected to the first terminal of the first resistor R1 and the first terminal of the second resistor R2. The second terminal of the first resistor R1 is electrically connected to the output terminal (e.g., DAC-OUT) of the waveform generation circuit 10. The second terminal of the second resistor R2 is electrically connected to the ground terminal GND. The second input terminal (-) of the first operational amplifier U1 is electrically connected to the first terminal of the third resistor R3 and the first terminal of the fourth resistor R4. The second terminal of the third resistor R3 is electrically connected to the reference voltage input terminal Vref. The second terminal of the fourth resistor R4 is electrically connected to the output terminal (Vout+) of the first operational amplifier U1. The third input terminal of the first operational amplifier U1 is electrically connected to the first power input terminal VCCAMPP. The fourth input terminal of the first operational amplifier U1 is electrically connected to the second power input terminal VCCAMPN.

[0147] In some driving circuits provided in the embodiments of this application, as shown in FIG9, the second differential converter sub-circuit 22 includes a second operational amplifier U2, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7 and an eighth resistor R8.

[0148] The first input terminal (+) of the second operational amplifier U2 is electrically connected to the first terminal of the fifth resistor R5 and the first terminal of the sixth resistor R6. The second terminal of the fifth resistor R5 is electrically connected to the reference voltage input terminal Vref. The second terminal of the sixth resistor R6 is electrically connected to the ground terminal GND. The second input terminal (-) of the second operational amplifier U2 is electrically connected to the first terminal of the seventh resistor R7 and the first terminal of the eighth resistor R8. The second terminal of the seventh resistor R7 is electrically connected to the output terminal (e.g., DAC-OUT) of the waveform generation circuit 10. The second terminal of the eighth resistor R8 is electrically connected to the output terminal of the second operational amplifier U2. The third input terminal of the second operational amplifier U2 is electrically connected to the first power input terminal VCCAMPP. The fourth input terminal of the second operational amplifier U2 is electrically connected to the second power input terminal VCCAMPN.

[0149] In Figure 9, since the first differential converter sub-circuit 21 and the second differential converter sub-circuit 22 have the same structure, the working principle of the two sub-circuits will be used as an example to explain them in detail below.

[0150] For example, in the first differential converter circuit 21 shown in Figure 9, the signal input to the first differential converter circuit 21 via the reference voltage input terminal Vref is input to the second input terminal (﹣) of the first operational amplifier U1 via the third resistor R3. The signal transmitted from the output terminal (DAC-OUT) of the waveform generation circuit 10 to the first differential converter circuit 21 is input to the first input terminal (+) of the first operational amplifier U1 via the first resistor R1. The first resistor R1 and the second resistor R2 perform voltage division processing on the signal input to the first input terminal (+) of the first operational amplifier U1, and at the same time play the role of balancing the resistance of the third resistor R3 and the fourth resistor R4 set in the second input terminal (﹣) of the first operational amplifier U1.

[0151] Thus, we can obtain the following formula (1):

[0152] As shown in Figure 9, the output signal can be equivalently represented by the superposition theorem as: Vout+=(Vout1+)+(Vout2+);

[0153] Where Vout1+ is the Vout+ value generated by treating Vref as 0, and Vout1+ is the value generated by treating Vref as 0. DAC- OUT The Vout+ value is considered to be 0.

[0154] Setting Vref = 0, the circuit input is now a DAC. OUT The non-inverting amplifier circuit of *(R2 / (R1+R2)) is: Vout1+=DAC OUT *(R2 / (R1+R2))*(1+R4 / R3);

[0155] Among them, the aforementioned DAC OUT That is, V DAC-OUT ;

[0156] Let DAC OUT =0, then the circuit is an inverting amplifier circuit with input Vref, that is:

[0157] Vout2+=-Vref*R4 / R3

[0158] Therefore: Vout+=(Vout1+)+(Vout2+)

[0159] Formula (1) can be obtained from the above process.

[0160] In order to make the output signal of the first differential converter circuit 21 proportional to the input signal, the ratio of the resistance values ​​of the first resistor R1 and the second resistor R2 is set to be equal to the ratio of the resistance values ​​of the third resistor R3 and the fourth resistor R4.

[0161] Right now

[0162] At this point, we can obtain

[0163] For example, in the second differential converter circuit 22 shown in Figure 9, the signal input to the reference voltage input terminal Vref in the second differential converter circuit 22 is input to the first input terminal (+) of the second operational amplifier U2 through the fifth resistor R5. The signal input to the output terminal (e.g., DAC-OUT) of the waveform generation circuit 10 in the second differential converter circuit 22 is input to the second input terminal (-) of the second operational amplifier U2 through the seventh resistor R7. The output signal of the second operational amplifier U2 is superimposed through the second resistor R8 and input to the second input terminal (-) of the second operational amplifier U2. The fifth resistor R5 and the sixth resistor R6 perform voltage division processing on the signal input to the first input terminal (+) of the second operational amplifier U2, and at the same time play the role of balancing the resistance of the seventh resistor R7 and the eighth resistor R8 set in the second input terminal (-) of the second operational amplifier U2.

[0164] Similar to formula (1) above, the output signal of the second differential converter circuit 22 can be obtained as follows:

[0165] In order to make the output signal of the second differential converter circuit 21 proportional to the input signal, the ratio of the resistance values ​​of the fifth resistor R5 and the sixth resistor R6 is set to be equal to the ratio of the resistance values ​​of the seventh resistor R7 and the eighth resistor R8.

[0166] Right now

[0167] At this point, we can obtain

[0168] According to formulas (2) and (4) above, in order to make the two differential drive signals have the same frequency and amplitude but opposite phase, i.e., Vout+=-(Vout-), it is necessary to configure the resistor value.

[0169] In some driving circuits provided in the embodiments of this application, the resistance ratios of the first resistor R1 and the second resistor R2, the third resistor R3 and the fourth resistor R4, the fifth resistor R5 and the sixth resistor R6, and the seventh resistor R7 and the eighth resistor R8 are all set to be equal.

[0170] Right now

[0171] At this point, (Vout+) = -(Vout-), and the signal output from the differential converter circuit 20 is a low-voltage differential drive signal with the same frequency and amplitude but opposite phase. One of (Vout+) and -(Vout-) is the second drive signal, and the other is the third drive signal.

[0172] For the first differential circuit 21 and the second differential circuit 22 shown in Figure 9, while generating the inverted differential driving signals (Vout+) and -(Vout-), the signals are also amplified based on the signals output from the output terminal of the waveform generation circuit 10. When Vref is 0, the amplification factor is R4 / R3 in formula (2) and R8 / R7 in formula (4).

[0173] In some driving circuits provided in the embodiments of this application, as shown in FIG10, the first amplification sub-circuit 41 includes a third operational amplifier U3, a first switching transistor Q1, a second switching transistor Q2, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a fourteenth resistor R14, and a fifteenth resistor R15.

[0174] The first input terminal (+) of the third operational amplifier U3 is electrically connected to the output terminal Vout+ of the first differential converter sub-circuit 21 and the first terminal of the fifteenth resistor R15. The second terminal of the fifteenth resistor R15 is electrically connected to the ground terminal GND. The second input terminal (-) of the third operational amplifier U3 is electrically connected to the first terminal of the fourteenth resistor R14 and the first terminal of the thirteenth resistor R13. The second terminal of the fourteenth resistor R14 is electrically connected to the ground terminal GND. The second terminal of the thirteenth resistor R13 is electrically connected to the output terminal OUT+ of the first amplifier sub-circuit 41. The third input terminal of the third operational amplifier U3 is electrically connected to the third power supply input terminal V+. The fourth input terminal of the third operational amplifier U3 is electrically connected to the fourth power supply input terminal V-.

[0175] The output terminal of the third operational amplifier U3 is electrically connected to the control terminal of the first switching transistor Q1, the control terminal of the second switching transistor Q2, and the first terminal of the tenth resistor R10, respectively. The source of the first switching transistor Q1 is electrically connected to the third power input terminal V+, and the drain of the first switching transistor Q1 is electrically connected to the first terminal of the ninth resistor R9. The source of the second switching transistor Q2 is electrically connected to the fourth power input terminal V-, and the drain of the second switching transistor Q2 is electrically connected to the first terminal of the eleventh resistor R11. The second terminals of the tenth resistor R10, the ninth resistor R9, and the eleventh resistor R11 are electrically connected to the first terminal of the twelfth resistor R12, and the second terminal of the twelfth resistor R12 is electrically connected to the second terminal of the thirteenth resistor R13 and the output terminal OUT+ of the first amplifier sub-circuit 41, respectively.

[0176] In some driving circuits provided in the embodiments of this application, as shown in FIG11, the first amplification sub-circuit 41 and the second amplification sub-circuit 42 have the same structure;

[0177] The second amplifier sub-circuit 42 includes a fourth operational amplifier U4, a third switching transistor Q3, a fourth switching transistor Q4, a sixteenth resistor R16, a seventeenth resistor R17, an eighteenth resistor R18, a nineteenth resistor R19, a twentieth resistor R20, a twenty-first resistor R21, and a twenty-second resistor R22.

[0178] The first input terminal (+) of the fourth operational amplifier U4 is electrically connected to the output terminal Vout- of the second differential converter circuit 22 and the first terminal of the 22nd resistor R22. The second terminal of the 22nd resistor R22 is electrically connected to the ground terminal GND. The second input terminal of the fourth operational amplifier U4 is electrically connected to the first terminal of the 21st resistor R21 and the first terminal of the 20th resistor R22. The second terminal of the 21st resistor R21 is electrically connected to the ground terminal GND. The second terminal of the 20th resistor R22 is electrically connected to the output terminal OUT- of the second amplifier circuit 42. The third input terminal of the fourth operational amplifier U4 is electrically connected to the third power supply input terminal V+. The fourth input terminal of the fourth operational amplifier U4 is electrically connected to the fourth power supply input terminal V-.

[0179] The output terminal of the fourth operational amplifier U4 is electrically connected to the control terminal of the third switch Q3, the control terminal of the fourth switch Q4, and the first terminal of the seventeenth resistor R17, respectively. The source of the third switch Q3 is electrically connected to the third power input terminal V+, and the drain of the third switch Q3 is electrically connected to the first terminal of the sixteenth resistor R16. The source of the fourth switch Q4 is electrically connected to the fourth power input terminal V-, and the drain of the fourth switch Q4 is electrically connected to the first terminal of the eighteenth resistor R18. The second terminals of the seventeenth resistor R17, the sixteenth resistor R16, and the eighteenth resistor R18 are electrically connected to the first terminal of the nineteenth resistor R19, and the second terminal of the nineteenth resistor R19 is electrically connected to the second terminal of the twentieth resistor R20 and the output terminal OUT- of the second amplifier sub-circuit.

[0180] In an exemplary embodiment, the third power input terminal V+ is a positive power source, and the fourth power input terminal V- is a negative power source.

[0181] Because piezoelectric actuators have high requirements for driving voltage and current, in order to achieve stronger tactile feedback vibration, the driving circuit needs to achieve high voltage and high current output. Figure 10 shows the power amplifier sub-circuit 41 that amplifies the signal output by the first differential converter sub-circuit 21, and Figure 11 shows the power amplifier sub-circuit 42 that amplifies the signal output by the second differential converter sub-circuit 22.

[0182] Since the first amplifier sub-circuit 41 and the second amplifier sub-circuit 42 have the same structure and the same working principle, the first amplifier sub-circuit 41 will be described in detail below:

[0183] In Figure 10, the thirteenth resistor R13 and the fourteenth resistor R14 are the operational amplifier configuration resistors for the third operational amplifier U3. The third operational amplifier U3 can amplify the power of its input signal, with an amplification factor of (R13+R14) / R14. The first switch Q1 and the second switch Q2 are both current-amplifying transistors, which amplify the weak current signal into a current signal with a larger amplitude. The ninth resistor R9, the tenth resistor R10, the eleventh resistor R11, and the twelfth resistor R12 are current-limiting protection resistors, which limit the current output from the first switch Q1 or the second switch Q2 to avoid current overload in the circuit. The second drive signal amplified by the third operational amplifier U3 is output from the OUT+ terminal.

[0184] For example, when the second drive signal is positive, the first switch Q1 is turned on, and the drive current is provided by the current output from the first switch Q1; when the second drive signal is negative, the second switch Q2 is turned on, and the drive current is provided by the current output from the second switch Q2.

[0185] For example, when the second drive signal is positive, the second switch Q2 is turned on, and the drive current is provided by the current output from the second switch Q2. When the second drive signal is negative, the first switch Q1 is turned on, and the drive current is provided by the current output from the first switch Q1.

[0186] For the second amplifier sub-circuit 42 shown in Figure 11, the twentieth resistor R20 and the twenty-first resistor R21 are the operational amplifier configuration resistors of the fourth operational amplifier U4. The fourth operational amplifier U4 can amplify the power of its input signal, with an amplification factor of (R20+R21) / R21. The third switch Q3 and the fourth switch Q4 are both current-amplifying transistors, which amplify the weak current signal into a current signal with a larger amplitude. The sixteenth resistor R16, the seventeenth resistor R17, the eighteenth resistor R18, and the nineteenth resistor R19 are current-limiting protection resistors, which limit the current output from the third switch Q3 or the fourth switch Q4 to avoid current overload in the circuit. The third drive signal amplified by the fourth operational amplifier U3 is output from the OUT- terminal.

[0187] For example, when the third drive signal is positive, the third switch Q3 is turned on, and the drive current is provided by the current output from the third switch Q3. When the third drive signal is negative, the fourth switch Q4 is turned on, and the drive current is provided by the current output from the fourth switch Q4.

[0188] For example, when the third drive signal is positive, the fourth switch Q4 is turned on, and the drive current is provided by the current output from the fourth switch Q4; when the third drive signal is negative, the third switch Q3 is turned on, and the drive current is provided by the current output from the third switch Q3.

[0189] The first amplification sub-circuit 41 and the second amplification sub-circuit 42 provided in the embodiments of this application can respectively amplify the power of the second driving signal and the third driving signal output by the differential conversion circuit 20, improve the driving voltage and driving current provided to the piezoelectric actuator, thereby generating stronger tactile feedback vibration and clearer touch feedback effect, and improving the human-computer interaction experience.

[0190] In some driving circuits provided in the embodiments of this application, as shown in FIG12, the path selection circuit 50 includes: a twenty-third resistor R23, a twenty-fourth resistor R24 ​​and a twenty-fifth resistor R25, a first relay S1, a second relay S2 and a third relay S3.

[0191] The first terminals of the twenty-third resistor R23, the twenty-fourth resistor R24, and the twenty-fifth resistor R25 are all electrically connected to the fifth power input terminal V1; the first relay S1 includes a first single-pole double-throw switch (e.g., the switch at the top of the first relay S1 in Figure 12) and a second single-pole double-throw switch (e.g., the switch at the bottom of the first relay S1 in Figure 12); the second relay S2 includes a third single-pole double-throw switch; the third relay S3 includes a fourth single-pole double-throw switch;

[0192] The fifth switch Q5, the sixth switch Q6, and the seventh switch Q7, the control terminals of the fifth switch Q5, the sixth switch Q6, and the seventh switch Q7 are electrically connected to the waveform generation circuit 10, respectively.

[0193] Specifically, the source of the fifth switch Q5 is electrically connected to the second terminal of the twenty-third resistor R23, the source of the sixth switch Q6 is electrically connected to the second terminal of the twenty-fourth resistor R24, and the source of the seventh switch Q7 is electrically connected to the second terminal of the twenty-fifth resistor R25; the drain of the fifth switch Q5 is electrically connected to the first relay S1, the drain of the sixth switch Q6 is electrically connected to the second relay S2, and the drain of the seventh switch Q7 is electrically connected to the third relay S3.

[0194] In an exemplary embodiment, the waveform generation circuit 10 can provide multiple first control signals (e.g., IO1, IO2, and IO3 signals marked in FIG12) to the path selection circuit 50 to control the conduction or cutoff of the fifth switch Q5, the sixth switch Q6, and the seventh switch Q7; the twenty-third resistor R23, the twenty-fourth resistor R24, and the twenty-fifth resistor R25 are current-limiting protection resistors for their respective paths; wherein, when the fifth switch Q5 is turned on, the fifth power input terminal V1 supplies power to the first relay S1; when the sixth switch Q6 is turned on, the fifth power input terminal V1 supplies power to the second relay S2; and when the seventh switch Q7 is turned on, the fifth power input terminal V1 supplies power to the third relay S3.

[0195] It should be noted that when the relays are not powered, the switches in the first relay S1, the second relay S2, and the third relay S3 are all connected to contact 1. When the relays are connected to the fifth power input terminal V1, the switches in the first relay S1, the second relay S2, and the third relay S3 are all connected to contact 2.

[0196] In Figure 12, the input or output terminal marked 1 can be collectively referred to as contact 1; the input or output terminal marked 2 can be collectively referred to as contact 2.

[0197] For example, the fifth switch Q5, the sixth switch Q6, and the seventh switch Q7 can be MOSFETs, used to provide the power supply signal output from the fifth power input terminal V1 to the first relay S1, the second relay S2, and the third relay S3 under the control of the first control signal.

[0198] For example, when IO1, IO2, and IO3 are high-level signals (i.e., the voltage in the circuit is high, and the first or second controller represents a logic 1 state), the corresponding MOSFETs Q5, Q6, and Q7 are turned on (i.e., the source and drain are connected, corresponding to the fifth power input terminal V1 in Figure 12 being connected to the power supply terminals of S1, S2, and S3); when IO1, IO2, and IO3 are low-level signals (i.e., the voltage in the circuit is low or is a ground signal, and the first or second controller represents a logic 0 state), the corresponding MOSFETs Q5, Q6, and Q7 are turned off (i.e., the source and drain are not connected, corresponding to the fifth power input terminal V1 in Figure 12 not being connected to the power supply terminals of S1, S2, and S3).

[0199] In the path selection circuit provided in the embodiments of this application, the switching of contacts in the relay can be controlled by controlling the fifth switch Q5, the sixth switch Q6 and the seventh switch Q7 respectively, thereby controlling whether the fifth power input terminal V1 is connected to the relay.

[0200] In some driving circuits provided in the embodiments of this application, as shown in FIG12, the driving circuit is used to drive the first piezoelectric actuator, the second piezoelectric actuator and the third piezoelectric actuator;

[0201] The input terminal of the first single-pole double-throw switch (e.g., the switch above the first relay S1 in Figure 12) is electrically connected to the output terminal OUT+ of the first amplifier sub-circuit; the first output terminal (marked 1) of the first single-pole double-throw switch is electrically connected to the positive terminal (marked piezoelectric actuator 1+) of the first piezoelectric actuator, the first input terminal (marked 1) of the third single-pole double-throw switch S2, and the first input terminal (marked 1) of the fourth single-pole double-throw switch S3; the second output terminal (marked 2) of the first single-pole double-throw switch (e.g., the switch above the first relay S1 in Figure 12) is electrically connected to the positive terminal (marked piezoelectric actuator 3+) of the third piezoelectric actuator;

[0202] The input terminal of the second single-pole double-throw switch (e.g., the switch below the first relay S1 in Figure 12) is electrically connected to the output terminal OUT- of the second amplifier sub-circuit; the first output terminal (marked 1) of the second single-pole double-throw switch (e.g., the switch below the first relay S1 in Figure 12) is electrically connected to the negative terminal (marked piezoelectric actuator 1-) of the first piezoelectric actuator, the second input terminal (marked 2) of the third single-pole double-throw switch S2, and the second input terminal (marked 2) of the fourth single-pole double-throw switch S3; the second output terminal (marked 2) of the second single-pole double-throw switch (e.g., the switch below the first relay S1 in Figure 12) is electrically connected to the negative terminal (marked piezoelectric actuator 3-) of the third piezoelectric actuator;

[0203] The output terminal of the third single-pole double-throw switch S2 is electrically connected to the positive terminal (marked piezoelectric actuator 2+) of the second piezoelectric actuator, and the output terminal of the fourth single-pole double-throw switch is electrically connected to the negative terminal (marked piezoelectric actuator 2-) of the second piezoelectric actuator.

[0204] The number of the first, second, and third piezoelectric actuators mentioned above is not limited here.

[0205] For example, the drive circuit can be used to drive a plurality of first piezoelectric actuators, a plurality of second piezoelectric actuators, and a plurality of third piezoelectric actuators.

[0206] For example, multiple first piezoelectric actuators are driven simultaneously; multiple second piezoelectric actuators are driven simultaneously; and multiple third piezoelectric actuators are driven simultaneously.

[0207] A piezoelectric actuator is a device that generates displacement by applying a voltage using the reverse piezoelectric effect. By applying voltage longitudinally or laterally to produce displacement in different directions, various types of actuators can be constructed to generate different types of motion. The displacement of a piezoelectric actuator is approximately proportional to the applied voltage. Based on these characteristics, virtual haptic feedback systems using piezoelectric actuators offer faster startup times, higher bandwidth, and stronger vibration amplitude, resulting in clearer tactile feedback.

[0208] Figure 18 provides a complete structural schematic diagram of a drive circuit.

[0209] In some driving circuits provided in the embodiments of this application, as shown in FIG13, when the third piezoelectric actuator vibrates, the fifth switch Q5 is turned on, and the input terminal of the first single-pole double-throw switch (e.g., the switch above the first relay S1 in FIG13) is connected to the second output terminal (marked 2) of the first single-pole double-throw switch (e.g., the switch above the first relay S1 in FIG13), and the input terminal of the second single-pole double-throw switch (e.g., the switch below the first relay S1 in FIG13) is connected to the second output terminal (marked 2) of the second single-pole double-throw switch (e.g., the switch below the first relay S1 in FIG13).

[0210] At this time, amplified second drive signal OUT+ and amplified third drive signal OUT- are applied to both ends of the third piezoelectric actuator, which can effectively improve the tactile vibration of the third piezoelectric actuator, thereby enhancing the human-computer interaction experience. In this way, the vibration of the third piezoelectric actuator can be controlled independently through a path selection circuit. Using this setup, the vibration of one of the multiple piezoelectric actuators in the display device can be controlled, thus enabling the activation and deactivation of the localized tactile feedback system.

[0211] In some driving circuits provided in the embodiments of this application, as shown in FIG14, when the first piezoelectric actuator vibrates, the fifth switch Q5 is turned off, and the input terminal of the first single-pole double-throw switch (e.g., the switch above the first relay S1 in FIG14) is connected to the first output terminal (marked 1) of the first single-pole double-throw switch (e.g., the switch above the first relay S1 in FIG14), and the input terminal of the second single-pole double-throw switch (e.g., the switch below the first relay S1 in FIG14) is connected to the first output terminal (marked 1) of the second single-pole double-throw switch (e.g., the switch below the first relay S1 in FIG14).

[0212] At this time, a second drive signal OUT+ and a third drive signal OUT- with a power amplification are applied to both ends of the first piezoelectric actuator, which can effectively improve the touch vibration of the first piezoelectric actuator, thereby improving the human-computer interaction experience.

[0213] In Figure 14, when it is necessary to set the first piezoelectric actuator to be turned on independently, the sixth switch Q6 and the seventh switch Q7 can be set to be turned off simultaneously; or, the sixth switch Q6 and the seventh switch Q7 can be set to be turned on simultaneously. In this case, there is no pressure difference between the two ends of the second piezoelectric actuator and the two ends of the third piezoelectric actuator, so it cannot be turned on.

[0214] In some driving circuits provided in the embodiments of this application, as shown in Figures 15 and 16, when the second piezoelectric actuator and the first piezoelectric actuator vibrate simultaneously, the fifth switch Q5 is turned off, and the input terminal of the first single-pole double-throw switch (e.g., the switch above the first relay S1 in Figure 14) is connected to the first output terminal (marked 1) of the first single-pole double-throw switch (e.g., the switch above the first relay S1 in Figure 14), and the input terminal of the second single-pole double-throw switch (e.g., the switch below the first relay S1 in Figure 14) is connected to the first output terminal (marked 1) of the second single-pole double-throw switch (e.g., the switch below the first relay S1 in Figure 14).

[0215] As shown in Figure 15, the sixth switch Q6 is cut off, the first input terminal (marked 1) of the third single-pole double-throw switch S2 is connected to the output terminal of the third single-pole double-throw switch S2, the seventh switch Q7 is turned on, and the second input terminal (marked 2) of the fourth single-pole double-throw switch S3 is connected to the output terminal of the fourth single-pole double-throw switch S3.

[0216] Alternatively, as shown in Figure 16, the second input terminal (marked 2) of the third single-pole double-throw switch S2 is connected to the output terminal of the third single-pole double-throw switch S2, and the first input terminal (marked 1) of the fourth single-pole double-throw switch S3 is connected to the output terminal of the fourth single-pole double-throw switch S3.

[0217] It should be noted that in Figure 15, the second piezoelectric actuator vibrates simultaneously with the first piezoelectric actuator, and the driving signals applied to both ends of the second piezoelectric actuator and the first piezoelectric actuator are the same in magnitude and phase; while in Figure 16, the second piezoelectric actuator vibrates simultaneously with the first piezoelectric actuator, but the driving signals applied to both ends of the second piezoelectric actuator and the first piezoelectric actuator are the same in magnitude but opposite in phase.

[0218] In some driving circuits provided in the embodiments of this application, as shown in FIG17, the path selection circuit 50 includes a plurality of control sub-circuits 51, and one control sub-circuit 51 is electrically connected to a piezoelectric actuator.

[0219] In Figure 17, the control sub-circuit 51 includes: a group of relays, resistors (e.g., r1 and r2), and switching transistors (e.g., q1 and q2);

[0220] The relay group includes two single-pole double-throw switches (e.g., S1 and S2 as shown in Figure 17); the output of one single-pole double-throw switch S1 is electrically connected to the positive terminal of the piezoelectric actuator, and the output of the other single-pole double-throw switch S2 is electrically connected to the negative terminal of the piezoelectric actuator; the first input terminals (marked 1) of both single-pole double-throw switches are electrically connected to the output terminal OUT+ of the first amplifier sub-circuit, and the second input terminals of both single-pole double-throw switches are electrically connected to the output terminal OUT- of the second amplifier sub-circuit.

[0221] Resistors (e.g., r1 and r2) are electrically connected to the fifth power input terminal V and the switching transistor q, respectively;

[0222] The number of switching transistors (e.g., q1 and q2) and the number of single-pole double-throw switches (e.g., r1 and r2) are the same as the number of single-pole double-throw switches; the switching transistors are electrically connected to the waveform generation circuit 10, the resistors and the single-pole double-throw switches respectively, and the switching transistors are configured to conduct the path between the fifth power input terminal V and the single-pole double-throw switches (e.g., S1 and S2) under the control of the first control signal (e.g., io1 and io2) output by the waveform generation circuit 10.

[0223] It should be noted that when the relays are not powered, the switches in both single-pole double-throw switches are connected to contact 1. When the relays are connected to the fifth power input terminal V1, the switches in both single-pole double-throw switches are connected to contact 2.

[0224] In an exemplary embodiment, in FIG17, the waveform generation circuit 10 can provide a plurality of first control signals (e.g., io1 and io2 signals marked in FIG17) to the path selection circuit 50 to control the conduction or cutoff of the switching transistors q1 and q2; resistors r1 and r2 are current-limiting protection resistors for their respective paths; wherein, when the switching transistor q1 is on, the fifth power input terminal V1 supplies power to the single-pole double-throw switch S1, and when the switching transistor q1 is on, the fifth power input terminal V1 supplies power to the single-pole double-throw switch.

[0225] In Figure 17, the input or output terminal marked 1 can be collectively referred to as contact 1; the input or output terminal marked 2 can be collectively referred to as contact 2.

[0226] The types of the aforementioned switching transistors q1 and q2 are not limited here.

[0227] For example, the aforementioned switching transistor can be a thin film transistor (TFT); or, the aforementioned switching transistor can be a metal-oxide-semiconductor field-effect transistor (MOSFET).

[0228] For example, the aforementioned switching transistors can all be N-type transistors; or, the aforementioned switching transistors can all be P-type transistors. The specific choice can be determined based on the actual situation.

[0229] In this configuration, N-type transistors transmit high-level signals, while P-type transistors transmit low-level signals.

[0230] For example, in Figure 17, the path selection circuit 50 includes three control sub-circuits 51, one of which is electrically connected to a piezoelectric actuator. S1, S2, S3, S4, S5, and S6 are single-pole double-throw relays (single-pole double-throw switches), q1, q2, q3, q4, q5, and q6 are MOSFETs, acting as switches to connect the relay to power supply V1, and r1, r2, r3, r4, r5, and r6 are current-limiting protection resistors. io1, io2, io3, io4, io5, and io6 are the first control signals output by the waveform generation circuit 10, corresponding to the on / off states of q1, q2, q3, q4, q5, and q6, respectively, thereby controlling whether V1 is connected to the relay to control the switching of the relay contacts.

[0231] When piezoelectric actuator 3 needs to be driven, io1, io2, io3, and io4 maintain the same level signal, controlling S1, S2, S3, and S4 to connect to the same contact (simultaneously connecting to contact 1 or simultaneously connecting to contact 2), so that the two poles of piezoelectric actuator 1 and piezoelectric actuator 2 are connected to the same point, so that there is no applied voltage between their poles. When io5 is at a low level, it controls S5 to connect to contact 1, and when io6 is at a high level, it controls S6 to connect to contact 2. Then OUT+ is connected to piezoelectric actuator 3+, and OUT- is connected to piezoelectric actuator 3-. The high-voltage differential drive signal (OUT+, OUT-) is output to piezoelectric actuator 3.

[0232] When it is necessary to drive piezoelectric actuators 1 and 2, io5 and io6 maintain the same level signal, respectively controlling S5 and S6 to connect to the same contact (connecting to contact 1 or contact 2 at the same time), so that both poles of piezoelectric actuator 3 are connected to the same point, so that there is no applied voltage between its two poles.

[0233] When the drive signals at both ends of piezoelectric actuator 1 and piezoelectric actuator 2 need to be loaded with in-phase signals, io1 and io3 are at low levels, controlling S1 and S3 to switch to contact 1 respectively, and io2 and io4 are at high levels, controlling S2 and S4 to switch to contact 2 respectively. At this time, the drive signals at both ends of piezoelectric actuator 1+ and piezoelectric actuator 2+ are the same, and the drive signals at both ends of piezoelectric actuator 1- and piezoelectric actuator 2- are the same.

[0234] When piezoelectric actuators 1 and 2 require signals with opposite phases to be applied to their driving signals, io1 and io4 are low to control S1 and S4 to switch to contact 1, respectively, and io2 and io3 are high to control S2 and S3 to switch to contact 2, respectively. At this time, the driving signals at both ends of piezoelectric actuator 1+ and piezoelectric actuator 2- are the same and connected to OUT+, and the driving signals at both ends of piezoelectric actuator 1+ and piezoelectric actuator 2- are the same and connected to OUT-. Alternatively, io1 and io4 can be set to high to control S1 and S4 to switch to contact 2, and io2 and io3 can be set to low to control S2 and S3 to switch to contact 1. In this case, the driving signals at both ends of piezoelectric actuator 1+ and piezoelectric actuator 2- are the same and connected to OUT-, and the driving signals at both ends of piezoelectric actuator 1+ and piezoelectric actuator 2- are the same and connected to OUT+.

[0235] The path selection circuit shown in FIG17 provided in the embodiments of this application can set the number of control sub-circuits 51 according to the number of piezoelectric actuators, and electrically connect one control sub-circuit 51 to one piezoelectric actuator to realize the free control of multiple piezoelectric actuators at the same time.

[0236] Embodiments of this application provide a haptic feedback system including at least one piezoelectric actuator and a drive circuit as described above, the drive circuit being used to drive at least one piezoelectric actuator to vibrate.

[0237] In the tactile feedback system provided in the embodiments of this application, since the piezoelectric actuator 30 is configured to vibrate under the combined drive of the second driving signal and the third driving signal, and the second driving signal and the third driving signal have the same frequency, the same amplitude and opposite phase, the voltage difference of the driving signal applied to both ends of the piezoelectric actuator is twice the voltage amplitude of the second driving signal (or twice the voltage amplitude of the third driving signal), which effectively increases the driving voltage, enhances the vibration of the tactile feedback, and thus produces a clear touch feedback effect.

[0238] Embodiments of this application provide a display device including a haptic feedback system as described above.

[0239] For example, the display device may also include a plurality of piezoelectric actuators.

[0240] For example, as shown in FIG19, the edge of the display device includes two regions 1, two regions 2 and two regions 3, wherein at least one first piezoelectric actuator may be provided in one of the two regions 1, at least one second piezoelectric actuator may be provided in one of the two regions 2, and at least one third piezoelectric actuator may be provided in one of the two regions 3.

[0241] Of course, at least one first piezoelectric actuator can be set in each of the two regions 1, at least one second piezoelectric actuator can be set in each of the two regions 2, and at least one third piezoelectric actuator can be set in each of the two regions 3.

[0242] As shown in Figure 3, when a user touches the display screen, the driver chip of the display device receives the touch signal. The driver chip sends a command signal to the waveform generation circuit according to the user's touch position, thereby controlling the piezoelectric actuator in the corresponding area to vibrate.

[0243] The aforementioned display device is a touch display device.

[0244] An embodiment of this application provides a driving method applied to the driving circuit described above, the method comprising:

[0245] S1. Waveform generation circuit 10 outputs a first drive signal and a first control signal;

[0246] The waveform generation circuit 10 can store preset data based on the tactile feedback effect and output a first driving signal based on the preset data.

[0247] The first control signal can control the path selection circuit 50 to turn on the path between the power amplifier circuit 40 and at least one piezoelectric actuator 30.

[0248] S2. Differential conversion circuit 20 generates second and third drive signals based on the first drive signal;

[0249] The differential conversion circuit 20 includes a first differential conversion sub-circuit 21 and a second differential conversion sub-circuit 22 as shown in Figure 2. The first differential conversion sub-circuit 21 and the second differential conversion sub-circuit 22 are electrically connected to the waveform generation circuit 10, respectively. The first differential conversion sub-circuit 21 generates a second driving signal according to the first driving signal, and the second differential conversion sub-circuit 22 generates a third driving signal according to the first driving signal.

[0250] S3, the power amplifier circuit 40 amplifies the power of the second drive signal and the third drive signal;

[0251] The power amplifier circuit 40 includes a first amplification sub-circuit 41 and a second amplification sub-circuit 42. The first amplification sub-circuit 41 is electrically connected to the first differential conversion sub-circuit 21 and the first terminal of at least one piezoelectric actuator 30, respectively. The second amplification sub-circuit 42 is electrically connected to the second differential conversion sub-circuit 22 and the second terminal of the same piezoelectric actuator 30, respectively.

[0252] The first amplifier sub-circuit 41 can amplify the power of the second driving signal to increase the voltage and current values ​​of the second driving signal; the second amplifier sub-circuit 42 can amplify the power of the third driving signal to increase the voltage and current values ​​of the third driving signal.

[0253] S4. Under the control of the first control signal output by the waveform generation circuit 10, the path selection circuit 50 loads the amplified second drive signal and the amplified third drive signal onto the positive and negative terminals of at least one piezoelectric actuator 30 respectively according to the first control signal; wherein the second drive signal and the third drive signal have the same frequency, the same amplitude and opposite phase.

[0254] The path selection circuit 50 is electrically connected to the waveform generation circuit 10, the power amplifier circuit 40 and at least one piezoelectric actuator 30, respectively, and the path selection circuit 50 can conduct the path between the power amplifier circuit 40 and at least one piezoelectric actuator 30 under the control of the first control signal output by the waveform generation circuit 10.

[0255] Because piezoelectric actuators have high requirements for driving voltage and current, achieving stronger tactile feedback requires a high-voltage, high-current output from the driving circuit. The aforementioned driving method enables the generation of a high-voltage differential driving signal. Thus, the voltage difference between the driving signals applied across the piezoelectric actuator 30 is twice the voltage amplitude of the second driving signal (or twice the voltage amplitude of the third driving signal), effectively increasing the driving voltage and enhancing the tactile feedback. The differential driving signal includes both the second and third driving signals.

[0256] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A driving circuit, wherein, Applications in haptic feedback systems include: A waveform generation circuit is configured to store preset data and output a first drive signal according to the preset data; The differential conversion circuit includes a first differential conversion sub-circuit and a second differential conversion sub-circuit, the first differential conversion sub-circuit and the second differential conversion sub-circuit being electrically connected to the waveform generation circuit respectively, the first differential conversion sub-circuit being configured to generate a second driving signal based on the first driving signal, and the second differential conversion sub-circuit being configured to generate a third driving signal based on the first driving signal. The first differential converter sub-circuit and the second differential converter sub-circuit are respectively electrically connected to at least one piezoelectric actuator, which is configured to vibrate under the combined drive of the second drive signal and the second drive signal; The second driving signal and the third driving signal have the same frequency, the same amplitude, and opposite phase.

2. The driving circuit according to claim 1, wherein, The driving circuit also includes: A power amplifier circuit includes a first amplification sub-circuit and a second amplification sub-circuit. The first amplification sub-circuit is electrically connected to a first differential conversion sub-circuit and a first terminal of at least one of the piezoelectric actuators, respectively. The second amplification sub-circuit is electrically connected to a second differential conversion sub-circuit and a second terminal of the same piezoelectric actuator, respectively. The first amplification sub-circuit is configured to amplify the power of the second drive signal; the second amplification sub-circuit is configured to amplify the power of the third drive signal.

3. The driving circuit according to claim 2, wherein, The driving circuit also includes: A path selection circuit, electrically connected to the waveform generation circuit, the power amplifier circuit, and the at least one piezoelectric actuator, is configured to, under the control of the waveform generation circuit, open the path between the power amplifier circuit and the at least one piezoelectric actuator.

4. The driving circuit according to claim 3, wherein, The waveform generation circuit includes: A first controller is electrically connected to the differential conversion circuit and the path selection circuit. The first controller is configured to store the preset data and output the first drive signal according to the preset data. The first controller is also configured to output a first control signal, which is configured to control the path selection circuit and connect the path between the power amplifier circuit and at least one of the piezoelectric actuators.

5. The driving circuit according to claim 3, wherein, The waveform generation circuit includes: Second controller and digital-to-analog converter, The second controller is electrically connected to the digital-to-analog converter and the path selection circuit, respectively. The second controller is configured to store the preset data and output a first control signal and a second control signal. The first control signal is configured to control the path selection circuit and conduct the path between the power amplifier circuit and at least one of the piezoelectric actuators. The second control signal is configured to instruct the digital-to-analog converter to output the first drive signal. The digital-to-analog converter is electrically connected to the second controller and the differential conversion circuit, respectively, and is configured to output the first drive signal under the control of the second control signal output by the second controller.

6. The driving circuit according to claim 1, wherein, The preset data includes at least one of square wave signal, sine wave signal and cosine wave signal.

7. The driving circuit according to claim 4 or 5, wherein, The first differential converter sub-circuit and the second differential converter sub-circuit have at least a portion of the same structure; The first input terminal of the first differential converter sub-circuit is electrically connected to the output terminal of the waveform generation circuit, and the second input terminal of the second differential converter sub-circuit is electrically connected to the output terminal of the waveform generation circuit.

8. The driving circuit according to claim 7, wherein, The first differential converter sub-circuit includes a voltage follower, and the second differential converter sub-circuit includes an inverting amplifier; The voltage follower includes a first operational amplifier, a first input terminal of the first operational amplifier electrically connected to the output terminal of the waveform generation circuit, a second input terminal of the first operational amplifier electrically connected to the output terminal of the first operational amplifier, a third input terminal of the first operational amplifier electrically connected to a first power input terminal, and a fourth input terminal of the first operational amplifier electrically connected to a second power input terminal. The inverting amplifier includes a second operational amplifier, a first resistor, and a second resistor. The first input terminal of the second operational amplifier is electrically connected to a ground terminal. The second input terminal of the second operational amplifier is electrically connected to the first terminal of the first resistor and the first terminal of the second resistor, respectively. The second terminal of the first resistor is electrically connected to the output terminal of the waveform generation circuit. The second terminal of the second resistor is electrically connected to the output terminal of the second operational amplifier. The third input terminal of the second operational amplifier is electrically connected to the first power input terminal. The fourth input terminal of the second operational amplifier is electrically connected to the second power input terminal.

9. The driving circuit according to claim 7, wherein, The first resistor and the second resistor have the same resistance value.

10. The driving circuit according to claim 7, wherein, The first differential converter sub-circuit and the second differential converter sub-circuit have the same structure.

11. The driving circuit according to claim 10, wherein, The first differential converter circuit includes a first operational amplifier, a first resistor, a second resistor, a third resistor, and a fourth resistor; The first input terminal of the first operational amplifier is electrically connected to the first terminal of the first resistor and the first terminal of the second resistor, respectively. The second terminal of the first resistor is electrically connected to the output terminal of the waveform generation circuit. The second terminal of the second resistor is electrically connected to the ground terminal. The second input terminal of the first operational amplifier is electrically connected to the first terminal of the third resistor and the first terminal of the fourth resistor, respectively. The second terminal of the third resistor is electrically connected to the reference voltage input terminal. The second terminal of the fourth resistor is electrically connected to the output terminal of the first operational amplifier. The third input terminal of the first operational amplifier is electrically connected to the first power supply input terminal. The fourth input terminal of the second operational amplifier is electrically connected to the second power supply input terminal.

12. The driving circuit according to claim 11, wherein, The second differential converter circuit includes a second operational amplifier, a fifth resistor, a sixth resistor, a seventh resistor, and an eighth resistor; The first input terminal of the second operational amplifier is electrically connected to the first terminal of the fifth resistor and the first terminal of the sixth resistor, respectively. The second terminal of the fifth resistor is electrically connected to the reference voltage input terminal. The second terminal of the sixth resistor is electrically connected to the ground terminal. The second input terminal of the second operational amplifier is electrically connected to the first terminal of the seventh resistor and the first terminal of the eighth resistor, respectively. The second terminal of the seventh resistor is electrically connected to the output terminal of the waveform generation circuit. The second terminal of the eighth resistor is electrically connected to the output terminal of the second operational amplifier. The third input terminal of the second operational amplifier is electrically connected to the first power supply input terminal. The fourth input terminal of the second operational amplifier is electrically connected to the second power supply input terminal.

13. The driving circuit according to claim 12, wherein, The ratio of the resistance values ​​of the first resistor and the second resistor is equal to the ratio of the resistance values ​​of the third resistor and the fourth resistor; The ratio of the resistance values ​​of the fifth resistor and the sixth resistor is equal to the ratio of the resistance values ​​of the seventh resistor and the eighth resistor.

14. The driving circuit according to claim 13, wherein, The resistance ratios of the first resistor and the second resistor, the third resistor and the fourth resistor, the fifth resistor and the sixth resistor, and the seventh resistor and the eighth resistor are all equal.

15. The driving circuit according to claim 2, wherein, The first amplification sub-circuit includes a third operational amplifier, a first switching transistor, a second switching transistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, and a fifteenth resistor; The first input terminal of the third operational amplifier is electrically connected to the output terminal of the first differential conversion sub-circuit and the first terminal of the fifteenth resistor, respectively. The second terminal of the fifteenth resistor is electrically connected to the ground terminal. The second input terminal of the third operational amplifier is electrically connected to the first terminal of the fourteenth resistor and the first terminal of the thirteenth resistor, respectively. The second terminal of the fourteenth resistor is electrically connected to the ground terminal. The second terminal of the thirteenth resistor is electrically connected to the output terminal of the first amplification sub-circuit. The third input terminal of the third operational amplifier is electrically connected to the third power supply input terminal. The fourth input terminal of the third operational amplifier is electrically connected to the fourth power supply input terminal. The output terminal of the third operational amplifier is electrically connected to the control terminal of the first switching transistor, the control terminal of the second switching transistor, and the first terminal of the tenth resistor, respectively; the source of the first switching transistor is electrically connected to the third power input terminal, and the drain of the first switching transistor is electrically connected to the first terminal of the ninth resistor; the source of the second switching transistor is electrically connected to the fourth power input terminal, and the drain of the second switching transistor is electrically connected to the first terminal of the eleventh resistor; the second terminals of the tenth resistor, the ninth resistor, and the eleventh resistor are respectively electrically connected to the first terminal of the twelfth resistor, and the second terminal of the twelfth resistor is respectively electrically connected to the second terminal of the thirteenth resistor and the output terminal of the first amplification sub-circuit.

16. The driving circuit according to claim 15, wherein, The first amplifier sub-circuit and the second amplifier sub-circuit have the same structure; The second amplification sub-circuit includes a fourth operational amplifier, a third switching transistor, a fourth switching transistor, a sixteenth resistor, a seventeenth resistor, an eighteenth resistor, a nineteenth resistor, a twentieth resistor, a twenty-first resistor, and a twenty-second resistor. The first input terminal of the fourth operational amplifier is electrically connected to the output terminal of the second differential converter sub-circuit and the first terminal of the twelfth resistor, respectively. The second terminal of the twelfth resistor is electrically connected to the ground terminal. The second input terminal of the fourth operational amplifier is electrically connected to the first terminal of the eleventh resistor and the first terminal of the twentieth resistor, respectively. The second terminal of the eleventh resistor is electrically connected to the ground terminal. The second terminal of the twentieth resistor is electrically connected to the output terminal of the second amplifier sub-circuit. The third input terminal of the fourth operational amplifier is electrically connected to the third power supply input terminal. The fourth input terminal of the fourth operational amplifier is electrically connected to the fourth power supply input terminal. The output terminal of the fourth operational amplifier is electrically connected to the control terminal of the third switch, the control terminal of the fourth switch, and the first terminal of the seventeenth resistor, respectively; the source of the third switch is electrically connected to the third power input terminal, and the drain of the third switch is electrically connected to the first terminal of the sixteenth resistor; the source of the fourth switch is electrically connected to the fourth power input terminal, and the drain of the fourth switch is electrically connected to the first terminal of the eighteenth resistor; the second terminals of the seventeenth, sixteenth, and eighteenth resistors are electrically connected to the first terminal of the nineteenth resistor, and the second terminal of the nineteenth resistor is electrically connected to the second terminal of the twentieth resistor and the output terminal of the second amplification sub-circuit, respectively.

17. The driving circuit according to claim 3, wherein, The path selection circuit includes: The first terminals of the twenty-third resistor, the twenty-fourth resistor, and the twenty-fifth resistor are all electrically connected to the fifth power input terminal. The first relay includes a first single-pole double-throw switch and a second single-pole double-throw switch; The second relay includes the third single-pole double-throw switch; The third relay includes the fourth single-pole double-throw switch; The fifth, sixth, and seventh switching transistors are respectively electrically connected to the waveform generation circuit. The source of the fifth switch is electrically connected to the second terminal of the twenty-third resistor, the source of the sixth switch is electrically connected to the second terminal of the twenty-fourth resistor, and the source of the seventh switch is electrically connected to the second terminal of the twenty-fifth resistor; the drain of the fifth switch is electrically connected to the first relay, the drain of the sixth switch is electrically connected to the second relay, and the drain of the seventh switch is electrically connected to the third relay.

18. The driving circuit according to claim 17, wherein, The driving circuit is used to drive the first piezoelectric actuator, the second piezoelectric actuator, and the third piezoelectric actuator; The input terminal of the first single-pole double-throw switch is electrically connected to the output terminal of the first amplifier sub-circuit; the first output terminal of the first single-pole double-throw switch is electrically connected to the positive terminal of the first piezoelectric actuator, the first input terminal of the third single-pole double-throw switch, and the first input terminal of the fourth single-pole double-throw switch, respectively; the second output terminal of the first single-pole double-throw switch is electrically connected to the positive terminal of the third piezoelectric actuator. The input terminal of the second single-pole double-throw switch is electrically connected to the output terminal of the second amplifier sub-circuit; the first output terminal of the second single-pole double-throw switch is electrically connected to the negative terminal of the first piezoelectric actuator, the second input terminal of the third single-pole double-throw switch, and the second input terminal of the fourth single-pole double-throw switch; the second output terminal of the second single-pole double-throw switch is electrically connected to the negative terminal of the third piezoelectric actuator. The output terminal of the third single-pole double-throw switch is electrically connected to the positive terminal of the second piezoelectric actuator, and the output terminal of the fourth single-pole double-throw switch is electrically connected to the negative terminal of the second piezoelectric actuator.

19. The driving circuit according to claim 18, wherein, When the third piezoelectric actuator vibrates, The input terminal of the first single-pole double-throw switch is connected to the second output terminal of the first single-pole double-throw switch, and the input terminal of the second single-pole double-throw switch is connected to the second output terminal of the second single-pole double-throw switch.

20. The driving circuit according to claim 18, wherein, When the first piezoelectric actuator vibrates The input terminal of the first single-pole double-throw switch is connected to the first output terminal of the first single-pole double-throw switch, and the input terminal of the second single-pole double-throw switch is connected to the first output terminal of the second single-pole double-throw switch.

21. The driving circuit according to claim 20, wherein, When the second piezoelectric actuator and the first piezoelectric actuator vibrate simultaneously, the input terminal of the first single-pole double-throw switch is connected to the first output terminal of the first single-pole double-throw switch, and the input terminal of the second single-pole double-throw switch is connected to the first output terminal of the second single-pole double-throw switch. The first input terminal of the third single-pole double-throw switch is connected to the output terminal of the third single-pole double-throw switch, and the second input terminal of the fourth single-pole double-throw switch is connected to the output terminal of the fourth single-pole double-throw switch. Alternatively, the second input terminal of the third single-pole double-throw switch is connected to the output terminal of the third single-pole double-throw switch, and the first input terminal of the fourth single-pole double-throw switch is connected to the output terminal of the fourth single-pole double-throw switch.

22. The driving circuit according to claim 3, wherein, The path selection circuit includes multiple control sub-circuits, one of which is electrically connected to one of the piezoelectric actuators; the control sub-circuit includes: A relay group includes two single-pole double-throw (SPDT) switches; the output terminal of one SPDT switch is electrically connected to the positive terminal of the piezoelectric actuator, and the output terminal of the other SPDT switch is electrically connected to the negative terminal of the piezoelectric actuator; the first input terminals of both SPDT switches are electrically connected to the output terminal of the first amplification subcircuit, and the second input terminals of both SPDT switches are electrically connected to the output terminal of the second amplification subcircuit. A resistor, which is electrically connected to the fifth power input terminal and the switching transistor respectively; The number of the switching transistors, the number of the resistors, and the number of the single-pole double-throw switches are the same; the switching transistors are electrically connected to the waveform generation circuit, the resistors, and the single-pole double-throw switches respectively; the switching transistors are configured to conduct the path between the fifth power input terminal and the single-pole double-throw switches under the control of the first control signal output by the waveform generation circuit.

23. A haptic feedback system, wherein, It includes at least one piezoelectric actuator and a drive circuit as described in any one of claims 1 to 22, the drive circuit being used to drive the at least one piezoelectric actuator to vibrate.

24. A display device, wherein, Including the haptic feedback system as described in claim 23.

25. A driving method applied to a driving circuit as described in any one of claims 3 to 22, the method comprising: The waveform generation circuit outputs a first drive signal and a first control signal; The differential conversion circuit generates a second drive signal and a third drive signal based on the first drive signal; The power amplifier circuit amplifies the power of the second drive signal and the third drive signal; Under the control of the first control signal output by the waveform generation circuit, the path selection circuit applies the amplified second drive signal and the amplified third drive signal to the positive and negative terminals of at least one piezoelectric actuator, respectively, according to the first control signal. The second driving signal and the third driving signal have the same frequency, the same amplitude, and opposite phase.

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