Chip resistor

Abstract

A chip resistor includes a ceramic substrate, two electrodes arranged on the ceramic substrate, and a resistor body electrically connecting the two electrodes. The ceramic substrate includes a base material including a sintered body of ceramic particles (A) and a coating including a sintered body of α-alumina particles (B). The coating covers at least a part of a surface of the base material. The average particle diameter of the α-alumina particles (B) is smaller than the average particle diameter of the ceramic particles (A). The ceramic substrate has a support surface, a surface on the support surface side of the base material is covered with the coating, and the resistor body is overlaid on the support surface.

Description

Technical Field

[0001] This disclosure relates to surface mount resistors used in various electronic devices. Background Technology

[0002] Patent document 1 discloses the following technology: making the alumina substrate itself contain a trace amount of silica glass, forming a glass coating on the surface of the alumina substrate, and forming an upper electrode, a resistor, etc. on the glass coating.

[0003] Prior art literature

[0004] Patent documents

[0005] Patent Document 1: JP 2017-168749 Summary of the Invention

[0006] Surface mount resistors made using substrates with a glass coating suffer from poor thermal conductivity, making it difficult to ensure adequate thermal conductivity. Furthermore, the insufficient smoothness of the substrate makes it difficult to suppress electrostatic discharge (ESD) generated in the surface mount resistors. Therefore, improving the thermal conductivity and ESD resistance of surface mount resistors is desirable.

[0007] One aspect of this disclosure relates to a surface mount resistor comprising: a ceramic substrate; two electrodes disposed on the ceramic substrate; and a resistive element electrically connecting the two electrodes. The ceramic substrate has: a substrate comprising a sintered body containing ceramic particles (A); and a coating comprising a sintered body containing α-alumina particles (B). The coating covers at least a portion of the surface of the substrate. The average particle size of the α-alumina particles (B) is smaller than the average particle size of the ceramic particles (A). The ceramic substrate has a support surface, the support surface side of the substrate is covered by the coating, and the resistive element is superimposed on the support surface.

[0008] According to this disclosure, it is possible to provide a chip resistor that can improve thermal conductivity and ESD resistance. Attached Figure Description

[0009] Figure 1 This is an example of a schematic cross-sectional view of a chip resistor according to the first embodiment of this disclosure.

[0010] Figure 2 This is an example of a schematic cross-sectional view of a chip resistor according to the second embodiment of this disclosure.

[0011] Figure 3 This is a schematic cross-sectional view of a variation of the chip resistor disclosed herein. Detailed Implementation

[0012] 1. Summary

[0013] Embodiments of this disclosure are described with reference to the accompanying drawings. Furthermore, the following embodiments are only a part of the various embodiments of this disclosure. Moreover, various modifications can be made to the design, etc., to achieve the purpose of this disclosure. The figures referenced below are schematic, and the aspect ratios of the constituent elements are not necessarily limited to reflecting actual aspect ratios. The arrows indicating directions in the figures (arrows indicating the up-down and left-right directions) do not specify the direction of use of the chip resistor 10; they are merely annotations for ease of understanding and do not accompany the actual object. In this disclosure, viewing along the up-down direction is referred to as a top view, and viewing along the left-right direction is referred to as a side view.

[0014] The chip resistor 10 disclosed herein includes: a ceramic substrate 1; two electrodes 4 disposed on the ceramic substrate 1; and a resistive element 5 electrically connecting the two electrodes 4. The ceramic substrate 1 has: a substrate 2 comprising a sintered body containing ceramic particles (A); and a coating 3 comprising a sintered body containing α-alumina particles (B). The coating 3 covers at least a portion of the surface of the substrate 2. The average particle size of the α-alumina particles (B) is smaller than the average particle size of the ceramic particles (A). The ceramic substrate 1 has a support surface 111, the surface of the substrate 2 on the support surface 111 side is covered by the coating 3, and the resistive element 5 is superimposed on the support surface 111.

[0015] As described above, the ceramic substrate 1 comprises a substrate 2 consisting of a sintered body containing ceramic particles (A). The ceramic substrate 1 imparts high thermal conductivity to the chip resistor 10. Therefore, the thermal conductivity in the chip resistor 10 can be improved. Furthermore, the surface of the substrate 2 on the support surface 111 side is covered with a coating 3 consisting of a sintered body containing α-alumina particles (B), and the average particle size of the α-alumina particles (B) is smaller than the average particle size of the ceramic particles (A). This improves the smoothness of the support surface 111 of the ceramic substrate 1. The resistor 5 formed on the support surface 111 of such a ceramic substrate 1 can be formed without local interruption, or the unevenness of the film thickness of the resistor 5 can be suppressed. Therefore, damage (breakage) in the resistor 5 is less likely to occur. As a result, electrostatic discharge (ESD) generated in the chip resistor 10 can be suppressed. Thus, the thermal conductivity and ESD resistance in the chip resistor 10 can be improved.

[0016] Here, the support surface 111 of the ceramic substrate 1 is a part of the first main surface 11 of the ceramic substrate 1, and refers to the surface on which the resistor 5 is disposed. In addition, the term "disposed of the resistor 5 on the ceramic substrate 1" means that the resistor 5 is disposed in a vertically overlapping manner in the direction of either the first main surface 11 or the second main surface 12 of the ceramic substrate 1, either directly or with different elements in between.

[0017] Furthermore, the two electrodes 4 can also be disposed on the ceramic substrate 1 but not on the support surface 111. That is, the portion of the surface of the substrate 2 where the resistor 5 and the substrate 2 overlap in the vertical direction is covered by the coating 3, but the portion of the surface of the substrate 2 that overlaps with the electrode 4 in the vertical direction may or may not be covered by the coating 3. In addition, the term "surface of the substrate 2 covered by the coating 3" means that the coating 3 directly contacts the surface of the substrate 2 and covers the surface. Furthermore, the electrode 4 may be directly contacted with the ceramic substrate 1, or there may be elements different from the ceramic substrate 1 and the electrode 4 between the electrode 4 and the ceramic substrate 1.

[0018] Furthermore, the resistor 5 electrically connects the two electrodes 4, preferably with the two electrodes 4 directly connected to the resistor 5. Additionally, the resistor 5 may have elements different from those of the electrodes 4 and the resistor 5 located between them, provided that this does not compromise the improved smoothness of the support surface 111. Moreover, a portion of the resistor 5 may not overlap with the support surface 111.

[0019] 2. Details

[0020] Hereinafter, the chip resistor 10 in the embodiments of the present disclosure will be described with reference to the accompanying drawings.

[0021] 2.1 First Implementation Method

[0022] Figure 1 This is a cross-sectional view of the chip resistor 10 according to the first embodiment of this disclosure.

[0023] (Ceramic substrate)

[0024] like Figure 1 As shown, the chip resistor 10 includes a ceramic substrate 1. The ceramic substrate 1 has a base material 2 containing ceramic particles (A) in a sintered body, and a coating 3 containing α-alumina particles (B) in a sintered body. The ceramic particles (A) contain alumina particles (A1). That is, the base material 2 is an alumina sintered body substrate. The content of alumina particles (A1) in the total ceramic particles (A) is preferably 96% by mass or more. In other words, the content of alumina particles (A1) in the sintered body relative to the total content of the base material 2 is preferably 96% by mass or more. In this case, the thermal conductivity of the ceramic substrate 1 can be improved. As a result, the thermal conductivity of the chip resistor 10 can also be improved. In addition, the upper limit of the content of alumina particles (A1) in the total ceramic particles (A) is, for example, 100% by mass.

[0025] When viewed from above, the ceramic substrate 1 has a rectangular shape. Furthermore, the thickness of the ceramic substrate 1 is, for example, 100 μm or more and 600 μm or less.

[0026] The coating 3 covers at least a portion of the surface of the substrate 2. In this case, the smoothness of the first main surface 11 covered by the coating 3 is improved. Therefore, if the surface on the support surface 111 side of the substrate 2 is covered by the coating 3, the smoothness of the support surface 111 in the ceramic substrate 1 can be improved. As a result, the ESD resistance of the chip resistor 10 can be improved. In addition, the phrase "the coating 3 covers at least a portion of the surface of the substrate 2" means that as long as the surface on the support surface 111 side of the substrate 2 is covered by the coating 3, the surfaces of the substrate 2 other than the surface on the support surface 111 side can be covered by the coating 3 or not. Furthermore, the phrase "covered by the coating 3" can mean that the entire surface of the object is covered by the coating 3 without gaps, or it can mean that the surface of the object is partially covered by the coating 3 while there are parts of the surface of the object that are not covered by the coating 3. Next, the structure of the coating 3 is not particularly limited as long as it can improve the smoothness of the support surface 111 of the ceramic substrate 1. For example, the coating 3 can be a continuous surface. Alternatively, the coating 3 can also be a discontinuous surface. In addition, the coating 3 is preferably a continuous surface, in which case it is easier to improve the smoothness of the support surface 111 in the ceramic substrate 1.

[0027] The average particle size of the α-alumina particles (B) is smaller than that of the ceramic particles (A). In this case, even if the substrate 2 has a complex inner shape due to its minute unevenness, the coating 3 can be configured to fully fill the unevenness. This makes it difficult for voids to form between the substrate 2 and the coating 3. As a result, the ESD resistance of the chip resistor 10 is further improved. Furthermore, the average particle size of the ceramic particles (A) is, for example, 0.5 μm or more and 8 μm or less. The average particle size of the α-alumina particles (B) is, for example, 30 nm or more and 1000 nm or less. The ratio of the average particle size of the α-alumina particles (B) to the average particle size of the ceramic particles (A) is, for example, 1 / 3 or less. If the average particle size of the ceramic particles (A), the average particle size of the α-alumina particles (B), or their ratio is within the aforementioned range, the ESD resistance of the chip resistor 10 is further improved.

[0028] Furthermore, the maximum particle size of the α-alumina particles (B) is preferably 1500 nm or less. In this case, the thermal conductivity and smoothness of the ceramic substrate 1 can be further improved. Therefore, the thermal conductivity and ESD resistance of the chip resistor 10 can be further improved.

[0029] The coating 3 may also be a sintered body containing other inorganic materials (hereinafter also referred to as inorganic materials (C)) in addition to α-alumina particles (B), but from the viewpoint of forming the coating 3, it is preferable that the proportion of α-alumina particles (B) in the total raw material used to make the coating 3 is 50% by mass or more. The inorganic material (C) may contain at least one selected from the group consisting of boehmite (AlOOH), zirconium oxide (ZrO2), silicon dioxide (SiO2), magnesium oxide (MgO), calcium oxide (CaO), and aluminum nitride (AlN). Among these, the inorganic material (C) preferably contains boehmite. In this case, boehmite can improve the sinterability of α-alumina particles (B).

[0030] The ceramic substrate 1 has a first main surface 11, a second main surface 12 opposite to the first main surface 11, and two side surfaces 13 connecting the first main surface 11 and the second main surface 12. These two side surfaces 13 are visually identifiable when viewing the chip resistor 10 from the side, and are opposite each other in the left-right direction. In this embodiment, the first main surface 11 is entirely a support surface 111. That is, the coating 3 is integrally disposed on the surface of the substrate 2 on the support surface 111 side.

[0031] (electrode)

[0032] As described above, the chip resistor 10 has two electrodes 4. Each of the two electrodes 4 is electrically connected to the resistive element 5. More specifically, each of the two electrodes 4 has a surface electrode 41, a back electrode 42, and an end electrode 43. The surface electrode 41 is disposed on the first main surface 11 of the ceramic substrate 1 and is electrically connected to the resistive element 5. The back electrode 42 is disposed on the second main surface 12 of the ceramic substrate 1. The end electrode 43 electrically connects the surface electrode 41 and the back electrode 42. In this embodiment, the end electrode 43 is disposed on the side surface 13 of the ceramic substrate 1. Furthermore, the term "surface electrode 41 disposed on the first main surface 11" means that the surface electrode 41 is directly grounded on the first main surface 11, or that the surface electrode 41 is disposed on the first main surface 11 with a different element in between. Furthermore, the phrase "the back electrode 42 is disposed on the second main surface 12" means that the back electrode 42 is directly grounded on the second main surface 12, or that the back electrode 42 is disposed on the second main surface 12 with a different element in between. Similarly, the phrase "the end electrode 43 is disposed on the side surface 13" means that the end electrode 43 is directly grounded on the side surface 13, or that the end electrode 43 is disposed on the side surface 13 with a different element in between.

[0033] As described above, the surface electrode 41 may not be directly connected to the first main surface 11 of the ceramic substrate 1. In this embodiment, the surface electrode 41 is disposed on the first main surface 11 with the resistor 5 in between. In this embodiment, the surface electrode 41 is made of a Ni-based alloy. For example, the surface electrode 41 can be formed from a thin-film conductor obtained by a thin-film process. For this purpose, the thin-film conductor used to form the surface electrode 41 contains a Ni-based alloy. In addition, each of the two surface electrodes 41 can be composed of multiple electrodes. In this embodiment, the surface electrode 41 has a first surface electrode 411 and a second surface electrode 412 disposed on the first surface electrode 411.

[0034] As described above, the back electrode 42 may not be in direct contact with the ceramic substrate 1. Therefore, in this embodiment, the chip resistor 10 includes a back protective layer 8 disposed on the second main surface 12, and the back electrode 42 is disposed on the second main surface 12 of the ceramic substrate 1 through the back protective layer 8. In this embodiment, the back electrode 42 is made of a Ni-based alloy. For example, the back electrode 42 can be formed from a thin-film conductor obtained by a thin-film process. Therefore, the thin-film conductor used to form the back electrode 42 contains a Ni-based alloy. Furthermore, when the chip resistor 10 includes the back protective layer 8, stress generated in the ceramic substrate 1 can be mitigated. For example, the back protective layer 8 can be formed of a resin composition and disposed on the second main surface 12 of the ceramic substrate 1. In this embodiment, the back protective layer 8 can be formed of an epoxy resin composition. The thickness of the back protective layer 8 is not particularly limited, and is smaller than the ceramic substrate 1, for example, around 30 μm.

[0035] An end-face electrode 43 is disposed on the side surface 13 of the ceramic substrate 1. The end-face electrode 43 is connected to a portion of the surface electrode 41 and a portion of the back electrode 42. Specifically, the end-face electrode 43 is disposed on the side surface 13 connected to the ends of the first surface electrode 411, the second surface electrode 412, and the back electrode 42. Furthermore, in this embodiment, the end-face electrode 43 is made of a Ni-based alloy. For example, the end-face electrode 43 can be formed from a thin-film conductor obtained by a thin-film process. For this purpose, the thin-film conductor used to form the end-face electrode 43 contains a Ni-based alloy.

[0036] In this embodiment, electrode 4 further includes intermediate electrodes 44. Each of the two intermediate electrodes 44 is coated with a surface electrode 41, a back electrode 42, and an end electrode 43, and is also partially coated with a protective film 6. The intermediate electrodes 44 are made of Ni plating. Furthermore, electrode 4 also includes external electrodes 45. Each of the two external electrodes 45 is coated with an intermediate electrode 44. The external electrodes 45 are made of Sn plating.

[0037] (Resistor)

[0038] The resistor 5 electrically connects the two electrodes 4. As described above, the resistor 5 is superimposed on the support surface 111 in the ceramic substrate 1. In this embodiment, the resistor 5 is disposed on the support surface 111 of the ceramic substrate 1, and then two surface electrodes 41 (see reference) are disposed thereon. Figure 1 In this embodiment, the resistor 5 is made of a NiCr-based alloy. For example, the resistor 5 can be formed from a thin-film conductor obtained by a thin-film process. Therefore, in this embodiment, the thin-film conductor used to form the resistor 5 contains a NiCr-based alloy. Furthermore, the resistor 5 is formed in the form of a thin film. In this embodiment, the thickness of the resistor 5 is, for example, 10 nm or more and 1000 nm or less.

[0039] (Protective film)

[0040] In this embodiment, the chip resistor 10 further includes a protective film 6 covering a portion of each of the two electrodes 4 and the resistive element 5. In this embodiment, a portion of the protective film 6 is covered by the second surface electrode 412, the intermediate electrode 44, and the external electrode 45. The protective film 6 can be formed, for example, from an epoxy resin composition containing epoxy resin, inorganic fillers, and pigments. Alternatively, the protective film 6 may not be in direct contact with the first main surface 11. In this embodiment, the chip resistor 10 also includes an inorganic protective film 7 located between the first main surface 11 and the protective film 6. The inorganic protective film 7 is composed of a metal oxide. The metal oxide may contain, for example, at least one selected from the group consisting of magnesium oxide (MgO), aluminum oxide (Al2O3), silicon dioxide (SiO2), nickel oxide (Ni3O4), and zirconium oxide (ZrO2).

[0041] (Manufacturing method)

[0042] This embodiment describes the manufacturing method of the chip resistor 10.

[0043] First, a thin film conductor containing a NiCr alloy is formed on the first main surface 11 of the ceramic substrate 1 by a thin film process such as sputtering. Then, the unwanted parts of the thin film conductor are removed by a photolithography process, thereby forming a resistor 5.

[0044] Next, a thin film conductor containing a Ni-based alloy is formed on the resistor 5 by a thin film process such as sputtering. Then, the unwanted parts of the thin film conductor are removed by a photolithography process, thereby forming two first surface electrodes 411.

[0045] Next, an inorganic protective film 7 is formed by sputtering metal oxide onto the resistive body 5, a portion of the first surface electrode 411 on the right side in the left-right direction, and a portion of the first surface electrode 411 on the left side in the left-right direction.

[0046] Then, an epoxy resin composition is coated on the inorganic protective film 7 and cured by heating to form a protective film 6.

[0047] Then, after coating the second main surface 12 of the ceramic substrate 1 with an epoxy resin composition, it is dried / cured to form a back protective layer 8.

[0048] Next, a thin-film conductor comprising a Ni-based alloy is formed on a portion of the back protective layer 8 using a thin-film process such as sputtering, thereby forming two back electrodes 42 overlapping the back protective layer 8. Each time the thin-film conductor is formed, a thin-film process is performed using a metal mask to form the thin-film conductor only at the desired location within the back protective layer 8. This formed thin-film conductor is then used as the back electrode 42.

[0049] Then, a thin-film conductor comprising a Ni-based alloy is formed by a thin-film process such as sputtering to cover a portion of the first surface electrode 411 and a portion of the protective film 6, thereby forming two second surface electrodes 412. Each time the thin-film conductor is formed, a thin-film process is performed using a metal mask to form the thin-film conductor only at the desired location within the first surface electrode 411 and the protective film 6. This formed thin-film conductor is then used as the second surface electrode 412.

[0050] Furthermore, two end-face electrodes 43 are formed by forming thin-film conductors containing Ni-based alloys on each of the two side surfaces 13 of the ceramic substrate 1 using the same steps as forming the back electrode 42. Additionally, when the surface electrode 41 and the back electrode 42 are formed using the aforementioned thin-film process, thin-film conductors are sometimes formed on the side surfaces 13. Therefore, the end-face electrodes 43 may sometimes cover the thin-film conductors formed during the formation of the surface electrode 41 and the back electrode 42.

[0051] Then, two intermediate electrodes 44 are formed by Ni plating on the chip resistor 10. After that, two external electrodes 45 are formed by Sn plating on the chip resistor 10.

[0052] The chip resistor 10 according to the first embodiment can be manufactured by following these steps. Furthermore, the above method is only one example of the method for manufacturing the chip resistor 10 according to this embodiment; suitable methods can be employed.

[0053] 2.2 Second Implementation Method

[0054] This invention describes the chip resistor 10 according to the second embodiment of the present disclosure. Figure 2 This is a cross-sectional view of the chip resistor 10 according to the second embodiment of this disclosure. Furthermore, descriptions similar to those in the first embodiment are sometimes omitted.

[0055] (Ceramic substrate)

[0056] The ceramic substrate 1 can be the same as that used in the first embodiment. In addition, the shape and thickness of the ceramic substrate 1 can be the same as those of the ceramic substrate 1 in the first embodiment.

[0057] (electrode)

[0058] In this embodiment, similar to the first embodiment, each of the two electrodes 4 has a surface electrode 41, a back electrode 42, and an end electrode 43. The surface electrode 41 is disposed on the first main surface 11 of the ceramic substrate 1 and is electrically connected to the resistor 5. The back electrode 42 is disposed on the second main surface 12 of the ceramic substrate 1. The end electrode 43 electrically connects the surface electrode 41 and the back electrode 42. Similar to the first embodiment, the end electrode 43 is disposed on the side surface 13 of the ceramic substrate 1 and is in contact with both the surface electrode 41 and the back electrode 42. More specifically, in this embodiment, the end electrode 43 covers a portion of the second surface electrode 412 from the top and a portion of the back electrode 42 from the bottom (see reference). Figure 2 ).

[0059] In this embodiment and the first embodiment, the materials constituting the electrodes differ. Specifically, in this embodiment, the first surface electrode 411 is formed of a conductive paste containing Au. Furthermore, similar to the first embodiment, the surface electrode 41 has a first surface electrode 411 and a second surface electrode 412 disposed on the first surface electrode 411. However, unlike the first embodiment, the material constituting the second surface electrode 412 is different from the material constituting the first surface electrode 411. Specifically, the second surface electrode 412 is formed of a conductive paste containing Ag and resin. Furthermore, in this embodiment, similar to the second surface electrode 412, both the back electrode 42 and the end electrode 43 are formed of a conductive paste containing Ag and resin.

[0060] Furthermore, in this embodiment, the chip resistor 10 does not have a back protective layer 8, which differs from the first embodiment. That is, the back electrode 42 is directly grounded to the second main surface 12 of the ceramic substrate 1.

[0061] Similar to the first embodiment, electrode 4 also includes an intermediate electrode 44 and an outer electrode 45. Each of the two intermediate electrodes 44 is coated with a surface electrode 41, a back electrode 42, and an end electrode 43, and is also partially coated with a protective film 6. The intermediate electrode 44 is Ni-plated. Each of the two outer electrodes 45 is a coating of the intermediate electrode 44. The outer electrodes 45 are Sn-plated.

[0062] (Resistor)

[0063] In the first embodiment, a resistor 5 is disposed on the support surface 111 of the ceramic substrate 1, and then two surface electrodes 41 are disposed thereon. In contrast, in this embodiment, there is no resistor 5 between the first surface electrode 411 and the ceramic substrate 1, and the first surface electrode 411 is formed on the ceramic substrate 1, with the resistor 5 forming a portion thereon.

[0064] Similar to the first embodiment, the resistor 5 can be formed from a thin-film conductor obtained by a thin-film process and is made of a NiCr-based alloy. Furthermore, similar to the first embodiment, the resistor 5 is formed in the form of a thin film. In this embodiment, the thickness of the resistor 5 can be the same as in the first embodiment, for example, 10 nm or more and 1000 nm or less.

[0065] (Protective film)

[0066] Similar to the first embodiment, the chip resistor 10 also includes a protective film 6 covering a portion of each of the two electrodes 4 and the resistive element 5, which can be formed from an epoxy resin composition containing epoxy resin, inorganic fillers, and pigments. In the first embodiment, a portion of the protective film 6 is covered by the second surface electrode 412; in this embodiment, the protective film 6 covers a portion of the second surface electrode 412. Furthermore, in this embodiment, also similar to the first embodiment, a portion of the protective film 6 is covered by the intermediate electrode 44 and the outer electrode 45.

[0067] (Manufacturing method)

[0068] This embodiment describes the manufacturing method of the chip resistor 10.

[0069] First, a conductive paste containing Au is applied to the first main surface 11 of the ceramic substrate 1 by printing, and then fired at 850°C to form two first surface electrodes 411.

[0070] Next, a thin film conductor containing a NiCr alloy is formed on the support surface 111 of the ceramic substrate 1 by a thin film process such as sputtering. Then, the unwanted parts of the thin film conductor are removed by a photolithography process, thereby forming the resistor 5.

[0071] Next, an inorganic protective film 7 is formed by sputtering metal oxide over the resistive body 5.

[0072] Next, a conductive paste containing resin and Ag is coated onto the inorganic protective film 7. Then, it is cured by heating to form two second surface electrodes 412.

[0073] Next, an epoxy resin composition is coated onto the inorganic protective film 7 and a portion of the second surface electrode 412, and the epoxy resin composition is heated to cure it. This forms a protective film 6 covering the inorganic protective film 7 and a portion of the second surface electrode 412.

[0074] Next, following the same steps as forming the second surface electrode 412, a conductive paste containing resin and Ag is applied to the second main surface 12 of the ceramic substrate 1. Then, it is cured by heating to form two back electrode 42. Next, a conductive paste containing resin and Ag is applied to each of the two side surfaces 13 of the ceramic substrate 1. Then, it is cured by heating to form two end electrode 43.

[0075] Then, two intermediate electrodes 44 are formed by Ni plating on the chip resistor 10. After that, two external electrodes 45 are formed by Sn plating on the chip resistor 10.

[0076] Following these steps, the chip resistor 10 according to the second embodiment can be manufactured. Furthermore, the above method is merely one example of the method for manufacturing the chip resistor 10 according to this embodiment; suitable methods can be employed.

[0077] 2.3 Variations

[0078] The embodiments disclosed herein are not limited to the embodiments described above. Various modifications can be made to the design and other aspects to achieve the objectives of this disclosure. Hereinafter, variations of the above embodiments are given.

[0079] (Variation Example 1)

[0080] The substrate 2 is not limited to an alumina sintered substrate. That is, the ceramic particles (A) may contain, in addition to alumina particles (Al), aluminum nitride (AlN), zirconium oxide (ZrO2), and silicon nitride (Si3N). i4 At least one inorganic particle selected from the group consisting of aluminum nitride, zirconium oxide, and silicon nitride. Furthermore, in other words, the substrate 2 may be a sintered body containing, in addition to a sintered body of alumina particles (A1), at least one inorganic particle selected from the group consisting of aluminum nitride, zirconium oxide, and silicon nitride.

[0081] (Variation Example 2)

[0082] The support surface 111 can also be distributed in areas not covered by the covering material 3. For example, such as Figure 3In this configuration, the coating 3 can be filled between the tiny irregularities on the surface of the substrate 2, with a portion of the substrate 2 surface exposed. When the coating 3 is positioned between these tiny irregularities, a portion of the surface on the support surface 111 side of the substrate 2 can be exposed. This further improves the ESD resistance of the chip resistor 10. Furthermore, the proportion of the area of ​​the uncoated portion of the entire surface on the support surface 111 side of the substrate 2 is preferably 5% or more and 70% or less. If this proportion is 5% or more, the thermal conductivity in the ceramic substrate 1 can be improved. If this proportion is 70% or less, the smoothness of the support surface 111 of the ceramic substrate 1 can be sufficiently improved.

[0083] 3. Method

[0084] As is clear from the above embodiments, this disclosure includes the following methods. Hereinafter, the reference numerals are enclosed only for the purpose of clearly indicating their correspondence with the embodiments.

[0085] The chip resistor (10) according to the first aspect of this disclosure comprises: a ceramic substrate (1); two electrodes (4) disposed on the ceramic substrate (1); and a resistive element (5) electrically connecting the two electrodes (4). The ceramic substrate (1) has: a substrate (2) of a sintered body containing ceramic particles (A); and a coating (3) of a sintered body containing α-alumina particles (B). The coating (3) covers at least a portion of the surface of the substrate (2). The average particle size of the α-alumina particles (B) is smaller than the average particle size of the ceramic particles (A). The ceramic substrate (1) has a support surface (111), the surface of the substrate (2) on the support surface (111) side is covered by the coating (3), and the resistive element (5) is superimposed on the support surface (111).

[0086] According to the first method, a chip resistor (10) that can improve thermal conductivity and ESD resistance can be provided.

[0087] The second embodiment of the chip resistor (10) disclosed herein, based on the first embodiment, has a ceramic substrate (1) having: a first main surface (11); and a second main surface (12) on the side opposite to the first main surface (11). A support surface (111) is a part of the first main surface (11). Each of the two electrodes (4) has a surface electrode (41), a back electrode (42), and an end electrode (43). The surface electrode (41) is disposed on the first main surface (11) of the ceramic substrate (1) and is electrically connected to the resistor (5). The back electrode (42) is disposed on the second main surface (12) of the ceramic substrate (1). The end electrode (43) electrically connects the surface electrode (41) and the back electrode (42).

[0088] The chip resistor (10) of the third aspect of this disclosure, based on the first or second aspect, further includes a protective film (6) covering a portion of each of the two electrodes (4) and the resistive element (5).

[0089] The chip resistor (10) of the fourth aspect of this disclosure, based on the third aspect, further includes an inorganic protective film (7) between the resistive element (5) and the protective film (6).

[0090] The chip resistor (10) according to the fifth aspect of this disclosure, in addition to any of the second to fourth aspects, also has a back protective layer (8) disposed on the second main surface (12). The back electrode (42) is disposed on the second main surface (12) of the ceramic substrate (1) through the back protective layer (8).

[0091] Explanation of reference numerals in the attached figures

[0092] 1. Ceramic substrate

[0093] 2. Substrate

[0094] 3. Covering material

[0095] 4 electrodes

[0096] 5. Resistor

[0097] 6. Protective film

[0098] 7 Inorganic protective film

[0099] 8. Back protective layer

[0100] 10 Surface Mount Resistors

[0101] 11 Main side 1

[0102] 12 2nd main side

[0103] 13 Side View

[0104] 41 Surface Electrode

[0105] 42 Back electrode

[0106] 43 End face electrode

[0107] 111 Support surface

[0108] 411 First surface electrode

[0109] 412 Second surface electrode.

Claims

1. A surface mount resistor, comprising: Ceramic substrate; Two electrodes disposed on the ceramic substrate; and A resistor that electrically connects the two electrodes. The ceramic substrate has the following characteristics: A substrate containing ceramic particles (A) in a sintered body; and The coating of a sintered body containing α-alumina particles (B), The coating covers at least a portion of the surface of the substrate. The average particle size of the α-alumina particles (B) is smaller than the average particle size of the ceramic particles (A). The ceramic substrate has a support surface, the support surface side of the substrate is covered by the coating, and the resistor is superimposed on the support surface.

2. The surface mount resistor according to claim 1, wherein, The ceramic substrate has the following characteristics: First main page; and The second principal surface is on the side opposite to the first principal surface. The supporting surface is a part of the first main surface. Each of the two electrodes has a surface electrode, a back electrode, and an end electrode. The surface electrode is disposed on the first main surface of the ceramic substrate and is electrically connected to the resistive element. The back electrode is disposed on the second main surface of the ceramic substrate. The end face electrode electrically connects the surface electrode and the back electrode.

3. The surface mount resistor according to claim 2, wherein, The chip resistor also features: A protective film covering a portion of each of the two electrodes and the resistor.

4. The surface mount resistor according to claim 3, wherein, The chip resistor also features: An inorganic protective film located between the resistive element and the protective film.

5. The surface mount resistor according to claim 2, wherein, The chip resistor also features: The back protective layer is configured on the second main surface. The back electrode is disposed on the second main surface of the ceramic substrate through the back protective layer.

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