Semiconductor light emitting element and method for manufacturing semiconductor light emitting element

Abstract

A semiconductor light emitting element (10) includes a semiconductor stack (10S) and a contact electrode (40) in contact with the semiconductor stack (10S) and containing Ag as a main component, the contact electrode (40) has one or more recesses (D1) formed on a surface of the contact electrode (40), and an average distance between recesses defined by averaging distances between adjacent two of the one or more recesses (D1) on a straight line extending in a direction of the surface of the contact electrode (40) is 0.11 μm or more.

Description

Technical Field

[0001] This invention relates to semiconductor light-emitting elements and methods for manufacturing semiconductor light-emitting elements. Background Technology

[0002] Previously, in semiconductor light-emitting elements such as light-emitting diodes, it was known that a technique was used to use an electrode made of Ag as an electrode that contacts the semiconductor layer (see, for example, Patent Document 1).

[0003] Existing technical documents Patent documents Patent Document 1: International Publication No. 2023 / 153330 Summary of the Invention

[0004] The problem that the invention aims to solve However, due to the low cohesive energy of Ag, it is impossible to suppress Ag migration during heating in Ag electrodes formed using conventional electrode formation techniques in semiconductor light-emitting elements, such as electron beam evaporation and RF (Radio Frequency) sputtering. This Ag migration leads to deviations in the optical and electrical properties of the electrode.

[0005] This disclosure is intended to solve such problems and aims to provide semiconductor light-emitting elements, etc., that can suppress the migration of Ag during heating of electrodes whose main component is Ag.

[0006] Methods for solving problems To address the aforementioned issues, one embodiment of the semiconductor light-emitting element disclosed herein comprises: a semiconductor laminate; and a contact electrode in contact with the semiconductor laminate, having Ag as the main component, wherein the contact electrode has one or more recesses formed on its surface, and the average distance between the recesses, defined by the average distance between two adjacent recesses in the one or more recesses extending along the direction of the surface of the contact electrode, is 0.11 μm or more.

[0007] To address the aforementioned issues, another embodiment of the semiconductor light-emitting element disclosed herein comprises: a semiconductor stack; and a contact electrode in contact with the semiconductor stack, having Ag as the main component, wherein the contact electrode has one or more recesses formed on its surface, the one or more recesses comprising a plurality of recesses, which extend in a curved shape and are separated from each other when viewed from above the surface of the contact electrode.

[0008] To address the aforementioned issues, one embodiment of the method for manufacturing a semiconductor light-emitting element according to the present invention includes the following steps: a stacking step to form a semiconductor stack; a contact electrode forming step to form a contact electrode in contact with the semiconductor stack and having Ag as the main component; and a heat treatment step to heat the contact electrode, wherein the contact electrode is formed by ECR sputtering in the contact electrode forming step.

[0009] Invention Effects According to this disclosure, a semiconductor light-emitting element, etc., can be provided that can suppress the migration of Ag during heating of an electrode with Ag as the main component. Attached Figure Description

[0010] Figure 1 This is a schematic cross-sectional view showing the overall structure of the semiconductor light-emitting element according to Embodiment 1.

[0011] Figure 2 This is a schematic cross-sectional view illustrating the lamination process of the manufacturing method of the semiconductor light-emitting element according to Embodiment 1.

[0012] Figure 3 This is a schematic cross-sectional view showing the processing steps of the manufacturing method of the semiconductor light-emitting element according to Embodiment 1.

[0013] Figure 4 This is a schematic cross-sectional view illustrating the insulating film formation process in the manufacturing method of the semiconductor light-emitting element according to Embodiment 1.

[0014] Figure 5 This is a schematic cross-sectional view showing the opening formation process in the manufacturing method of the semiconductor light-emitting element according to Embodiment 1.

[0015] Figure 6 This is a schematic cross-sectional view illustrating the contact electrode formation process in the manufacturing method of the semiconductor light-emitting element according to Embodiment 1.

[0016] Figure 7 This is a schematic cross-sectional view showing the heat treatment process of the manufacturing method of the semiconductor light-emitting element according to Embodiment 1.

[0017] Figure 8 This is a schematic cross-sectional view showing the p-side electrode formation process of the manufacturing method of the semiconductor light-emitting element according to Embodiment 1.

[0018] Figure 9 This is a schematic cross-sectional view showing the substrate grinding process of the manufacturing method of the semiconductor light-emitting element according to Embodiment 1.

[0019] Figure 10 This is a diagram illustrating the general structure of an ECR sputtering apparatus.

[0020] Figure 11 These are scanning electron microscope (SEM) images showing the surface structure of the contact electrode of the comparative example before and after heat treatment.

[0021] Figure 12 This is an SEM image showing the surface structure of the contact electrode before and after heat treatment in Embodiment 1.

[0022] Figure 13 This is an SEM image showing the cross-sectional structure of the contact electrode in Embodiment 1.

[0023] Figure 14 It is a graph showing the current-voltage characteristics of the contact electrode and the semiconductor laminate before and after the heat treatment of Embodiment 1.

[0024] Figure 15 It is a graph showing the characteristics of the refractive index relative to wavelength of each contact electrode before and after heat treatment in Embodiment 1 and the comparative example.

[0025] Figure 16 This is a schematic cross-sectional view showing the overall structure of the semiconductor light-emitting element in Modified Example 1 of the embodiment.

[0026] Figure 17 This is a schematic cross-sectional view showing the overall structure of the semiconductor light-emitting element in Modified Example 2 of the embodiment.

[0027] Figure 18 This is a schematic cross-sectional view showing the overall structure of the semiconductor light-emitting element in Modified Example 3 of the embodiment.

[0028] Figure 19 This is a schematic cross-sectional view showing the structure of the contact electrode of the semiconductor light-emitting element in Modification 3 of Embodiment 1.

[0029] Figure 20 It is a graph showing the current-voltage characteristics of the contact electrode and the semiconductor laminate before and after heat treatment in Modification 2 of Embodiment 1.

[0030] Figure 21 It is a graph showing the current-voltage characteristics of the contact electrode and the semiconductor laminate before and after heat treatment in Modification 3 of Embodiment 1.

[0031] Figure 22 These are SEM images of the surfaces and images of the recesses of each contact electrode in Embodiment 1 and Variations 1 to 3.

[0032] Figure 23 This is a schematic cross-sectional view showing the overall structure of the semiconductor light-emitting element in Variation 4 of Embodiment 1.

[0033] Figure 24This is a SEM image of the surface of the contact electrode in Modification 4 of Embodiment 1.

[0034] Figure 25 These are SEM images of the surfaces and recesses of the contact electrodes in Embodiment 1 and Modification 4.

[0035] Figure 26 This is a diagram used to illustrate the method for measuring the average distance between depressions.

[0036] Figure 27 This is a diagram showing the measurement location in the SEM image of the contact electrode of Modified Example 4 of Embodiment 1.

[0037] Figure 28 This is a graph showing the measurement results of the average distance between the recesses of the contact electrodes in Modified Example 4 of Embodiment 1.

[0038] Figure 29 This is a diagram showing the measurement location in the SEM image of the contact electrode of Embodiment 1.

[0039] Figure 30 This is a graph showing the measurement results of the average distance between the recesses of the contact electrodes in Embodiment 1.

[0040] Figure 31 This is a diagram showing the measurement location in the SEM image of the contact electrode after heat treatment in Modification 4 of Embodiment 1.

[0041] Figure 32 This is a graph showing the measurement results of the average distance between the recesses of the contact electrodes after heat treatment in Modification Example 4 of Embodiment 1.

[0042] Figure 33 This is a schematic cross-sectional view showing the overall structure of the semiconductor light-emitting element in Embodiment 2.

[0043] Figure 34 This is a schematic cross-sectional view showing the structure of the contact electrode of the semiconductor light-emitting element in Embodiment 2.

[0044] Figure 35 This is a schematic cross-sectional view illustrating the cleaning process of the manufacturing method of the semiconductor light-emitting element according to Embodiment 2. Detailed Implementation

[0045] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. Furthermore, the embodiments described below represent only one specific example of the present disclosure. Therefore, the numerical values, shapes, materials, constituent elements, and the arrangement and connection methods of the constituent elements shown in the following embodiments are merely examples and do not limit the scope of the present disclosure.

[0046] Furthermore, these figures are schematic diagrams and may not be strictly representational. Therefore, the scales and other parameters may not be consistent across different figures. Additionally, substantially identical structures are labeled with the same reference numerals across different figures, and repetitive descriptions are omitted or simplified.

[0047] Furthermore, in this specification, the terms "above" and "below" do not refer to absolute vertical above and below in spatial identification, but are used as terms defined by relative positional relationships based on the stacking order in a stacked structure. Additionally, the terms "above" and "below" apply not only to situations where two constituent elements are arranged apart from each other and other constituent elements exist between them, but also to situations where two constituent elements are arranged in contact with each other.

[0048] (Implementation Method 1) The semiconductor light-emitting element of Embodiment 1 and its manufacturing method will be described.

[0049] [1-1. Overall Structure of Semiconductor Light-Emitting Element] First, use Figure 1 The overall structure of the semiconductor light-emitting element in this embodiment will be described. Figure 1 This is a schematic cross-sectional view showing the overall structure of the semiconductor light-emitting element 10 in this embodiment.

[0050] The semiconductor light-emitting element 10 is a semiconductor element that emits light. In this embodiment, the semiconductor light-emitting element 10 is a semiconductor laser element that emits laser light. Figure 1 A cross-section perpendicular to the propagation direction of the laser emitted by the semiconductor light-emitting element 10 is shown. The wavelength of the light (laser) emitted by the semiconductor light-emitting element 10 is not particularly limited. In this embodiment, the semiconductor light-emitting element 10 emits, for example, blue light with a peak wavelength in the 445 nm band.

[0051] like Figure 1 As shown, the semiconductor light-emitting element 10 includes a semiconductor laminate 10S and a contact electrode 40. In this embodiment, the semiconductor light-emitting element 10 also includes a substrate 21, an insulating film 30, a barrier metal layer 50, a pad electrode 60, and an n-side electrode 70.

[0052] The substrate 21 is a plate-shaped component that serves as the base for the semiconductor light-emitting element 10. In this embodiment, the substrate 21 is an n-type GaN substrate.

[0053] The semiconductor stack 10S is a stack including semiconductor layers. The semiconductor stack 10S has a plurality of semiconductor layers stacked in a stacking direction. In this embodiment, the semiconductor stack 10S includes a nitride semiconductor layer. The semiconductor stack 10S has an n-side semiconductor layer 22, an active layer 23, and a p-side semiconductor layer 24. Figure 1 The semiconductor stack 10S shown has a component separation groove 10T formed at its horizontal end. In this embodiment, the component separation groove 10T extends from the upper surface of the semiconductor stack 10S to the interior of the n-side semiconductor layer 22.

[0054] The n-side semiconductor layer 22 is an example of a first semiconductor layer of a first conductivity type disposed above the substrate 21 and below the active layer 23. In this embodiment, the first conductivity type is n-type. The n-side semiconductor layer 22 comprises a nitride semiconductor. Additionally, the n-side semiconductor layer 22 comprises an n-type cladding layer with a lower refractive index than the active layer 23. The n-side semiconductor layer 22 is, for example, an n-type AlGaN layer. Furthermore, the n-side semiconductor layer 22 may comprise layers other than the n-type cladding layer. The n-side semiconductor layer 22 may, for example, comprise a buffer layer, a photoconductive layer, etc.

[0055] The active layer 23 is a light-emitting layer disposed above the n-side semiconductor layer 22. In this embodiment, the active layer 23 comprises a nitride semiconductor and has a quantum well structure. The active layer 23 may have a single quantum well or multiple quantum wells. In this embodiment, the active layer 23 has multiple barrier layers and multiple well layers made of InGaN.

[0056] The p-side semiconductor layer 24 is disposed above the active layer 23 and is an example of a second semiconductor layer of a second conductivity type different from the first conductivity type. In this embodiment, the second conductivity type is p-type. The p-side semiconductor layer 24 comprises a nitride semiconductor. In this embodiment, the p-side semiconductor layer 24 comprises a p-type cladding layer with a lower refractive index than the active layer 23. The p-side semiconductor layer 24 is, for example, a p-type AlGaN layer. Furthermore, the p-side semiconductor layer 24 may comprise layers other than the p-type cladding layer. The p-side semiconductor layer 24 may, for example, comprise a photoconductive layer, an electron blocking layer, a contact layer, etc. In addition, the p-side semiconductor layer 24 may have a superlattice structure.

[0057] In this embodiment, the p-side semiconductor layer 24 has a ridge 24R extending along the laser propagation direction. The ridge 24R is a portion of the p-side semiconductor layer 24 that protrudes away from the substrate 21. In this embodiment, two grooves 24T are formed in the p-side semiconductor layer 24, arranged along the ridge 24R and extending along the laser propagation direction. In this embodiment, the ridge width (i.e., Figure 1 The horizontal dimension of the ridge 24R is approximately 45 μm. Furthermore, protrusions 24P, composed of p-side semiconductor layers, are formed on both sides of the groove 24T. The protrusions 24P are portions of the p-side semiconductor layer 24 that protrude away from the substrate 21 and extend along the laser propagation direction.

[0058] The insulating film 30 is a layer disposed above the p-side semiconductor layer 24 (i.e., the second semiconductor layer). In this embodiment, the insulating film 30 is disposed between the semiconductor stack 10S and the barrier metal layer 50 and is an electrically insulating layer. The insulating film 30 has an opening 30a disposed at a position corresponding to the upper surface 24Ru of the ridge 24R. In this embodiment, the insulating film 30 is disposed in the area of ​​the upper surface of the p-side semiconductor layer 24 other than the central portion of the upper surface 24Ru of the ridge 24R. Specifically, the insulating film 30 continuously covers a portion of the upper surface 24Ru of the ridge 24R, the side surface of the ridge 24R, the bottom surface of the groove 24T, the side surface of the protrusion 24P, the upper surface of the protrusion 24P, and the element separation groove 10T (i.e., the side surface of the p-side semiconductor layer 24). Figure 1 The end face at the horizontal end of the active layer 23, and a portion of the side surface of the n-side semiconductor layer 22. This ensures electrical insulation between the barrier metal layer 50 disposed on the insulating film 30 and the pad electrode 60 disposed above the barrier metal layer 50, and the area of ​​the p-side semiconductor layer 24 other than the area corresponding to the opening 30a. Therefore, current flowing from the barrier metal layer 50 and the pad electrode 60 through the insulating film 30 to the vicinity of the side surface of the ridge 24R can be suppressed.

[0059] The material used to form the insulating film 30 is not particularly limited as long as it is an insulating material. In this embodiment, the insulating film 30 is a silicon oxide film with a thickness of 300 nm.

[0060] The contact electrode 40 is in contact with the semiconductor stack 10S and is an electrode with Ag as the main component. The Ag content in the contact electrode 40 is, for example, 90 at% (atomic percentage) or more. In this embodiment, the contact electrode 40 is disposed above and in contact with the p-side semiconductor layer 24. The contact electrode 40 is disposed on the upper surface 24Ru of the ridge 24R of the p-side semiconductor layer 24. The contact electrode 40 is disposed at the opening 30a of the insulating film 30. The contact electrode 40 is separated from the insulating film 30.

[0061] The contact electrode 40 may contain at least one of Cu, Pd, Ir, Mg, Ni, Sn, Ti, Pt, Cr, Au, Ga, O, Ar, and Si. The total concentration of these impurities is less than 10 at%. The total concentration of these impurities may be less than 5 at% or less, or less than 1 at%. In this embodiment, the contact electrode 40 is an Ag film with an average film thickness of about 60 nm. The contact electrode 40 is formed by ECR (Electron Cyclotron Resonance) sputtering. The detailed structure of the contact electrode 40 in this embodiment will be described later.

[0062] The barrier metal layer 50 is a metal layer disposed above the contact electrode 40. The barrier metal layer 50 has the function of suppressing the diffusion of impurities into the contact electrode 40. Examples of impurities include oxygen atoms. In addition, for example, when the semiconductor light-emitting element 10 is mounted with the junction facing down (flip chip) (i.e., when the pad electrode 60 is bonded to the mounting substrate, etc.), the Sn element contained in the solder used as the bonding material may become an impurity that diffuses into the contact electrode 40.

[0063] The barrier metal layer 50 covers the entire upper surface of the contact electrode 40 and continuously extends from the upper surface of the contact electrode 40 to the upper surface of the insulating film 30. In this embodiment, the barrier metal layer 50 continuously covers from the upper surface of the contact electrode 40 to the upper surface of the insulating film 30 disposed outside the ridge 24R. More specifically, as Figure 1 As shown, the barrier metal layer 50 continuously covers the upper surface of the insulating film 30, which is continuously disposed above the left protrusion 24P, above a portion of the upper surface of the left groove 24T and ridge 24R, the upper surface 24Ru of the ridge 24R located between the left insulating film 30 and the contact electrode 40, the upper surface of the contact electrode 40, the upper surface 24Ru of the ridge 24R located between the contact electrode 40 and the right insulating film 30, and the upper surface of the insulating film 30, which is continuously disposed above a portion of the upper surface 24Ru of the ridge 24R, above the right groove 24T and the right protrusion 24P.

[0064] Furthermore, the barrier metal layer 50 also functions to improve the adhesion between the pad electrode 60 and the insulating film 30. The barrier metal layer 50 is formed, for example, of Ti or Cr. When the barrier metal layer 50 contains Ti or Cr and the insulating film 30 is an oxide, the adhesion between the insulating film 30 and the barrier metal layer 50 can be further improved. This is because, when the insulating film 30 is an oxide, if the barrier metal layer 50 is a material that easily forms oxides, the insulating film 30 and the barrier metal layer 50 will bond strongly. In this embodiment, the barrier metal layer 50 is a Ti layer with a thickness of 100 nm. For example, the thickness of the barrier metal layer 50 can be 200 nm or less. Additionally, to improve the barrier properties of the barrier metal layer 50, it can also be formed of Pt, TiW, Mo, etc.

[0065] In this embodiment, the average film thickness of the contact electrode 40 is thinner than the average film thickness of the barrier metal layer 50.

[0066] The pad electrode 60 is a conductive layer disposed above the insulating film 30 and the contact electrode 40 and electrically connected to the contact electrode 40. Here, the same mask used to form the barrier metal layer 50 is used to form the pad electrode 60 on the upper surface of the barrier metal layer 50 with the same planar shape as the barrier metal layer 50. The pad electrode 60 contains Au. In this embodiment, the pad electrode 60 is an Au layer with a film thickness of approximately 2000 nm.

[0067] The n-side electrode 70 is a conductive layer disposed on the lower surface of the substrate 21 (i.e., the main surface of the substrate 21 opposite to the main surface of the semiconductor stack 10S). The n-side electrode 70 can be, for example, a single-layer film or a multilayer film formed from at least one of Cr, Ti, Ni, Pd, and Pt. In this embodiment, the n-side electrode 70 has a Ti layer with a thickness of 10 nm that is in contact with the substrate 21, a Pt layer with a thickness of 35 nm that is in contact with the Ti layer, and an Au layer with a thickness of 300 nm that is in contact with the Pt layer.

[0068] [1-2. Manufacturing method of semiconductor light-emitting element] use Figures 2-9 The manufacturing method of the semiconductor light-emitting element 10 of this embodiment will be described. Figures 2-9 This is a schematic cross-sectional view illustrating each step of the manufacturing method of the semiconductor light-emitting element 10 according to this embodiment. Figures 2-9 In, with Figure 1 Similarly, a cross section perpendicular to the propagation direction of the laser emitted by the semiconductor light-emitting element 10 is shown.

[0069] First, such as Figure 2 As shown, a semiconductor stack 10S is generated (stack-up process). In this embodiment, during the stack-up process, an n-side semiconductor layer 22 is formed above a substrate 21 as a first semiconductor layer of a first conductivity type, an active layer 23 is formed above the n-side semiconductor layer 22, and a p-side semiconductor layer 24 is formed above the active layer 23 as a second semiconductor layer. More specifically, firstly, a substrate 21 is prepared. In this embodiment, a wafer (GaN substrate) made of n-type GaN is prepared as the substrate 21. Next, on the substrate 21, the n-side semiconductor layer 22, the active layer 23, and the p-side semiconductor layer 24 are sequentially stacked using an epitaxial growth technique based on MOCVD (Metal Organic Chemical Vapor Deposition). Thus, a semiconductor stack 10S can be formed.

[0070] Next, as Figure 3 As shown, a ridge 24R, a protrusion 24P, a groove 24T, and an element separation groove 10T for monolithically processing the semiconductor light-emitting element 10 are formed (processing step).

[0071] Component separation tank 10T is formed in conjunction with Figure 3 The positions of the two ends of the semiconductor light-emitting element 10 in the horizontal direction are shown. In this embodiment, the element separation groove 10T extends from the upper surface of the semiconductor stack 10S to the interior of the n-side semiconductor layer 22.

[0072] In this embodiment, the ridge 24R and the protrusion 24P are formed by forming two grooves 24T. The two grooves 24T are formed on the p-side semiconductor layer 24 and do not reach the active layer 23.

[0073] The method for forming the component separation groove 10T, ridge 24R, protrusion 24P, and groove 24T is not particularly limited. The component separation groove 10T, ridge 24R, protrusion 24P, and groove 24T can be formed, for example, by photolithography and etching, or by laser processing.

[0074] Next, as Figure 4 As shown, an insulating film 30 is formed above the p-side semiconductor layer 24 (insulating film formation process). In this embodiment, a silicon oxide film is formed as the insulating film 30 using a reduced-pressure CVD method or the like. The silicon oxide film can also be formed using, for example, an atmospheric pressure CVD method.

[0075] Next, as Figure 5 As shown, an opening 30a is formed at a position corresponding to the upper surface 24Ru of the ridge 24R (opening formation process). Specifically, a photoresist 80 is formed in the area of ​​the insulating film 30 other than the area corresponding to the opening 30a, and the area in the insulating film 30 corresponding to the opening 30a is removed by etching. The etching method is not particularly limited. Dry etching or wet etching can be used as the etching process.

[0076] Next, a contact electrode 40 with Ag as the main component is formed by contacting the semiconductor stack 10S (contact electrode formation process). In this embodiment, a contact electrode 40 is formed at the opening 30a of the insulating film 30, which is in contact with the p-side semiconductor layer 24. An Ag layer is formed as the contact electrode 40. After the contact electrode 40 is formed, as follows... Figure 6 As shown, the resist is removed. In this embodiment, the contact electrode 40 is formed by ECR sputtering in the contact electrode formation process.

[0077] use Figure 10 The method for forming the contact electrode 40 based on ECR sputtering is described. Figure 10 This is a diagram illustrating the general structure of an ECR sputtering apparatus. (For example...) Figure 10As shown, the ECR sputtering apparatus includes a plasma chamber and a film deposition chamber. By supplying microwaves to the plasma chamber, the gas inside the plasma chamber is ionized, thereby generating plasma within the plasma chamber. The generated plasma is sealed within the plasma chamber by a magnetic field generated by a magnetic coil. A target containing a material for film deposition and a substrate 21 on which a semiconductor laminate 10S is stacked are arranged in the film deposition chamber. In this embodiment, the target contains Ag. By applying RF to the target, an electric field is formed around the target. This attracts ions from the plasma chamber to the target, where they collide. Ag particles emitted from the target, forming part of the target, are then deposited on the substrate 21. This forms a contact electrode 40 primarily composed of Ag. ECR sputtering enables the formation of a contact electrode 40 with good particle size uniformity. Furthermore, ECR sputtering allows the plasma chamber containing the plasma to be separated from the film deposition chamber, thus reducing physical damage to the semiconductor laminate 10S caused by plasma collisions. In this embodiment, the film deposition rate of the contact electrode 40 based on ECR sputtering is 10 nm / min or less.

[0078] Next, as Figure 7 As shown, the semiconductor stack 10S and contact electrode 40 are heated in an atmosphere containing O2 (heat treatment process). In this embodiment, the substrate 21, semiconductor stack 10S, insulating film 30, and contact electrode 40 are heated at 350°C for 1 minute in an atmospheric atmosphere using a hot plate. That is, atmospheric annealing of the contact electrode 40 is performed. This promotes interdiffusion near the interface between the semiconductor stack 10S and the contact electrode 40, thereby reducing the contact resistance between the semiconductor stack 10S and the contact electrode 40. Alternatively, the heating atmosphere can be a gas atmosphere containing O, such as O3, N2O, CO, or CO2.

[0079] Next, as Figure 8 As shown, a barrier metal layer 50 and a pad electrode 60 are formed above the contact electrode 40 (p-side electrode formation process). In this embodiment, the barrier metal layer 50 is continuously formed from the contact electrode 40 to the insulating film 30, and the pad electrode 60 is formed on the barrier metal layer 50.

[0080] Next, as Figure 9 As shown, the thickness of substrate 21 is reduced by grinding and etching the lower surface of substrate 21 (substrate grinding process). Next, as... Figure 1 As shown, an n-side electrode 70 is formed on the lower surface of the substrate 21 (n-side electrode formation process). Specifically, the n-side electrode 70, on which a Ti film, a Pt film, and an Au film are sequentially formed, is formed using photolithography and vapor deposition.

[0081] The semiconductor light-emitting element 10 of this embodiment can be manufactured using the manufacturing method described above.

[0082] [1-3. Effects, etc.] The effects of the semiconductor light-emitting element 10 in this embodiment will be explained.

[0083] First, the features of the contact electrode 40 of this embodiment are compared with those of the contact electrode of the comparative example, while using... Figures 11-15 Please provide an explanation. Figure 11 These are scanning electron microscope (SEM) images showing the surface structure of the contact electrode of the comparative example before and after heat treatment. Figure 12 This is an SEM image showing the surface structure of the contact electrode 40 before and after heat treatment in this embodiment. Figure 11 and Figure 12 The SEM image shown (a) represents the surface of the contact electrode before heat treatment, and the SEM image (b) represents the surface of the contact electrode after heat treatment. Figure 13 This is an SEM image showing the cross-sectional structure of the contact electrode 40 in this embodiment. Figure 13 The middle shows with Figure 1 Contact electrode 40 in the same cross section. Figure 14 This is a graph showing the current-voltage characteristics of the contact electrode 40 and the semiconductor laminate 10S before and after heat treatment in this embodiment. Figure 14 The horizontal axis represents the current flowing through the contact electrode 40, and the vertical axis represents the voltage applied between the contact electrode 40 and the semiconductor stack 10S. Figure 15 This is a graph showing the refractive index characteristics of each contact electrode before and after heat treatment relative to wavelength in this embodiment and comparative examples.

[0084] First, the contact electrode of the comparative example will be described. The contact electrode of the comparative example is the same as the contact electrode 40 of this embodiment, which is an electrode with Ag as the main component. However, it differs from the contact electrode 40 of this embodiment in that it is formed by RF sputtering instead of ECR ​​sputtering.

[0085] like Figure 11 As shown, grain boundaries are visible in the contact electrode of the comparative example. In a continuous contact electrode, there are no ends at the grain boundaries. That is, the grain boundaries are completely connected. Furthermore, in the contact electrode of the comparative example, as... Figure 11 As shown in SEM images (a) and (b), heat treatment (i.e., atmospheric annealing) induces migration, which in turn leads to agglomeration (i.e., grain growth), forming voids V1. Accompanying this, as... Figure 15As shown, in the comparative example contact electrode, the refractive index changes significantly before and after heat treatment. Therefore, in the comparative example contact electrode, due to migration caused by heat treatment, the stability of the properties relative to heat treatment cannot be guaranteed. Furthermore, for example, as... Figure 1 When the contact electrode 40 is formed on the upper surface 24Ru of the narrow ridge 24R as shown, the narrowing of the contact electrode 40 due to migration becomes significant. Furthermore, such migration can occur not only during the fabrication of the semiconductor light-emitting element 10, but also due to heat applied to the semiconductor light-emitting element 10 when mounting it onto a mounting substrate, or heat generated during operation of the semiconductor light-emitting element 10. In addition, the contact electrode in the comparative example is formed by RF sputtering. In an RF sputtering apparatus, the plasma chamber and the film deposition chamber are not separated; therefore, during RF sputtering, it is impossible to suppress physical damage caused by collisions between the plasma and the semiconductor laminate 10S during contact electrode formation.

[0086] In contrast, such as Figure 12 and Figure 13 As shown, the contact electrode 40 of this embodiment has one or more recesses D1 formed on its surface. Here, the recess D1 is a steep recess that is deeper than the grain boundary. For example, the recess D1 is a recess with a depth of 30 nm or more. Figure 12 As shown in SEM image (a), when viewed from above, the surface of the contact electrode 40 has a brain-like appearance, with multiple recesses D1 extending in a curved shape and separated from each other. These multiple recesses D1 are examples of curved recesses with a curved shape when viewed from above on the surface of the contact electrode 40. Figure 12 As shown, there are also cases where a single recess D1 branches into two or more curved sections. Furthermore, a single or multiple recesses D1 may not necessarily include multiple recesses D1. That is, the number of single or multiple recesses D1 can also be one.

[0087] like Figure 12 As shown in SEM images (a) and (b), the contact electrode 40 of this embodiment does not exhibit significant changes in appearance before and after heat treatment (i.e., atmospheric annealing). That is, migration is suppressed. Thus, migration is suppressed, and on the other hand, as... Figure 14 As shown, heat treatment can significantly reduce the contact resistance of the contact electrode 40. In this embodiment, the contact between the contact electrode 40 and the semiconductor stack 10S is a Schottky contact before heat treatment, but changes to an ohmic contact after heat treatment. Furthermore, as... Figure 15As shown, in the contact electrode 40 of this embodiment, since migration can be suppressed, the change in properties (refractive index) before and after heat treatment can be suppressed. In addition, as described above, the contact electrode 40 of this embodiment is formed by ECR sputtering, thus reducing the damage of plasma to the semiconductor stack 10S during formation.

[0088] Next, the structure of the contact electrode 40 in this embodiment will be compared with the structure of the contact electrode in the modified example, while using... Figures 16-25 Please provide a detailed explanation. Figure 16 , Figure 17 and Figure 18 These are schematic cross-sectional views showing the overall structure of the semiconductor light-emitting element 10a of Modified Example 1, the semiconductor light-emitting element 10b of Modified Example 2, and the semiconductor light-emitting element 10c of Modified Example 3 of this embodiment. Figure 19 This is a schematic cross-sectional view showing the structure of the contact electrode 40c of the semiconductor light-emitting element 10c in Modified Example 3 of this embodiment. Figures 16-19 In, with Figure 1 Similarly, a cross-section perpendicular to the direction of laser propagation is shown. Figure 20 and Figure 21 These are graphs showing the current-voltage characteristics of each contact electrode and semiconductor laminate 10S before and after heat treatment in Modification 2 and Modification 3 of this embodiment. Figure 20 and Figure 21 The horizontal axis represents the current flowing in each contact electrode, and the vertical axis represents the voltage applied between each contact electrode and the semiconductor stack 10S. Figure 22 These are SEM images of the surfaces and recesses of each contact electrode in this embodiment and variations 1-3. Figure 22 The image, along with the SEM image, shows the input RF power during ECR sputtering of each contact electrode, the average film thickness of each contact electrode, the area ratio of the recess D1, and the percentage of film thickness per 1 μm. 2 The area and number of recesses D1. Figure 23 This is a schematic cross-sectional view showing the overall structure of the semiconductor light-emitting element 10d in Modified Example 4 of this embodiment. Figure 24 This is a SEM image showing the surface of the contact electrode 40d in Modified Example 4 of this embodiment. Figure 25 These are SEM images of the surfaces of the contact electrodes in this embodiment and variant 4, and diagrams of the recesses. Figure 25 The image, along with the SEM image, shows the input RF power during ECR sputtering formation of each contact electrode, the film deposition rate of each contact electrode, the average film thickness of each contact electrode, the area ratio of the recess D1, and the film thickness per 1 μm. 2 The area of ​​the recess D1 and the average distance between the recesses.

[0089] The semiconductor light-emitting elements of variations 1 to 3 are as follows: Figures 16-18 As shown, the structure of the contact electrode differs from that of the semiconductor light-emitting element 10 of this embodiment, but is the same in other respects.

[0090] like Figure 16 As shown, the semiconductor light-emitting element 10a of Modified Example 1 includes a contact electrode 40a. The contact electrode 40a of Modified Example 1 differs from the contact electrode 40 of this embodiment in terms of average film thickness, but is identical in other respects. Figure 22 As shown, the average film thickness of the contact electrode 40 in this embodiment is 60 nm, while the average film thickness of the contact electrode 40a in Modified Example 1 is 200 nm. Furthermore, both the contact electrode 40 in this embodiment and the contact electrode 40a in Modified Example 1 have low RF power input to the target during ECR sputtering. For example, the input RF power is approximately 30 W, and the film deposition rate of the contact electrode 40a is 10 nm / min or less.

[0091] like Figure 17 As shown, the semiconductor light-emitting element 10b in Modified Example 2 includes a contact electrode 40b. As... Figure 22 As shown, the contact electrode 40b of Modified Example 2 differs from the contact electrode 40 of this embodiment in terms of the RF power input to the target and the average film thickness during ECR sputtering, but are identical in other respects. Figure 22 As shown, the RF power input to the target is high when forming the contact electrode 40b of Modified Example 2, for example, 700W, and the film deposition rate of the contact electrode 40b is greater than 10 nm / min. In addition, the average film thickness of the contact electrode 40b of Modified Example 2 is 200 nm.

[0092] like Figure 18 As shown, the semiconductor light-emitting element 10c of Modified Example 3 includes a contact electrode 40c. As... Figure 22 As shown, the contact electrode 40c of Modified Example 3 differs from the contact electrode 40 of this embodiment in terms of the RF power input to the target and the average film thickness during ECR sputtering, but are identical in other aspects. Figure 19 As shown, the contact electrode 40c of Modified Example 3 has a first layer 41 and a second layer 42 disposed above the first layer 41. Figure 22As shown, the RF power input to the target during the formation of the contact electrode 40c in Modified Example 3 differs between the formation of the first layer 41 and the second layer 42. The RF power input to the target during the formation of the first layer 41 by ECR sputtering is less than the RF power input to the target during the formation of the second layer 42. For example, the RF power input to the target during ECR sputtering is 30W during the formation of the first layer 41 and 700W during the formation of the second layer 42. The film deposition rate during the formation of the first layer 41 is less than 10 nm / min, while the film deposition rate during the formation of the second layer 42 is greater than 10 nm / min. For example, the average film thickness of the first layer 41 is 50 nm, and the average film thickness of the second layer 42 is 150 nm.

[0093] In the contact electrodes of Modified Examples 1 to 3, the same heat treatment was performed as in the contact electrode 40 of Embodiment 1. Specifically, in the contact electrodes of Modified Examples 1 to 3, they were heated at 350°C for 1 minute in an atmospheric atmosphere.

[0094] In the contact electrode 40a of Modified Example 1, which differs from the contact electrode 40 of this embodiment only in average film thickness, the contact resistance with the semiconductor laminate 10S is reduced through heat treatment, similar to the contact electrode 40 of this embodiment. In each contact electrode of Modified Examples 2 and 3, as... Figure 20 and Figure 21 As shown, heat treatment is also used to reduce contact resistance. Furthermore, in Modification 3, the contact between contact electrode 40c and the semiconductor stack 10S is a Schottky contact before heat treatment, but changes to an ohmic contact after heat treatment. Similarly, in Modification 2, the contact between contact electrode 40b and the semiconductor stack 10S is a Schottky contact both before and after heat treatment, but the contact resistance decreases after heat treatment. Like contact electrode 40b in Modification 2, the contact with the semiconductor stack 10S can also be a Schottky contact.

[0095] like Figure 23 As shown, the semiconductor light-emitting element 10d in Modified Example 4 differs from the semiconductor light-emitting element 10 of this embodiment in the structure of the contact electrode 40d, but is the same in other respects. Figure 25 As shown, the contact electrode 40d of Modified Example 4 differs from the contact electrode 40 of Embodiment 1 in terms of film formation rate during ECR sputtering, but is identical in other respects. Figure 25 As shown, the film formation rate of the contact electrode 40 in this embodiment is 3.0 nm / min, while the film formation rate of the contact electrode 40d in Modified Example 4 is 9.0 nm / min.

[0096] The contact electrode 40d in Modification Example 4 has one or more recesses D1 formed on its surface. These recesses include curved recesses D11 and multiple separated recesses D12. The curved recesses D11 have a curved shape when viewed from above the surface of the contact electrode 40d. The multiple separated recesses D12 are deeper than the curved recesses D11 and are separated from each other. The depth of both the curved recesses D11 and the separated recesses D12 is, for example, 30 nm or more, and the depth of the curved recesses D11 is shallower than the depth of the separated recesses D12.

[0097] In addition, Figure 24 In the example shown, multiple separation recesses D12 are connected to curved recesses. Thus, all curved recesses D11 and separation recesses D12 are integrated. In other words, in Figure 24 In the example shown, the number of recesses D1 is one if there is more than one. Furthermore, Figure 24 and Figure 25 The SEM images of the contact electrode 40d in the modified example 4 shown are SEM images of the contact electrode 40d before heat treatment.

[0098] Each contact electrode in this embodiment and in variations 1 to 3 is formed by ECR sputtering, thereby forming Figure 22 The characteristic structure shown in each SEM image is as follows: each contact electrode has one or more recesses D1 formed on its surface, and the one or more recesses D1 include multiple recesses D1. Viewed from above on the surface of each contact electrode, the multiple recesses D1 extend in a curved shape and are separated from each other.

[0099] In addition, each contact electrode in Modified Example 4 is formed by ECR sputtering, thereby forming Figure 24 and Figure 25 The characteristic structures shown in each SEM image are as follows. Figure 25 As shown, the average distance between recesses, defined by the average distance between two adjacent recesses D1 in one or more recesses D1, is 0.11 μm or more along a straight line extending in the direction of the surface of the contact electrode 40d.

[0100] Here, use Figures 26-28 The method for measuring the average distance between depressions is explained. Figure 26 This is a diagram used to illustrate the method for measuring the average distance between depressions. Figure 27 This is a diagram showing the measurement location in the SEM image of the contact electrode 40d in Modified Example 4 of this embodiment. Figure 28 This is a graph showing the measurement results of the average inter-recession distance of the contact electrode 40d in Modified Example 4 of this embodiment.

[0101] In this embodiment and its variations, the intercept method is used to determine the crystal grain size for the observation area of ​​the surface of each contact electrode observed by SEM image.

[0102] Figure 26 This is a simulated SEM image of the surface of each contact electrode. At this point, as shown... Figure 26 As shown, a square observation area with one side length L is prepared. Here, in Figure 26 The recesses within the square shown are represented by solid lines. Furthermore, Ag-based electrode material grains exist between these recesses. Thus, it is assumed that the distance between the recesses approximately corresponds to the grain size.

[0103] Based on this assumption, if there are Nd grains with an average inter-recession distance d on each side of the square observation region, the area of ​​the square is L. 2 The area of ​​a single grain is called π(d / 2). 2 The grains contain Nd in a square shape. 2 Therefore, the total area occupied by all grains is Nd. 2 ×π(d / 2) 2 When the observation area is relatively large relative to the grain size, the area of ​​the square equals the area occupied by all the grains; therefore, L 2 =Nd 2 ×π(d / 2) 2 This holds true. Therefore, the average distance d between the depressions is given by the formula d = 2L / Nd / (π). 1 / 2 This is represented by the formula. A straight line is then drawn in the observation region L×L using this formula. Figure 26 The average distance between depressions was calculated by setting the number of depressions Nd intersecting the line to the number of grains. Furthermore, in... Figure 26 In the middle, the straight line shown by the single-dot dash intersects with the six recesses, therefore Nd = 6.

[0104] In the measurement of the average inter-recession distance of the contact electrode 40d in Modified Example 4, such as Figure 27 As shown, the number Nd of depressions intersecting the straight line was measured at positions 1 to 3. Figure 28 As shown, the length L of one side of the observation area is 2.5 μm. At positions 1, 2, and 3, the number Nd intersecting the straight line was measured to be 26, 24, and 24, respectively. Therefore, at positions 1, 2, and 3, the average distance d between the indentations was measured to be 0.11 μm, 0.12 μm, and 0.12 μm, respectively. By calculating the average of these average distances d between indentations, the average distance d between the indentations of the contact electrode 40d in Modified Example 4 was measured to be 0.11 μm.

[0105] Furthermore, in examples other than Modification Example 4, the average distance d between the depressions can also be measured in the same way. As an example, using... Figure 29 and Figure 30 The measurement results of the average distance d between the recesses of the contact electrode 40 in this embodiment will be explained. Figure 29 This is a diagram showing the measurement location in the SEM image of the contact electrode 40 of this embodiment. Figure 30 This is a graph showing the measurement results of the average distance between the recesses of the contact electrode 40 in this embodiment.

[0106] In the measurement of the average distance between the recesses of the contact electrode 40 in this embodiment, such as Figure 29 As shown, the number Nd of depressions intersecting the straight line was measured at positions 1 to 3. Figure 30 As shown, the length L of one side of the observation area is 2.5 μm. At positions 1, 2, and 3, the number Nd intersecting the straight line was measured to be 10, 9, and 10, respectively. Therefore, at positions 1, 2, and 3, the average distance d between the recesses was measured to be 0.28 μm, 0.31 μm, and 0.28 μm, respectively. By calculating the average of these average distances d between the recesses, the average distance d between the recesses of the contact electrode 40 in this embodiment was measured to be 0.29 μm. Thus, even when the contact electrode 40 has multiple recesses D1 that are separated from each other, the average distance d between the recesses can be measured in the same way as in the case of the contact electrode 40d in Modified Example 4.

[0107] In addition, Figure 27 and Figure 28 In this study, the average distance d between the recesses on the surface of the contact electrode 40d before heat treatment in modified Example 4 was measured. However, the average distance d between the recesses on the surface after heat treatment can also be measured in the same way. Figure 31 and Figure 32 The results of measuring the average distance d between the recesses of the contact electrode 40d after heat treatment in Modified Example 4 are explained. Figure 31 This is a diagram showing the measurement position in the SEM image of the contact electrode 40d after heat treatment of Modified Example 4 of this embodiment. In the heat treatment of the contact electrode 40d of Modified Example 4, it was heated at 350°C for 1 minute in an atmospheric atmosphere, just like the contact electrode 40 of this embodiment. Figure 32 This is a graph showing the measurement results of the average inter-recession distance of the contact electrode 40d after heat treatment in Modified Example 4 of this embodiment.

[0108] In the measurement of the average inter-recession distance of the contact electrode 40d in Modified Example 4, such as Figure 31 As shown, the number Nd of depressions intersecting the straight line was measured at positions 1 to 3. Figure 32 As shown, the length L of one side of the observation area is 2.5 μm. At positions 1, 2, and 3, the number Nd intersecting the straight line was measured to be 22, 21, and 24, respectively. Consequently, at positions 1, 2, and 3, the average distance d between the recesses was measured to be 0.13 μm, 0.14 μm, and 0.12 μm, respectively. By calculating the average of these average distances d between the recesses, the average distance d between the recesses of the heat-treated contact electrode 40d in this embodiment was measured to be 0.13 μm. Thus, it was confirmed that the change in the average distance d between the recesses of the heat-treated contact electrode 40d compared to the average distance d between the recesses of the contact electrode 40d before heat treatment is small, suppressing Ag migration. Furthermore, the position of the straight line used to measure the average distance between the recesses is not limited to positions 1 to 3. For example, when using three straight lines, the positions of the three lines can be any three different locations. Additionally, the number of straight lines is not limited to three.

[0109] Thus, each contact electrode in this embodiment and its variations is formed by ECR sputtering, thereby forming... Figure 25 The characteristic structure shown in each SEM image is as follows: Each contact electrode has one or more recesses D1 formed on its surface, and the average distance d between adjacent recesses, defined by the average distance between two adjacent recesses along a straight line extending in the direction along the surface of each contact electrode, is 0.11 μm or more. Furthermore, the average distance d between recesses can be 0.50 μm or less, or 0.40 μm or less.

[0110] In addition, such as Figure 22 and Figure 25 As shown, the area of ​​one or more recesses D1 is 10% or more and 30% or less relative to the surface area of ​​each contact electrode.

[0111] Each contact electrode with such a structure can be formed by ECR sputtering as described above, thus reducing damage to the semiconductor stack 10S during the formation of each contact electrode.

[0112] Furthermore, by heat treatment, the contact resistance between each contact electrode and the semiconductor laminate 10S can be reduced, and migration during heat treatment can be suppressed. Therefore, changes in the characteristics of each contact electrode caused by heating during heat treatment when forming each contact electrode, and heating when mounting each semiconductor light-emitting element onto the mounting substrate, etc., can be suppressed.

[0113] Furthermore, the reason for suppressing migration in the contact electrode 40 of this embodiment is presumably as follows. That is, the contact electrode 40 of this embodiment is formed, for example, by ECR sputtering. Therefore, during its formation, the direct irradiation of the contact electrode 40 by high-energy plasma is reduced, although high-density plasma supplied from the plasma chamber still irradiates the contact electrode 40. At this time, the acceleration energy of ions colliding with the device surface is low. It is presumed that by irradiating the contact electrode 40 with such high-density plasma, thermal energy to a degree that prevents significant agglomeration in the contact electrode 40 is supplied to the contact electrode 40, thereby causing grain growth to some extent. Here, the smaller the grain, the more grain boundaries per unit area. Since distortions such as lattice defects are concentrated at the grain boundaries, distortion energy is accumulated. Taking advantage of this application of thermal energy to the grain boundaries, grain growth (i.e., agglomeration) driven by distortion energy occurs. In this embodiment, it can be considered that in the contact electrode formation process based on ECR sputtering, the grains grow to a certain extent, thereby reducing the grain boundaries and mitigating the distortion through the recess D1. Therefore, grain growth and migration in the heat treatment process are suppressed (i.e., migration resistance is improved).

[0114] The area of ​​one or more recesses D1 can be 10% or more but less than 20% of the surface area of ​​each contact electrode. For example... Figure 22 As shown, when the RF power is high, as in Modifications 2 and 3, the ratio of the area of ​​one or more recesses D1 to the area of ​​each contact electrode becomes larger; when the RF power is low, as in Modification 1, this ratio becomes smaller. Contact electrodes with a ratio of 10% or more and 20% or less, such as contact electrode 40 of this embodiment and contact electrode 40a of Modification 1, are formed when the RF power input during ECR sputtering is low; in other words, they are formed when the film deposition rate based on ECR sputtering is 10 nm / min or less. With such contact electrodes, migration can be further suppressed, and the contact resistance between the contact electrode and the semiconductor stack 10S can be further reduced.

[0115] In addition, such as Figure 22 As shown in the contact electrode 40 of this embodiment and the contact electrode 40a of Modified Example 1, when the RF power is low, the average film thickness is greater, the length of each recess D1 is shorter, and the number of more than one recess D1 is greater.

[0116] Furthermore, in each semiconductor light-emitting element of this embodiment, the semiconductor stack 10S may also include a nitride semiconductor layer. This enables the realization of a semiconductor light-emitting element that emits blue light or the like.

[0117] In addition, in each semiconductor light-emitting element of this embodiment, each contact electrode may also include at least one of Cu, Pd, Ir, Mg, Ni, Sn, Ti, Pt, Cr, Au, Ga, O, Ar and Si.

[0118] By including such impurities in each contact electrode, at least one of the following properties can be improved: heat resistance, ion migration resistance, and corrosion resistance. Therefore, the operation of each semiconductor light-emitting element can be stabilized. Specifically, the operational stability of each semiconductor light-emitting element relative to temperature variations can be improved. Furthermore, each semiconductor light-emitting element can maintain stable operation over a long period. In particular, when each contact electrode contains at least one of Cu, Au, Mg, Ir, Pd, and Ni, the decrease in reflectivity of each contact electrode can be suppressed. Additionally, when each contact electrode contains Sn, which is resistant to sulfur-containing gases, sulfidation of each contact electrode can be suppressed. Furthermore, oxidation of each contact electrode during annealing in an atmosphere containing O can be suppressed during the formation of each contact electrode.

[0119] Furthermore, as with the semiconductor light-emitting element 10c in Modified Example 3, the contact electrode 40c may have a first layer 41 and a second layer 42 disposed above the first layer 41. The first layer 41 may have a plurality of first recesses formed on its surface, which, when viewed from above, extend in a curved shape and are separated from each other. Here, the first recesses of the first layer 41 have the same structure as the recesses of the contact electrode 40 in this embodiment. The ratio of the area of ​​the plurality of first recesses to the area of ​​the surface of the first layer 41 may be smaller than the ratio of the area of ​​the plurality of recesses D1 to the area of ​​the surface of the contact electrode 40c.

[0120] Such a first layer 41 can be formed by ECR sputtering under the same conditions as the contact electrode 40 of this embodiment, and therefore, like the contact electrode 40, the contact resistance with the semiconductor stack 10S can be reduced. In addition, the second layer 42, like the contact electrode 40b of Modified Example 2, can be formed by setting the ECR sputtering deposition rate to be greater than 10 nm / min, and therefore, the deposition time can be shortened compared to the contact electrode 40 of this embodiment.

[0121] In addition, the manufacturing method of the semiconductor light-emitting element 10 in this embodiment includes: a stacking process to form a semiconductor stack 10S; a contact electrode forming process to form a contact electrode 40 that is in contact with the semiconductor stack 10S and is mainly composed of Ag; and a heat treatment process to heat the contact electrode 40; in the contact electrode forming process, the contact electrode 40 is formed by ECR sputtering.

[0122] By using ECR sputtering to form the contact electrode 40, damage to the semiconductor stack 10S during the formation of the contact electrode 40 can be reduced.

[0123] Furthermore, in the contact electrode 40 of this embodiment, the contact resistance between it and the semiconductor laminate 10S can be reduced through the heat treatment process, and migration during heat treatment can be suppressed. Therefore, changes in the characteristics of each contact electrode caused by heating during the heat treatment when forming each contact electrode, and heating when mounting each semiconductor light-emitting element to the mounting substrate, etc., can be suppressed.

[0124] Furthermore, in the heat treatment step of the manufacturing method of the semiconductor light-emitting element 10 in this embodiment, the semiconductor laminate 10S and the contact electrode 40 can be heated in an atmosphere containing O2.

[0125] This reduces the contact resistance between the contact electrode 40 and the semiconductor stack 10S.

[0126] Furthermore, the film formation rate of the contact electrode 40 in the contact electrode formation step of the semiconductor light-emitting element 10 manufacturing method of this embodiment can be 10 nm / min or less.

[0127] This allows for a further reduction in the contact resistance between the contact electrode 40 and the semiconductor stack 10S. Furthermore, by reducing the deposition rate, the time required for deposition increases. Here, in ECR sputtering, the thermal energy of the plasma supplied to the contact electrode 40 per unit time is almost independent of the deposition rate. Therefore, by reducing the deposition rate, the total amount of thermal energy supplied to the contact electrode 40 during the contact electrode formation process increases. Consequently, the heating effect during the contact electrode formation process increases, thereby further increasing grain growth in the contact electrode 40 and thus further improving migration resistance during the heat treatment process.

[0128] Alternatively, as in the manufacturing method of the semiconductor light-emitting element 10c in Modification 3 of this embodiment, the contact electrode 40c may have a first layer 41 and a second layer 42, wherein the deposition rate of the first layer 41 is slower than the deposition rate of the second layer 42. For example, the contact electrode forming process may include: a first step of forming the first layer 41 at a deposition rate of 10 nm / min or less; and a second step of forming the second layer 42 at a deposition rate of greater than 10 nm / min after the first step.

[0129] In this first layer 41, similar to the contact electrode 40 in this embodiment, the contact resistance with the semiconductor stack 10S can be reduced. Furthermore, in the formation of the second layer 42, the ECR sputtering deposition rate is greater than 10 nm / min, thus shortening the time required for film deposition.

[0130] (Implementation Method 2) The semiconductor light-emitting element of Embodiment 2 and its manufacturing method will be described. The semiconductor light-emitting element of this embodiment differs from the semiconductor light-emitting element 10 of Embodiment 1 in its structure near the interface between the contact electrode and the semiconductor laminate 10S. Hereinafter, the semiconductor light-emitting element of this embodiment and its manufacturing method will be described focusing on the differences between them and the semiconductor light-emitting element 10 and its manufacturing method of Embodiment 1.

[0131] First, use Figure 33 and Figure 34 The semiconductor light-emitting element of this embodiment will be described. Figure 33 This is a schematic cross-sectional view showing the overall structure of the semiconductor light-emitting element 110 in this embodiment. Figure 34 This is a schematic cross-sectional view showing the structure of the contact electrode 140 of the semiconductor light-emitting element 110 in this embodiment. Figure 1 Similarly, Figure 33 and Figure 34 The image shows a cross-section perpendicular to the propagation direction of the laser emitted by the semiconductor light-emitting element 110.

[0132] like Figure 33 As shown, the semiconductor light-emitting element 110 of this embodiment includes a semiconductor laminate 10S and a contact electrode 140. In this embodiment, the semiconductor light-emitting element 110, like the semiconductor light-emitting element 10 of Embodiment 1, also includes a substrate 21, an insulating film 30, a barrier metal layer 50, a pad electrode 60, and an n-side electrode 70.

[0133] The contact electrode 140 of this embodiment contacts the semiconductor laminate 10S and is an electrode with Ag as the main component. Similar to the contact electrode 40 of Embodiment 1, the contact electrode 140 has one or more recesses D1 formed on its surface, and these recesses D1 comprise a plurality of recesses D1. Viewed from above on the surface of the contact electrode 140, the plurality of recesses D1 may extend in a curved shape and be separated from each other. Furthermore, the average distance between the recesses D1 may be 0.11 μm or more. The area of ​​the one or more recesses D1 relative to the surface area of ​​the contact electrode 140 is 10% or more and 30% or less.

[0134] like Figure 34 As shown, the contact electrode 140 of this embodiment has a conductive oxide film layer 141 and a conductive layer 142. The conductive oxide film layer 141 is in contact with the semiconductor laminate 10S and is a conductive oxide film containing Ga. The average film thickness of the conductive oxide film layer 141 is 0.3 nm or more and 5 nm or less. The conductive layer 142 is the same electrode as the contact electrode 40 of Embodiment 1.

[0135] use Figure 35 The manufacturing method of the semiconductor light-emitting element 110 of this embodiment will be described. Figure 35 This is a schematic cross-sectional view illustrating the cleaning process of the manufacturing method of the semiconductor light-emitting element according to this embodiment. Figure 35 The middle shows with Figure 33 The same cross-section.

[0136] The difference between the manufacturing method of the semiconductor light-emitting element 110 in this embodiment and the manufacturing method of the semiconductor light-emitting element 10 in Embodiment 1 is that, after the lamination process and before the contact electrode formation process, a cleaning process is included in which the surface of the semiconductor laminate 10S is cleaned using plasma containing O (oxygen atoms). For example, as Figure 35 As shown, a cleaning process is performed after the opening 30a is formed in the insulating film 30 and before the contact electrode formation process. Figure 35 As shown, plasma is used to clean the region in the semiconductor stack 10S where the contact electrode 140 is formed, that is, the region in the semiconductor stack 10S corresponding to the opening 30a of the insulating film 30. As a result, the work function of Ag, the principal component of the contact electrode 140, increases in this region, thereby lowering the Schottky barrier. Therefore, the contact resistance between Ag and the semiconductor stack 10S can be reduced. Furthermore, when the semiconductor stack 10S is cleaned with plasma containing O, H (hydrogen atoms) that have bonded to Mg, which is added to the semiconductor stack 10S as a p-type impurity, can be extracted. Therefore, Mg, as a p-type impurity, can be activated, thus further reducing the contact resistance.

[0137] Furthermore, after the cleaning process, during the heat treatment process, the Ag contained in the contact electrode 140 and the Ga contained in the semiconductor stack 10S interdiffused, thereby forming a conductive oxide film layer 141, which is an oxide containing Ag and Ga, near the interface between the contact electrode 140 and the semiconductor stack 10S. This conductive oxide film layer 141 is transparent, thus reducing light reflection loss at the interface between the contact electrode 140 and the semiconductor stack 10S. When the average film thickness of the conductive oxide film layer 141 is 0.3 nm or more and 5 nm or less, the resistance of the conductive oxide film layer 141 can be reduced particularly. In addition, a conductive oxide film of the same type as the conductive oxide film layer 141 can also be formed on the semiconductor stack 10S side.

[0138] (variant examples, etc.) The semiconductor light-emitting element of this disclosure has been described above based on the embodiments and modifications, but this disclosure is not limited to the above embodiments and modifications.

[0139] For example, in the above embodiments and variations, examples of semiconductor light-emitting elements being semiconductor laser elements have been shown; however, the semiconductor light-emitting elements disclosed herein are not limited to end-face emitting semiconductor laser elements. Semiconductor light-emitting elements may also be, for example, surface-emitting lasers (VCCELs) or light-emitting diodes.

[0140] In the above embodiments and variations, the semiconductor stack 10S includes a nitride semiconductor layer, but may not include a nitride semiconductor layer. For example, the semiconductor stack 10S may also include a GaAs layer, etc.

[0141] In the above embodiments and variations, the p-side semiconductor layer 24 of the semiconductor stack 10S has a protrusion 24P, but it may not have a protrusion 24P.

[0142] In the above embodiments and variations, each contact electrode is separated from the insulating film 30, but it may also be in contact with the insulating film 30. Furthermore, each contact electrode is disposed only at the opening 30a of the insulating film 30, but it may also be continuously disposed from the opening 30a onto the insulating film 30 (i.e., between the insulating film 30 and the barrier metal layer 50).

[0143] Furthermore, this disclosure also includes various modifications conceived by those skilled in the art to the above embodiments, and the implementation of the embodiments by arbitrarily combining the constituent elements and functions of the above embodiments without departing from the spirit of this disclosure.

[0144] Industrial applicability The semiconductor light-emitting elements disclosed herein can be applied to light sources for various purposes, such as high-efficiency light sources.

[0145] Explanation of reference numerals in the attached figures 10, 10a, 10b, 10c, 10d, 110 semiconductor light-emitting elements 10S semiconductor stack 10T component separation tank 21 substrate 22 n-side semiconductor layer 23 Active Layer 24 p-side semiconductor layer 24P protrusion 24R spine 24Ru upper surface 24T tank 30 insulating film 30a opening 40, 40a, 40b, 40c, 40d, 140 contact electrodes 41 First Floor 42 Second layer 50 Barrier Metal Layer 60 pad electrode 70 n-side electrode 80 corrosion inhibitor 141 Conductive oxide film layer 142 conductive layer D1 Depression D11 curved depression D12 Separation Depression V1 gap

Claims

1. A semiconductor light-emitting element, have: Semiconductor laminates; and The contact electrode, which contacts the semiconductor laminate, is primarily composed of Ag. The contact electrode has one or more recesses formed on its surface. The average distance between recesses, defined by the average distance between two adjacent recesses in the one or more recesses, is 0.11 μm or more along a straight line extending in the direction of the surface of the contact electrode.

2. The semiconductor light-emitting element according to claim 1, The one or more recesses include: The curved recess has a curved shape when viewed from above the surface of the contact electrode; and Multiple separate recesses, which are deeper than the curved recesses, and are separated from each other.

3. A semiconductor light-emitting element, have: Semiconductor laminates; and The contact electrode, which contacts the semiconductor laminate, is primarily composed of Ag. The contact electrode has one or more recesses formed on its surface. The more than one recessed portion includes multiple recessed portions. Viewed from above on the surface of the contact electrode, the plurality of recesses extend in a curved shape and are separated from each other.

4. The semiconductor light-emitting element according to any one of claims 1 to 3, The area of ​​the one or more recesses is 10% or more and less than 30% of the surface area of ​​the contact electrode.

5. The semiconductor light-emitting element according to any one of claims 1 to 4, The contact electrode has a conductive oxide film layer that contacts the semiconductor stack.

6. The semiconductor light-emitting element according to claim 5, The conductive oxide film layer contains Ga.

7. The semiconductor light-emitting element according to any one of claims 1 to 6, The semiconductor stack comprises a nitride semiconductor layer.

8. The semiconductor light-emitting element according to any one of claims 1 to 7, The contact electrode is formed by ECR sputtering.

9. The semiconductor light-emitting element according to any one of claims 1 to 8, The contact electrode contains at least one of Cu, Pd, Ir, Mg, Ni, Sn, Ti, Pt, Cr, Au, Ga, O, Ar, and Si.

10. The semiconductor light-emitting element according to any one of claims 1 to 9, The contact electrode has a first layer and a second layer disposed above the first layer. The first layer has a plurality of first recesses formed on the surface of the first layer. Viewed from above on the surface of the first layer, the plurality of first recesses extend in a curved shape and are separated from each other, and the ratio of the area of ​​the plurality of first recesses to the area of ​​the surface of the first layer is less than the ratio of the area of ​​one or more recesses to the area of ​​the surface of the contact electrode.

11. A method for manufacturing a semiconductor light-emitting element, The process includes the following steps: The lamination process forms a semiconductor laminate; The contact electrode forming process forms a contact electrode that is in contact with the semiconductor laminate and is mainly composed of Ag. as well as The heat treatment process involves heating the contact electrode. In the contact electrode forming process, the contact electrode is formed by ECR sputtering.

12. The method for manufacturing a semiconductor light-emitting element according to claim 11, In the heat treatment process, the semiconductor laminate and the contact electrode are heated in an atmosphere containing oxygen.

13. The method for manufacturing a semiconductor light-emitting element according to claim 11 or 12, The film formation rate of the contact electrode in the contact electrode formation process is less than 10 nm / min.

14. The method for manufacturing a semiconductor light-emitting element according to claim 11 or 12, The contact electrode has a first layer and a second layer. The film formation rate of the first layer is slower than that of the second layer.

15. The method for manufacturing a semiconductor light-emitting element according to any one of claims 11 to 14, After the stacking process and before the contact electrode formation process, a cleaning process is also included, in which the surface of the semiconductor stack is cleaned using plasma.

16. The method for manufacturing a semiconductor light-emitting element according to claim 15, The plasma gas contains O.

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