An ultrasonic pulse transceiver

Abstract

The application provides an ultrasonic pulse transceiver, comprising: a Marx pulse transmitting unit, configured to generate a first ultrasonic signal with a first pulse width and send the first ultrasonic signal to a transmitting control unit; a MOS pulse transmitting unit, configured to generate a second ultrasonic signal with a second pulse width and send the second ultrasonic signal to the transmitting control unit; the transmitting control unit, configured to send the first ultrasonic signal to a first ultrasonic probe if a first control signal indicates a low pulse transmitting mode, and send the second ultrasonic signal to the first ultrasonic probe if the first control signal indicates a high pulse transmitting mode; the first ultrasonic probe, configured to send the first ultrasonic signal or the second ultrasonic signal to an object to be measured and receive a first ultrasonic echo signal reflected by the object to be measured; and a second ultrasonic probe, configured to receive a second ultrasonic echo signal reflected by the object to be measured. Through the technical scheme, the reflection mode and the transmission mode can be simultaneously used, and the measurement efficiency and the measurement accuracy are improved.

Description

Technical Field

[0001] This application relates to the field of defect detection technology, and in particular to an ultrasonic pulse transceiver. Background Technology

[0002] Non-destructive testing (NDT) refers to a method of inspecting and testing the structure, state, and type, quantity, shape, nature, location, size, distribution, and changes of defects in the internal structure and surface of an object without damaging or affecting its performance or internal structure. This is done by utilizing changes in thermal, acoustic, optical, electrical, and magnetic reactions caused by abnormalities or defects in the material's internal structure, and by employing physical or chemical methods and modern technology and equipment.

[0003] An ultrasonic microscope (SAM) is a device used to perform non-destructive testing. It is also known as AMI (acoustic micro imaging) or SAT (scanning acoustic tomography). The ultrasonic microscope uses a high-frequency (frequency exceeding 20 MHz, or even up to several GHz) ultrasonic focusing probe (hereinafter referred to as an ultrasonic probe) to detect various devices and materials using pulse reflection method (such as water immersion method) or transmission method. It can detect defects such as pores, cracks, inclusions and delamination inside the sample.

[0004] Ultrasound is a sound wave with a vibration frequency exceeding the upper limit of human hearing (e.g., greater than 20 kHz), capable of penetrating various media (air or fluids). An ultrasonic probe is a probe used in ultrasonic testing; it is a transducer that utilizes the piezoelectric effect of materials to convert electrical energy into acoustic energy. The key component of an ultrasonic probe is the crystal wafer, a thin single-crystal or polycrystalline sheet with a piezoelectric effect, used to convert electrical energy and acoustic energy into each other.

[0005] In related technologies, when an ultrasonic probe emits an ultrasonic signal, the pulse energy of the ultrasonic signal is relatively small, resulting in a smaller echo pulse amplitude and a poor signal-to-noise ratio in the corresponding ultrasonic echo signal. Summary of the Invention

[0006] This application provides an ultrasonic pulse transceiver, including: a Marx pulse transmitting unit, used to generate a first ultrasonic signal with a first pulse width, and transmit the first ultrasonic signal to a transmitting control unit; The MOS pulse transmitting unit is used to generate a second ultrasonic signal with a second pulse width and send the second ultrasonic signal to the transmitting control unit. The second pulse width is greater than the first pulse width. A transmission control unit is configured to receive a first control signal, and if the first control signal is used to indicate a low-pulse transmission mode, then transmit the first ultrasonic signal to the first ultrasonic probe; if the first control signal is used to indicate a high-pulse transmission mode, then transmit the second ultrasonic signal to the first ultrasonic probe. The first ultrasonic probe is used to send the first ultrasonic signal or the second ultrasonic signal to the object under test, and to receive the first ultrasonic echo signal reflected by the object under test. The second ultrasonic probe is used to receive the second ultrasonic echo signal reflected by the object under test. The first ultrasonic probe is a reflection mode ultrasonic probe, and the second ultrasonic probe is a transmission mode ultrasonic probe. The first ultrasonic echo signal and the second ultrasonic echo signal are used to detect the object under test.

[0007] As can be seen from the above technical solutions, this application proposes an ultrasonic pulse transceiver (i.e., an ultrasonic pulse transmitter and receiver). This transceiver includes a first ultrasonic probe in reflection mode and a second ultrasonic probe in transmission mode, capable of operating simultaneously in both reflection and transmission modes. It supports dual ultrasonic probe operation, improving measurement efficiency and accuracy, and reducing the complexity of synchronous acquisition of transmission and reflection echo systems. The transceiver includes a Marx pulse transmitting unit and a MOS pulse transmitting unit. The Marx pulse transmitting unit generates a first ultrasonic signal with a first pulse width, and the MOS pulse transmitting unit generates a second ultrasonic signal with a second pulse width, providing ultrasonic signals with different transmission energies and pulse widths. The pulse energy and pulse width configuration range is wide, supporting pulse widths from nanoseconds to microseconds and larger amplitude transmission energies (supporting more levels of transmission energy). It is compatible with ultrasonic probes in the MHz to 100MHz frequency bands. The pulse energy of the ultrasonic signal is adjustable, and the echo pulse amplitude of the ultrasonic echo signal is large, resulting in a good signal-to-noise ratio. Gain configuration can be adjusted according to actual operating conditions to improve the signal-to-noise ratio and interference immunity. By combining it with an energy discharge network to accelerate charge discharge, the near-field blind zone of the ultrasonic echo signal is significantly reduced. Attached Figure Description

[0008] Figure 1A This is a schematic diagram of the structure of an ultrasonic pulse transceiver in one embodiment of this application; Figure 1B This is a schematic diagram of the structure of an ultrasonic pulse transceiver in one embodiment of this application; Figure 2A This is a schematic diagram of the structure of an ultrasonic pulse transceiver in one embodiment of this application; Figure 2B This is a schematic diagram of the structure of an ultrasonic pulse transceiver in one embodiment of this application; Figure 3This is a schematic diagram of the shift register structure in one embodiment of this application; Figure 4A , Figure 4B , Figure 4C and Figure 4D This is a schematic diagram of the Marx pulse emission unit; Figure 5A , Figure 5B and Figure 5C This is a schematic diagram of the MOS pulse emission unit; Figure 6 This is a schematic diagram of the structure of the transmission control unit in one embodiment of this application; Figure 7A , Figure 7B and Figure 7C This is a schematic diagram of the structure of the first low-noise preamplifier unit; Figure 7D This is a schematic diagram of the analog switch selection logic in one embodiment of this application; Figure 7E This is a schematic diagram of the structure of the second low-noise preamplifier unit in one embodiment of this application; Figure 8 This is a schematic diagram of the timing logic of an ultrasonic pulse transceiver in one embodiment of this application. Detailed Implementation

[0009] This application provides an ultrasonic pulse transceiver (ultrasonic pulse transmitter and receiver), see [link to relevant documentation]. Figure 1A The diagram shows the structure of an ultrasonic pulse transceiver. The ultrasonic pulse transceiver includes: a Marx pulse transmitting unit, a MOS pulse transmitting unit, a transmitting control unit, a first ultrasonic probe, and a second ultrasonic probe. The first ultrasonic probe can be a reflection-mode ultrasonic probe, and the second ultrasonic probe can be a transmission-mode ultrasonic probe. The reflection-mode first ultrasonic probe transmits ultrasonic signals and receives ultrasonic echo signals; the transmission-mode second ultrasonic probe does not transmit ultrasonic signals but only receives ultrasonic echo signals.

[0010] A Marx pulse transmitter unit generates a first ultrasonic signal with a first pulse width and sends it to a transmitter control unit. A MOS pulse transmitter unit generates a second ultrasonic signal with a second pulse width and sends it to a transmitter control unit; the second pulse width can be greater than the first pulse width. The transmitter control unit receives a first control signal; if the first control signal indicates a low-pulse emission mode, it sends the first ultrasonic signal to the first ultrasonic probe; if the first control signal indicates a high-pulse emission mode, it sends the second ultrasonic signal to the first ultrasonic probe. The first ultrasonic probe sends either the first or second ultrasonic signal to the object under test and receives the first ultrasonic echo signal reflected by the object. The second ultrasonic probe receives the second ultrasonic echo signal reflected by the object. The first and second ultrasonic echo signals are used to detect the object under test.

[0011] For example, a Marx pulse transmitter unit may include a Marx high-voltage pulse generation and driving circuit, a first impedance matching circuit, and a first selection circuit. The first selection circuit is used to determine a first pulse width based on a second control signal and send the first pulse width to the Marx high-voltage pulse generation and driving circuit; and to determine a first impedance value based on a third control signal and send the first impedance value to the first impedance matching circuit; wherein the second control signal indicates the first pulse width, and the third control signal indicates the first impedance value; wherein the acquisition card sends the second and third control signals to a shift register through an acquisition control interface, and the shift register outputs the second and third control signals to the first selection circuit.

[0012] The Marx high-voltage pulse generator driving circuit is used to generate a first ultrasonic signal with a first pulse width based on a first trigger signal and a first high-voltage pulse, and send the first ultrasonic signal to a first impedance matching circuit; wherein, the acquisition card sends the first trigger signal and the first high-voltage pulse to the Marx high-voltage pulse generator driving circuit through the acquisition control interface, and the first trigger signal is used to control the transmission frequency.

[0013] The first impedance matching circuit is used to perform impedance matching on the first ultrasonic signal using a first impedance value, and to send the impedance-matched first ultrasonic signal to the transmitting control unit.

[0014] For example, the MOS pulse transmitting unit may include a MOS high-voltage pulse generating and driving circuit, a second impedance matching circuit, and a second selection circuit; the second selection circuit is used to determine a second pulse width based on a fourth control signal and send the second pulse width to the MOS high-voltage pulse generating and driving circuit; and to determine a second impedance value based on a fifth control signal and send the second impedance value to the second impedance matching circuit; wherein the fourth control signal is used to indicate the second pulse width, and the fifth control signal is used to indicate the second impedance value; wherein the acquisition card sends the fourth control signal and the fifth control signal to the shift register through the acquisition control interface, and the shift register outputs the fourth control signal and the fifth control signal to the second selection circuit.

[0015] The MOS high-voltage pulse generation and driving circuit is used to generate a second ultrasonic signal with a second pulse width based on a second trigger signal and a second high-voltage pulse, and send the second ultrasonic signal to the second impedance matching circuit; wherein, the acquisition card sends the second trigger signal and the second high-voltage pulse to the MOS high-voltage pulse generation and driving circuit through the acquisition control interface, and the second trigger signal is used to control the transmission frequency.

[0016] The second impedance matching circuit is used to perform impedance matching on the second ultrasonic signal using a second impedance value, and then send the impedance-matched second ultrasonic signal to the transmitting control unit.

[0017] For example, the transmission control unit may include a transmission mode switching circuit and an energy discharge circuit; the transmission mode switching circuit is used to receive a first control signal, a first ultrasonic signal, and a second ultrasonic signal; if the first control signal is used to indicate a low-pulse transmission mode, then the first ultrasonic signal is sent to the first ultrasonic probe; if the first control signal is used to indicate a high-pulse transmission mode, then the second ultrasonic signal is sent to the first ultrasonic probe; wherein, the acquisition card sends the first control signal to the shift register through the acquisition control interface, and the shift register outputs the first control signal to the transmission mode switching circuit.

[0018] The energy discharge circuit is used to control the transmission mode switching circuit to connect to the ground terminal when a third trigger signal is received, so as to discharge the transmission energy of the transmission mode switching circuit; and to control the transmission mode switching circuit to disconnect from the ground terminal when a fourth trigger signal is received. The acquisition card sends the third or fourth trigger signal to the energy discharge circuit through the acquisition control interface; when transmitting an ultrasonic signal or receiving an ultrasonic echo signal, the fourth trigger signal is sent to the energy discharge circuit; and during the switching process from transmitting an ultrasonic signal to receiving an ultrasonic echo signal, the third trigger signal is sent to the energy discharge circuit.

[0019] For example, see Figure 1B The diagram shown is a schematic of an ultrasonic pulse transceiver. The ultrasonic pulse transceiver also includes a first low-noise preamplifier unit and a second low-noise preamplifier unit.

[0020] The first low-noise preamplifier unit includes a first high-level clamping protection circuit, a first controllable attenuation circuit, and a first multi-level low-noise circuit. The first high-level clamping protection circuit is used to perform high-level clamping protection on the first ultrasonic echo signal and output the first ultrasonic echo signal after high-level clamping protection to the first controllable attenuation circuit. The first controllable attenuation circuit is used to determine a first attenuation value based on a sixth control signal, perform attenuation operation on the first ultrasonic echo signal after high-level clamping protection based on the first attenuation value, and output the first ultrasonic echo signal after attenuation operation to the first multi-level low-noise circuit. The first multi-level low-noise circuit is used to determine a first gain value based on a seventh control signal, perform low-noise operation on the first ultrasonic echo signal after attenuation operation based on the first gain value, and output the first ultrasonic echo signal after low-noise operation to the acquisition card.

[0021] The second low-noise preamplifier unit includes a second high-level clamping protection circuit, a second controllable attenuation circuit, and a second multi-level low-noise circuit. The second high-level clamping protection circuit is used to perform high-level clamping protection on the second ultrasonic echo signal and output the high-level clamped second ultrasonic echo signal to the second controllable attenuation circuit. The second controllable attenuation circuit is used to determine a second attenuation value based on an eighth control signal, perform attenuation operation on the high-level clamped second ultrasonic echo signal based on the second attenuation value, and output the attenuated second ultrasonic echo signal to the second multi-level low-noise circuit. The second multi-level low-noise circuit is used to determine a second gain value based on a ninth control signal, perform low-noise operation on the attenuated second ultrasonic echo signal based on the second gain value, and output the low-noise second ultrasonic echo signal to the acquisition card.

[0022] For example, the transmission control unit may include a first relay and an SMB interface; a first terminal and a second terminal of the first relay are used to receive a first control signal, the first terminal of the first relay is the positive terminal of the coil, and the second terminal of the first relay is the negative terminal of the coil; a third terminal of the first relay is connected to a Marx pulse transmission unit; a fourth terminal of the first relay is connected to a MOS pulse transmission unit; and a fifth terminal of the first relay is connected to a first ultrasound probe via the SMB interface; wherein, when the first control signal indicates a high-pulse transmission mode, a high level of the first control signal is input to the first terminal of the first relay, a low level of the first control signal is input to the second terminal of the first relay, and the fourth terminal and the fifth terminal of the first relay are connected. Wherein, when the first control signal is used to indicate the low pulse transmission mode, the low level of the first control signal can be input to the first terminal of the first relay, the high level of the first control signal can be input to the second terminal of the first relay, and the third terminal of the first relay is connected to the fifth terminal of the first relay.

[0023] For example, the MOS pulse transmitting unit may include a second relay and a third relay, or the MOS pulse transmitting unit may include a second relay, a third relay and a fourth relay.

[0024] The first and second terminals of the second relay are used to receive the fourth control signal. The first terminal of the second relay is the positive terminal of the coil, and the second terminal is the negative terminal of the coil. The third terminal of the second relay is connected to the power supply terminal through the first capacitor. The fourth terminal of the second relay is connected to the power supply terminal through the second and third capacitors, which are connected in parallel. The capacitance value of the second capacitor and / or the third capacitor is greater than the capacitance value of the first capacitor. The fifth terminal of the second relay is connected to the transmitting control unit. If a high level of the fourth control signal is input to the first terminal of the second relay and a low level of the fourth control signal is input to the second terminal of the second relay, the fourth and fifth terminals of the second relay are connected to output high pulse energy. If a low level of the fourth control signal is input to the first terminal of the second relay and a high level of the fourth control signal is input to the second terminal of the second relay, the third and fifth terminals of the second relay are connected to output low pulse energy. When determining the second pulse width based on the fourth control signal, the second pulse width under high pulse energy is greater than the second pulse width under low pulse energy. The first and second terminals of the third relay are used to receive the fifth control signal. The first terminal of the third relay is the positive terminal of the coil, and the second terminal is the negative terminal of the coil. The third terminal of the third relay is left floating. The fourth terminal of the third relay is connected to ground. The fifth terminal of the third relay is connected to the transmitting control unit through the first resistor. If a high level of the fifth control signal is input to the first terminal of the third relay and a low level of the fifth control signal is input to the second terminal of the third relay, the fourth and fifth terminals of the third relay are connected, so that the first resistor is connected to ground. If a low level of the fifth control signal is input to the first terminal of the third relay and a high level of the fifth control signal is input to the second terminal of the third relay, the third and fifth terminals of the third relay are connected, so that the first resistor is connected to the floating terminal. The first and second terminals of the fourth relay are used to receive the fifth control signal. The first terminal of the fourth relay is the positive terminal of the coil, and the second terminal of the fourth relay is the negative terminal of the coil. The third terminal of the fourth relay is left floating. The fourth terminal of the fourth relay is connected to ground. The fifth terminal of the fourth relay is connected to the transmitting control unit through the second resistor. If a high level of the fifth control signal is input to the first terminal of the fourth relay and a low level of the fifth control signal is input to the second terminal of the fourth relay, the fourth and fifth terminals of the fourth relay are connected, so that the second resistor is connected to ground. If a low level of the fifth control signal is input to the first terminal of the fourth relay and a high level of the fifth control signal is input to the second terminal of the fourth relay, the third and fifth terminals of the fourth relay are connected, so that the second resistor is connected to the floating terminal.

[0025] For example, the Marx pulse transmitting unit includes a fifth relay and a sixth relay, or the Marx pulse transmitting unit includes a fifth relay, a sixth relay and a seventh relay; The first and second terminals of the fifth relay are used to receive the second control signal. The first terminal of the fifth relay is the positive terminal of the coil, and the second terminal of the fifth relay is the negative terminal of the coil. The third terminal of the fifth relay is connected to the transmitting control unit through the first set of circuits. The fourth terminal of the fifth relay is connected to the transmitting control unit through the second set of circuits. The fifth terminal of the fifth relay is connected to the signal input terminal. Specifically, if a high level of the second control signal is input to the first terminal of the fifth relay and a low level of the second control signal is input to the second terminal of the fifth relay, the fourth terminal of the fifth relay and the fifth terminal of the fifth relay are connected to output high pulse energy; if a low level of the second control signal is input to the first terminal of the fifth relay and a high level of the second control signal is input to the second terminal of the fifth relay, the third terminal of the fifth relay and the fifth terminal of the fifth relay are connected to output low pulse energy; when determining the first pulse width based on the second control signal, the first pulse width under high pulse energy is greater than the first pulse width under low pulse energy. The second circuit may include M first transistors, N second transistors, a first energy storage capacitor corresponding to each first transistor, and a second energy storage capacitor corresponding to each second transistor, where M and N can both be positive integers. When no first trigger signal is input at the signal input terminal, the first and second transistors can be in the off state, and the first and second energy storage capacitors store energy. When the first trigger signal is input at the signal input terminal, the first and second transistors can be in the on state, and the first and second energy storage capacitors discharge to output high pulse energy. Furthermore, the first circuit may include a third transistor, N second transistors, and a second energy storage capacitor corresponding to each second transistor. When no first trigger signal is input at the signal input terminal, the third and second transistors are in the off state, and the second energy storage capacitors store energy. When the first trigger signal is input at the signal input terminal, the third and second transistors are in the on state, and the second energy storage capacitors discharge to output low pulse energy. The first and second terminals of the sixth relay are used to receive the third control signal. The first terminal of the sixth relay is the positive terminal of the coil, and the second terminal is the negative terminal of the coil. The third terminal of the sixth relay is left floating. The fourth terminal of the sixth relay is connected to ground. The fifth terminal of the sixth relay is connected to the transmitting control unit through the third resistor. Specifically, if a high level of the third control signal is input to the first terminal of the sixth relay and a low level of the third control signal is input to the second terminal of the sixth relay, the fourth and fifth terminals of the sixth relay are connected, so that the third resistor is connected to ground. If a low level of the third control signal is input to the first terminal of the sixth relay and a high level of the third control signal is input to the second terminal of the sixth relay, the third and fifth terminals of the sixth relay are connected, so that the third resistor is connected to the floating terminal. The first and second terminals of the seventh relay are used to receive the third control signal. The first terminal of the seventh relay is the positive terminal of the coil, and the second terminal is the negative terminal of the coil. The third terminal of the seventh relay is left floating. The fourth terminal of the seventh relay is connected to ground. The fifth terminal of the seventh relay is connected to the transmitting control unit through the fourth resistor. If a high level of the third control signal is input to the first terminal of the seventh relay and a low level of the third control signal is input to the second terminal of the seventh relay, the fourth and fifth terminals of the seventh relay are connected, so that the fourth resistor is connected to ground. If a low level of the third control signal is input to the first terminal of the seventh relay and a high level of the third control signal is input to the second terminal of the seventh relay, the third and fifth terminals of the seventh relay are connected, so that the fourth resistor is connected to the floating terminal.

[0026] For example, the first low-noise preamplifier unit includes a diode array, a first low-noise operational amplifier, and a first analog switch; the diode array includes multiple diodes, is connected to the first ultrasonic probe, and is connected to the first low-noise operational amplifier, and is used to implement high-level clamping protection; the first analog switch includes a first input terminal and a second input terminal, the first input terminal receives a sixth control signal, and the second input terminal receives a seventh control signal; the first analog switch includes K1 switch channels, each of the K1 switch channels corresponding to K1 gating circuits, and each gating circuit includes a resistor and a capacitor connected in parallel; wherein, the resistance values ​​of the resistors in different gating circuits are different, and / or, the capacitance values ​​of the capacitors in different gating circuits are different; The first analog switch includes an output terminal connected to a first low-noise operational amplifier; a target switch channel terminal is connected to the output terminal and is determined based on a sixth control signal and a seventh control signal; the gating circuit connected to the target switch channel terminal corresponds to a first attenuation value and a first gain value. The first low-noise operational amplifier receives the first ultrasonic echo signal after high-level clamping protection from the diode array, performs attenuation operation on the first ultrasonic echo signal after high-level clamping protection based on the first attenuation value, and performs low-noise operation on the first ultrasonic echo signal after attenuation operation based on the first gain value.

[0027] For example, the second low-noise preamplifier unit includes a second high-level clamping protection circuit, a second low-noise operational amplifier, and a second analog switch; the second high-level clamping protection circuit includes a resistor and a capacitor connected in series, connected to the second ultrasonic probe through the capacitor and connected to the second low-noise operational amplifier through the resistor; another resistor is connected in series between the resistor and the capacitor, and a diode is connected in series between the resistor and the capacitor; the second analog switch includes a first input terminal and a second input terminal, the first input terminal receiving an eighth control signal, and the second input terminal receiving a ninth control signal; The second analog switch includes K2 switch channels, each corresponding to one of K2 gating circuits. Each gating circuit includes a resistor and a capacitor connected in parallel. The resistors in different gating circuits have different resistance values, and / or the capacitors in different gating circuits have different capacitance values. The second analog switch includes an output terminal connected to a second low-noise operational amplifier; a target switch channel terminal is connected to the output terminal and is determined based on an eighth control signal and a ninth control signal; the gating circuit connected to the target switch channel terminal corresponds to a second attenuation value and a second gain value. The second low-noise operational amplifier receives the second ultrasonic echo signal after high-level clamping protection from the second high-level clamping protection circuit, performs attenuation operation on the second ultrasonic echo signal after high-level clamping protection based on the second attenuation value, and performs low-noise operation on the second ultrasonic echo signal after attenuation operation based on the second gain value.

[0028] As can be seen from the above technical solutions, this application proposes an ultrasonic pulse transceiver (i.e., an ultrasonic pulse transmitter and receiver). This transceiver includes a first ultrasonic probe in reflection mode and a second ultrasonic probe in transmission mode, capable of operating simultaneously in both reflection and transmission modes. It supports dual ultrasonic probe operation, improving measurement efficiency and accuracy, and reducing the complexity of synchronous acquisition of transmission and reflection echo systems. The transceiver includes a Marx pulse transmitting unit and a MOS pulse transmitting unit. The Marx pulse transmitting unit generates a first ultrasonic signal with a first pulse width, and the MOS pulse transmitting unit generates a second ultrasonic signal with a second pulse width, providing ultrasonic signals with different transmission energies and pulse widths. The pulse energy and pulse width configuration range is wide, supporting pulse widths from nanoseconds to microseconds and larger amplitude transmission energies (supporting more levels of transmission energy). It is compatible with ultrasonic probes in the MHz to 100MHz frequency bands. The pulse energy of the ultrasonic signal is adjustable, and the echo pulse amplitude of the ultrasonic echo signal is large, resulting in a good signal-to-noise ratio. Gain configuration can be adjusted according to actual operating conditions to improve the signal-to-noise ratio and interference immunity. By combining it with an energy discharge network to accelerate charge discharge, the near-field blind zone of the ultrasonic echo signal is significantly reduced.

[0029] The technical solutions described above in the embodiments of this application will be explained below in conjunction with specific application scenarios.

[0030] With increasing product complexity and stringent safety requirements, non-destructive testing (NDT) technology plays an increasingly important role in product quality control, becoming a powerful tool for ensuring product quality. NDT technology is applied in fields such as the steel industry, machinery manufacturing, boiler and pressure vessel manufacturing, petrochemicals, railway transportation, and shipbuilding. NDT refers to a method of inspecting and testing the structure, state, and type, quantity, shape, nature, location, size, distribution, and changes of defects in the internal structure and surface of an object without damaging or affecting its performance or internal structure. This is achieved by utilizing changes in thermal, acoustic, optical, electrical, and magnetic responses caused by abnormalities or defects in the material's internal structure, employing physical or chemical methods and modern technology and equipment.

[0031] An ultrasonic microscope (ultrasonic scanning microscope) is an instrument used for non-destructive testing of materials. Utilizing the acoustic propagation characteristics of ultrasound in different media, by analyzing the amplitude, phase, or time of flight (TOF) of the received ultrasonic signals, information such as the location, size, and type of defects can be determined. Compared to other non-destructive testing methods, ultrasonic microscopy has significant advantages in terms of detection level and accuracy, and is widely used, especially in the detection of layered defects within objects.

[0032] With the development of computer technology, the signal acquisition frequency and scanning accuracy of ultrasonic microscopes have been greatly improved. Ultrasonic signal processing methods and image recognition algorithms can be applied to ultrasonic microscopy imaging, which can greatly improve scanning efficiency and recognition accuracy, thereby improving the detection accuracy of ultrasonic microscopes.

[0033] Ultrasonic microscopes employ high-frequency ultrasonic probes and utilize pulse-echo methods (such as immersion testing) or penetration methods to inspect various devices and materials. They can detect defects such as pores, cracks, inclusions, and delamination within samples. Ultrasound is a sound wave with a vibration frequency exceeding the upper limit of human hearing, capable of penetrating various media (air or fluids). An ultrasonic probe is a transducer used in ultrasonic testing, utilizing the piezoelectric effect of materials to convert electrical energy into acoustic energy. The key component of an ultrasonic probe is the crystal wafer, a thin single-crystal or polycrystalline sheet with a piezoelectric effect used to convert electrical energy and acoustic energy.

[0034] In related technologies, when an ultrasonic probe emits an ultrasonic signal, the pulse energy of the ultrasonic signal is relatively small, resulting in a smaller echo pulse amplitude and a poor signal-to-noise ratio in the corresponding ultrasonic echo signal.

[0035] In response to the above findings, this application proposes an ultrasonic pulse transceiver that can be applied to defect detection equipment, specifically defect detection equipment in the field of intelligent manufacturing of parts and materials. This defect detection equipment supports multi-band ultrasonic non-destructive testing. For example, the defect detection equipment may include an ultrasonic microscope, which may include a data acquisition card and an ultrasonic pulse transceiver. The ultrasonic pulse transceiver may employ a high-frequency ultrasonic probe. This embodiment proposes a novel ultrasonic pulse transceiver structure.

[0036] The ultrasonic pulse transceiver in this embodiment operates simultaneously in reflection and transmission modes, supporting dual-probe operation to improve measurement efficiency and accuracy. The transmission energy and pulse width are adjustable, supporting pulse widths from nanoseconds to microseconds and transmission energies from 10µJ to 200µJ, compatible with ultrasonic probes in the MHz to 100MHz frequency bands. Combined with an energy discharge network to accelerate charge discharge, the near-field blind zone of the ultrasonic echo signal is significantly reduced. The acquisition signal chain supports parameter adjustment via host computer feedback, with preamplifier gain ranging from -15dB to 15dB, greatly improving the system's dynamic range and making it suitable for various working conditions, covering defect detection in various industrial fields.

[0037] This application provides an ultrasonic pulse transceiver, which may include an acquisition and control interface, a digital unit, a Marx pulse transmitting unit, a MOS pulse transmitting unit, a transmission control unit, a first ultrasonic probe, a second ultrasonic probe, a first low-noise preamplifier unit, and a second low-noise preamplifier unit.

[0038] See Figure 2A and Figure 2B The image shown is a schematic diagram of an ultrasonic pulse transceiver. Figure 2A This shows a partial structure of an ultrasonic pulse transceiver. Figure 2B The remaining structure of the ultrasonic pulse transceiver is shown.

[0039] Based on the structure of the ultrasonic pulse transceiver, the structure and function of the acquisition control interface, digital unit, Marx pulse transmission unit, MOS pulse transmission unit, transmission control unit, first ultrasonic probe, second ultrasonic probe, first low-noise preamplifier unit and second low-noise preamplifier unit are described below.

[0040] First, the data acquisition and control interface.

[0041] The ultrasonic pulse transceiver can be connected to the acquisition card through the acquisition control interface. The acquisition control interface may include SMA interface 1, SMA interface 2, SMA interface 3 and communication control interface. SMA interface 1, SMA interface 2, SMA interface 3 and communication control interface are all connected to the acquisition card at the back end.

[0042] SMA interface 1 is used to provide a first high-voltage pulse (i.e., high voltage HV) to the Marx pulse transmitter unit and a second high-voltage pulse (i.e., high voltage HV) to the MOS pulse transmitter unit. In other words, SMA interface 1 provides both the high voltage HV required by the Marx pulse transmitter unit and the high voltage HV required by the MOS pulse transmitter unit. For example, the data acquisition card provides the first high-voltage pulse to the Marx pulse transmitter unit and the second high-voltage pulse to the MOS pulse transmitter unit through SMA interface 1. For example, the first and second high-voltage pulses can be the same or different. For example, SMA interface 1 can be connected to the power interface of the data acquisition card to provide the HV high voltage (adjustable from 5V to 500V).

[0043] SMA interface 2 is used to send the first ultrasonic echo signal to the acquisition card. The first ultrasonic echo signal is the ultrasonic echo signal acquired by the first ultrasonic probe. The first ultrasonic probe is a reflection mode ultrasonic probe. Therefore, SMA interface 2 is used to send the reflection mode ultrasonic echo signal to the acquisition card. That is, the ultrasonic pulse transceiver transmits the ultrasonic echo signal of the Echo channel to the acquisition card through SMA interface 2.

[0044] SMA interface 3 is used to send a second ultrasonic echo signal to the acquisition card. The second ultrasonic echo signal is the ultrasonic echo signal acquired by the second ultrasonic probe. The second ultrasonic probe is a transmission mode ultrasonic probe. Therefore, SMA interface 3 is used to send transmission mode ultrasonic echo signals to the acquisition card. That is, the ultrasonic pulse transceiver transmits the through channel ultrasonic echo signal to the acquisition card through SMA interface 3.

[0045] The acquisition card sends trigger signals to the ultrasonic pulse transceiver via a communication control interface. For example, the acquisition card can send a first trigger signal to the Marx pulse transmitting unit, a second trigger signal to the MOS pulse transmitting unit, and a third and fourth trigger signal to the transmission control unit. The functions of the first, second, third, and fourth trigger signals can be found in subsequent embodiments.

[0046] The communication control interface can be connected to the shift register of the digital unit via a control bus. The acquisition card sends control signals to the shift register through the communication control interface, such as the first control signal T1, the second control signal T2, the third control signal T3, the fourth control signal T4, the fifth control signal T5, the sixth control signal R1, the seventh control signals R2 and R3 (if there are two seventh control signals), the eighth control signal R4, and the ninth control signals R5 and R6 (if there are two ninth control signals). For details on which units the shift register sends these control signals to and the functions of these control signals, please refer to subsequent embodiments.

[0047] The communication control interface can be connected to the EEPROM of the digital unit via the I2C bus. The EEPROM is used to store the version information and / or model information of the ultrasonic pulse transceiver (and may also contain other information). The digital unit reads the version information and / or model information of the ultrasonic pulse transceiver from the EEPROM and sends the version information and / or model information of the ultrasonic pulse transceiver to the acquisition card through the communication control interface.

[0048] Second, digital units.

[0049] The digital unit includes a shift register and an EEPROM. The EEPROM is used to store the version information and / or model information of the ultrasonic pulse transceiver. The digital unit reads the version information and / or model information of the ultrasonic pulse transceiver from the EEPROM and sends the version information and / or model information to the acquisition card through the communication control interface.

[0050] The digital unit receives control signals sent by the acquisition card through a shift register and sends control signals to each unit of the ultrasonic pulse transceiver. For example, the digital unit receives a first control signal T1 through the shift register and sends it to the transmit control unit; the digital unit receives a second control signal T2 through the shift register and sends it to the Marx pulse transmitter unit; the digital unit receives a third control signal T3 through the shift register and sends it to the Marx pulse transmitter unit; the digital unit receives a fourth control signal T4 through the shift register and sends it to the MOS pulse transmitter unit; the digital unit receives a fifth control signal T5 through the shift register and sends it to the MOS pulse transmitter unit. The digital unit receives a sixth control signal R1 through the shift register and sends it to the first low-noise preamplifier unit. The digital unit receives seventh control signals R2 and R3 through the shift register and sends them to the first low-noise preamplifier unit. The digital unit receives the eighth control signal R4 through a shift register and sends the eighth control signal R4 to the second low-noise preamplifier unit. The digital unit receives the ninth control signals R5 and R6 through a shift register and sends the ninth control signals R5 and R6 to the second low-noise preamplifier unit.

[0051] For example, before the ultrasonic pulse transceiver operates, it can be configured according to the requirements of the ultrasonic probe and the object being measured. This mainly involves configuring the excitation pulse energy, impedance matching, and acquisition channel gain. For instance, the excitation pulse energy, impedance matching, and acquisition channel gain can be configured using the aforementioned multiple control signals. To ensure the reliability of the control signals and reduce the number of interface lines of the ultrasonic pulse transceiver, the number of lines can be expanded using the serial input and parallel output of a shift register. The H-bridge motor drive controls the current flow, generating pulse signals to drive the relay coil to achieve on / off switching.

[0052] See Figure 3 The diagram shows the structure of a shift register. Control signals R1-R6 are sent to the shift register, and the shift register outputs control signals R1-R6 through a motor driver and signal relays (signal relay 1-signal relay 6). Control signals T1-T5 are also sent to the shift register, and the shift register outputs control signals T1-T5 through a motor driver and signal relays (signal relay 7-signal relay 11).

[0053] Third, the Marx pulse emission unit.

[0054] The Marx pulse transmitting unit is used to generate a first ultrasonic signal with a first pulse width and send the first ultrasonic signal to the transmitting control unit. The first pulse width can be a relatively small pulse width.

[0055] For example, a Marx pulse transmitter unit may include a Marx high-voltage pulse generation and driving circuit, a first impedance matching circuit, and a first selection circuit, wherein the first selection circuit is a transmission energy and impedance switching circuit.

[0056] For the first selection circuit, the digital unit sends a second control signal (T2) to the first selection circuit via a shift register. That is, the acquisition card sends the second control signal to the shift register through the acquisition control interface, and the shift register outputs the second control signal to the first selection circuit. The second control signal is used to indicate the first pulse width; therefore, the first selection circuit can determine the first pulse width based on the second control signal. The first selection circuit can then send the first pulse width to the Marx high-voltage pulse generator / drive circuit.

[0057] For the first selection circuit, the digital unit can send a third control signal (T3) to the first selection circuit via a shift register. That is, the acquisition card can send the third control signal to the shift register via the acquisition control interface, and the shift register outputs the third control signal to the first selection circuit. The third control signal is used to indicate the first impedance value; therefore, the first selection circuit can determine the first impedance value based on the third control signal. The first selection circuit can then send the first impedance value to the first impedance matching circuit.

[0058] In the above process, the second control signal is used to configure (control) the transmission pulse width (or transmission energy) of the Marx pulse transmitting unit; that is, the first pulse width can be configured through the second control signal. The third control signal is used to configure (control) the impedance matching (i.e., the first impedance value) of the Marx pulse transmitting unit; that is, the first impedance value of the first impedance matching circuit can be configured through the third control signal.

[0059] For the Marx high-voltage pulse generator circuit, the data acquisition card sends a first trigger signal and a first high-voltage pulse to the Marx high-voltage pulse generator circuit through the acquisition control interface. For example, the data acquisition card sends the first trigger signal to the Marx high-voltage pulse generator circuit through the communication control interface; the data acquisition card sends the first high-voltage pulse to the Marx high-voltage pulse generator circuit through SMA interface 1.

[0060] The Marx high-voltage pulse generator circuit can obtain a first pulse width, a first trigger signal, and a first high-voltage pulse, and generate a first ultrasonic signal with the first pulse width based on the first trigger signal and the first high-voltage pulse. For example, the first trigger signal is used to control the transmission frequency. Therefore, when the Marx high-voltage pulse generator circuit generates the first ultrasonic signal, the transmission frequency of the first ultrasonic signal is determined by the first trigger signal, and the first ultrasonic signal is transmitted using the transmission frequency indicated by the first trigger signal. When the Marx high-voltage pulse generator circuit generates the first ultrasonic signal, the pulse width of the first ultrasonic signal is the first pulse width generated by the first selection circuit. Furthermore, when the Marx high-voltage pulse generator circuit generates the first ultrasonic signal, it generates the first ultrasonic signal based on the first high-voltage pulse.

[0061] After generating the first ultrasonic signal, the Marx high-voltage pulse generation drive circuit can send the first ultrasonic signal (i.e., the first ultrasonic signal with the first pulse width) to the first impedance matching circuit.

[0062] For the first impedance matching circuit, the first impedance matching circuit can obtain a first impedance value and a first ultrasonic signal. The first impedance matching circuit can use the first impedance value to perform impedance matching on the first ultrasonic signal and send the impedance-matched first ultrasonic signal to the transmitting control unit. This embodiment does not impose restrictions on how the first impedance value is used to perform impedance matching on the first ultrasonic signal.

[0063] For example, see Figure 4A , Figure 4B , Figure 4C and Figure 4D The image shown is a schematic diagram of the Marx pulse emission unit. Figure 4A This shows a partial structure of the Marx pulse emission unit. Figure 4B This shows a partial structure of the Marx pulse emission unit. Figure 4C This shows a partial structure of the Marx pulse emission unit. Figure 4D The diagram shows a partial structure of the Marx pulse emission unit, i.e., these diagrams are combined to form the Marx pulse emission unit.

[0064] The Marx pulse transmitting unit may include a fifth relay and a sixth relay, or the Marx pulse transmitting unit may include a fifth relay, a sixth relay, and a seventh relay. Figure 4A , Figure 4B , Figure 4C and Figure 4D The fifth, sixth, and seventh relays will be used as examples for explanation.

[0065] The fifth relay is URLT4, the sixth relay is URLT5, and the seventh relay is URLT6. The first selection circuit may include the fifth, sixth, and seventh relays. The fifth relay, URLT4, is used to determine the first pulse width, i.e., Relay_T4+ and Relay_T4- represent the second control signal. The sixth relay, URLT5, and the seventh relay, URLT6, are used to determine the first impedance value, i.e., Relay_T5+ and Relay_T5- represent the third control signal, and Relay_T6+ and Relay_T6- represent the third control signal.

[0066] See Figure 4C As shown, the circuit section to the right of endpoint C, excluding the sixth and seventh relays, represents the first impedance matching circuit. The circuit excluding the fifth, sixth, and seventh relays, and the first impedance matching circuit, represents the Marx high-voltage pulse generation drive circuit.

[0067] See Figure 4D As shown, the first terminal (e.g., pin 1) and the second terminal (e.g., pin 8) of the fifth relay (URLT4) are used to receive the second control signals (Relay_T4+ and Relay_T4-). The first terminal of the fifth relay is the positive terminal of the coil, and the second terminal is the negative terminal of the coil. The third terminal of the fifth relay (e.g., pin 2 or pin 7, pins 2 and 7 correspond to the same pin) is connected to the transmit control unit through the first set of circuits, that is, the third terminal of the fifth relay is connected to L-POWER. See the circuit section for the L-POWER connection. Figure 4B and Figure 4C , Figure 4C In this context, `Marx_out` represents the output terminal of the Marx pulse transmitter unit, which is connected to the transmitter control unit. The fourth terminal of the fifth relay (e.g., pin 4 or pin 5, pins 4 and 5 correspond to the same pin) is connected to the transmitter control unit through the second set of circuitry; that is, the fourth terminal of the fifth relay is connected to the H-POWER. For the circuit details of the H-POWER connection, please refer to [link to circuit details]. Figure 4A , Figure 4B and Figure 4C , Figure 4C Marx_out in the configuration is connected to the launch control unit.

[0068] The fifth terminal of the fifth relay (such as pin 3 or pin 6, pins 3 and 6 correspond to the same pin) is connected to the signal input terminal, which corresponds to trig1 and is used to receive the first trigger signal. After the external trig1 trigger signal (i.e. the first trigger signal) enters the Marx pulse transmitting unit, it first passes through U9 (Schmitt trigger) for pulse shaping, and then passes through the fifth relay (URTL4).

[0069] When passing through the fifth relay (URTL4), the first trigger signal can enter the first circuit through L-POWER, and the first trigger signal can also enter the second circuit through H-POWER.

[0070] For example, if a high level of the second control signal is input to the first terminal of the fifth relay and a low level of the second control signal is input to the second terminal of the fifth relay, then the fourth terminal and the fifth terminal of the fifth relay are connected. The first trigger signal enters the second circuit through the H-POWER. The second circuit is used to generate high pulse energy, therefore, high pulse energy can be output in this case. Furthermore, if a low level of the second control signal is input to the first terminal of the fifth relay and a high level of the second control signal is input to the second terminal of the fifth relay, then the third terminal and the fifth terminal of the fifth relay are connected. The first trigger signal enters the first circuit through the L-POWER. The first circuit is used to generate low pulse energy, therefore, low pulse energy can be output in this case. Clearly, when determining the first pulse width based on the second control signal, the first pulse width under high pulse energy can be greater than the first pulse width under low pulse energy.

[0071] For example, the fifth relay (URLT4) is the control relay for transmission energy. Relay_T4+ and Relay_T4- are used to control the transmission energy. When Relay_T4+ is high and Relay_T4- is low, it is a high-energy transmission mode with an output capacitance of 220pF × 6 (i.e., the capacitance of the six capacitors in the second circuit), a pulse energy range of 32uJ to 62uJ, and a wider pulse width. Conversely, when Relay_T4+ is low and Relay_T4- is high, it is a low-energy transmission mode with an output capacitance of 220pF × 3 (i.e., the capacitance of the six capacitors in the first circuit), a pulse energy range of 10uJ to 20uJ, and a narrower pulse width.

[0072] The second circuit may include M first transistors, N second transistors, a first energy storage capacitor corresponding to each first transistor, and a second energy storage capacitor corresponding to each second transistor, where M and N can both be positive integers. See also Figure 4A and Figure 4B As shown, M first transistors can be 3 first transistors, such as transistor Q1, transistor Q2, and transistor Q3, and N second transistors can be 3 second transistors, such as transistor Q4, transistor Q5, and transistor Q6. This example uses 3 first transistors and 3 second transistors; the number of first transistors can be more or less, and the number of second transistors can be more or less.

[0073] The first energy storage capacitor corresponding to the first transistor Q1 includes capacitors C11 and C12, which are connected in parallel. This is an example of two capacitors; the number of capacitors can be more or less. The first energy storage capacitor corresponding to the first transistor Q2 includes capacitors C13 and C14, and the first energy storage capacitor corresponding to the first transistor Q3 includes capacitors C15 and C16. The second energy storage capacitor corresponding to the second transistor Q4 includes capacitors C17 and C18, the second energy storage capacitor corresponding to the second transistor Q5 includes capacitors C19 and C20, and the second energy storage capacitor corresponding to the second transistor Q6 includes capacitors C21 and C22.

[0074] In addition to M first transistors, N second transistors, a first energy storage capacitor, and a second energy storage capacitor, the second circuit may also include U7 (MOS driver). Pin 1 of U7 (e.g., IN+) is connected to the H-POWER terminal (i.e., the fifth relay). Pins 2 (e.g., GND), 6 (e.g., IN-), and 7 (e.g., EPAD) of U7 are connected to ground. Pin 3 of U7 (e.g., VDD) is connected to the power supply terminal (5P0) via a resistor. Pin 3 of U7 is also connected to ground via two capacitors in parallel. Pin 4 of U7 (e.g., OTH) is connected to the first transistor Q1 via a resistor and capacitor in parallel. Pin 5 of U7 (e.g., OTL) is also connected to the first transistor Q1 via a resistor and capacitor in parallel.

[0075] For each first transistor, a resistor can also be connected; for each second transistor, a resistor can also be connected. See the relevant structure. Figure 4A and Figure 4B As shown.

[0076] In addition, HV_Power can provide an adjustable high voltage for the acquisition card. HV_Power can be in the range of 100V to 500V. The HV_Power terminal is used to input the first high voltage pulse to the Marx pulse transmitter unit.

[0077] For the second group of circuits, when no first trigger signal is input at the signal input terminal, all first transistors (such as Q1, Q2, and Q3) and all second transistors (such as Q4, Q5, and Q6) are in the off state, and all first energy storage capacitors (such as C11, C12, C13, C14, C15, and C16) and all second energy storage capacitors (such as C17, C18, C19, C21, and C22) store energy. When the first trigger signal is input at the signal input terminal, all first and second transistors can be controlled to be in the on state. In this way, the first and second energy storage capacitors discharge to output high pulse energy; that is, high pulse energy can be output through the discharge of 12 energy storage capacitors.

[0078] For example, in high-energy emission mode, the first trigger signal (Trig signal) is transmitted to U7 (MOS driver). Without the first trigger signal, transistors Q1-Q6 are in the off state, and the voltage across energy storage capacitors C11-C22 is HV_POWER. After the first trigger signal is applied, transistor Q1 undergoes avalanche breakdown, pulling the potential on the left side of energy storage capacitor C11 down to zero. Since the voltage across the capacitor does not change abruptly, the potential on the right side of energy storage capacitor C11 becomes -HV_POWER. The potential on the left side of energy storage capacitor C13 remains unchanged, and the voltage across transistor Q2 becomes 2HV_POWER, causing transistor Q2 to undergo avalanche breakdown. This process continues until transistors Q1-Q6 all enter avalanche breakdown, generating a momentary high-voltage pulse on the right side of energy storage capacitor C22. Each energy storage capacitor discharges through a series BJT to the load, thus demonstrating the high-energy mode.

[0079] With an absorption resistor of 50 ohms and an HV_POWER of 240V, the peak value of the emitted pulse is 500V, the half-width at half-maximum (WHM) is 4ns, and the energy is 33uJ, thus enabling the output of high pulse energy and a relatively large pulse width.

[0080] The first group of circuits may include a third transistor, N second transistors, and a second energy storage capacitor corresponding to each second transistor. For example, the first group of circuits and the second group of circuits together have N second transistors and a second energy storage capacitor corresponding to each second transistor. The first group of circuits does not involve M first transistors and a first energy storage capacitor corresponding to each first transistor. The first group of circuits additionally includes a third transistor.

[0081] See Figure 4BAs shown, the third transistor can be transistor Q7 (using one third transistor as an example), and the N second transistors can be three second transistors, such as second transistor Q4, second transistor Q5, and second transistor Q6. The second energy storage capacitors corresponding to second transistor Q4 include capacitors C17 and C18, the second energy storage capacitors corresponding to second transistor Q5 include capacitors C19 and C20, and the second energy storage capacitors corresponding to second transistor Q6 include capacitors C21 and C22.

[0082] In addition to the third transistor, N second transistors, and a second energy storage capacitor, the first circuit group may also include U8 (MOS driver). Pin 1 of U8 (e.g., IN+) is connected to the L-POWER terminal (i.e., the fifth relay). Pins 2 (e.g., GND), 6 (e.g., IN-), and 7 (e.g., EPAD) of U8 are connected to ground. Pin 3 of U8 (e.g., VDD) is connected to the power supply terminal (5P0) via a resistor. Pin 3 of U8 is also connected to ground via two capacitors in parallel. Pin 4 of U8 (e.g., OTH) is connected to the third transistor Q7 via a resistor and capacitor in parallel. Pin 5 of U8 (e.g., OTL) is also connected to the third transistor Q7 via a resistor and capacitor in parallel. Furthermore, the third transistor Q7 is connected to the second transistor Q4 via a diode, and the third transistor Q7 is connected to the second transistor Q5 via a diode.

[0083] For the third transistor Q7, it can also be connected to a resistor. Similarly, for each second transistor, it can also be connected to a resistor. See the relevant structure for details. Figure 4B As shown.

[0084] In addition, HV_Power can provide an adjustable high voltage for the acquisition card. HV_Power can be in the range of 100V to 500V. The HV_Power terminal is used to input the first high voltage pulse to the Marx pulse transmitter unit.

[0085] For the first group of circuits, when no first trigger signal is input at the signal input terminal, the third transistor Q7 and all the second transistors (such as second transistors Q4, Q5, and Q6) are in the off state, and all the second energy storage capacitors (such as capacitors C17, C18, C19, C21, and C22) store energy. When the first trigger signal is input at the signal input terminal, it can control the third transistor and all the second transistors to be in the conducting state. In this way, the second energy storage capacitors discharge to output low pulse energy. That is, by discharging through 6 energy storage capacitors (less than 12), low pulse energy can be output.

[0086] For example, in low-energy emit mode, the first trigger signal (Trig signal) is transmitted to U8 (MOS driver). Without the first trigger signal, transistors Q1-Q6 are in the off state, and the voltage across energy storage capacitors C11-C22 is HV_POWER. After the first trigger signal is applied, transistors Q1-Q3 are in the off state, transistor Q7 undergoes avalanche breakdown, triggering transistor Q4 to also undergo avalanche breakdown. The potential on the left side of energy storage capacitor C18 (energy storage capacitor C1) is pulled down to zero. Since the voltage across the capacitor does not change abruptly, the potential on the right side of energy storage capacitor C18 becomes -HV_POWER. With the potential on the left side of energy storage capacitor C21 remaining unchanged, the voltage across transistor Q5 becomes 2HV_POWER, causing transistor Q5 to undergo avalanche breakdown. Similarly, transistors Q4 to Q6 all enter the avalanche breakdown state, thereby generating a momentary high-voltage pulse on the right side of energy storage capacitor C22. Each energy storage capacitor discharges to the load through a series BJT, thus demonstrating the low-energy mode.

[0087] With an absorption resistor of 100 ohms and an HV_POWER of 240V, the peak value of the emitted pulse is 380V, the pulse width is 8ns, and the energy is 25uJ, thus enabling the output of low pulse energy and a small pulse width.

[0088] See Figure 4C As shown, the first terminal (e.g., pin 1) and the second terminal (e.g., pin 8) of the sixth relay (URLT5) are used to receive the third control signals (Relay_T5+ and Relay_T5-). The first terminal of the sixth relay is the positive terminal of the coil, and the second terminal is the negative terminal of the coil. The third terminal of the sixth relay (e.g., pin 2 or pin 7, pins 2 and 7 correspond to the same pin) is left floating. The fourth terminal of the sixth relay (e.g., pin 4 or pin 5, pins 4 and 5 correspond to the same pin) is connected to ground. The fifth terminal of the sixth relay (e.g., pin 3 or pin 6, pins 3 and 6 correspond to the same pin) is connected to the transmitting control unit through a third resistor (in the diagram, the third resistor includes four resistors as an example). Figure 4C Marx_out in the configuration is connected to the launch control unit.

[0089] For example, if a high level of the third control signal is input to the first terminal of the sixth relay and a low level of the third control signal is input to the second terminal of the sixth relay, then the fourth and fifth terminals of the sixth relay will be connected, so that the third resistor is connected to the ground terminal, and the first impedance value corresponds to the resistance value of the third resistor.

[0090] For example, if a low level of the third control signal is input to the first terminal of the sixth relay and a high level of the third control signal is input to the second terminal of the sixth relay, then the third terminal of the sixth relay is connected to the fifth terminal of the sixth relay, so that the third resistor is connected to the floating terminal, and the first impedance value is greater than the resistance value of the third resistor.

[0091] See Figure 4C As shown, the first terminal (e.g., pin 1) and the second terminal (e.g., pin 8) of the seventh relay (URLT6) are used to receive the third control signals (Relay_T6+ and Relay_T6-). The first terminal of the seventh relay is the positive terminal of the coil, and the second terminal is the negative terminal of the coil. The third terminal of the seventh relay (e.g., pin 2 or pin 7, pins 2 and 7 correspond to the same pin) is left floating. The fourth terminal of the seventh relay (e.g., pin 4 or pin 5, pins 4 and 5 correspond to the same pin) is connected to ground. The fifth terminal of the seventh relay (e.g., pin 3 or pin 6, pins 3 and 6 correspond to the same pin) is connected to the transmitting control unit through a fourth resistor (in the diagram, the fourth resistor includes two resistors as an example). Figure 4C Marx_out in the configuration is connected to the launch control unit.

[0092] For example, if a high level of the third control signal is input to the first terminal of the seventh relay and a low level of the third control signal is input to the second terminal of the seventh relay, then the fourth terminal and the fifth terminal of the seventh relay will be connected, so that the fourth resistor is connected to the ground terminal, and the first impedance value corresponds to the resistance value of the fourth resistor.

[0093] For example, if a low level of the third control signal is input to the first terminal of the seventh relay and a high level of the third control signal is input to the second terminal of the seventh relay, then the third terminal and the fifth terminal of the seventh relay will be connected, so that the fourth resistor is connected to the floating terminal, and the first impedance value is greater than the resistance value of the fourth resistor.

[0094] In summary, there are four possible values ​​for the first impedance: the first impedance when the third resistor is connected to ground, the first impedance when the third resistor is connected to a floating terminal, the first impedance when the third resistor is connected to ground and the fourth resistor is connected to ground, and the first impedance when the third resistor is connected to a floating terminal and the fourth resistor is connected to a floating terminal. Of course, these are just a few examples of controlling the first impedance.

[0095] For example, the sixth relay (URLT5) and the seventh relay (URLT6) are impedance matching relays for the interface, matching the impedance of the external probe. The relays are controlled by the Relay_T5+ and Relay_T5-, and Relay_T6+ and Relay_T6- signals. The matching impedance is adjustable in four levels: 100 ohms, 50 ohms, 33 ohms, and 25 ohms. The relationship between the peak voltage and the number of stages of the Marx pulse transmitter unit is as follows: , For pulse peak voltage, Where is the load impedance, N is the number of Marx pulse emitter stages, and r is the equivalent internal resistance of each stage (i.e., the sum of the capacitor's on-state resistance and the transistor's avalanche on-state resistance).

[0096] Fourth, MOS pulse emission unit.

[0097] The MOS pulse transmitting unit generates a second ultrasonic signal with a second pulse width and sends the second ultrasonic signal to the transmitting control unit. The second pulse width can be a larger pulse width than the first pulse width. For example, the second pulse width in high-energy mode is greater than the second pulse width in low-energy mode, the second pulse width in low-energy mode is greater than the first pulse width in high-energy mode, and the first pulse width in high-energy mode is greater than the first pulse width in low-energy mode.

[0098] For example, the MOS pulse emission unit may include a MOS high voltage pulse generation and driving circuit, a second impedance matching circuit, and a second selection circuit, wherein the second selection circuit is an emission energy and impedance switching circuit.

[0099] For the second selection circuit, the digital unit sends a fourth control signal (T4) to the second selection circuit via a shift register. That is, the acquisition card sends the fourth control signal to the shift register through the acquisition control interface, and the shift register outputs the fourth control signal to the second selection circuit. The fourth control signal is used to indicate the second pulse width; therefore, the second selection circuit can determine the second pulse width based on the fourth control signal. The second selection circuit can then send the second pulse width to the MOS high-voltage pulse generation and driving circuit.

[0100] For the second selection circuit, the digital unit can send a fifth control signal (T5) to the second selection circuit via a shift register. That is, the acquisition card can send the fifth control signal to the shift register through the acquisition control interface, and the shift register outputs the fifth control signal to the second selection circuit. The fifth control signal is used to indicate the second impedance value; therefore, the second selection circuit can determine the second impedance value based on the fifth control signal. The second selection circuit can then send the second impedance value to the second impedance matching circuit.

[0101] In the above process, the fourth control signal is used to configure (control) the emission pulse width (or emission energy) of the MOS pulse emission unit; that is, the second pulse width can be configured through the fourth control signal. The fifth control signal is used to configure (control) the impedance matching (i.e., the second impedance value) of the MOS pulse emission unit; that is, the second impedance value of the second impedance matching circuit can be configured through the fifth control signal.

[0102] For the MOS high-voltage pulse generation and driving circuit, the data acquisition card sends a second trigger signal and a second high-voltage pulse to the MOS high-voltage pulse generation and driving circuit through the acquisition control interface. For example, the data acquisition card sends a second trigger signal to the MOS high-voltage pulse generation and driving circuit through the communication control interface; the data acquisition card sends a second high-voltage pulse to the MOS high-voltage pulse generation and driving circuit through SMA interface 1.

[0103] The MOS high-voltage pulse generator circuit can obtain a second pulse width, a second trigger signal, and a second high-voltage pulse, and generate a second ultrasonic signal with the second pulse width based on the second trigger signal and the second high-voltage pulse. For example, the second trigger signal is used to control the transmission frequency. Therefore, when the MOS high-voltage pulse generator circuit generates the second ultrasonic signal, the transmission frequency of the second ultrasonic signal is determined by the second trigger signal, and the second ultrasonic signal is transmitted using the transmission frequency indicated by the second trigger signal. When the MOS high-voltage pulse generator circuit generates the second ultrasonic signal, the pulse width of the second ultrasonic signal is the second pulse width generated by the second selection circuit. Furthermore, when the MOS high-voltage pulse generator circuit generates the second ultrasonic signal, it does so based on the second high-voltage pulse.

[0104] After generating the second ultrasonic signal, the MOS high-voltage pulse generation drive circuit can send the second ultrasonic signal (i.e., the second ultrasonic signal with the second pulse width) to the second impedance matching circuit.

[0105] Regarding the second impedance matching circuit, it can obtain a second impedance value and a second ultrasonic signal. The second impedance matching circuit can use the second impedance value to perform impedance matching on the second ultrasonic signal and then send the impedance-matched second ultrasonic signal to the transmitting control unit. This embodiment does not impose restrictions on how the second impedance value is used to perform impedance matching on the second ultrasonic signal.

[0106] For example, see Figure 5A , Figure 5B and Figure 5C The diagram shown is a schematic of the structure of a MOS pulse emission unit. Figure 5A This shows a partial structure of the MOS pulse emission unit. Figure 5B This shows a partial structure of the MOS pulse emission unit. Figure 5CThe remaining structure of the MOS pulse emission unit is shown.

[0107] The MOS pulse transmitting unit may include a second relay and a third relay, or the MOS pulse transmitting unit may include a second relay, a third relay, and a fourth relay. Figure 5A , Figure 5B and Figure 5C The following explanation uses a second relay, a third relay, and a fourth relay as examples.

[0108] The second relay is URLT1, the third relay is URLT2, and the fourth relay is URLT3. The second selection circuit may include the second, third, and fourth relays. The second relay, URLT1, is used to determine the second pulse width, i.e., Relay_T1+ and Relay_T1- represent the fourth control signal. The third relay, URLT2, and the fourth relay, URLT3, are used to determine the second impedance value, i.e., Relay_T2+ and Relay_T2- represent the fifth control signal, i.e., Relay_T3+ and Relay_T3- represent the fifth control signal.

[0109] See Figure 5C As shown, the four resistors connected to pin 6 of the third relay URLT2 and the two resistors connected to pin 6 of the fourth relay URLT3 represent the second impedance matching circuit. The circuit other than the second, third, and fourth relays, and the second impedance matching circuit, represents the MOS high-voltage pulse generation and driving circuit. Figure 5C The wire on the left (i.e., diode D4 or diode D6) is connected to pin 6 of the second relay (URLT1); Figure 5A The capacitor C48 (capacitor C51) on the right side is connected to pin 4 of the second relay; Figure 5A The capacitor C47 on the right is connected to pin 2 of the second relay.

[0110] See Figure 5BAs shown, the first terminal (e.g., pin 1) and the second terminal (e.g., pin 8) of the second relay (URLT1) are used to receive the fourth control signals (Relay_T1+ and Relay_T1-). The first terminal of the second relay is the positive terminal of the coil, and the second terminal is the negative terminal of the coil. The third terminal of the second relay (e.g., pin 2 or pin 7, pins 2 and 7 correspond to the same pin) is connected to the power supply terminal through the first capacitor (capacitor C47). The fourth terminal of the second relay (e.g., pin 4 or pin 5, pins 4 and 5 correspond to the same pin) is connected to the power supply terminal through the second capacitor (capacitor C48) and the third capacitor (capacitor C51). The second and third capacitors are connected in parallel, and the capacitance value of the second capacitor and / or the third capacitor is greater than the capacitance value of the first capacitor. For example, the capacitance value of the second capacitor is greater than the capacitance value of the first capacitor, or the capacitance value of the third capacitor is greater than the capacitance value of the first capacitor, or the capacitance value of the second capacitor is greater than the capacitance value of the first capacitor, and the capacitance value of the third capacitor is greater than the capacitance value of the first capacitor.

[0111] The fifth terminal of the second relay (such as pin 3 or pin 6, where pin 3 and pin 6 correspond to the same pin) is connected to the transmitting control unit, such as... Figure 5C MOS_out in the configuration is connected to the transmit control unit.

[0112] For example, if a high level of the fourth control signal is input to the first terminal of the second relay, and a low level of the fourth control signal is input to the second terminal of the second relay, then the fourth and fifth terminals of the second relay are connected. Since the fourth terminal of the second relay is connected to the power supply terminal through the second and third capacitors, and the capacitance value of the second and / or third capacitor is greater than the capacitance value of the first capacitor (i.e., the capacitance value is larger), high pulse energy can be output through the second and third capacitors. Furthermore, if a low level of the fourth control signal is input to the first terminal of the second relay, and a high level of the fourth control signal is input to the second terminal of the second relay, then the third and fifth terminals of the second relay are connected. Since the third terminal of the second relay is connected to the power supply terminal through the first capacitor, and the capacitance value of the first capacitor is smaller, low pulse energy can be output through the first capacitor. Clearly, when determining the second pulse width based on the fourth control signal, the second pulse width under high pulse energy can be greater than the second pulse width under low pulse energy.

[0113] For example, the second relay (URLT1) is the control relay for the transmission energy. Relay_T1+ and Relay_T1- are used to control the transmission energy. When Relay_T1+ is high and Relay_T1- is low, it is in high-energy transmission mode, and the output capacitor value (the output capacitor values ​​of the second and third capacitors) is 2.53nF. It can be seen that the pulse energy ranges from 12.65uJ to 316uJ. In addition, when Relay_T1+ is low and Relay_T1- is high, it is a low-energy transmission mode, the output capacitance value (output capacitance value of the first capacitor) is 470pF, the pulse energy range is 2.4uJ - 58uJ, and the pulse width is smaller.

[0114] See Figure 5A As shown, the fourth terminal of the second relay is connected to HV_Power via a second capacitor (or third capacitor) and multiple resistors (e.g., 13 resistors), and the third terminal of the second relay is connected to HV_Power via a first capacitor and multiple resistors (e.g., 13 resistors). HV_Power is an adjustable high voltage provided by the acquisition card, ranging from 100V to 500V, and is used to receive the aforementioned second high voltage pulse.

[0115] The fourth terminal of the second relay is connected to the power supply (e.g., 5P0) via the second capacitor (third capacitor), N-MOS transistor, parallel capacitor and resistor, UM1 (MOS driver), and resistor. The fourth terminal of the second relay is also connected to the power supply (e.g., 5P0) via the first capacitor, N-MOS transistor, parallel capacitor and resistor, UM1 (MOS driver), and resistor. Furthermore, after the external trigger signal trig1 (i.e., the second trigger signal) enters the MOS pulse emission unit, the second trigger signal is first pulse shaped by UM2 (Schmitt trigger) and then transmitted to UM1 (MOS driver), thereby controlling the on / off state of the N-MOS transistor.

[0116] For example, when pin 1 (in+) of UM1 is high, pin 4 (OUTH) of UM1 outputs a high level, the N-MOS transistor is turned on, and energy is released through the capacitor to generate a pulse voltage. For example, if the second relay switches to the high energy level (pins 4 and 5 of the second relay are connected), energy is released through the second and third capacitors to generate a pulse voltage, thus outputting high pulse energy. If the second relay switches to the low energy level (pins 3 and 5 of the second relay are connected), energy is released through the first capacitor to generate a pulse voltage, thus outputting low pulse energy.

[0117] For example, when pin 1 (in+) of UM1 is low, pin 4 (OUTH) of UM1 outputs a low level, the N-MOS transistor is turned off, and energy can be stored through capacitors. That is, energy can be stored through the second and third capacitors, and energy can be stored through the first capacitor.

[0118] For example, when the external trigger signal (i.e., the second trigger signal) enters the MOS pulse emitter unit, pin 1 (in+) of UM1 can be at a high level; when the external trigger signal does not enter the MOS pulse emitter unit, pin 1 (in+) of UM1 can be at a low level.

[0119] See Figure 5C As shown, the first terminal (e.g., pin 1) and the second terminal (e.g., pin 8) of the third relay (URLT2) are used to receive the fifth control signals (Relay_T2+ and Relay_T2-). The first terminal of the third relay is the positive terminal of the coil, and the second terminal is the negative terminal of the coil. The third terminal of the third relay (e.g., pin 2 or pin 7, pins 2 and 7 correspond to the same pin) is left floating. The fourth terminal of the third relay (e.g., pin 4 or pin 5, pins 4 and 5 correspond to the same pin) is connected to ground. The fifth terminal of the third relay (e.g., pin 3 or pin 6, pins 3 and 6 correspond to the same pin) is connected to the transmitting control unit through the first resistor (in the diagram, the third resistor includes four resistors as an example). Figure 5C MOS_out in the configuration is connected to the transmit control unit.

[0120] For example, if the high level of the fifth control signal is input to the first terminal of the third relay and the low level of the fifth control signal is input to the second terminal of the third relay, then the fourth terminal and the fifth terminal of the third relay are connected, so that the first resistor is connected to the ground terminal, and the second impedance value corresponds to the resistance value of the first resistor.

[0121] For example, if a low level of the fifth control signal is input to the first terminal of the third relay and a high level of the fifth control signal is input to the second terminal of the third relay, then the third terminal of the third relay and the fifth terminal of the third relay are connected, so that the first resistor is connected to the floating terminal and the second impedance value is greater than the resistance value of the first resistor.

[0122] See Figure 5C As shown, the first terminal (e.g., pin 1) and the second terminal (e.g., pin 8) of the fourth relay (URLT3) are used to receive the fifth control signals (Relay_T3+ and Relay_T3-). The first terminal of the fourth relay is the positive terminal of the coil, and the second terminal is the negative terminal of the coil. The third terminal of the fourth relay (e.g., pin 2 or pin 7, pins 2 and 7 correspond to the same pin) is left floating. The fourth terminal of the fourth relay (e.g., pin 4 or pin 5, pins 4 and 5 correspond to the same pin) is connected to ground. The fifth terminal of the fourth relay (e.g., pin 3 or pin 6, pins 3 and 6 correspond to the same pin) is connected to the transmitting control unit through a second resistor (the diagram shows the fourth resistor including two resistors as an example). Figure 5CMOS_out in the configuration is connected to the transmit control unit.

[0123] For example, if a high level of the fifth control signal is input to the first terminal of the fourth relay and a low level of the fifth control signal is input to the second terminal of the fourth relay, then the fourth terminal and the fifth terminal of the fourth relay are connected, so that the second resistor is connected to the ground terminal, and the second impedance value corresponds to the resistance value of the second resistor.

[0124] For example, if a low level of the fifth control signal is input to the first terminal of the fourth relay and a high level of the fifth control signal is input to the second terminal of the fourth relay, then the third terminal and the fifth terminal of the fourth relay will be connected, so that the second resistor is connected to the floating terminal, and the second impedance value is greater than the resistance value of the second resistor.

[0125] In summary, there are four possible values ​​for the second impedance: the second impedance when the first resistor is connected to ground, the second impedance when the first resistor is connected to a floating terminal, the second impedance when both the first and second resistors are connected to ground, and the second impedance when both the first and second resistors are connected to a floating terminal. Of course, these are just a few examples of controlling the second impedance.

[0126] For example, the third and fourth relays are interface impedance matching relays, which are matched according to the impedance of the external probe. The relays are controlled by the Relay_T2+ and Relay_T2-, Relay_T3+ and Relay_T3- signals. The matching impedance is adjustable in four levels: 100 ohm, 50 ohm, 33 ohm and 25 ohm.

[0127] Fifth, the launch control unit.

[0128] The transmission control unit is used to receive a first control signal, a first ultrasonic signal, and a second ultrasonic signal. If the first control signal is used to indicate a low-pulse transmission mode, the transmission control unit can send the first ultrasonic signal to the first ultrasonic probe; if the first control signal is used to indicate a high-pulse transmission mode, the transmission control unit can send the second ultrasonic signal to the first ultrasonic probe.

[0129] For example, the launch control unit may include a launch mode switching circuit and an energy discharge circuit, which may also be referred to as an energy discharge network. The launch control unit will be described below.

[0130] For the transmit mode switching circuit, the digital unit sends a first control signal (T1) to the transmit mode switching circuit through a shift register. That is, the acquisition card sends the first control signal to the shift register through the acquisition control interface, and the shift register outputs the first control signal to the transmit mode switching circuit. The first control signal is used to indicate the pulse transmit mode; for example, it may indicate a low-pulse transmit mode or a high-pulse transmit mode. Based on this, the transmit mode switching circuit can determine whether to use a low-pulse or high-pulse transmit mode based on the first control signal.

[0131] The transmission mode switching circuit receives a first control signal, a first ultrasonic signal, and a second ultrasonic signal. If the first control signal indicates a low-pulse transmission mode, the transmission mode switching circuit sends the first ultrasonic signal to the first ultrasonic probe; if the first control signal indicates a high-pulse transmission mode, the transmission mode switching circuit sends the second ultrasonic signal to the first ultrasonic probe.

[0132] In the above process, the first control signal is used to configure (control) the pulse transmission mode of the transmission mode switching circuit, that is, the pulse transmission mode of the transmission mode switching circuit can be configured by the first control signal.

[0133] For the energy discharge circuit, the acquisition card sends a third or fourth trigger signal (e.g., Trig2 signal represents the third or fourth trigger signal) to the energy discharge circuit via the communication control interface. Upon receiving the third trigger signal, the energy discharge circuit controls the transmission mode switching circuit to connect to ground, thus closing the path between the transmission mode switching circuit and ground to discharge the transmitted energy of the transmission mode switching circuit and prevent interference with the echo signal. Upon receiving the fourth trigger signal, the energy discharge circuit controls the transmission mode switching circuit to disconnect from ground, thus breaking the path between the transmission mode switching circuit and ground.

[0134] For example, when the acquisition card needs to control the ultrasonic pulse transceiver to send ultrasonic signals, the acquisition card can send a fourth trigger signal to the energy discharge circuit through the communication control interface; when the acquisition card needs to control the ultrasonic pulse transceiver to receive ultrasonic echo signals, the acquisition card can send a fourth trigger signal to the energy discharge circuit through the communication control interface; during the switching process from sending ultrasonic signals to receiving ultrasonic echo signals (i.e., after the ultrasonic signal transmission is completed but before the ultrasonic echo signal is received), the acquisition card can send a third trigger signal to the energy discharge circuit through the communication control interface. For example, the third and fourth trigger signals can be the high-level and low-level signals of the same trigger signal (Trig2 signal).

[0135] For example, see Figure 6The diagram shows the structure of the transmission control unit (transmission mode switching circuit), which may include a first relay (URLT7) and an SMB interface.

[0136] The first terminal (e.g., pin 1) and the second terminal (e.g., pin 8) of the first relay are used to receive the first control signals (Relay_T7+ and Relay_T7-). The first terminal of the first relay is the positive terminal of the coil, and the second terminal is the negative terminal of the coil. The third terminal of the first relay (e.g., pin 2 or pin 7, pins 2 and 7 correspond to the same pin) is connected to the Marx pulse transmitting unit. For example, if the third terminal of the first relay is connected to Marx_out, then Marx_out is connected to the Marx pulse transmitting unit. The fourth terminal of the first relay (e.g., pin 4 or pin 5, pins 4 and 5 correspond to the same pin) is connected to the MOS pulse transmitting unit. For example, if the fourth terminal of the first relay is connected to MOS_out, then MOS_out is connected to the MOS pulse transmitting unit. The fifth terminal of the first relay (e.g., pin 3 or pin 6, pins 3 and 6 correspond to the same pin) is connected to the first ultrasound probe via the SMB interface.

[0137] For example, if a high-level signal of the first control signal is input to the first terminal of the first relay, and a low-level signal of the first control signal is input to the second terminal of the first relay, then the first control signal can indicate a high-pulse transmission mode, and the fourth and fifth terminals of the first relay will be connected. In this way, the transmission mode switching circuit can output a second ultrasonic signal to the first ultrasonic probe via the SMB interface.

[0138] For example, if a low-level signal is input to the first terminal of the first relay and a high-level signal is input to the second terminal of the first relay, the first control signal can indicate a low-pulse transmission mode, and the third and fifth terminals of the first relay will be connected. In this way, the transmission mode switching circuit can output a first ultrasonic signal to the first ultrasonic probe via the SMB interface.

[0139] For example, based on the operating frequency and energy requirements of the ultrasonic probe, the configuration is pre-deployed. When Relay_T7+ is high and Relay_T7- is low, MOS_out and Pulse_out are turned on, using the MOS pulse transmitter unit, i.e., outputting the second ultrasonic signal to the first ultrasonic probe via the SMB interface. When Relay_T7+ is low and Relay_T7- is high, Marx_out and Pulse_out are turned on, using the Marx pulse transmitter unit, i.e., outputting the first ultrasonic signal to the first ultrasonic probe via the SMB interface.

[0140] Sixth, the first and second ultrasonic probes.

[0141] The transmission control unit (transmission mode switching circuit) is connected to the first ultrasonic probe via an ECHO coaxial interface. The first ultrasonic probe can be a reflective mode ultrasonic probe (such as ECHO reflective mode). The transmission control unit can send a first ultrasonic signal or a second ultrasonic signal to the first ultrasonic probe.

[0142] The first ultrasonic probe can send a first ultrasonic signal or a second ultrasonic signal to the object under test. If it receives the first ultrasonic signal, the first ultrasonic probe sends the first ultrasonic signal to the object under test; if it receives the second ultrasonic signal, the first ultrasonic probe sends the second ultrasonic signal to the object under test.

[0143] The first ultrasonic probe can receive the first ultrasonic echo signal reflected by the object under test, and send the first ultrasonic echo signal to the first low-noise preamplifier unit through the ECHO coaxial interface.

[0144] The second ultrasonic probe can be a transmission mode (such as through transmission mode) ultrasonic probe. The second ultrasonic probe can receive the second ultrasonic echo signal reflected by the object under test and send the second ultrasonic echo signal to the second low-noise preamplifier unit through the through coaxial interface. For example, the first ultrasonic probe can be called an ECHO channel probe, and the second ultrasonic probe can be called a through channel probe.

[0145] In summary, the ultrasonic pulse transceiver can simultaneously connect to two ultrasonic probes, which operate in transmission mode and reflection mode respectively. The ultrasonic pulse transceiver has two SMA interfaces: a Through channel SMA interface for transmission mode and an Echo channel SMA interface for reflection mode, connecting to two ultrasonic probes. In this embodiment, these two ultrasonic probes are referred to as the first ultrasonic probe and the second ultrasonic probe.

[0146] Seventh, the first low-noise preamplifier unit.

[0147] The first low-noise preamplifier unit is used to receive the first ultrasonic echo signal, perform high-level clamping protection, attenuation operation, and low-noise operation (signal-to-noise ratio improvement operation) on the first ultrasonic echo signal, and send the processed first ultrasonic echo signal to the acquisition card through the acquisition control interface (such as SMA interface 2).

[0148] For example, the first low-noise preamplifier unit may include a first high-level clamping protection circuit, a first controllable attenuation circuit, and a first multi-level low-noise circuit. The first low-noise preamplifier unit will be described below.

[0149] The first high-level clamping protection circuit can perform high-level clamping protection on the first ultrasonic echo signal and output the first ultrasonic echo signal after high-level clamping protection to the first controllable attenuation circuit. By performing high-level clamping protection, the upper limit of the voltage amplitude of the receiving circuit is limited, avoiding damage to the device by transmitting high-voltage pulses.

[0150] For the first controllable attenuation circuit, the digital unit sends a sixth control signal (R1) to the first controllable attenuation circuit through a shift register. That is, the acquisition card sends the sixth control signal to the shift register through the acquisition control interface, and the shift register outputs the sixth control signal to the first controllable attenuation circuit. The sixth control signal is used to indicate the first attenuation value. For example, the sixth control signal is used to control the first controllable attenuation circuit (also called the controllable attenuation network). The sixth control signal provides attenuation configurations of 0dB and -20dB (the value is variable and can involve more attenuation values). That is, the sixth control signal is used to indicate that the first attenuation value is 0dB or that the first attenuation value is -20dB. The input clipping problem is avoided when acquiring near-field signals by using the first attenuation value.

[0151] For the first controllable attenuation circuit, it can receive a sixth control signal and determine a first attenuation value based on the sixth control signal. After receiving the first ultrasonic echo signal after high-level clamping protection, it can perform attenuation operation on the first ultrasonic echo signal after high-level clamping protection based on the first attenuation value, and output the attenuated first ultrasonic echo signal to the first multi-level low-noise circuit.

[0152] For the first multi-level low-noise circuit, the digital unit sends the seventh control signal (R2 and R3) to the first multi-level low-noise circuit through the shift register. That is, the acquisition card sends the seventh control signal to the shift register through the acquisition control interface, and the shift register outputs the seventh control signal to the first multi-level low-noise circuit.

[0153] The seventh control signal is used to indicate the first gain value. For example, if the seventh control signal is used to control the first multi-level low-noise circuit, since there are two seventh control signals (R2 and R3), the seventh control signal is used to indicate four possible values ​​for the first gain value, thereby providing multi-level low-noise TIA and switching between 5dB, 10dB, and 20dB gain to improve the signal-to-noise ratio. For instance, the seventh control signal can provide a configuration of 0dB, 5dB, 10dB, and 20dB (the value is variable and can involve more gain values), that is, the seventh control signal is used to indicate that the first gain value is 0dB, 5dB, 10dB, or 20dB, thereby improving the signal-to-noise ratio through the first gain value.

[0154] For the first multi-level low-noise circuit, it can receive a seventh control signal and determine a first gain value based on the seventh control signal. After receiving the first ultrasonic echo signal after attenuation, the first multi-level low-noise circuit performs low-noise operation on the first ultrasonic echo signal after attenuation based on the first gain value, and outputs the first ultrasonic echo signal after low-noise operation to the acquisition card.

[0155] For example, the first low-noise preamplifier unit is a reflection-mode low-noise preamplifier unit, which may include a diode array, a first low-noise operational amplifier, and a first analog switch.

[0156] See Figure 7A , Figure 7B and Figure 7C The diagram shown is a schematic of the structure of the first low-noise preamplifier unit. Figure 7A This shows the first high-level clamping protection circuit of the first low-noise preamplifier unit. Figure 7B and Figure 7C The first controllable attenuation circuit and the first multi-level low noise circuit of the first low noise preamplifier unit are shown. Figure 7A The gray area on the right and Figure 7B The gray area on the left is connected. Figure 7B The gray area on the right and Figure 7C Connect the gray areas on the left.

[0157] For example, the first high-level clamping protection circuit may include a diode array, and the first low-noise operational amplifier and the first analog switch may form a first controllable attenuation circuit and a first multi-level low-noise circuit.

[0158] See Figure 7A As shown, the diode array can include multiple diodes, with each pair of diodes forming a group. For example, the first and second diodes on the left form the first group, with pin 1 on the top and pin 2 on the bottom; pin 3 is not connected. The third and fourth diodes on the left form the second group, with pin 1 on the top and pin 2 on the bottom; pin 3 is not connected. The fifth and sixth diodes on the left form the third group, with pin 1 on the top and pin 2 on the bottom; pin 3 is not connected. The seventh and eighth diodes on the left form the fourth group, with pin 1 on the top and pin 2 on the bottom; pin 3 is not connected. The second and third groups are connected to the BNC SMA interface (top interface) via resistors (4 resistors), and the second and third groups are also connected to the SMB interface (bottom interface) via resistors (4 resistors). When the BNC SMA interface is connected to the first ultrasound probe, the diode array is connected to the first ultrasound probe via the BNC SMA interface.

[0159] For example, the first and second diodes on the right constitute the fifth group, with pin 1 on the top and pin 2 on the bottom; pin 3 is not connected. The third and fourth diodes on the right constitute the sixth group, with pin 1 on the top and pin 2 on the bottom; pin 3 is not connected. The fifth and sixth diodes on the right constitute the seventh group, with pin 1 on the top and pin 2 on the bottom; pin 3 is not connected. The seventh and eighth diodes on the right constitute the eighth group, with pin 1 on the top and pin 2 on the bottom; pin 3 is not connected. The sixth and seventh groups are connected to pin 3 of the first low-noise operational amplifier via a resistor (see [link to relevant documentation]). Figure 7B (As shown). Clearly, the diode array is connected to the first low-noise operational amplifier, and the diode array is used to implement high-level clamping protection.

[0160] The first group of diodes on the left is connected to the power supply terminal (U_LIM+) via a resistor, a capacitor, and a resistor. The fifth group of diodes on the right is connected to the power supply terminal (U_LIM+) via a resistor, a capacitor, and a resistor. The fourth group of diodes on the left is connected to the power supply terminal (U_LIM-) via a resistor, a capacitor, and a resistor. The eighth group of diodes on the right is connected to the power supply terminal (U_LIM-) via a resistor and a resistor. Based on this, the clamping protection scheme for the diode array ensures that the reverse voltage VRRM is greater than the peak pulse voltage. The positive and negative voltage clamping values ​​of the diode array are determined by U_LIM+ and U_LIM-, which are provided by an ultra-low noise LDO, such as ±4.5V.

[0161] For example, the ECHO channel in reflection mode is responsible for providing high-voltage pulses and receiving reflected ultrasound echo signals. The SMB interface (lower interface) connects to the first ultrasound probe and is connected to the BNC SMA interface of the ECHO channel. Since ECHO also has ultrasound transceiver functions, the ultrasound link pulse voltage exceeds 400V during the transmission phase. Therefore, the acquisition circuit needs to be isolated and protected during the reception phase.

[0162] See Figure 7BAs shown, the first analog switch includes a first input terminal (e.g., pin 1, which is pin A0) and a second input terminal (e.g., pins 16 and 15, which are pins A1 and A2). The first input terminal receives the sixth control signal (R1), and the second input terminal receives the seventh control signal (R2 and R3). For example, pin 16 receives the seventh control signal R2, and pin 17 receives the seventh control signal R3. The first analog switch includes K1 switch channels. Taking eight switch channels as an example, these eight switch channels are S1 (pin 4), S2 (pin 5), S3 (pin 6), S4 (pin 7), S5 (pin 12), S6 (pin 11), S7 (pin 10), and S8 (pin 9). Each of the K1 switch channels corresponds to one of the K1 gating circuits, and each gating circuit includes a resistor and a capacitor connected in parallel. For example, the selection circuit 1 corresponding to terminal S1 includes a resistor and a capacitor connected in parallel; the selection circuit 2 corresponding to terminal S2 includes a resistor and a capacitor connected in parallel; the selection circuit 3 corresponding to terminal S3 includes a resistor and a capacitor connected in parallel; the selection circuit 4 corresponding to terminal S4 includes a resistor and a capacitor connected in parallel; the selection circuit 5 corresponding to terminal S5 includes a resistor and a capacitor connected in parallel; the selection circuit 6 corresponding to terminal S6 includes a resistor and a capacitor connected in parallel; the selection circuit 7 corresponding to terminal S7 includes a resistor and a capacitor connected in parallel; and the selection circuit 8 corresponding to terminal S8 includes a resistor and a capacitor connected in parallel. For example, the resistance values ​​of the resistors in different selection circuits are different, and / or, the capacitance values ​​of the capacitors in different selection circuits are different. For example, the resistance values ​​of the resistors in selection circuit 1 are different from those of the resistors in selection circuit 2, and / or, the capacitance values ​​of the resistors in selection circuit 1 are different from those of the capacitors in selection circuit 2. The resistance values ​​of the resistor in gating circuit 1 are different from those of the resistor in gating circuit 3, and / or the capacitance values ​​of the resistor in gating circuit 1 are different from those of the capacitor in gating circuit 3, and so on.

[0163] The first analog switch includes an enable terminal (such as pin 2, i.e., the EN terminal), which is connected to a power supply terminal (such as 5V) via a resistor. The first analog switch also includes a GND terminal (such as pin 14).

[0164] The first analog switch includes a VSS terminal, which is connected to ground via a parallel capacitor and is also connected to a power supply (e.g., -5V). Additionally, the first analog switch includes a VDD terminal (pin 13), which is connected to ground via a parallel capacitor and is also connected to a power supply (e.g., 5V).

[0165] The first analog switch includes an output terminal (D terminal, i.e., pin 8), which is connected to the first low-noise operational amplifier (e.g., pin 2). In addition, K1 gating circuits can be connected in parallel, and the K1 gating circuits connected in parallel are connected to the first low-noise operational amplifier (e.g., pin 1).

[0166] Pin 2 of the first low-noise op-amp is connected to ground via a resistor and a capacitor. Pin 3 of the first low-noise op-amp is connected to the diode array via a resistor and a capacitor. Pin 4 of the first low-noise op-amp is connected to the power supply (-4P5_ECHO). Pin 5 of the first low-noise op-amp is connected to pin 4 via a resistor and a capacitor. Pins 7 and 8 of the first low-noise op-amp are connected to the power supply (4P5_ECHO). Pin 6 of the first low-noise op-amp is connected to the bandpass filter via two inductors.

[0167] Based on the sixth and seventh control signals, a target switch channel can be determined from K1 switch channels. This target switch channel is connected to the output, and the gating circuit connected to the target switch channel corresponds to the first attenuation value and the first gain value, enabling the first low-noise operational amplifier to know these values. For example, see... Figure 7D The diagram shows the analog switch selection logic. When the enable terminal (EN terminal) of the first analog switch is 0, the sixth control signal (R1) and the seventh control signal (R2 and R3) are ignored, and all channels are closed. When the enable terminal (EN terminal) of the first analog switch is 1, if the sixth control signal (R1) is 0 (i.e., pin A0 is 0) and the seventh control signal (R2 and R3) is 00 (i.e., pins A1 and A2 are 00), then the S1 terminal (Channel 1) is used as the target switch channel terminal. The selection circuit 1 corresponding to the S1 terminal is used to control the first attenuation value and the first gain value. The first attenuation value is controlled by the sixth control signal (R1), and the first gain value is controlled by the seventh control signal (R2 and R3).

[0168] If the sixth control signal (R1) is 1 and the seventh control signals (R2 and R3) are 00, then the S2 terminal (Channel 2) serves as the target switching channel terminal. The gating circuit 2 corresponding to the S2 terminal is used to control the first attenuation value and the first gain value. The first attenuation value is controlled by the sixth control signal (R1), and the first gain value is controlled by the seventh control signals (R2 and R3). If the sixth control signal (R1) is 0 and the seventh control signals (R2 and R3) are 01, then the S3 terminal (Channel 3) serves as the target switching channel terminal. The gating circuit 3 corresponding to the S3 terminal is used to control the first attenuation value and the first gain value. The first attenuation value is controlled by the sixth control signal (R1), and the first gain value is controlled by the seventh control signals (R2 and R3). Similarly, if the sixth control signal (R1) is 1 and the seventh control signal (R2 and R3) is 11, then the S8 terminal (Channel 8) is used as the target switch channel terminal. The gating circuit 8 corresponding to the S8 terminal is used to control the first attenuation value and the first gain value. The first attenuation value is controlled by the sixth control signal (R1), and the first gain value is controlled by the seventh control signal (R2 and R3).

[0169] After determining the target switch channel from K1 switch channels, the gating circuit connected to the target switch channel corresponds to the first attenuation value and the first gain value, and the first low-noise operational amplifier is able to obtain the first attenuation value and the first gain value. Based on this, the first low-noise operational amplifier receives the first ultrasonic echo signal after high-level clamping protection from the diode array, performs attenuation operation on the first ultrasonic echo signal after high-level clamping protection based on the first attenuation value, and performs low-noise operation on the first ultrasonic echo signal after attenuation operation based on the first gain value. The low-noise operation is used to improve the signal-to-noise ratio of the first ultrasonic echo signal.

[0170] For example, to improve the signal-to-noise ratio and immunity, the first ultrasonic echo signal, after being protected by high-level clamping, is amplified by the first low-noise operational amplifier (UE1), and the gain value is configured by the first analog switch (UT2). The switching logic is described in [reference needed]. Figure 7D As shown, through configuration issued by the host computer, 8 select circuits can be selected, and the gain multiple can be selected. [A2, A1, A0] =

[000] ,

[001] ,

[010] ,

[011] correspond to 20dB, 10dB, 5dB, and 0dB gains, respectively. In addition,

[100] ,

[101] ,

[110] , and

[111] are reserved gain configuration items.

[0171] See Figure 7C As shown, the first ultrasonic echo signal after low-noise operation passes through a resistor, two inductors, and another resistor before entering a bandpass filter. Then, it passes through a resistor and a capacitor before being output to the back-end acquisition card. In this way, the first ultrasonic echo signal can be output to the acquisition card.

[0172] The bandpass filter's pin 2 (IN terminal) and pin 5 (OUT terminal) are connected by four resistors connected in series, and these four resistors are connected using a stacked pad method.

[0173] Eighth, the second low-noise preamplifier unit.

[0174] The second low-noise preamplifier unit is used to receive the second ultrasonic echo signal, perform high-level clamping protection, attenuation operation, and low-noise operation (signal-to-noise ratio improvement operation) on the second ultrasonic echo signal, and send the processed second ultrasonic echo signal to the acquisition card through the acquisition control interface (such as SMA interface 3).

[0175] For example, the second low-noise preamplifier unit may include a second high-level clamping protection circuit, a second controllable attenuation circuit, and a second multi-level low-noise circuit. The second low-noise preamplifier unit will be described below.

[0176] The second high-level clamping protection circuit can perform high-level clamping protection on the second ultrasonic echo signal, and output the second ultrasonic echo signal after high-level clamping protection to the second controllable attenuation circuit. By performing high-level clamping protection, the upper limit of the voltage amplitude of the receiving circuit is limited, avoiding damage to the device by transmitting high-voltage pulses.

[0177] For the second controllable attenuation circuit, the digital unit sends an eighth control signal (R4) to the second controllable attenuation circuit through a shift register. That is, the acquisition card sends the eighth control signal to the shift register through the acquisition control interface, and the shift register outputs the eighth control signal to the second controllable attenuation circuit. The eighth control signal is used to indicate the second attenuation value. For example, the eighth control signal is used to control the second controllable attenuation circuit (also called the controllable attenuation network). The eighth control signal provides attenuation configurations of 0dB and -20dB.

[0178] The second controllable attenuation circuit can receive an eighth control signal and determine a second attenuation value based on the eighth control signal. After receiving the second ultrasonic echo signal after high-level clamping protection, the second ultrasonic echo signal after high-level clamping protection can be attenuated based on the second attenuation value, and the attenuated second ultrasonic echo signal can be output to the second multi-level low-noise circuit.

[0179] For the second multi-level low noise circuit, the digital unit sends the ninth control signal (R5 and R6) to the second multi-level low noise circuit through the shift register. That is, the acquisition card sends the ninth control signal to the shift register through the acquisition control interface, and the shift register outputs the ninth control signal to the second multi-level low noise circuit.

[0180] The ninth control signal is used to indicate the second gain value. For example, the ninth control signal is used to control the second multi-level low noise circuit. Since there are two ninth control signals (R5 and R6), the ninth control signal is used to indicate the four possible values ​​of the second gain value, thereby providing multi-level low noise TIA and improving the signal-to-noise ratio.

[0181] For the second multi-level low-noise circuit, it can receive the ninth control signal and determine the second gain value based on the ninth control signal. After receiving the second ultrasonic echo signal after attenuation, the second multi-level low-noise circuit performs low-noise operation on the attenuated second ultrasonic echo signal based on the second gain value and outputs the low-noise operated second ultrasonic echo signal to the acquisition card.

[0182] For example, the second low-noise preamplifier unit is a transmission-mode low-noise preamplifier unit, which may include a second high-level clamping protection circuit, a second low-noise operational amplifier, and a second analog switch. The second low-noise operational amplifier and the second analog switch constitute a second controllable attenuation circuit and a second multi-level low-noise circuit.

[0183] See Figure 7E , Figure 7B and Figure 7C The diagram shown is a schematic of the second low-noise preamplifier unit. Figure 7E This illustrates the second high-level clamping protection circuit for the second low-noise preamplifier unit. Figure 7B and Figure 7C This illustrates the second controllable attenuation circuit and the second multi-stage low-noise circuit of the second low-noise preamplifier unit. Unlike the first low-noise operational amplifier, Figure 7E The gray area on the right is connected to pin 3 of the second low-noise op-amp and is not involved. Figure 7B The capacitor and resistor to the left of pin 3 (for the second low-noise preamplifier unit, there is no capacitor or resistor) Figure 7B (The capacitor and resistor to the left of pin 3). Figure 7B The gray area on the right and Figure 7C Connect the gray areas on the left.

[0184] Clearly, the second controllable attenuation circuit of the second low-noise preamplifier unit is the same as the first controllable attenuation circuit of the first low-noise preamplifier unit, and the second multi-level low-noise circuit of the second low-noise preamplifier unit is similar to the first multi-level low-noise circuit of the first low-noise preamplifier unit; the two can correspond to each other. Figure 7B and Figure 7C .

[0185] See Figure 7E As shown, the second high-level clamping protection circuit includes a resistor and a capacitor connected in series. The capacitor is located on one side of the second ultrasonic probe, and the resistor is located on one side of the second low-noise operational amplifier (LNA). The LNA is connected to the second ultrasonic probe via the capacitor, specifically to the BNC SMA interface. When the BNC SMA interface is connected to the second ultrasonic probe, the second high-level clamping protection circuit is connected to the second ultrasonic probe via the capacitor and the BNC SMA interface. Furthermore, the resistor is located on one side of the second LNA, and the second high-level clamping protection circuit is connected to pin 3 of the second LNA via this resistor. See also... Figure 7E As shown, another resistor is connected in series between the resistor and the capacitor, and grounded through this resistor. Also see... Figure 7E As shown, a diode is connected in series between the resistor and the capacitor, such as two diodes, and the circuit is grounded through this diode.

[0186] See Figure 7BAs shown, the second analog switch may include a first input terminal (e.g., pin 1, which is pin A0) and a second input terminal (e.g., pins 16 and 15, which are pins A1 and A2). The first input terminal can receive the eighth control signal (R4), and the second input terminal can receive the ninth control signal (R5 and R6). For example, pin 16 receives the ninth control signal R5, and pin 17 receives the ninth control signal R6. The second analog switch includes K2 switch channels. Taking eight switch channels as an example, these eight switch channels are S1 (pin 4), S2 (pin 5), S3 (pin 6), S4 (pin 7), S5 (pin 12), S6 (pin 11), S7 (pin 10), and S8 (pin 9). The K2 switch channels correspond one-to-one with K2 gating circuits, and each gating circuit includes a resistor and a capacitor connected in parallel. For example, the resistance values ​​of resistors are different in different gating circuits, and / or the capacitance values ​​of capacitors are different in different gating circuits.

[0187] The second analog switch includes an enable terminal (EN terminal), which is connected to a power supply terminal (e.g., 5V) via a resistor. The second analog switch also includes a GND terminal. The second analog switch includes a VSS terminal, which is connected to ground via a parallel capacitor and is also connected to a power supply terminal (e.g., -5V). Finally, the second analog switch includes a VDD terminal, which is connected to ground via a parallel capacitor and is also connected to a power supply terminal (e.g., 5V).

[0188] The second analog switch includes an output terminal (D terminal, i.e., pin 8), which is connected to the second low-noise operational amplifier (e.g., pin 2). In addition, K2 gating circuits can be connected in parallel, and the K2 gating circuits connected in parallel are connected to the second low-noise operational amplifier (e.g., pin 1).

[0189] Pin 2 of the second low-noise op-amp is connected to ground via a resistor and a capacitor. Pin 3 of the second low-noise op-amp is connected to the second high-level clamping protection circuit. Pin 4 of the second low-noise op-amp is connected to the power supply (-4P5_ECHO). Pin 5 of the second low-noise op-amp is connected to pin 4 via a resistor and a capacitor. Pins 7 and 8 of the second low-noise op-amp are connected to the power supply (4P5_ECHO). Pin 6 of the second low-noise op-amp is connected to the bandpass filter via two inductors.

[0190] Based on the eighth and ninth control signals, the target switch channel can be determined from the K2 switch channels. This target switch channel is connected to the output, and the gating circuit connected to the target switch channel corresponds to the second attenuation value and the second gain value, enabling the second low-noise operational amplifier to detect these values. For example, see... Figure 7DThe diagram shows the analog switch selection logic. When the enable terminal (EN terminal) of the second analog switch is 0, the eighth control signal (R4) and the ninth control signal (R5 and R6) are ignored, and all channels are closed. When the enable terminal (EN terminal) of the second analog switch is 1, if the eighth control signal (R4) is 0 (i.e., pin A0 is 0) and the ninth control signal (R5 and R6) is 00 (i.e., pins A1 and A2 are 00), then the S1 terminal (Channel 1) is used as the target switch channel terminal. The selection circuit 1 corresponding to the S1 terminal is used to control the second attenuation value and the second gain value, and so on.

[0191] After determining the target switch channel from K2 switch channels, the gating circuit connected to the target switch channel corresponds to the second attenuation value and the second gain value, and the second low-noise operational amplifier (LNP) is aware of the second attenuation value and the second gain value. Based on this, the second LNP receives the second ultrasonic echo signal after high-level clamping protection from the second high-level clamping protection circuit, performs attenuation operation on the second ultrasonic echo signal after high-level clamping protection based on the second attenuation value, and performs low-noise operation on the attenuated second ultrasonic echo signal based on the second gain value. The low-noise operation is used to improve the signal-to-noise ratio of the second ultrasonic echo signal.

[0192] For example, to improve the signal-to-noise ratio and immunity, the second ultrasonic echo signal is amplified by the second low-noise operational amplifier after being protected by high-level clamping. The gain value is configured by the second analog switch, which can select 8 selection circuits. The gain multiple is selectable. [A2, A1, A0] =

[000] ,

[001] ,

[010] ,

[011] correspond to 20dB, 10dB, 5dB, and 0dB gains, respectively.

[100] ,

[101] ,

[110] ,

[111] are reserved gain configuration items.

[0193] See Figure 7C As shown, the second ultrasonic echo signal after low-noise operation passes through a resistor, two inductors, and another resistor before entering a bandpass filter. Then, it passes through a resistor and a capacitor before being output to the back-end acquisition card. In this way, the second ultrasonic echo signal can be output to the acquisition card.

[0194] For example, after obtaining the first and second ultrasonic echo signals, the acquisition card can perform detection on the object under test based on these signals, that is, detect whether the object under test has defects. The detection process for the object under test is not limited. For instance, the first and second ultrasonic echo signals can be fused, and the object under test can be detected based on the fused ultrasonic echo signal. Alternatively, the object can be detected based on either the first or second ultrasonic echo signal, and analysis can be performed based on these three detection results.

[0195] For example, see Figure 8 The diagram shows the timing logic of an ultrasonic pulse transceiver. T0 is the system transmit / receive cycle (repetition frequency 100Hz~20kHz), T1 is the beam transmission cycle, T2 is the reception and acquisition cycle, T3 is the pulse voltage half-width at half-maximum (WHM) time, and T4 is the pulse voltage duration. Furthermore, the pulse for the transmit control unit is high-level, and during the zeroing phase it is low-level, indicating the switch between transmitting and receiving.

[0196] from Figure 8 As can be seen, after the arrival of the first trigger signal or the second trigger signal (Trig1 signal), the Marx pulse transmitting unit or the MOS pulse transmitting unit is enabled to generate a high voltage pulse (puls signal), which excites the ultrasonic probe to emit an ultrasonic signal. The reflected first ultrasonic echo signal and the transmitted second ultrasonic echo signal are received by the first ultrasonic probe of the ECHO channel and the second ultrasonic probe of the Through channel, respectively.

[0197] As can be seen from the above technical solutions, the ultrasonic pulse transceiver is suitable for detection systems such as ultrasonic microscopes, and meets the requirements of ultrasonic probes with center frequencies from MHz to hundreds of MHz. A single ultrasonic pulse transceiver simultaneously supports both reflection and transmission ultrasonic detection / imaging modes. That is, the ultrasonic pulse transceiver includes a first ultrasonic probe in reflection mode and a second ultrasonic probe in transmission mode, and can work simultaneously in both reflection and transmission modes, supporting dual ultrasonic probe operation, improving measurement efficiency and accuracy, and reducing the complexity of synchronous acquisition of transmission and reflection echo systems. The ultrasonic pulse transceiver includes a Marx pulse transmitting unit and a MOS pulse transmitting unit. The Marx pulse transmitting unit is used to generate a first ultrasonic signal with a first pulse width, and the MOS pulse transmitting unit is used to generate a second ultrasonic signal with a second pulse width, providing ultrasonic signals with different transmission energies and pulse widths. The pulse energy and pulse width configuration range is large, supporting pulse widths from nanosecond to microsecond levels, supporting larger amplitude transmission energies (supporting more levels of transmission energy, with transmission energy ranging from uJ to hundreds of uJ), and is compatible with ultrasonic probes in the MHz to hundreds of MHz frequency band, with a compatible probe center frequency range from MHz to hundreds of MHz. The pulse energy of the ultrasonic signal can be adjusted, and the echo pulse amplitude of the ultrasonic echo signal is relatively large, resulting in a good signal-to-noise ratio. Gain configuration can be tailored to actual operating conditions to improve the signal-to-noise ratio and noise immunity. By incorporating an energy discharge network to accelerate charge discharge, the near-field dead zone of the ultrasonic echo signal is significantly reduced.

[0198] The above description is merely an embodiment of this application and is not intended to limit the scope of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of the claims of this application.

Claims

1. An ultrasonic pulse transceiver, characterized in that, The ultrasonic pulse transceiver includes: Marx pulse transmitting unit is used to generate a first ultrasonic signal with a first pulse width and send the first ultrasonic signal to the transmitting control unit; The MOS pulse transmitting unit is used to generate a second ultrasonic signal with a second pulse width and send the second ultrasonic signal to the transmitting control unit. The second pulse width is greater than the first pulse width. A transmission control unit is configured to receive a first control signal, and if the first control signal is used to indicate a low-pulse transmission mode, then transmit the first ultrasonic signal to the first ultrasonic probe; if the first control signal is used to indicate a high-pulse transmission mode, then transmit the second ultrasonic signal to the first ultrasonic probe. The first ultrasonic probe is used to send the first ultrasonic signal or the second ultrasonic signal to the object under test, and to receive the first ultrasonic echo signal reflected by the object under test. The second ultrasonic probe is used to receive the second ultrasonic echo signal reflected by the object under test. The first ultrasonic probe is a reflection mode ultrasonic probe, and the second ultrasonic probe is a transmission mode ultrasonic probe. The first ultrasonic echo signal and the second ultrasonic echo signal are used to detect the object under test.

2. The ultrasonic pulse transceiver according to claim 1, characterized in that, The Marx pulse transmitting unit includes a Marx high-voltage pulse generation and driving circuit, a first impedance matching circuit, and a first selection circuit. The first selection circuit is used to determine the first pulse width based on the second control signal and send the first pulse width to the Marx high voltage pulse generation and driving circuit. The first impedance value is determined based on the third control signal, and the first impedance value is sent to the first impedance matching circuit; wherein, the second control signal is used to indicate the first pulse width, and the third control signal is used to indicate the first impedance value; wherein, the acquisition card sends the second control signal and the third control signal to the shift register through the acquisition control interface, and the shift register outputs the second control signal and the third control signal to the first selection circuit; The Marx high-voltage pulse generating drive circuit is used to generate a first ultrasonic signal with a first pulse width based on a first trigger signal and a first high-voltage pulse, and send the first ultrasonic signal to a first impedance matching circuit; wherein, the acquisition card sends the first trigger signal and the first high-voltage pulse to the Marx high-voltage pulse generating drive circuit through the acquisition control interface, and the first trigger signal is used to control the transmission frequency; The first impedance matching circuit is used to perform impedance matching on the first ultrasonic signal using a first impedance value, and to send the impedance-matched first ultrasonic signal to the transmitting control unit.

3. The ultrasonic pulse transceiver according to claim 1, characterized in that, The MOS pulse transmitting unit includes a MOS high voltage pulse generation and driving circuit, a second impedance matching circuit, and a second selection circuit. The second selection circuit is used to determine the second pulse width based on the fourth control signal and send the second pulse width to the MOS high voltage pulse generation and driving circuit. The second impedance value is determined based on the fifth control signal and sent to the second impedance matching circuit; wherein, the fourth control signal is used to indicate the second pulse width and the fifth control signal is used to indicate the second impedance value; wherein, the acquisition card sends the fourth control signal and the fifth control signal to the shift register through the acquisition control interface, and the shift register outputs the fourth control signal and the fifth control signal to the second selection circuit; The MOS high-voltage pulse generating drive circuit is used to generate a second ultrasonic signal with a second pulse width based on a second trigger signal and a second high-voltage pulse, and send the second ultrasonic signal to the second impedance matching circuit; wherein, the acquisition card sends the second trigger signal and the second high-voltage pulse to the MOS high-voltage pulse generating drive circuit through the acquisition control interface, and the second trigger signal is used to control the transmission frequency. The second impedance matching circuit is used to perform impedance matching on the second ultrasonic signal using a second impedance value, and then send the impedance-matched second ultrasonic signal to the transmitting control unit.

4. The ultrasonic pulse transceiver according to claim 1, characterized in that, The launch control unit includes a launch mode switching circuit and an energy discharge circuit; The transmission mode switching circuit is used to receive a first control signal, a first ultrasonic signal, and a second ultrasonic signal; if the first control signal is used to indicate a low-pulse transmission mode, then the first ultrasonic signal is sent to the first ultrasonic probe; if the first control signal is used to indicate a high-pulse transmission mode, then the second ultrasonic signal is sent to the first ultrasonic probe; wherein, the acquisition card sends the first control signal to the shift register through the acquisition control interface, and the shift register outputs the first control signal to the transmission mode switching circuit; The energy discharge circuit is used to control the transmission mode switching circuit to connect to the ground terminal when a third trigger signal is received, so as to discharge the transmission energy of the transmission mode switching circuit; and to control the transmission mode switching circuit to disconnect from the ground terminal when a fourth trigger signal is received. The acquisition card sends the third or fourth trigger signal to the energy discharge circuit through the acquisition control interface; sends the fourth trigger signal to the energy discharge circuit when transmitting an ultrasonic signal or receiving an ultrasonic echo signal; and sends the third trigger signal to the energy discharge circuit during the switching process from transmitting an ultrasonic signal to receiving an ultrasonic echo signal.

5. The ultrasonic pulse transceiver according to claim 1, characterized in that, The ultrasonic pulse transceiver also includes a first low-noise preamplifier unit, which includes a first high-level clamping protection circuit, a first controllable attenuation circuit, and a first multi-level low-noise circuit. The first high-level clamping protection circuit is used to perform high-level clamping protection on the first ultrasonic echo signal and output the first ultrasonic echo signal after high-level clamping protection to the first controllable attenuation circuit; the first controllable attenuation circuit is used to determine a first attenuation value based on a sixth control signal, perform attenuation operation on the first ultrasonic echo signal after high-level clamping protection based on the first attenuation value, and output the first ultrasonic echo signal after attenuation operation to the first multi-level low-noise circuit; the first multi-level low-noise circuit is used to determine a first gain value based on a seventh control signal, perform low-noise operation on the first ultrasonic echo signal after attenuation operation based on the first gain value, and output the first ultrasonic echo signal after low-noise operation to the acquisition card. The ultrasonic pulse transceiver also includes a second low-noise preamplifier unit, which includes a second high-level clamping protection circuit, a second controllable attenuation circuit, and a second multi-level low-noise circuit. The second high-level clamping protection circuit is used to perform high-level clamping protection on the second ultrasonic echo signal and output the second ultrasonic echo signal after high-level clamping protection to the second controllable attenuation circuit; the second controllable attenuation circuit is used to determine a second attenuation value based on the eighth control signal, perform attenuation operation on the second ultrasonic echo signal after high-level clamping protection based on the second attenuation value, and output the second ultrasonic echo signal after attenuation operation to the second multi-level low-noise circuit; the second multi-level low-noise circuit is used to determine a second gain value based on the ninth control signal, perform low-noise operation on the second ultrasonic echo signal after attenuation operation based on the second gain value, and output the second ultrasonic echo signal after low-noise operation to the acquisition card.

6. The ultrasonic pulse transceiver according to claim 1 or 4, characterized in that, The transmission control unit includes a first relay and an SMB interface; The first terminal and the second terminal of the first relay are used to receive the first control signal. The first terminal of the first relay is the positive terminal of the coil, and the second terminal of the first relay is the negative terminal of the coil. The third terminal of the first relay is connected to the Marx pulse transmitting unit; The fourth terminal of the first relay is connected to the MOS pulse transmitting unit; The fifth terminal of the first relay is connected to the first ultrasound probe via the SMB interface; When the first control signal indicates a high pulse transmission mode, the high level of the first control signal is input to the first terminal of the first relay, the low level of the first control signal is input to the second terminal of the first relay, and the fourth terminal of the first relay is connected to the fifth terminal of the first relay. When the first control signal indicates a low pulse transmission mode, the low level of the first control signal is input to the first terminal of the first relay, the high level of the first control signal is input to the second terminal of the first relay, and the third terminal of the first relay is connected to the fifth terminal of the first relay.

7. The ultrasonic pulse transceiver according to claim 1 or 3, characterized in that, The MOS pulse transmitting unit includes a second relay and a third relay, or the MOS pulse transmitting unit includes a second relay, a third relay, and a fourth relay; The first and second terminals of the second relay are used to receive the fourth control signal. The first terminal of the second relay is the positive terminal of the coil, and the second terminal of the second relay is the negative terminal of the coil. The third terminal of the second relay is connected to the power supply terminal through the first capacitor; The fourth terminal of the second relay is connected to the power supply terminal through the second capacitor and the third capacitor. The second capacitor and the third capacitor are connected in parallel, and the capacitance value of the second capacitor and / or the third capacitor is greater than the capacitance value of the first capacitor. The fifth terminal of the second relay is connected to the transmission control unit; Specifically, if a high level of the fourth control signal is input to the first terminal of the second relay, and a low level of the fourth control signal is input to the second terminal of the second relay, the fourth terminal and the fifth terminal of the second relay are connected to output high pulse energy; if a low level of the fourth control signal is input to the first terminal of the second relay, and a high level of the fourth control signal is input to the second terminal of the second relay, the third terminal and the fifth terminal of the second relay are connected to output low pulse energy; wherein, when determining the second pulse width based on the fourth control signal, the second pulse width under high pulse energy is greater than the second pulse width under low pulse energy; The first and second terminals of the third relay are used to receive the fifth control signal. The first terminal of the third relay is the positive terminal of the coil, and the second terminal of the third relay is the negative terminal of the coil. The third terminal of the third relay is left floating; the fourth terminal of the third relay is connected to ground; the fifth terminal of the third relay is connected to the transmitting control unit through the first resistor. Specifically, if a high level of the fifth control signal is input to the first terminal of the third relay and a low level of the fifth control signal is input to the second terminal of the third relay, the fourth terminal and the fifth terminal of the third relay are connected, so that the first resistor is connected to the ground terminal; if a low level of the fifth control signal is input to the first terminal of the third relay and a high level of the fifth control signal is input to the second terminal of the third relay, the third terminal and the fifth terminal of the third relay are connected, so that the first resistor is connected to the floating terminal. The first and second terminals of the fourth relay are used to receive the fifth control signal. The first terminal of the fourth relay is the positive terminal of the coil, and the second terminal of the fourth relay is the negative terminal of the coil. The third terminal of the fourth relay is left floating; the fourth terminal of the fourth relay is connected to ground; the fifth terminal of the fourth relay is connected to the transmitting control unit through the second resistor. Specifically, if a high level of the fifth control signal is input to the first terminal of the fourth relay and a low level of the fifth control signal is input to the second terminal of the fourth relay, the fourth terminal and the fifth terminal of the fourth relay are connected, so that the second resistor is connected to the ground terminal; if a low level of the fifth control signal is input to the first terminal of the fourth relay and a high level of the fifth control signal is input to the second terminal of the fourth relay, the third terminal and the fifth terminal of the fourth relay are connected, so that the second resistor is connected to the floating terminal.

8. The ultrasonic pulse transceiver according to claim 1 or 2, characterized in that, The Marx pulse transmitting unit includes a fifth relay and a sixth relay, or the Marx pulse transmitting unit includes a fifth relay, a sixth relay, and a seventh relay; The first and second terminals of the fifth relay are used to receive the second control signal. The first terminal of the fifth relay is the positive terminal of the coil, and the second terminal of the fifth relay is the negative terminal of the coil. The third terminal of the fifth relay is connected to the transmission control unit through the first set of circuits; The fourth terminal of the fifth relay is connected to the transmission control unit through the second set of circuits; The fifth terminal of the fifth relay is connected to the signal input terminal; Specifically, if a high level of the second control signal is input to the first terminal of the fifth relay and a low level of the second control signal is input to the second terminal of the fifth relay, the fourth terminal of the fifth relay and the fifth terminal of the fifth relay are connected to output high pulse energy; if a low level of the second control signal is input to the first terminal of the fifth relay and a high level of the second control signal is input to the second terminal of the fifth relay, the third terminal of the fifth relay and the fifth terminal of the fifth relay are connected to output low pulse energy; when determining the first pulse width based on the second control signal, the first pulse width under high pulse energy is greater than the first pulse width under low pulse energy. The second circuit includes M first transistors, N second transistors, a first energy storage capacitor corresponding to each first transistor, and a second energy storage capacitor corresponding to each second transistor, where M and N are both positive integers. When no first trigger signal is input at the signal input terminal, the first and second transistors are in the off state, and the first and second energy storage capacitors store energy. When the first trigger signal is input at the signal input terminal, the first and second transistors are in the on state, and the first and second energy storage capacitors discharge to output high pulse energy. The first circuit group includes a third transistor, N second transistors, and a second energy storage capacitor corresponding to each second transistor. When the first trigger signal is not input at the signal input terminal, the third transistor and the second transistors are in the off state, and the second energy storage capacitor stores energy. When the first trigger signal is input at the signal input terminal, the third transistor and the second transistors are in the on state, and the second energy storage capacitor discharges to output low pulse energy. The first and second terminals of the sixth relay are used to receive the third control signal. The first terminal of the sixth relay is the positive terminal of the coil, and the second terminal of the sixth relay is the negative terminal of the coil. The third terminal of the sixth relay is left floating; the fourth terminal of the sixth relay is connected to ground; the fifth terminal of the sixth relay is connected to the transmitting control unit through a third resistor. Specifically, if a high level of the third control signal is input to the first terminal of the sixth relay and a low level of the third control signal is input to the second terminal of the sixth relay, the fourth and fifth terminals of the sixth relay are connected, so that the third resistor is connected to the ground terminal; if a low level of the third control signal is input to the first terminal of the sixth relay and a high level of the third control signal is input to the second terminal of the sixth relay, the third and fifth terminals of the sixth relay are connected, so that the third resistor is connected to the floating terminal. The first and second terminals of the seventh relay are used to receive the third control signal. The first terminal of the seventh relay is the positive terminal of the coil, and the second terminal of the seventh relay is the negative terminal of the coil. The third terminal of the seventh relay is left floating; the fourth terminal of the seventh relay is connected to ground; the fifth terminal of the seventh relay is connected to the transmitting control unit through the fourth resistor. Specifically, if a high level of the third control signal is input to the first terminal of the seventh relay and a low level of the third control signal is input to the second terminal of the seventh relay, the fourth and fifth terminals of the seventh relay are connected, so that the fourth resistor is connected to the ground terminal; if a low level of the third control signal is input to the first terminal of the seventh relay and a high level of the third control signal is input to the second terminal of the seventh relay, the third and fifth terminals of the seventh relay are connected, so that the fourth resistor is connected to the floating terminal.

9. The ultrasonic pulse transceiver according to claim 5, characterized in that, The first low-noise preamplifier unit includes a diode array, a first low-noise operational amplifier, and a first analog switch; The diode array includes multiple diodes, which are connected to a first ultrasonic probe and a first low-noise operational amplifier. The diode array is used to achieve high-level clamping protection. The first analog switch includes a first input terminal and a second input terminal, the first input terminal receiving a sixth control signal, and the second input terminal receiving a seventh control signal; The first analog switch includes K1 switch channels, each of which corresponds to one of K1 gating circuits. Each gating circuit includes a resistor and a capacitor connected in parallel. The resistors in different gating circuits have different resistance values, and / or the capacitors in different gating circuits have different capacitance values. The first analog switch includes an output terminal connected to a first low-noise operational amplifier; a target switch channel terminal is connected to the output terminal and is determined based on a sixth control signal and a seventh control signal; the gating circuit connected to the target switch channel terminal corresponds to a first attenuation value and a first gain value. The first low-noise operational amplifier receives the first ultrasonic echo signal after high-level clamping protection from the diode array, performs attenuation operation on the first ultrasonic echo signal after high-level clamping protection based on the first attenuation value, and performs low-noise operation on the first ultrasonic echo signal after attenuation operation based on the first gain value.

10. The ultrasonic pulse transceiver according to claim 5, characterized in that, The second low-noise preamplifier unit includes a second high-level clamping protection circuit, a second low-noise operational amplifier, and a second analog switch; The second high-level clamping protection circuit includes a resistor and a capacitor connected in series. The capacitor is connected to the second ultrasonic probe, and the resistor is connected to the second low-noise operational amplifier. Another resistor is connected in series between the resistor and the capacitor, and a diode is connected in series between the resistor and the capacitor. The second analog switch includes a first input terminal and a second input terminal, wherein the first input terminal receives an eighth control signal and the second input terminal receives a ninth control signal; The second analog switch includes K2 switch channels, each of which corresponds to one of K2 gating circuits. Each gating circuit includes a resistor and a capacitor connected in parallel. The resistors in different gating circuits have different resistance values, and / or the capacitors in different gating circuits have different capacitance values. The second analog switch includes an output terminal connected to a second low-noise operational amplifier; a target switch channel terminal is connected to the output terminal and is determined based on an eighth control signal and a ninth control signal; the gating circuit connected to the target switch channel terminal corresponds to a second attenuation value and a second gain value. The second low-noise operational amplifier receives the second ultrasonic echo signal after high-level clamping protection from the second high-level clamping protection circuit, performs attenuation operation on the second ultrasonic echo signal after high-level clamping protection based on the second attenuation value, and performs low-noise operation on the second ultrasonic echo signal after attenuation operation based on the second gain value.

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