A board off-line power supply port health state detection method and circuit

Abstract

The present application relates to the field of circuit system, especially to a kind of board card offline power supply port health state detection method and circuit, including by FPGA control multistage program-controlled voltage source module and corresponding relay switching;The voltage of the power supply port of the measured board card and the voltage of the sampling resistance side are collected, and the power consumption current of the measured board card is calculated;Determine whether the power consumption of the measured board card is normal;Determine whether the port capacitance value of the measured board card is normal: normal then continue testing.The present application has the advantages that: by FPGA control multistage program-controlled voltage source module and relay switching, multiple different levels of power supply voltage can be provided for the measured board card in turn, the power consumption current detection under each voltage level and the indirect detection of the power supply port capacitance value are completed in the same detection process, the problem of single board card health state detection project and low efficiency during on-site maintenance is solved;While ensuring normal power supply, the detection accuracy and dynamic measurement range of power consumption current are significantly improved.

Description

Technical Field

[0001] This invention relates to the field of circuit systems, and more particularly to a method and circuit for detecting the health status of an offline power supply port on a circuit board. Background Technology

[0002] Secondary circuit boards mainly refer to printed circuit boards (PCBAs) integrated into power conversion, measurement and control, protection and other devices. They are used to realize functions such as power supply, signal acquisition, logic judgment, control command issuance and device triggering. They are the core components of power equipment, and their reliability directly affects the overall safety and stable operation of the power system.

[0003] During on-site maintenance, testing of circuit boards performing critical functions primarily involves verifying their functionality under rated supply voltage. However, there is currently a lack of rapid testing methods for secondary circuit boards' power consumption under different supply voltages and for assessing changes in the capacitance values ​​of power supply ports. Existing technologies struggle to efficiently evaluate the health status of circuit boards after long-term use, particularly in simultaneously detecting power consumption characteristics and the aging degree of port capacitors across multiple voltage levels.

[0004] There is an urgent need to develop an automated detection circuit and method for the health status of offline power supply ports of circuit boards, suitable for on-site maintenance, so as to achieve rapid and accurate detection of key parameters of power supply ports of circuit boards. Summary of the Invention

[0005] The purpose of this invention is to provide an offline power supply port health status detection method and circuit for circuit boards, which can detect the power consumption and current of the circuit board under multiple power supply voltages, and indirectly determine whether the capacitance value of the power supply port is abnormal by detecting the voltage drop slope during voltage switching. It has high detection accuracy, is easy to operate, and provides intuitive results, making it suitable for rapid on-site assessment of the health status of the power supply port of the circuit board.

[0006] To achieve the above objectives, the present invention provides the following technical solution: A method for detecting the health status of an offline power supply port on a circuit board, comprising: S1. By controlling the multi-level programmable voltage source module and corresponding relay switching through FPGA, different levels of power supply voltage are provided to the board under test; S2. Under different supply voltages, the power supply port voltage and sampling resistor side voltage of the board under test are collected by the sampling resistor unit and its corresponding voltage follower and analog-to-digital conversion circuit, and the power consumption current of the board under test is calculated. S3. Based on the comparison result between the power consumption current and the preset qualified threshold, determine whether the power consumption of the board under test is normal: if normal, continue testing; if abnormal, the FPGA records and controls the LED indicator. S4. During the switching process of different power supply voltages, detect the drop slope of the voltage at the port of the board under test. Based on the comparison between the actual time taken for the port voltage to drop to the preset amplitude and the preset time range, determine whether the capacitance value of the port of the board under test is normal. If it is normal, continue the test; if it is abnormal, the FPGA records and controls the LED indicator.

[0007] In S1, the output voltage of the multi-stage programmable voltage source module decreases step by step, and each stage of the voltage source module is equipped with an output filter capacitor to filter out high-frequency noise at the output of the voltage source module.

[0008] In S2, the power consumption current of the board under test is expressed as: ; in: The power consumption current of the board under test; This is the voltage across the sampling resistor. Provide the power supply port voltage for the board under test; This represents the resistance value of the sampling resistor in the corresponding power supply path.

[0009] In S2, the sampling resistor unit includes multiple sets of sampling resistors with different resistance values, corresponding to high current, low current, and micro current power supply paths, to adapt to boards with different power consumption levels. High-current power supply paths, low-current power supply paths, and micro-current power supply paths must satisfy the following relationship: ; in: for Sampling resistor value for high current power supply path; The resistance value of the sampling resistor is used for the low-current power supply path; The resistance value of the sampling resistor is used for the micro-current power supply path, and the corresponding current detection ranges of the three components satisfy the following: ; These represent the maximum current values ​​detected for each path.

[0010] In S3, the process of determining whether the power consumption of the tested board is normal is as follows: The FPGA calculates the power consumption and current of the board under test at the current supply voltage. Compared with the preset power consumption qualified threshold range Comparison: if If so, the power consumption is considered normal; if or If the power consumption is abnormal, the FPGA will record the abnormal information and control the corresponding LED to light up. in: This is the preset lower limit value for power consumption current; This is the preset upper limit of power consumption current.

[0011] In S1, the multi-stage programmable voltage source module has at least 8 stages, with the output voltage decreasing step by step. The highest output voltage is 16V, and each subsequent stage decreases by 2V.

[0012] An offline power supply port health status detection circuit for a circuit board includes an FPGA chip, a multi-level programmable voltage source module, relays, a sampling resistor unit, and a voltage follower and analog-to-digital converter circuit. The multi-level programmable voltage source module is connected to the sampling resistor unit through corresponding relays. The sampling resistor unit is connected to the voltage follower and analog-to-digital converter circuit and the circuit board under test. The coil of each relay is connected to the FPGA chip through a port, and the voltage follower and analog-to-digital converter circuit is connected to the FPGA chip through a port.

[0013] The multi-level programmable voltage source module includes multiple voltage source modules. Each voltage source module includes three voltage sources and three relays. The normally closed contact of the first relay is connected to the output terminal of the first voltage source. The normally open contact of the first relay is connected to the output terminal of the second voltage source. The normally open contact of the second relay is connected to the output terminal of the third voltage source. The normally closed contacts of the first relay, the normally closed contacts of the second relay, and the normally open contacts of the third relay are connected in series. The normally open contact of the third relay is connected to the input terminal of the sampling resistor unit. The output of each voltage source is connected to the corresponding capacitor.

[0014] The sampling resistor unit includes several sampling resistors, the number of which is the same as the number of voltage source modules. The input terminal of each sampling resistor is connected to the corresponding voltage source module through an anti-reverse-feedback diode. The voltage follower and analog-to-digital converter circuit includes multiple groups. The number of voltage follower and analog-to-digital converter circuits in each group is the same as the number of voltage source modules. Each group of voltage follower and analog-to-digital converter circuits includes an operational amplifier chip and an analog-to-digital converter chip (AD). The operational amplifier chip is connected to the analog-to-digital converter chip (AD). The connection between the sampling resistor and the anti-reverse-feedback diode is connected to the non-inverting input terminal of the operational amplifier chip. The other end of all sampling resistors is connected to the non-inverting input terminal of the last operational amplifier chip. A resistor is used to connect to the board under test.

[0015] Compared with the prior art, the beneficial effects of the present invention are: 1. By controlling the multi-level programmable voltage source module and relay switching through FPGA, multiple different levels of power supply voltage (such as 16V, 14V, ..., 2V) can be provided to the board under test in sequence. The power consumption current detection at each voltage level and the indirect detection of the capacitance value of the power supply port can be completed in the same detection process, which solves the problem of single board health status detection items and low efficiency during on-site maintenance. 2. By setting multiple sets of sampling resistors with different resistance values ​​(corresponding to high current, low current, and micro current power supply paths respectively), and in conjunction with voltage follower and analog-to-digital conversion circuits, it can be adapted to boards with different power consumption levels. While ensuring normal power supply, it significantly improves the detection accuracy and dynamic measurement range of power consumption current. 3. During the switching process of different power supply voltages, the external voltage source is isolated by the anti-reverse-feeding diode, so that the drop slope of the voltage at the port of the board under test is determined only by the capacitance value of the port and the current power consumption current. By detecting the actual time taken for the port voltage to drop by the preset amplitude and comparing it with the preset time range, it is possible to accurately determine whether there is an abnormality in the capacitance value of the port, thus realizing indirect, fast and online detection of capacitance value. 4. The detection results are indicated by two sets of LEDs: the first set of LEDs (such as LED1~LED8) indicates the abnormal power consumption status under different power supply voltages; the second set of LEDs (such as LED12) indicates the abnormal status of the port voltage drop slope. The FPGA automatically records the abnormal information and drives the corresponding LEDs to light up. The testers can quickly identify the health status of the board without complicated analysis. 5. Without the need to remove capacitors from the board or use external LCR meters or other specialized instruments, power consumption detection and capacitor value anomaly judgment can be completed under multiple voltage levels with just one connection. The detection process is controlled by FPGA, which is simple to operate and highly efficient, making it very suitable for on-site maintenance of power equipment. Attached Figure Description

[0016] Figure 1 This is a structural diagram of the health status detection circuit for the offline power supply port of the board. Detailed Implementation

[0017] The present invention will now be described in detail with reference to the accompanying drawings, but it should be noted that the implementation of the present invention is not limited to the following embodiments.

[0018] The following embodiments are implemented based on the technical solution of the present invention, providing detailed implementation methods and specific operation processes. However, the scope of protection of the present invention is not limited to the following embodiments. Unless otherwise specified, the methods used in the following embodiments are conventional methods.

[0019] Example 1:

[0020] See Figure 1A method and circuit for detecting the health status of an offline power supply port on a circuit board are disclosed, comprising an FPGA chip, an eight-level programmable voltage source module, a relay, a sampling resistor unit, and a voltage follower and analog-to-digital converter circuit. The eight-level programmable voltage source module requires an external 36V power supply and is configured to enable testing of the secondary test board at different power supply voltage inputs.

[0021] The multi-stage programmable voltage source module includes three voltage source modules and three relay groups. The first voltage source module includes voltage source 1, voltage source 2, and voltage source 3; the second voltage source module includes voltage source 4, voltage source 5, and voltage source 6; and the third voltage source module includes voltage source 7 and voltage source 8. The configurations of voltage source 2, voltage source 3, voltage source 4, voltage source 5, and voltage source 6, and the third voltage source module including voltage source 7 and voltage source 8, are the same as those of voltage source 1, all equipped with output filter capacitors. Voltage source 1 has the highest output voltage, and the output voltage of voltage source 2, voltage source 3, voltage source 4, voltage source 5, voltage source 6, voltage source 7, and voltage source 8 decreases progressively. Voltage source 1 is 16V, and the power supply of voltage source 2, voltage source 3, voltage source 4, voltage source 5, voltage source 6, voltage source 7, and voltage source 8 decreases by 2V progressively.

[0022] The first relay group includes relays K1, K2, and K3; the second relay group includes relays K4, K5, and K6; and the third relay group includes relays K7, K8, and K9. Relays K1, K2, K3, K4, K5, K6, K7, K8, and K9 are used for switching between multiple power supplies. That is, the FPGA chip controls the operation of the above relays to enable power supply to the board under test from different voltage sources.

[0023] Because the power consumption of the board under test varies significantly under different input voltages, corresponding sampling resistor units are set up to match different voltage levels. The input terminal of each sampling resistor is connected to the corresponding voltage source module through a reverse-current protection diode, as detailed below: A high-current power supply port consisting of a reverse-feedback protection diode D1 and a resistor R1; A low-current power supply port consisting of anti-reverse-feedback diode D2 and resistor R2; A microcurrent power supply port consisting of a reverse-current protection diode D3 and a resistor R3.

[0024] Different current-limiting resistor values ​​are configured to achieve normal power supply to the board under test and higher precision power consumption and current detection functions.

[0025] See Figure 1In the initial state, by default, voltage source 1 supplies power to the board under test via relays K1, K2, K3, anti-reverse current diode D1, and resistor R1. When the FPGA chip activates relay K1, voltage source 2 supplies power to the board under test via relays K1, K2, K3, anti-reverse current diode D1, and resistor R1. When the FPGA chip activates relay K2, voltage source 3 supplies power to the board under test via relays K2, K3, anti-reverse current diode D1, and resistor R1.

[0026] When the FPGA chip activates relays K3 and K6, power is supplied to the board under test via voltage source 4 through relays K4, K5, K6, anti-reverse current diode D2, and resistor R2. When the FPGA chip activates relay K4, power is supplied to the board under test via voltage source 5 through relays K4, K5, K6, anti-reverse current diode D2, and resistor R2. When the FPGA chip activates relay K5, power is supplied to the board under test via voltage source 6 through relays K5, K6, anti-reverse current diode D2, and resistor R2.

[0027] When the FPGA chip controls relay K6 to reset and then controls relay K9 to activate, power is supplied to the board under test from voltage source 7 via relays K7, K8, K9, anti-reverse current diode D3, and resistor R3. When the FPGA chip controls relay K7 to activate, power is supplied to the board under test from voltage source 8 via relays K7, K8, K9, anti-reverse current diode D3, and resistor R3. When the FPGA chip controls relay K8 to activate, the power supply is connected to 0V, and the power supply test is complete.

[0028] The voltage follower and analog-to-digital converter circuit consists of multiple groups, with the number of voltage follower and analog-to-digital converter circuits in each group being the same as the number of voltage source modules. The details are as follows: Operational amplifier 1 and analog-to-digital converter chip AD1 are used to sample the voltage to the left of current-limiting resistor R1. Operational amplifier 2 and analog-to-digital converter chip AD2 are used to sample the voltage to the left of current-limiting resistor R2; Operational amplifier 3 and analog-to-digital converter chip AD3 are used to sample the voltage to the left of current-limiting resistor R3. Operational amplifier 4 and analog-to-digital converter chip AD4 are used to acquire the voltage at the power supply port of the board under test.

[0029] The current consumed when powered by voltage sources 1, 2, and 3 is calculated by subtracting the voltage from ...

[0030] The FPGA chip allows for setting acceptable power consumption parameters for different supply voltages in the software. When the supply current exceeds the range at a certain supply voltage, the FPGA chip can control the corresponding LEDs in LEDs 1-8 to illuminate, indicating the abnormal power consumption. The FPGA chip selected is the 10M16SCE144I7G, but other chips can also be chosen.

[0031] Example 2:

[0032] In this embodiment, the method and circuit for detecting the health status of an offline power supply port of a board are the same as in Embodiment 1, with the addition of a detection process.

[0033] A method for detecting the health status of an offline power supply port on a circuit board, comprising: S1. By controlling the multi-level programmable voltage source module and corresponding relay switching through FPGA, different levels of power supply voltage are provided to the board under test.

[0034] The FPGA sequentially controls relays to provide the tested board with eight power supply voltages: 16V, 14V, 12V, 10V, 8V, 6V, 4V, and 2V. Each voltage source is equipped with an output filter capacitor to filter out high-frequency noise at the output. The multi-stage programmable voltage source module outputs a progressively lower voltage, with the highest output voltage being 16V, decreasing by 2V for each subsequent stage.

[0035] S2. Under different supply voltages, the power supply port voltage and sampling resistor side voltage of the board under test are collected by the sampling resistor unit and its corresponding voltage follower and analog-to-digital conversion circuit, and the power consumption current of the board under test is calculated. The sampling resistor unit includes multiple sets of sampling resistors with different resistance values, corresponding to high-current, low-current, and micro-current power supply paths respectively, to adapt to boards with different power consumption levels; the high-current power supply path, low-current power supply path, and micro-current power supply path satisfy the following relationship: ; in: for The sampling resistor value for the high-current power supply path is set to 0.1Ω; The sampling resistor value for the low-current power supply path is set to 1Ω; The sampling resistor value for the microcurrent power supply path is set to 10Ω.

[0036] The corresponding current detection ranges of the three satisfy the following: ; in: These are the maximum current values ​​detected for each path, with values ​​of 5A, 0.5A, and 0.05A respectively.

[0037] The power consumption current of the board under test is expressed as: ; in: The power consumption current of the board under test; This is the voltage across the sampling resistor. Provide the power supply port voltage for the board under test; This represents the resistance value of the sampling resistor in the corresponding power supply path.

[0038] S3. Based on the comparison result between the power consumption current and the preset qualified threshold, determine whether the power consumption of the board under test is normal: if normal, continue testing; if abnormal, the FPGA records and controls the LED indicator. The process of determining whether the power consumption of the board under test is normal is as follows: The FPGA calculates the power consumption current of the board under test under the current supply voltage. Compared with the preset power consumption qualified threshold range Comparison: if If so, the power consumption is considered normal; if or If the power consumption is abnormal, the FPGA will record the abnormal information and control the corresponding LED to light up. in: This is the preset lower limit value for power consumption current; This is the preset upper limit of power consumption current.

[0039] For example: under a 16V supply voltage, preset A, A. If the measured current is 0.8A, it is considered normal. If the measured current is 1.5A, it is considered abnormal, and the FPGA controls the corresponding LED1 to light up.

[0040] S4. During the switching process of different power supply voltages, detect the drop slope of the voltage at the port of the board under test. Based on the comparison between the actual time taken for the port voltage to drop to the preset amplitude and the preset time range, determine whether the capacitance value of the port of the board under test is normal. If it is normal, continue the test; if it is abnormal, the FPGA records and controls the LED indicator.

[0041] During the detection of the port voltage drop slope, the port voltage of the board under test is isolated by anti-reverse current diodes. The drop slope is determined only by the port capacitance value and the current power consumption current, expressed as: ; in: The slope of the voltage drop at the port of the board under test; The capacitance value of the power supply port of the board under test; Preset amplitude of voltage drop at the port of the board under test The actual time used satisfy: .

[0042] For example, setting V, the preset acceptable range for descent time is... ,in: The preset minimum time threshold for port voltage drop; This is the preset maximum time threshold for port voltage drop.

[0043] If actual measurement If the value is within this range, the port capacitor value is considered normal. if Less than or greater than If the value is abnormal, the FPGA will control the corresponding LED to light up (e.g., LED12) to indicate that the capacitance value of the port is abnormal.

[0044] For example, during the 16V to 14V switch, preset , ; If actual measurement If so, it is considered normal; If actual measurement If the capacitance value of the port capacitor is too small (decreases too quickly), the FPGA will control LED12 to light up.

[0045] This invention utilizes an FPGA to control a multi-level programmable voltage source module and relay switching, sequentially providing multiple different power supply voltage levels (e.g., 16V, 14V, ..., 2V) to the board under test. Within a single testing process, it completes the detection of power consumption current at each voltage level, as well as the indirect detection of the power supply port capacitance value. This solves the problem of limited and inefficient board health status testing during on-site maintenance. By setting multiple sets of sampling resistors with different resistance values ​​(corresponding to high current, low current, and micro current power supply paths respectively), and in conjunction with voltage follower and analog-to-digital conversion circuits, it can adapt to boards with different power consumption levels. While ensuring normal power supply, it significantly improves the detection accuracy and dynamic measurement range of power consumption current. During the switching process between different power supply voltages, anti-reverse-current diodes isolate the external voltage source, ensuring that the voltage drop slope at the port of the board under test is determined only by the port capacitance value and the current power consumption current. By detecting the actual time taken for the port voltage to drop to a preset amplitude and comparing it with a preset time range, the abnormality of the port capacitance value can be accurately determined, realizing indirect, rapid, and online detection of capacitance value. The detection results are indicated by two sets of LEDs: the first set of LEDs (such as LED1~LED8) indicates the abnormal power consumption status under different supply voltages; the second set of LEDs (such as LED12) indicates the abnormal status of the port voltage drop slope. The FPGA automatically records the abnormal information and drives the corresponding LEDs to light up. The inspection personnel can quickly identify the health status of the board without complex analysis. There is no need to remove the capacitors on the board or use external LCR meters or other special instruments. Power consumption detection and capacitance value abnormality judgment under multiple voltage levels can be completed with just one connection. The detection process is controlled by FPGA, which is simple to operate and highly efficient, making it very suitable for on-site maintenance of power equipment.

Claims

1. A method for detecting the health status of an offline power supply port on a circuit board, characterized in that, include: S1. By controlling the multi-level programmable voltage source module and corresponding relay switching through FPGA, different levels of power supply voltage are provided to the board under test; S2. Under different supply voltages, the power supply port voltage and sampling resistor side voltage of the board under test are collected by the sampling resistor unit and its corresponding voltage follower and analog-to-digital conversion circuit, and the power consumption current of the board under test is calculated. S3. Based on the comparison result between the power consumption current and the preset qualified threshold, determine whether the power consumption of the board under test is normal: if normal, continue testing; if abnormal, the FPGA records and controls the LED indicator. S4. During the switching process of different power supply voltages, detect the drop slope of the voltage at the port of the board under test. Based on the comparison between the actual time taken for the port voltage to drop to the preset amplitude and the preset time range, determine whether the capacitance value of the port of the board under test is normal. If it is normal, continue the test; if it is abnormal, the FPGA records and controls the LED indicator.

2. The method for detecting the health status of an offline power supply port of a circuit board according to claim 1, characterized in that, In S1, the output voltage of the multi-stage programmable voltage source module decreases step by step, and each stage of the voltage source module is equipped with an output filter capacitor to filter out high-frequency noise at the output of the voltage source module.

3. The method for detecting the health status of an offline power supply port of a circuit board according to claim 1, characterized in that, In S2, the power consumption current of the board under test is expressed as follows: ； in: The power consumption current of the board under test; This is the voltage across the sampling resistor. Provide the power supply port voltage for the board under test; This represents the resistance value of the sampling resistor in the corresponding power supply path.

4. The method for detecting the health status of an offline power supply port of a circuit board according to claim 1, characterized in that, In S2, the sampling resistor unit includes multiple sets of sampling resistors with different resistance values, corresponding to high current, low current, and micro current power supply paths, to adapt to boards with different power consumption levels. High-current power supply paths, low-current power supply paths, and micro-current power supply paths must satisfy the following relationship: ； in: for Sampling resistor value for high current power supply path; Sample the resistance value of the low-current power supply path; The resistance value of the sampling resistor is used for the micro-current power supply path, and the corresponding current detection ranges of the three components satisfy the following: ； These represent the maximum current values ​​detected for each path.

5. The method for detecting the health status of an offline power supply port of a circuit board according to claim 1, characterized in that, In S3, the process of determining whether the power consumption of the tested board is normal is as follows: The FPGA calculates the power consumption and current of the board under test at the current supply voltage. Compared with the preset power consumption qualified threshold range Comparison: if If so, the power consumption is considered normal; if or If the power consumption is abnormal, the FPGA will record the abnormal information and control the corresponding LED to light up. in: This is the preset lower limit value for power consumption current; This is the preset upper limit of power consumption current.

6. The method for detecting the health status of an offline power supply port of a circuit board according to claim 1, characterized in that, In S1, the multi-stage programmable voltage source module has at least 8 stages, with the output voltage decreasing step by step. The highest output voltage is 16V, and each subsequent stage decreases by 2V.

7. A circuit for detecting the health status of an offline power supply port of a circuit board for implementing the method of any one of claims 1-6, characterized in that, It includes an FPGA chip, a multi-level programmable voltage source module, relays, sampling resistor units, and a voltage follower and analog-to-digital converter circuit. The multi-level programmable voltage source module is connected to the sampling resistor unit through corresponding relays. The sampling resistor unit is connected to the voltage follower and analog-to-digital converter circuit and the board under test. The coil of each relay is connected to the FPGA chip through a port, and the voltage follower and analog-to-digital converter circuit is connected to the FPGA chip through a port.

8. The offline power supply port health status detection circuit for a circuit board according to claim 7, characterized in that, The multi-level programmable voltage source module includes multiple voltage source modules. Each voltage source module includes three voltage sources and three relays. The normally closed contact of the first relay is connected to the output terminal of the first voltage source. The normally open contact of the first relay is connected to the output terminal of the second voltage source. The normally open contact of the second relay is connected to the output terminal of the third voltage source. The normally closed contacts of the first relay, the normally closed contacts of the second relay, and the normally open contacts of the third relay are connected in series. The normally open contact of the third relay is connected to the input terminal of the sampling resistor unit. The output of each voltage source is connected to the corresponding capacitor.

9. The offline power supply port health status detection circuit for a circuit board according to claim 7, characterized in that, The sampling resistor unit includes several sampling resistors, the number of which is the same as the number of voltage source modules. The input terminal of each sampling resistor is connected to the corresponding voltage source module through an anti-reverse-feedback diode. The voltage follower and analog-to-digital converter circuit includes multiple groups, and the number of voltage follower and analog-to-digital converter circuits in each group is the same as the number of voltage source modules. Each group of voltage follower and analog-to-digital converter circuits includes an operational amplifier chip and an analog-to-digital converter chip (AD). The operational amplifier chip and the analog-to-digital converter chip (AD) are connected. The connection point of the sampling resistor and the anti-reverse-feedback diode is connected to the non-inverting input terminal of the operational amplifier chip. The other end of all sampling resistors is connected to the non-inverting input terminal of the last operational amplifier chip. A resistor is used to connect to the board under test.

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