Signal processing method, board card, spectrometer, storage medium and program product

Abstract

The application is suitable for the technical field of signal processing, and provides a signal processing method, a board card, a spectrum instrument, a storage medium and a program product. The signal processing method comprises the following steps: in response to a control instruction, based on configuration parameters in the control instruction, using a coordinate rotation digital computer algorithm to iteratively solve sine amplitude and cosine amplitude in real time, and outputting N-channel digital waveform data, wherein the N-channel digital waveform data is staggered in phase according to a fixed phase difference, and N is a positive integer greater than 1; merging the N-channel digital waveform data into one serial signal stream; and reconstructing the serial signal stream into an analog intermediate frequency signal and an analog local oscillator signal through different digital-to-analog converters, so that the analog intermediate frequency signal and the analog local oscillator signal are phase-related. The embodiment of the application can avoid phase drift caused by independent generation of different signal sources, and is helpful to improve the signal-to-noise ratio and resolution of a spectrum.

Description

Technical Field

[0001] This application belongs to the field of signal processing technology, and in particular relates to a signal processing method, board, spectrometer, storage medium and program product. Background Technology

[0002] Nuclear magnetic resonance (NMR) spectrometers excite the spins of atomic nuclei in a sample using radio frequency (RF) excitation signals and detect the free induction decay (FID) signal to obtain the sample's spectral information. In the RF link of an NMR spectrometer, the quality of the intermediate frequency (IF) signal and the local oscillator (LO) signal directly determines the signal-to-noise ratio (SNR) and resolution of the spectrum. Existing technologies typically employ direct digital frequency synthesis (DDS) to generate the IF signal through single-channel serial waveform processing within a field-programmable gate array (FPGA). However, traditional DDS uses a "phase accumulator + waveform lookup table" architecture, which introduces periodic errors during phase truncation, introducing non-harmonic spurious signals into the output spectrum. These spurious signals raise the system noise floor and mask nearby weak nuclear spin signals. Furthermore, to meet the demand for extremely high frequency resolution, traditional DDS designs require increasing the number of bits in the phase accumulator and the depth of the lookup table, leading to excessive consumption of on-chip FPGA storage resources. Furthermore, when generating high-frequency signals, the single-channel serial processing architecture places extremely high demands on the processing speed of the FPGA's internal logic. As the clock frequency increases, the data path delay can easily exceed the clock cycle, leading to difficulties in timing convergence. On the other hand, in existing technologies, the intermediate frequency signal and the local oscillator signal are usually generated by independent signal sources. The phase difference between the two signals will drift over time, ultimately reducing the signal-to-noise ratio and resolution of the spectrum. Summary of the Invention

[0003] This application provides a signal processing method, board, spectrometer, storage medium, and program product that can improve the signal-to-noise ratio and resolution of spectra.

[0004] The first aspect of this application provides a signal processing method, comprising: responding to a control command, based on configuration parameters in the control command, using a coordinate rotation digital calculation algorithm to iteratively calculate the sine amplitude and cosine amplitude in real time, and outputting N channels of digital waveform data; wherein the N channels of digital waveform data are staggered in phase according to a fixed phase difference, and N is a positive integer greater than 1; merging the N channels of digital waveform data into a single serial signal stream; and reconstructing the serial signal stream into an analog intermediate frequency signal and an analog local oscillator signal through different digital-to-analog converters, such that the analog intermediate frequency signal and the analog local oscillator signal are phase correlated.

[0005] In some implementations of the first aspect, the sine and cosine amplitudes are iteratively calculated in real time using a coordinate rotation digital calculation algorithm, including: performing full-precision phase accumulation using an M-bit phase accumulator to output the current untrunculated phase value, where M≥36; and calculating the corresponding sine and cosine amplitudes based on the current phase value using the coordinate rotation digital calculation algorithm.

[0006] In some embodiments of the first aspect, before using the coordinate rotation digital calculation algorithm to iteratively calculate the sine amplitude and cosine amplitude in real time, the method further includes: configuring the frequency control word through a frequency control word constraint mechanism to ensure that the phase accumulator is precisely closed within a finite period.

[0007] In some embodiments of the first aspect, merging N digital waveform data into a single serial signal stream includes: aligning the N digital waveform data and then merging them into a data stream via parallel-to-serial conversion; transmitting the merged data stream at the rising and falling edges of a clock cycle to convert it into a serial signal stream.

[0008] In some embodiments of the first aspect, reconstructing the analog intermediate frequency signal includes: distributing a serial signal stream to a first digital-to-analog converter; and controlling the first digital-to-analog converter to reconstruct the serial signal stream into an analog intermediate frequency signal for use as a radio frequency transmission excitation source for the nuclear magnetic resonance system.

[0009] In some embodiments of the first aspect, reconstructing the analog local oscillator signal includes: distributing a serial signal stream to a second digital-to-analog converter; controlling the second digital-to-analog converter to reconstruct the serial signal stream into an analog signal; and inputting the analog signal into a phase-locked loop connected to the second digital-to-analog converter for frequency multiplication to generate an analog local oscillator signal.

[0010] In some embodiments of the first aspect, the signal processing method further includes: down-converting the received radio frequency echo signal back to the intermediate frequency using an analog local oscillator signal; after analog-to-digital conversion, digitally mixing the digital sample stream using the digital local oscillator signal, shifting it to the baseband, separating the in-phase component and the quadrature component to obtain the baseband signal; and outputting the baseband signal after filtering and decimation processing.

[0011] In some embodiments of the first aspect, the signal processing method further includes: using any one of the N digital waveform data as a digital local oscillator signal to digitally mix the received digital sample stream and shift it to the baseband.

[0012] A second aspect of this application provides a signal processing board, comprising: a pulse sequence module for receiving control commands; a numerically controlled oscillator connected to the pulse sequence module for responding to the control commands and, based on configuration parameters in the control commands, using a coordinate rotation digital calculation algorithm to iteratively calculate the sine and cosine amplitudes in real time, and output N channels of digital waveform data; wherein the N channels of digital waveform data are staggered in phase according to a fixed phase difference, and N is a positive integer greater than 1; a parallel-to-serial conversion module connected to the numerically controlled oscillator for merging the N channels of digital waveform data into a single serial signal stream; a first digital-to-analog converter and a second digital-to-analog converter connected to the parallel-to-serial conversion module, respectively, for receiving the serial signal stream and reconstructing it into an analog intermediate frequency signal and an analog local oscillator signal, such that the analog intermediate frequency signal and the analog local oscillator signal are phase-correlated; wherein the numerically controlled oscillator is also used to output one of the N channels of digital waveform data to a digital mixer as a digital local oscillator signal.

[0013] A third aspect of this application provides a spectrometer, including: a magnet system, a probe, a radio frequency system, a signal detection system, and a signal processing board; the magnet system is used to generate a static magnetic field; the probe is used to place a sample and includes a radio frequency coil; the signal processing board is used to generate an analog intermediate frequency signal, an analog local oscillator signal, and a digital local oscillator signal; the analog local oscillator signal is used to up-convert the analog intermediate frequency signal to radio frequency, amplify it through the radio frequency system, and apply it to the sample through the radio frequency coil to excite a nuclear magnetic resonance signal; the digital local oscillator signal is used to down-convert the free induction attenuation signal output by the probe to intermediate frequency, and is detected by the signal detection system.

[0014] A fourth aspect of this application provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps of the above-described signal processing method.

[0015] The fifth aspect of this application provides a computer program product that, when run on a spectrometer, causes the spectrometer to execute the steps of the above-described signal processing method.

[0016] The embodiments of this application have the following beneficial effects: First, the spectral purity is improved. By combining an M-bit full-precision phase accumulator with a frequency control word constraint mechanism, the periodic quantization noise introduced by phase truncation is eliminated at the algorithm level, avoiding the interference of phase truncation spurious signals on weak signal detection in traditional DDS schemes.

[0017] Second, storage resources are saved. By using the shift-add characteristic of the coordinate rotation digital calculation algorithm to replace the large-capacity waveform lookup table, the waveform storage that originally required FPGA block memory resources is transformed into iterative operations of logic units, which greatly reduces storage resource consumption and hardware costs.

[0018] Third, timing pressure is reduced. By decomposing single-channel serial processing into N parallel channels, the operating clock frequency of each channel is reduced to 1 / N of that of the single-channel solution, and the clock period is correspondingly extended, effectively solving the setup time violation problem in high-frequency signal generation scenarios.

[0019] Fourth, signal phase coherence. By reconstructing the same digital signal source into analog intermediate frequency signals and analog local oscillator signals through different digital-to-analog converters, the two signals are phase correlated, avoiding the phase drift introduced by independent generation of different signal sources, which helps to improve the signal-to-noise ratio and resolution of the spectrum. Attached Figure Description

[0020] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 This is a schematic diagram illustrating the implementation flow of the signal processing method provided in the embodiments of this application; Figure 2 This is a schematic diagram of the structure of the signal processing board provided in the embodiments of this application; Figure 3 This is a schematic diagram of the specific structure of the signal processing board provided in the embodiments of this application; Figure 4 This is a schematic diagram of the specific structure of the spectrometer provided in the embodiments of this application. Detailed Implementation

[0022] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are protected by this application.

[0023] It should be understood that, when used in this application specification and the appended claims, the term "comprising" indicates the presence of the described features, integrals, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or a collection thereof.

[0024] In the description of this application and the appended claims, the terms "first," "second," "third," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0025] References to "one embodiment" or "some embodiments" as described in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.

[0026] Nuclear magnetic resonance (NMR) spectrometers excite the spins of atomic nuclei in a sample using radio frequency (RF) excitation signals and detect free-induction decay signals to obtain the sample's spectral information. Existing techniques typically generate intermediate frequency (IF) signals through single-channel serial waveform processing within a field-programmable gate array (FPGA). Since the IF and local oscillator (LO) signals originate separately, the phase difference between the two signals accumulates over time, leading to a decrease in the signal-to-noise ratio (SNR) and resolution of the spectrum. Therefore, this application proposes a signal processing method, a signal processing board, and a spectrometer that decomposes the original single-channel waveform data into multiple parallel data streams. This reduces the timing pressure of a single data path and ensures phase correlation between the analog IF and LO signals, avoiding phase drift introduced by independent signal sources and contributing to improved SNR and resolution of the spectrum.

[0027] To illustrate the technical solution of this application, specific embodiments are described below.

[0028] Please refer to Figure 1 , Figure 1 A schematic diagram of the implementation flow of the signal processing method provided in the embodiment of this application is shown. This method can be applied to a spectrometer.

[0029] Specifically, the above signal processing method may include the following steps S101 to S103.

[0030] Step S101: In response to the control command, based on the configuration parameters in the control command, the sine amplitude and cosine amplitude are iteratively calculated in real time using the coordinate rotation digital calculation algorithm, and N channels of digital waveform data are output.

[0031] The control commands are instructions issued by the host computer to configure signal output parameters. These commands can carry configuration parameters for setting attributes such as signal output frequency and phase. Based on the configuration parameters in the control commands, N channels of digital waveform data can be output, where N is a positive integer greater than 1.

[0032] In the embodiments of this application, the digital waveform data is a sequence of digitized sine or cosine waveform samples output by a numerically controlled oscillator (NCO) driven by a system clock (e.g., 250MHz). Specifically, the NCO is a Coordinate Rotation Digital Computer (CORDIC) NCO. The CORDIC algorithm decomposes the target rotation angle into several fixed-angle iterative rotations. Each iteration involves only shifting and addition / subtraction operations, gradually approximating the coordinate position corresponding to the target phase, and finally outputting the sine and cosine amplitudes at that phase. The advantage of the CORDIC algorithm is that it only requires shifters and adders to complete the amplitude calculation, without occupying storage resources to build a lookup table or consuming multiplier resources. As the number of iterations increases, the calculation accuracy gradually improves, allowing for a flexible trade-off between hardware resource consumption and output accuracy.

[0033] N digital waveform data are distributed in an interleaved manner according to a fixed phase difference and output in parallel. In this way, the phase states of each channel are different at the same time. After the outputs of the N digital waveform data on the same clock edge are spliced ​​in sequence, the equivalent sampling rate is N times the system clock frequency. Thus, a higher equivalent output sampling rate can be achieved without increasing the system clock frequency.

[0034] For example, when N=4 and the fixed phase difference is 90°, at the same time, the output of NCO#1 corresponds to the phase θ, the output of NCO#2 corresponds to the phase θ+90°, the output of NCO#3 corresponds to the phase θ+180°, and the output of NCO#4 corresponds to the phase θ+270°. The four outputs are staggered in phase and uniformly cover the entire phase period.

[0035] In some specific implementations, the real-time iterative calculation of the sine and cosine amplitudes using a coordinate rotation digital calculation algorithm may include: performing full-precision phase accumulation using an M-bit phase accumulator to output the current untrunculated phase value; and calculating the corresponding sine and cosine amplitudes based on the current phase value using a coordinate rotation digital calculation algorithm.

[0036] Where M≥36, the specific value can be set according to the resolution requirements of the spectrum and the computing resources.

[0037] Furthermore, before using the coordinate rotation digital calculation algorithm to iteratively calculate the sine and cosine amplitudes in real time, it may also include: configuring the frequency control word through a frequency control word constraint mechanism to ensure that the phase accumulator is precisely closed within a finite period.

[0038] Specifically, the host computer can issue control commands through the Pulse Sequence Data (PSD) module. These commands can include the target RF frequency, amplitude information, and receiver demodulation configuration. By parsing the control commands, configuration parameters can be obtained, including the frequency control word and phase increment. The frequency tuning word (FTW) is determined based on the target RF frequency. The phase increment is the phase step value accumulated by the phase accumulator in each system clock cycle, determined by the frequency control word. The initial phase value is the starting phase value of the phase accumulator in each channel of the numerically controlled oscillator at startup, also determined by the frequency control word. Each channel of the numerically controlled oscillator contains a phase accumulator. This phase accumulator starts with the configured initial phase value and accumulates the phase increment once per system clock cycle, forming a current phase value that increases linearly with time. The bit width of the phase accumulator determines the fineness of the frequency resolution. Each time the phase accumulator updates the current phase value, the numerically controlled oscillator calculates the corresponding sine and cosine amplitudes based on that current phase value and outputs them as the digital waveform data for that channel. The initial phase value of each channel is configured by the frequency control word, and the initial phase values ​​of adjacent channels differ by a fixed phase difference. This ensures that the phase states of each channel at the same time are different and uniformly distributed, achieving phase-interleaved output.

[0039] In step S101, the frequency control module calculates the frequency control word based on the target RF frequency and configures it through a frequency control word constraint mechanism. This ensures that the phase accumulator's accumulation state within a finite clock cycle is precisely closed under M-bit full-precision width, avoiding periodic quantization noise introduced by phase truncation. In this embodiment, M is 36 bits. With a system clock of 250MHz, the frequency resolution based on the 36-bit phase accumulator reaches Δf = 250MHz / 2³. 6 ≈3.64×10 - ³ Hz, meeting the frequency accuracy requirements of ultra-high resolution nuclear magnetic resonance spectrometers.

[0040] Step S102: Combine N channels of digital waveform data into a single serial signal stream.

[0041] In the embodiments of this application, the N channels of digital waveform data are staggered in phase, indicating a definite sequential relationship between the channels, but the data are distributed on different physical channels. By cyclically selecting the data channels in a fixed channel order, extracting the sampled value of each channel at the current moment, and concatenating them into a continuous output sequence, the N parallel digital waveform data can be rearranged into a single serial signal stream. This process only changes the arrangement of the data, without altering the frequency and phase information carried by the data itself.

[0042] In step S102, the 36-bit CORDIC NCO uses 36-bit full-precision phase values ​​as input and employs a coordinate rotation digital computation algorithm to iteratively calculate the sine and cosine amplitudes in real time, avoiding the background noise increase caused by amplitude quantization in traditional lookup table methods. Each iteration of the CORDIC algorithm involves only shifting and addition / subtraction operations, eliminating the need for storage resources to build a waveform lookup table or consuming multiplier resources. As the number of iterations increases, the calculation accuracy gradually improves.

[0043] Step S103: The serial signal stream is reconstructed into an analog intermediate frequency signal and an analog local oscillator signal through different digital-to-analog converters, so that the analog intermediate frequency signal and the analog local oscillator signal are phase correlated.

[0044] A digital-to-analog converter (DAC) is an electronic device that converts digital signals into analog signals. A DAC converts a discrete sequence of digital samples from a serial signal stream into a continuous analog signal waveform according to a sampling clock cycle. The frequency and phase of the reconstructed analog signal are determined by the input sequence of digital samples.

[0045] Analog intermediate frequency (IF) signals and analog local oscillator (LO) signals can be reconstructed separately using different digital-to-analog (DTA) converters. The IF signal is a continuous analog signal operating in the intermediate frequency band. The LO signal is a continuous analog signal used for frequency shifting. Both the IF and LO signals can be used as input signals for the transmitter in nuclear magnetic resonance (NMR) systems. The digital signal sources of both DTA converters are connected to the same polyphase numerically controlled oscillator (PNOC), enabling the IF and LO signals to generate the same digital sampling sequence within the same clock domain. Based on this identical digital sampling sequence and the same clock domain, even though the analog output channels of the two DTA converters are independent, the phase difference of their output analog signals remains constant and does not drift over time, thus achieving phase-coherent output.

[0046] In the embodiments of this application, based on the configuration parameters in the control instructions, the sine and cosine amplitudes are iteratively calculated in real time using a coordinate rotation digital calculation algorithm, and N digital waveform data are output. The N digital waveform data are distributed in an interleaved phase according to a fixed phase difference. The N digital waveform data are then merged into a single serial signal stream. On the one hand, the waveform storage that originally required FPGA block memory resources is transformed into iterative operation of logic units, which greatly reduces storage resource consumption and hardware costs. On the other hand, the original single-channel serial processing is decomposed into N parallel channels. The operating clock frequency of each channel is reduced to 1 / N of that of the single-channel solution, and the clock period is correspondingly extended, effectively solving the setup time violation problem in high-frequency signal generation scenarios. At the same time, the serial signal stream is reconstructed into analog intermediate frequency signals and analog local oscillator signals through different digital-to-analog converters, so that the analog intermediate frequency signals and analog local oscillator signals are phase correlated, avoiding phase drift introduced by different signal sources, which helps to improve the signal-to-noise ratio and resolution of the spectrum.

[0047] In some embodiments of this application, merging N digital waveform data into a single serial signal stream may include: aligning the N digital waveform data and then merging them into a data stream through parallel-to-serial conversion; transmitting the merged data stream on the rising and falling edges of the clock to convert it into a serial signal stream.

[0048] Specifically, the N channels of digital waveform data are staggered in phase and have a definite sequential relationship. However, the path delay of each channel from the CNC oscillator output to the parallel-to-serial conversion module may not be completely consistent. Therefore, buffering and alignment are required first. The buffer temporarily stores the digital waveform data of each channel to the same clock cycle, synchronizing the digital waveform data in time and ensuring that each channel is at the correct sampling time during subsequent parallel-to-serial conversion. After alignment, the parallel-to-serial conversion module cyclically selects each channel in a fixed channel order, sequentially extracting the sampled value of each channel at the current moment and concatenating them into a single serial data stream. The merged serial data stream transmits one bit of data on both the rising and falling edges of the system clock, achieving dual-edge transmission. In this method, the physical data transmission rate is increased to twice the system clock frequency, while the internal logic still operates at the original system clock frequency, avoiding high-speed timing requirements on the FPGA's internal logic.

[0049] For example, when the system clock is 250MHz and N=4, the four parallel channels each output data at a rate of 250MHz. After parallel-to-serial conversion, the four data streams are merged into one data stream. The merged data stream enters the Output Double Data Rate (ODDR) interface, which, driven by a 500MHz clock, transmits data using both rising and falling edges, achieving a physical transmission rate of 1000Mbit / s, thereby achieving rate matching between the internal low-speed logic and the external high-speed physical interface.

[0050] In some embodiments of this application, reconstructing the analog intermediate frequency signal may include: distributing a serial signal stream to a first digital-to-analog converter; and controlling the first digital-to-analog converter to reconstruct the serial signal stream into an analog intermediate frequency signal as a radio frequency transmission excitation source for the nuclear magnetic resonance system.

[0051] Specifically, the serial signal stream carries frequency and phase information determined by the frequency control word and phase increment in the digital domain. When this serial signal stream is distributed to the first digital-to-analog converter (DAC#1), the DAC uses the system clock as the sampling cycle, sequentially converting each digital sampling point in the serial signal stream into its corresponding analog level value. These analog level values ​​are then continuously spliced ​​together in time sequence to form a continuous analog signal waveform, thus achieving the conversion from the digital domain to the analog domain. The reconstructed analog signal is the analog intermediate frequency (IF) signal, whose frequency is determined by the frequency control word, and whose initial phase is determined by the initial phase value. In a nuclear magnetic resonance (NMR) spectrometer, this analog IF signal can be shifted to the Larmor frequency via a subsequent upconversion link and applied to the sample as a radio frequency excitation source to excite atomic nuclei spin.

[0052] In some embodiments of this application, reconstructing an analog intermediate frequency signal may include: distributing a serial signal stream to a second digital-to-analog converter; controlling the second digital-to-analog converter to reconstruct the serial signal stream into an analog signal; and inputting the analog signal into a phase-locked loop connected to the second digital-to-analog converter for frequency multiplication to generate an analog local oscillator signal.

[0053] The second digital-to-analog converter (DAC#2) differs from the first DAC#1. When the serial signal stream is distributed to the second DAC, it uses the system clock as the sampling cycle, sequentially converting each digital sample point in the serial signal stream into its corresponding analog level value, forming a continuous analog signal. The frequency of this analog signal is determined by the frequency control word and is typically in a lower frequency range. To obtain a local oscillator signal that meets the system's required frequency band, the second DAC is connected to a phase-locked loop (PLL). The analog signal output from the second DAC can be input into the PLL, where frequency multiplication boosts the signal frequency to the target frequency band, generating an analog local oscillator signal. Considering that the frequency multiplication process introduces additional noise and spurious components, PLL locking or narrowband filtering can be used to lock the frequency-multiplied signal to a clean reference source, filtering out out-of-band noise and spurious components, ultimately outputting a high-purity analog local oscillator signal.

[0054] In the transmission link of a nuclear magnetic resonance spectrometer, the analog intermediate frequency (IF) signal and the analog local oscillator (LO) signal work together to generate the radio frequency (RF) excitation signal. Specifically, the analog IF signal operates in the IF band (typically tens to hundreds of MHz), while the analog LO signal operates at a frequency much higher than the IF. During transmission, the analog IF and LO signals are fed into a mixer for up-conversion mixing. The mixer uses the analog LO signal to shift the overall frequency of the analog IF signal to the Larmor frequency (RF band) corresponding to the static magnetic field strength, forming an RF excitation signal carrying pulse waveform information. This RF excitation signal is amplified by a power amplifier and applied to the sample through the probe's RF coil, exciting the atomic nuclei in the sample to undergo magnetic resonance. Because the analog IF and LO signals are phase-dependent, the RF excitation signal output after up-conversion has definite phase information, ensuring phase consistency during subsequent excitation of atomic nuclei spins.

[0055] In some embodiments of this application, the signal processing method may further include: down-converting the received radio frequency echo signal back to the intermediate frequency using an analog local oscillator signal; after analog-to-digital conversion, digitally mixing the digital sample stream using the digital local oscillator signal, shifting it to the baseband, separating the in-phase component and the quadrature component to obtain the baseband signal; and outputting the baseband signal after filtering and decimation processing.

[0056] The radio frequency (RF) echo signal is a free-induction decay signal induced in the sample coil during the relaxation process of atomic nuclei excited by an RF excitation signal. Its frequency is in the RF band (i.e., Larmor frequency) and carries the sample's spectral information, including the frequency components corresponding to each chemical shift, as well as their amplitude and phase information. The RF echo signal is fed into a mixer and mixed with an analog local oscillator signal. The RF echo signal and the analog local oscillator signal generate sum and difference frequency components in the mixer. After low-pass filtering, the difference frequency component is extracted. The overall spectrum of the RF echo signal is shifted down to the intermediate frequency band, achieving analog down-conversion.

[0057] After analog down-conversion, the radio frequency echo signal is reduced to the intermediate frequency (IF) band. The analog-to-digital converter (ADC) can effectively sample the signal within this band, converting the analog IF signal into a digital sample stream. Subsequently, the digital sample stream is digitally mixed using a digital local oscillator (LoU) signal. Digital mixing shifts the digital sample stream from the IF to the baseband, and orthogonal calculations separate the in-phase component (I) and the quadrature component (Q). These two components together constitute a complex baseband signal, which can fully characterize the amplitude, phase, and frequency information of the radio frequency echo signal. The spectral characteristics of the sample can then be extracted through amplitude and phase calculations.

[0058] Considering that in addition to the effective signal, the baseband signal also contains high-frequency image components introduced by mixing and out-of-band noise, it needs to be filtered by a low-pass filter to retain the effective baseband signal components and suppress interference. The filtered baseband signal is then decimated to reduce the data sampling rate, thereby alleviating the burden on subsequent data processing. Finally, the processed baseband signal is output to the back-end processing or storage unit.

[0059] In some embodiments of this application, the signal processing method may further include: using any one of the N digital waveform data as a digital local oscillator signal to digitally mix the received digital sample stream and shift it to the baseband.

[0060] For example, when N=4, the digital waveform data output by NCO#1 or NCO#2 can be used as the digital local oscillator signal. Thus, in the nuclear magnetic resonance spectrometer, the digital local oscillator signal, the analog intermediate frequency signal, and the analog local oscillator signal all originate from the same digitally controlled oscillator. The digital local oscillator signal is used for digital mixing operations in the receiving link. Its frequency has a definite correspondence with the frequency of the transmitted intermediate frequency signal. The digital local oscillator signal is obtained based on any one digital waveform data source, ensuring accurate recovery of the amplitude and phase information of the demodulated signal and avoiding demodulation distortion caused by phase uncertainties introduced by different signal sources.

[0061] It should be noted that, for the sake of simplicity, the aforementioned method embodiments are all described as a series of actions. However, those skilled in the art should understand that this application is not limited to the described order of actions, because according to this application, some steps can be performed in other orders.

[0062] like Figure 2 As shown, this application also provides a signal processing board 20, including: Pulse sequence module 201 is used to receive control commands; The numerically controlled oscillator 202, connected to the pulse sequence module 201, is used to respond to control commands and, based on the configuration parameters in the control commands, iteratively calculate the sine and cosine amplitudes in real time using a coordinate rotation digital calculation algorithm, and output N channels of digital waveform data; wherein, the N channels of digital waveform data are staggered in phase according to a fixed phase difference, and N is a positive integer greater than 1; Parallel-to-serial conversion module 203, connected to numerically controlled oscillator 202, is used to merge N channels of digital waveform data into one serial signal stream; The first digital-to-analog converter 204 and the second digital-to-analog converter 205 are respectively connected to the parallel-to-serial conversion module 203, and are used to receive the serial signal stream and reconstruct it into an analog intermediate frequency signal and an analog local oscillator signal respectively, so that the analog intermediate frequency signal and the analog local oscillator signal are phase correlated; wherein, the digitally controlled oscillator is also used to output one of the N channels of digital waveform data to the digital mixer as a digital local oscillator signal.

[0063] In some embodiments of this application, the pulse sequence module 201 can receive and parse control commands from the host computer to convert the control commands into hardware-recognizable low-level control signals, which are then transmitted to the transmitter and receiver respectively, so that the frequency control module 206 of the transmitter can set the frequency control word and phase increment, and the digital down-conversion link of the receiver can configure demodulation parameters.

[0064] In some embodiments of this application, such as Figure 3 As shown, the frequency control module 206 between the pulse sequence module 201 and the numerically controlled oscillator 202 can receive the frequency control word and phase increment from the pulse sequence module 201, calculate the frequency control word according to the target radio frequency, and configure the frequency control word through the frequency control word constraint mechanism, converting it into the phase increment and amplitude scalar required by the numerically controlled oscillator 202, so that the phase accumulator's accumulation state under the M-bit full-precision width is precisely closed within a finite clock cycle, and the phase continuity and amplitude linear response of the frequency switching are ensured through logic timing control, providing a precise frequency reference for subsequent multi-channel signal synthesis.

[0065] In some embodiments of this application, the numerically controlled oscillator 202 may include an M-bit phase accumulator to perform full-precision phase accumulation, output the current phase value without truncation, and suppress spurious components. Where M ≥ 36.

[0066] The numerically controlled oscillator 202 can adopt an N-channel parallel architecture (e.g., NCO#1~NCO#4) to support the simultaneous synthesis of multi-phase or multi-channel signals, provide excitation for the transmit link, and provide digital local oscillator signals for the quadrature demodulation of the receive link, thus realizing high-precision frequency synthesis for the entire system.

[0067] In some embodiments of this application, the parallel-to-serial conversion module 203 is used to repackage the low-speed parallel digital waveform data generated by the numerically controlled oscillator 202 into a high-speed serial data stream through an asynchronous first-in-first-out (FIFO) mechanism. This solves the rate matching problem between the internal logic clock domain (250MHz) and the external high-speed digital-to-analog converter interface clock domain (1000MHz), ensuring that data transmission does not experience metastability or loss at high throughput, and achieving seamless bandwidth connection from baseband processing to RF reconfiguration.

[0068] In some embodiments of this application, such as Figure 3 As shown, the parallel-to-serial conversion module 203 can be connected to the first digital-to-analog converter 204 and the second digital-to-analog converter 205 via the physical layer transmission interface 207. The physical layer transmission interface 207 can be an ODDR-LVDS interface, which utilizes low-voltage differential signaling technology in conjunction with double data rate output technology to send data simultaneously on the rising and falling edges of the clock. This doubles the transmission bandwidth of the physical link without increasing the clock frequency, enabling the stable transmission of a 16-bit wide 1000MHz data stream to the first digital-to-analog converter 204 and the second digital-to-analog converter 205, ensuring the integrity and timing margin of the high-speed digital signal on the transmission line.

[0069] The first digital-to-analog converter 204 receives the serial signal stream from the physical layer transmission interface 207 and converts the serial signal stream back into an analog voltage signal to generate the analog intermediate frequency signal for the nuclear magnetic resonance spectrometer. The high dynamic range and low noise characteristics of the analog intermediate frequency signal directly determine the spectral purity of the transmitted pulse, ensuring the accuracy and stability of the excitation signal.

[0070] The second digital-to-analog converter 205 receives the serial signal stream from the physical layer transmission interface 207, outputs a high-purity analog signal (sine wave), and uses it as the reference input of the phase-locked loop 208 for frequency multiplication to drive the subsequent local oscillator source to output an analog local oscillator signal. By controlling the output frequency of the second digital-to-analog converter 205, fine tuning and agility of the local oscillator signal can be achieved.

[0071] In some embodiments of this application, such as Figure 3 As shown, the signal processing board 20 may also include an analog-to-digital converter 209, which is used to quantize the radio frequency echo signal from the analog front end into a 16-bit wide digital sampling stream after analog down-conversion. Its high dynamic range and low aperture jitter characteristics ensure that the weak nuclear magnetic resonance signal is not submerged by quantization noise during the digitization process, providing a high-fidelity raw data foundation for subsequent digital down-conversion processing, which directly determines the upper limit of the system's receiving sensitivity and dynamic range.

[0072] In some embodiments of this application, such as Figure 3 As shown, the signal processing board 20 may also include a digital mixer 210, which can use the digital local oscillator signal generated by the numerically controlled oscillator 202 to multiply the digital sampling stream output by the analog-to-digital converter point by point, so as to accurately shift the signal spectrum located in the intermediate frequency band to the zero intermediate frequency (baseband) to achieve digital mixing. At the same time, the in-phase component (I) and quadrature component (Q) containing amplitude and phase information are separated to obtain the baseband signal, laying the foundation for subsequent single-sideband processing and phase-sensitive detection.

[0073] In some embodiments of this application, such as Figure 3 As shown, the signal processing board 20 may also include a decimation and filtering module 211, which may be composed of a cascaded integrator comb filter and a finite impulse response filter. It is responsible for low-pass filtering and downsampling the mixed baseband signal, filtering out the high-frequency image components and out-of-band noise generated by mixing, and ensuring the extraction of pure nuclear magnetic resonance free induction attenuation signal.

[0074] like Figure 3 As shown, in some embodiments of this application, the numerically controlled oscillator 202, the frequency control module 206, and the parallel-to-serial conversion module 203 can form a direct digital frequency synthesis module. The digital mixer 210 and the decimation and filtering module 211 can form a digital down-conversion (DDC) module. The DDS module, DDC module, first digital-to-analog converter 204, second digital-to-analog converter 205, analog-to-digital converter, and phase-locked loop 208 can be located in different areas of the signal processing board 20 and interconnected to implement the signal processing method of this application.

[0075] It should be noted that the aforementioned signal processing board can be an FPGA board, or an application-specific integrated circuit (ASIC) or other board with similar processing capabilities, and this application does not impose any restrictions on this.

[0076] It should be noted that, for the sake of convenience and brevity, the specific working process of the above signal processing module can be found in the following reference: Figure 1 The corresponding process of the method shown will not be elaborated here.

[0077] like Figure 4 As shown in the figure, this application embodiment also provides a spectrometer 4, including: a magnet system 10, a probe 30, a radio frequency system 40, a signal detection system 50, and a signal processing board 20.

[0078] Among them, the magnet system 10 is used to generate a static magnetic field; The probe 30 is used to place the sample and includes an RF coil; Signal processing board 20 is used to generate analog intermediate frequency signals, analog local oscillator signals, and digital local oscillator signals; The analog local oscillator signal is used to upconvert the analog intermediate frequency signal to radio frequency. After being amplified by the radio frequency system 40, it is applied to the sample through the radio frequency coil to excite the nuclear magnetic resonance signal. The digital local oscillator signal is used to downconvert the free induction attenuation signal output by probe 30 to an intermediate frequency, which is then detected by the signal detection system 50.

[0079] Those skilled in the art will understand that Figure 4 This is merely an example of spectrometer 4 and does not constitute a limitation on spectrometer 4. It may include more or fewer components than shown, or combine certain components, or different components. For example, spectrometer 4 may also include a power supply, bus, etc.

[0080] It should be noted that, for the sake of convenience and brevity, the structure of the spectrometer 4 described above can also be referred to the specific description of the structure in the method embodiment, which will not be repeated here.

[0081] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional units and modules is merely an example. In practical applications, the above functions can be assigned to different functional units and modules as needed, that is, the internal structure of the signal processing board 20 can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiments can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit. Furthermore, the specific names of the functional units and modules are only for easy differentiation and are not intended to limit the scope of protection of this application. The specific working process of the units and modules in the above system can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0082] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0083] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for various specific applications, but such implementations should not be considered beyond the scope of this application.

[0084] In the embodiments provided in this application, it should be understood that the disclosed signal processing board 20 / spectrometer 4 can be implemented in other ways. For example, the embodiments of the signal processing board 20 / spectrometer 4 described above are merely illustrative. For instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the mutual coupling or direct coupling or communication connection shown or discussed may be indirect coupling or communication connection through some interfaces, devices, or units, and may be electrical, mechanical, or other forms.

[0085] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0086] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0087] If the integrated module / unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the methods of the above embodiments can also be implemented by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium, and when executed by a processor, it can implement the steps of the various method embodiments described above. The computer program includes computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. The computer-readable medium can include: any entity or device capable of carrying the computer program code, a recording medium, a USB flash drive, a portable hard drive, a magnetic disk, an optical disk, a computer memory, a read-only memory (ROM), a random access memory (RAM), an electrical carrier signal, a telecommunication signal, and a software distribution medium, etc.

[0088] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A signal processing method, characterized in that, include: In response to a control command, based on the configuration parameters in the control command, a coordinate rotation digital calculation algorithm is used to iteratively calculate the sine and cosine amplitudes in real time, and output N channels of digital waveform data; wherein, the N channels of digital waveform data are staggered in phase according to a fixed phase difference, and N is a positive integer greater than 1; The N digital waveform data streams are merged into a single serial signal stream. The serial signal stream is reconstructed into an analog intermediate frequency signal and an analog local oscillator signal through different digital-to-analog converters, such that the analog intermediate frequency signal and the analog local oscillator signal are phase correlated.

2. The signal processing method according to claim 1, characterized in that, The method of using a coordinate rotation digital calculation algorithm to iteratively calculate the sine and cosine amplitudes in real time includes: performing full-precision phase accumulation using an M-bit phase accumulator to output the current phase value without truncation, where M ≥ 36; and calculating the corresponding sine and cosine amplitudes based on the current phase value using the coordinate rotation digital calculation algorithm.

3. The signal processing method according to claim 1 or 2, characterized in that, Before using the coordinate rotation digital calculation algorithm to iteratively calculate the sine and cosine amplitudes in real time, the method further includes: configuring the frequency control word through a frequency control word constraint mechanism so that the phase accumulator is precisely closed within a finite period.

4. The signal processing method according to claim 1 or 2, characterized in that, The step of merging the N digital waveform data into a single serial signal stream includes: After aligning the N channels of digital waveform data, they are merged into a data stream through parallel-to-serial conversion; The merged data stream is transmitted on the rising and falling edges of the clock to convert it into the serial signal stream.

5. The signal processing method according to claim 1 or 2, characterized in that, Reconstructing the analog intermediate frequency signal includes: The serial signal stream is distributed to a first digital-to-analog converter; The first digital-to-analog converter is controlled to reconstruct the serial signal stream into the analog intermediate frequency signal, which serves as the radio frequency transmission excitation source for the nuclear magnetic resonance system.

6. The signal processing method according to claim 1 or 2, characterized in that, Reconstructing the analog local oscillator signal includes: The serial signal stream is distributed to a second digital-to-analog converter; the second digital-to-analog converter is controlled to reconstruct the serial signal stream into an analog signal; the analog signal is input to a phase-locked loop connected to the second digital-to-analog converter for frequency multiplication to generate the analog local oscillator signal.

7. The signal processing method according to claim 1 or 2, characterized in that, The signal processing method further includes: The received radio frequency echo signal is down-converted back to intermediate frequency using the simulated local oscillator signal; After analog-to-digital conversion, the digital sampled stream is digitally mixed using the digital local oscillator signal, shifted to the baseband, and the in-phase and quadrature components are separated to obtain the baseband signal; The baseband signal is filtered and extracted before being output.

8. The signal processing method according to claim 1 or 2, characterized in that, The signal processing method further includes: Any one of the N digital waveform data channels is used as a digital local oscillator signal to perform digital mixing on the received digital sample stream and shift it to the baseband.

9. A signal processing board, characterized in that, include: The pulse sequence module is used to receive control commands; A numerically controlled oscillator, connected to the pulse sequence module, is used to respond to the control command and, based on the configuration parameters in the control command, iteratively calculate the sine and cosine amplitudes in real time using a coordinate rotation digital calculation algorithm, and output N channels of digital waveform data; wherein, the N channels of digital waveform data are staggered in phase according to a fixed phase difference, and N is a positive integer greater than 1; The parallel-to-serial conversion module, connected to the numerically controlled oscillator, is used to merge the N channels of digital waveform data into a single serial signal stream; The first digital-to-analog converter and the second digital-to-analog converter are respectively connected to the parallel-to-serial conversion module, and are used to receive the serial signal stream and reconstruct it into an analog intermediate frequency signal and an analog local oscillator signal respectively, so that the analog intermediate frequency signal and the analog local oscillator signal are phase correlated; wherein, the digitally controlled oscillator is also used to output one of the N channels of digital waveform data to the digital mixer as a digital local oscillator signal.

10. A spectrometer, characterized in that, include: A magnet system, a probe, a radio frequency system, a signal detection system, and a signal processing board as described in claim 9; The magnet system is used to generate a static magnetic field; The probe is used to place the sample and includes an radio frequency coil; The signal processing board is used to generate analog intermediate frequency signals, analog local oscillator signals, and digital local oscillator signals; The simulated local oscillator signal is used to upconvert the simulated intermediate frequency signal to radio frequency, and after being amplified by the radio frequency system, it is applied to the sample through the radio frequency coil to excite the nuclear magnetic resonance signal; The digital local oscillator signal is used to downconvert the free induction attenuation signal output by the probe to an intermediate frequency, which is then detected by the signal detection system.

11. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the steps of the signal processing method according to claims 1-8.

12. A computer program product, characterized in that, When the computer program product is run on the spectrometer, the steps of the signal processing method described in claims 1-8 are executed by the spectrometer.

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