Ultra-wideband signal generation and acquisition device

Abstract

The application discloses a kind of ultra-wideband signal generation and collection device, belongs to synthetic aperture radar signal generation and collection technical field.The device includes digital part and radio frequency part;Digital part contains intermediate frequency signal generation module, intermediate frequency signal collection module and system control and signal processing module;Radio frequency part contains multiple sub-band signal transmitting module, multiple sub-band signal receiving module and reference frequency source module.The present application divides ultra-wideband signal into four sub-bands, adopts pulse inter-string emission mode to transmit each sub-band signal in turn, and receives correspondingly, and synthesizes ultra-large bandwidth signal by sub-band splicing.The present application effectively reduces the requirement of system to DAC / ADC sampling rate and sampling bandwidth, simultaneously avoids the defect that residual phase is difficult to eliminate in traditional deslanting processing scheme, and is suitable for spaceborne, airborne and unmanned airborne high-resolution SAR system.

Description

Technical Field

[0001] This invention belongs to the field of synthetic aperture radar (SAR) signal generation and acquisition technology, specifically relating to an ultra-wideband signal generation and acquisition device. Background Technology

[0002] Synthetic Aperture Radar (SAR), as an active microwave imaging device, can conduct all-weather, 24 / 7 Earth observations, playing a crucial role in topographic mapping, marine monitoring, and disaster assessment. The range resolution of SAR images is directly related to the bandwidth of the transmitted signal—the larger the bandwidth, the higher the range resolution, and the richer the detailed information about the target. With the increasing demands of remote sensing applications for land cover classification, target identification, and detailed mapping, SAR systems are developing towards centimeter-level and even higher resolutions, placing unprecedented demands on the system's operating bandwidth.

[0003] To achieve ultra-high range resolution, SAR systems need to generate, transmit, and receive signals with extremely high instantaneous bandwidth. However, the engineering implementation of ultra-wideband signals faces numerous technical bottlenecks. On the one hand, the single-channel instantaneous bandwidth of existing high-speed digital-to-analog converters (DACs) and analog-to-digital converters (ADCs) is limited, making it difficult to directly cover the ultra-wideband frequency range. If a full-bandwidth signal generation or acquisition scheme is adopted, the sampling rate typically needs to reach more than 2.4 times the signal bandwidth (IF scheme) or more than 1.2 times (baseband scheme), which exceeds the performance boundaries of current mainstream commercial devices. Even if a few high-performance devices barely meet the requirements, their power consumption, cost, and system integration difficulty increase dramatically. On the other hand, during the transmission of ultra-wideband signals through the RF link, the impedance matching problem between digital ports, RF ports, and analog devices at various levels deteriorates significantly with increasing bandwidth, leading to degradation of the amplitude and phase frequency characteristics of the transceiver channels, which in turn affects the pulse compression quality of the wideband signal and reduces imaging performance.

[0004] To address the aforementioned issues, existing technologies have proposed a de-chirp scheme, which uses a reference signal to mix with the echo signal to reduce the bandwidth of the acquired signal, thereby alleviating the sampling burden on the ADC. However, the bandwidth of the output signal increases with the detection range and time, limiting its application scope. Furthermore, the de-chirp output signal exhibits residual phase, which is difficult to fully compensate for, restricting its practical application in ultra-high resolution SAR systems.

[0005] In addition, at the signal generation end, some solutions have attempted to use photon-assisted frequency doubling technology to overcome the bandwidth limitations of electronic devices. However, this technology involves complex optical systems such as electro-optic modulation and polarization multiplexing, and its size, power consumption, and cost are difficult to meet the application requirements of small and lightweight platforms.

[0006] In summary, there is an urgent need for a technical solution that can stably generate and acquire ultra-wideband signals, meet low sampling rate requirements and have excellent radio frequency transmission characteristics, and is highly feasible in engineering. Summary of the Invention

[0007] To address the aforementioned technical problems, this invention provides an ultra-wideband signal generation and acquisition device that divides the ultra-wideband signal into four sub-bands. Within four consecutive pulse repetition cycles, each sub-band signal is transmitted sequentially in an inter-pulse serial transmission manner and received accordingly. After the sub-bands are spliced ​​together, an ultra-wideband signal is synthesized, thereby reducing the system's requirements for high-speed DAC / ADC sampling performance and avoiding the problem of wideband matching of the RF link.

[0008] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0009] An ultra-wideband signal generation and acquisition device includes a digital section and a radio frequency (RF) section. The digital section includes an intermediate frequency (IF) signal generation module, an IF signal acquisition module, and a system control and signal processing module. The RF section includes a multi-subband signal transmission module, a multi-subband signal reception module, and a reference frequency source module.

[0010] The system control and signal processing module divides the ultra-wideband signal to be transmitted into four sub-band signals to be transmitted sequentially in time, and generates a transmission control timing sequence and a reception control timing sequence with four consecutive pulse repetition cycles.

[0011] The intermediate frequency signal generation module generates an intermediate frequency signal corresponding to a sub-band in each pulse repetition period, and generates intermediate frequency signals of four sub-bands in sequence in four pulse repetition periods.

[0012] The multi-subband signal transmission module includes four up-conversion channels, which sequentially up-convert the intermediate frequency signals of the four subbands to radio frequency and transmit them under the control of the transmission control timing.

[0013] The multi-subband signal receiving module includes four down-conversion channels, which sequentially receive the radio frequency echo signals of the four subbands and down-convert them to intermediate frequency under the control of the receiving control timing.

[0014] The intermediate frequency signal acquisition module acquires the intermediate frequency echo signals of each sub-band and performs digital down-conversion processing.

[0015] The system control and signal processing module performs time alignment and frequency domain splicing on the baseband echo data of each sub-band to obtain a composite signal with the same total bandwidth as the ultra-wideband signal to be transmitted.

[0016] The reference frequency source module generates the system operating clock, sampling clock, and multiple local oscillator signals for up-conversion and down-conversion, respectively, so that all output signals originate from the same reference source.

[0017] Furthermore, the system control and signal processing module includes an FPGA, which is used to generate the control timing for the intermediate frequency signal generation module, the intermediate frequency signal acquisition module, the multi-subband signal transmission module, and the multi-subband signal reception module, as well as to store and splice the baseband echo data of each subband.

[0018] Furthermore, the intermediate frequency signal generation module uses an FPGA and a high-speed digital-to-analog converter to generate a broadband signal with a fixed center frequency. The FPGA calculates the baseband waveform data of each sub-band according to the waveform parameters issued by the system control and signal processing module, and the high-speed digital-to-analog converter converts the digital baseband signal into an analog intermediate frequency signal for output.

[0019] Furthermore, in the multi-subband signal transmission module, the four up-conversion channels correspond to four different local oscillator signal frequencies, and each local oscillator signal frequency differs from the others by one subband bandwidth. Each up-conversion channel is turned on within the corresponding pulse repetition period to up-convert the intermediate frequency signal to its corresponding radio frequency subband and transmit it.

[0020] Furthermore, in the multi-subband signal receiving module, the four down-conversion channels correspond to four different local oscillator signal frequencies, and the local oscillator signal frequencies differ sequentially by one subband bandwidth. The conduction sequence of each down-conversion channel is synchronized with the conduction sequence of each up-conversion channel of the multi-subband signal transmitting module, so as to down-convert the received radio frequency echo signals of each subband to intermediate frequency signals with the same center frequency.

[0021] Furthermore, the reference frequency source module uses a high-stability crystal oscillator as a reference source, and generates a system operating clock, a sampling clock, and multiple local oscillator signals for up-conversion and down-conversion respectively through a phase-locked loop and a frequency multiplication and division link. The system operating clock is sent to the system control and signal processing module, the sampling clock is sent to the intermediate frequency signal generation module and the intermediate frequency signal acquisition module, and the multiple local oscillator signals are sent to the four up-conversion channels of the multi-subband signal transmission module and the four down-conversion channels of the multi-subband signal receiving module respectively.

[0022] Furthermore, the intermediate frequency signal acquisition module uses an FPGA and a high-speed analog-to-digital converter to acquire the intermediate frequency echo signals of each sub-band. The sampling rate of the high-speed analog-to-digital converter only needs to cover the bandwidth of a single sub-band. The FPGA performs digital down-conversion, filtering, and decimation processing on the acquired digital intermediate frequency signals in sequence to obtain the baseband echo data of each sub-band.

[0023] Furthermore, when the system control and signal processing module performs time alignment and frequency domain stitching on the baseband echo data of each sub-band, it first shifts the baseband echo data of each sub-band in the time domain by the corresponding time offset, then performs frequency shift on the signals of each sub-band to compensate for the frequency offset between each sub-band, then compensates for the phase offset between each sub-band to ensure the phase continuity after stitching, and finally sums the compensated signals of each sub-band in the time domain.

[0024] Furthermore, the time offset and the frequency offset are determined by the sub-band number and the sub-band bandwidth, and the time offset is set to an integer multiple of the discrete sampling interval to ensure the continuity of the synthesized signal in the time domain.

[0025] Furthermore, no overlapping areas or guard intervals are set between the sub-bands, and adjacent sub-bands are directly and continuously spliced ​​in the frequency domain to form a complete signal with a total bandwidth equal to the bandwidth of the ultra-wideband signal to be transmitted.

[0026] The beneficial effects of this invention are as follows:

[0027] This invention significantly reduces the performance requirements of high-speed DAC / ADC devices. It divides the ultra-wideband signal into four sub-bands with a bandwidth of B / 4 for separate processing. The sampling rate only needs to cover the bandwidth of a single sub-band, rather than the full bandwidth, effectively avoiding the bottleneck of insufficient single-channel bandwidth in current commercial DAC / ADC chips. This allows for broader chip selection and significantly reduces system cost and power consumption.

[0028] This invention effectively solves the port matching problem of ultra-wideband RF links. It designs independent transmit and receive channels for each sub-band, with each sub-band channel operating at only one-quarter of the full bandwidth. RF devices such as filters, amplifiers, and mixers can be specifically optimized within their respective narrowband ranges, making impedance matching easier to achieve. Intra-band amplitude and phase frequency characteristics are significantly improved, effectively avoiding signal distortion problems caused by excessively wide operating bandwidth in full-band solutions.

[0029] This invention avoids the inherent defects of traditional de-skew processing schemes. It employs sub-band splicing technology to generate and acquire broadband signals, without relying on de-skew processing to reduce acquisition bandwidth. Therefore, it avoids the problems of output signal bandwidth increasing with detection distance and residual phase being difficult to completely eliminate, as seen in de-skew processing schemes. The system has a wider range of applications and higher signal fidelity.

[0030] The system architecture is simple and highly feasible for engineering implementation. This invention is based on a mature FPGA+DAC / ADC digital circuit platform, and does not involve complex optical systems such as photon modulation and polarization multiplexing. It is small in size, light in weight, and low in power consumption, making it suitable for spaceborne, airborne, and unmanned aerial vehicle platforms with limited payload resources. It has good engineering promotion value. Attached Figure Description

[0031] Figure 1 This is a block diagram illustrating the principle of an ultra-wideband signal generation and acquisition device according to the present invention.

[0032] Figure 2 This is a block diagram illustrating the principle of the multi-subband splicing technology of the present invention, where (a) is the time domain and (b) is the frequency domain.

[0033] Figure 3 This is a timing control diagram for the serial transmission and reception between the four sub-band pulses of the present invention;

[0034] Figure 4 This is a block diagram of the FPGA functional modules of the present invention;

[0035] Figure 5 The above are comparison diagrams of the spectral effects before and after multi-subband signal splicing in this invention, where (a) is the frequency domain effect diagram of multi-subband synthesis and (b) is the pulse compression effect diagram of multi-subband synthesis. Detailed Implementation

[0036] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0037] like Figure 1 As shown, the present invention provides an ultra-wideband signal generation and acquisition device, which is mainly used for the generation and reception of synthetic aperture radar (SAR) ultra-wideband signals. The device mainly includes a digital part and a radio frequency part. The digital part includes an intermediate frequency signal generation module, an intermediate frequency signal acquisition module, a system control and signal processing module; the radio frequency part includes a multi-subband signal transmission module, a multi-subband signal reception module and a reference frequency source module.

[0038] Before proceeding with the specific implementation of each module, the sub-band division strategy of this invention will first be explained. Multiple sub-bands can be flexibly generated through digital waveform editing; the specific principle is as follows... Figure 2 As shown in (a)-(b), according to the radar system design requirements, the radar needs to transmit a linear frequency modulated signal with a bandwidth of B, a pulse width of T, and a pulse modulation slope of k. The broadband signal can then be expressed as: :

[0039] ,

[0040] In the formula, t represents time, and j represents the imaginary unit. Indicates the center carrier frequency;

[0041] like Figure 2 As shown, if the band is divided into N subbands on average, let the bandwidth of the i-th subband be... The width of the i-th subband pulse is ,but:

[0042] , , i∈N,

[0043] The carrier frequency of the i-th sub-band It can be represented as:

[0044] ,

[0045] in, Indicates the offset frequency:

[0046]

[0047] The corresponding time shift is :

[0048] ,

[0049] The N sub-bands employ inter-pulse transmission, and the transmitted broadband signal can be equivalently represented as:

[0050] ,

[0051] Total received echo signal This can be represented as the baseband echo after demodulation of each subband. sum:

[0052] ,

[0053] Indicates time delay;

[0054] And transmit full bandwidth signal echo signal It can be represented as:

[0055] ,

[0056] in, This is the subband expression for receiving baseband signals across the full bandwidth.

[0057] Compare and It can be deduced that:

[0058] ,

[0059] The steps for temporal subband synthesis are as follows:

[0060] a) Subband echo signal Time Shift get ,

[0061] b) Multiply Signal frequency shift sub-band offset frequency ,

[0062] c) Compensation for inter-subband phase offset To ensure phase continuity during sub-band splicing,

[0063] d) The compensated subband signals are superimposed and summed in the time domain.

[0064] After the above four steps, the demodulated subband echo signals can be synthesized into an equivalent baseband wideband signal, which can then be used for subsequent signal processing. Therefore, the subband stitching method does not affect subsequent imaging processing steps. In application, the above method requires that the time shift interval be an integer multiple of the discrete sampling interval to ensure the temporal continuity of the synthesized signal. This can be achieved by adjusting the pulse length and sampling rate.

[0065] Specifically, the implementation involves generating a digital signal of the corresponding bandwidth within the FPGA, which is then used to obtain the sub-band transmission signal via a DAC chip and an RF transmission link. During reception, different analog filter banks are set to receive the corresponding sub-bands, and after data acquisition, precise digital filtering is performed to obtain high-quality sub-band signals. Using this method, a broadband signal can theoretically be divided into any number of sub-bands. The more sub-bands, the lower the design requirements for the AD and DA converters, but this also introduces other problems. First, assuming no aliasing between sub-bands, sub-band transmission uses inter-pulse serial transmission; the more sub-bands, the higher the system's PRF (Programmable Frequency Ratio), and the more difficult the system design. Second, more sub-bands require more analog filter banks and more local oscillator signals for the RF transmission and reception links, making the RF link design more complex. Finally, sub-band splicing requires extracting and compensating for system errors; fewer sub-bands make system error extraction easier and compensation more accurate, and vice versa. In practical engineering applications, the number of subbands should be minimized to reduce the pressure on system design and the difficulty of system error extraction. Considering the current technological level of ADC / DAC components and the design complexity of the RF link, a subband bandwidth of 1GHz to 2GHz is generally recommended. Addressing these issues, this invention targets ultra-wideband signal generation and acquisition, where the bandwidth is typically greater than 6GHz. Therefore, a four-subband splicing method is adopted, with each subband being B / 4, to obtain a signal with a bandwidth of B.

[0066] Based on the above four-subband division strategy, ultra-wideband signal generation and reception links are constructed respectively. The generation link consists of an intermediate frequency signal generation module and a multi-subband signal transmission module, while the reception link consists of a multi-subband signal reception module and an intermediate frequency signal acquisition module. The system control and signal processing module is responsible for the timing control and data storage of the entire system, and the reference frequency source module provides a unified time and frequency reference for each module.

[0067] Regarding the intermediate frequency (IF) signal generation module: It utilizes an FPGA and the high-speed DAC chip AD9162 to generate a broadband signal with a fixed center frequency, where the sampling rate is Fs and the center frequency is... The bandwidth is B / 4, the in-band ripple is ≤0.5dB, the stopband rejection is ≥50dB, and the initial phase of each PRT output signal is required to be consistent with an error of ≤1°.

[0068] During operation, the FPGA calculates the baseband waveform data of each sub-band in real time based on the waveform parameters issued by the system control and signal processing module, and transmits the data to the DAC chip AD9162 via the JESD204B interface protocol. The DAC chip converts the digital baseband signal into an analog intermediate frequency (IF) signal output. The center frequency of this IF signal is fixed at Fs×3 / 4, and the bandwidth is B / 4, serving as the input to the subsequent multi-sub-band signal transmission module. Four PRTs sequentially generate the IF signals for four sub-bands. The four sub-bands have the same center frequency and bandwidth, differing only in that they carry baseband waveform data corresponding to different frequency bands. Because strict phase synchronization and phase continuity between the multiple sub-bands are required, no additional overlapping areas or guard intervals are set between adjacent sub-bands.

[0069] Regarding the multi-subband signal transmission module: it mainly consists of functional modules such as bandpass filters, signal amplification, and up-conversion, realizing signal up-conversion and saturated output. The four subbands correspond to four up-conversion channels, with the four up-conversion signal frequencies being fc1, fc2, fc3, and fc4, differing by B / 4 in sequence. By sequentially controlling the switching of the four up-conversion paths, ultra-wideband signal generation and transmission output with a bandwidth of B can be achieved. To prevent interference between the transmitted signals of different subbands and affect the subsequent subband splicing effect, the in-band flatness of each subband transmitted signal is generally required to be better than 1dB, and the out-of-band clutter suppression better than 50dBc. The multi-subband signal transmission module serves as the driving input for the subsequent antenna transmission. Since the antenna part has no direct impact on the device of this invention, it will not be described in detail here.

[0070] The specific working process of this module is as follows: The intermediate frequency signal (center frequency Fs×3 / 4, bandwidth B / 4) from the intermediate frequency signal generation module is simultaneously distributed to the input terminals of the four upconverter channels via the power divider. However, the four channels are not turned on simultaneously, but rather, under the control of the system control and signal processing module, they are turned on according to... Figure 3The timing sequence shown is as follows: In the first PRT, the first up-conversion channel is turned on, and the other channels are turned off. The intermediate frequency signal is mixed with the local oscillator signal fc1, and after bandpass filtering and power amplification, the output frequency range is fc1±B / 8 (i.e., a sub-band signal with a width of B / 4). In the second PRT, the second channel is turned on, and the intermediate frequency signal is mixed with the local oscillator signal fc2 to output the second sub-band. And so on, the transmission of the four sub-bands is completed sequentially in four consecutive PRTs. Adjacent sub-bands are continuously spliced ​​in the frequency domain to form an ultra-wideband signal with a total bandwidth of B.

[0071] Regarding the reference frequency source module: It generates the operating clock required by the system, providing a 100MHz system operating clock for the digital section, a sampling clock with a frequency of Fs for the AD and DA operations, and local oscillator clocks fc1, fc2, fc3, and fc4 for the RF up-conversion and down-conversion channels, with frequencies differing by B / 4 in sequence. This module, as a frequency source with high frequency stability and low phase noise, ensures the system's high performance and coherence characteristics. Its performance directly affects the subband stitching effect, and thus the imaging quality of the radar system.

[0072] Specifically, the reference frequency source module uses a high-stability crystal oscillator as the reference source and generates multiple output signals of different frequencies through a phase-locked loop and frequency multiplication / division links. The 100MHz system clock is sent to the FPGA as the system master clock; the Fs sampling clock is sent to the DAC chip AD9162 and the ADC chip ADC12DJ3200 to ensure the synchronization accuracy of digital-to-analog and analog-to-digital conversions; four local oscillator signals fc1~fc4 are sent to four up-conversion channels and four down-conversion channels, respectively. All output signals originate from the same reference source, ensuring the frequency coherence of the entire system, which is the fundamental guarantee for the phase continuity after subband splicing. To ensure system performance, the clock signal's harmonic suppression is required to be better than 60dBc, and the phase noise is required to be better than 100dBc / Hz@10Hz.

[0073] Regarding the multi-subband signal receiving module: its function is to receive the echo signal from the antenna, filter, amplify, and mix the echo signal. It mainly consists of a bandpass filter, a low-noise amplifier, and a down-converter module to amplify and down-convert the signal. The four subbands correspond to four down-conversion channels. The frequencies of the four down-converted signals fc1, fc2, fc3, and fc4 differ by B / 4 sequentially. They must be switched to the same channel as the multi-subband signal transmitting module to ensure correct signal reception. By sequentially controlling the switching of the four down-conversion paths, ultra-wideband signal reception with a bandwidth of B can be achieved. To ensure system performance, the in-band ripple of each subband in the multi-subband signal receiving module must be better than 1dB, and the out-of-band interference suppression must be better than 50dBc.

[0074] The specific working process of this module is as follows: After the target echo signal is received by the antenna, it is pre-amplified by a low-noise amplifier, and then simultaneously distributed to the input terminals of the four down-conversion channels through a power divider. The four down-conversion channels are also controlled by the system control and signal processing module according to... Figure 3 The timing sequence shown indicates that the down-conversion channel is activated sequentially, strictly synchronized with the transmitter—that is, within the nth PRT, the down-conversion channel corresponding to the nth channel of the transmitter is activated. After the echo signal is mixed with the local oscillator signal, it is bandpass filtered and amplified to output an intermediate frequency (IF) signal with a center frequency of Fs×3 / 4 and a bandwidth of B / 4, which is then sent to the IF signal acquisition module for processing. The synchronous switching of channels between the transmitter and receiver ensures that each sub-band signal is received and converted within the correct timing window.

[0075] Regarding the intermediate frequency (IF) signal acquisition module: An FPGA and a high-speed ADC chip ADC12DJ3200 are used to acquire the IF signal, where the sampling rate is Fs and the center frequency is... It has a bandwidth of B / 4 and a resolution of 12 bits, and performs digital down-conversion, filtering, and decimation on the acquired signal.

[0076] The specific working process of this module is as follows: The intermediate frequency analog signal (center frequency Fs×3 / 4, bandwidth B / 4) from the multi-subband signal receiving module enters the ADC chip ADC12DJ3200, and undergoes analog-to-digital conversion driven by the sampling clock Fs, with a quantization bit depth of 12 bits. The converted digital intermediate frequency signal is transmitted to the FPGA through the JESD204B interface. Inside the FPGA, the received digital intermediate frequency signal is sequentially digitally down-converted (multiplied by the digital local oscillator signal, low-pass filtered, and decimated to obtain the I / Q digital signals of the baseband). After the above processing, each subband obtains its corresponding baseband echo data, which is buffered in the FPGA's internal FIFO or external DDR, awaiting subsequent subband splicing processing. Since the bandwidth of each subband is only B / 4, the ADC's sampling rate Fs only needs to meet the Nyquist sampling requirement of a single subband. Compared with the scheme of directly acquiring the full bandwidth signal, the sampling rate requirement of this invention is greatly reduced.

[0077] Regarding the system control and signal processing modules: System control is mainly implemented through FPGA to control modules such as ADC, DAC, clock configuration, RF transmit link, and RF receive link. The control timing for the four-subband splicing is shown below. Figure 3 Storage primarily involves using high-capacity storage devices to store the data acquired by the ADC in real time, and then reading the data back up and sending it to a computer for four-subband splicing to reconstruct the ultra-high bandwidth data.

[0078] The FPGA programming includes the following functions: receiving and parsing operating parameters issued by the control system to control the system's operating mode; generating PRT signals required by each functional module and timing pulses required for four-subband splicing in real time based on the operating parameters; configuring the clock chip and generating the clock signal required for system operation; configuring the DAC chip and calculating the waveform data of each subband in real time based on the operating parameters, ultimately outputting it to the DAC chip via JESD204B IP; configuring the ADC chip, receiving data input from JESD204B IP, acquiring data within the echo window based on the PRF pulse signal, and sending the data to the data storage module after digital down-conversion, filtering, decimation, and packaging; controlling the RF transmission and reception modules and generating the control timing sequence for four-subband transmission and reception; and controlling the NAND flash memory chip to achieve data storage and playback. See the FPGA functional block diagram below. Figure 4 .

[0079] After data acquisition, the system reconstructs the ultra-wideband signal using subband stitching technology. The baseband echo data of the four subbands correspond to different frequency bands, and each subband is compensated to its corresponding frequency position in the digital domain. Since the four subbands are transmitted and received in a time-division multiplexing manner, there is a PRT interval between different subbands. Before stitching, the data of each subband needs to be time-aligned according to the system timing parameters. Subsequently, amplitude and phase corrections are performed on each subband to compensate for amplitude and phase distortions in different frequency bands of the RF link. Finally, the four B / 4 subbands are sequentially arranged and stitched together in the frequency domain to form a complete ultra-wideband signal with a total bandwidth of B. The stitched signal can be directly used for pulse compression in SAR imaging processing to obtain ultra-high resolution images.

[0080] Example:

[0081] The aforementioned invention has been successfully applied to a Ka-band lightweight UAV SAR system. This system has a center frequency of 35 GHz, a maximum operating bandwidth of 7.2 GHz, and a range-oriented resolution better than 0.05 m. In this system, the intermediate frequency (IF) signal generation module has a sampling clock frequency Fs of 4.8 GHz, a center frequency of 3.6 GHz, and an output sub-band bandwidth of 1.8 GHz. In the multi-sub-band signal transmission module, fc1 is 28.7 GHz, fc2 is 30.5 GHz, fc3 is 32.3 GHz, and fc4 is 34.1 GHz. After up-conversion, the center frequencies of the four output sub-bands are 32.3 GHz, 34.1 GHz, 35.9 GHz, and 37.7 GHz, with a total bandwidth of 7.2 GHz. The multi-sub-band receiving module uses the same fc1, fc2, fc3, and fc4 as the multi-sub-band signal transmission module. After down-conversion, the center frequencies of all four sub-bands fall at 3.6 GHz. The intermediate frequency (IF) signal acquisition module is designed with the same sampling clock, center frequency, and sampling bandwidth as the center signal generation module; that is, the sampling clock frequency Fs is 4.8 GHz, the center frequency is 3.6 GHz, and the sampling bandwidth is 1.8 GHz. The reference frequency source module generates a 100 MHz system operating clock, provides a 4.8 GHz sampling clock for the ADC and DAC chips, and provides mixing clocks for four sub-bands in the multi-sub-band transmitter and receiver modules: fc1 is 28.7 GHz, fc2 is 30.5 GHz, fc3 is 32.3 GHz, and fc4 is 34.1 GHz. The system control and signal processing module generates the control timing for each module and performs data splicing processing on the four sub-bands. In this system, the system transmits and receives a 1.8 GHz bandwidth linear frequency modulated signal within four consecutive PRTs. After splicing the four sub-bands, a 7.2 GHz bandwidth signal can be generated and received. The multi-sub-band signal splicing effect is shown in [link to documentation]. Figure 5 (a) shows the frequency domain effect of multi-subband synthesis, and (b) shows the pulse compression effect of multi-subband synthesis. The subband bandwidth is 1.8 GHz, and the synthesis bandwidth is 7.2 GHz. From the pulse compression results, the resolution after subband splicing is four times higher than that of single subband.

[0082] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above descriptions are merely specific embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. An ultra-wideband signal generation and acquisition device, characterized in that, It includes a digital section and a radio frequency (RF) section; the digital section includes an intermediate frequency (IF) signal generation module, an IF signal acquisition module, and a system control and signal processing module; the RF section includes a multi-subband signal transmission module, a multi-subband signal reception module, and a reference frequency source module; wherein, The system control and signal processing module divides the ultra-wideband signal to be transmitted into four sub-band signals to be transmitted sequentially in time, and generates a transmission control timing sequence and a reception control timing sequence with four consecutive pulse repetition cycles. The intermediate frequency signal generation module generates an intermediate frequency signal corresponding to a sub-band in each pulse repetition period, and generates intermediate frequency signals of four sub-bands in sequence in four pulse repetition periods. The multi-subband signal transmission module includes four up-conversion channels, which sequentially up-convert the intermediate frequency signals of the four subbands to radio frequency and transmit them under the control of the transmission control timing. The multi-subband signal receiving module includes four down-conversion channels, which sequentially receive the radio frequency echo signals of the four subbands and down-convert them to intermediate frequency under the control of the receiving control timing. The intermediate frequency signal acquisition module acquires the intermediate frequency echo signals of each sub-band and performs digital down-conversion processing. The system control and signal processing module performs time alignment and frequency domain splicing on the baseband echo data of each sub-band to obtain a composite signal with the same total bandwidth as the ultra-wideband signal to be transmitted. The reference frequency source module generates the system operating clock, sampling clock, and multiple local oscillator signals for up-conversion and down-conversion, respectively, so that all output signals originate from the same reference source.

2. The ultra-wideband signal generation and acquisition device according to claim 1, characterized in that, The system control and signal processing module includes an FPGA, which is used to generate the control timing for the intermediate frequency signal generation module, the intermediate frequency signal acquisition module, the multi-subband signal transmission module, and the multi-subband signal reception module, as well as to store and splice the baseband echo data of each subband.

3. The ultra-wideband signal generation and acquisition device according to claim 2, characterized in that, The intermediate frequency signal generation module uses an FPGA and a high-speed digital-to-analog converter to generate a broadband signal with a fixed center frequency. The FPGA calculates the baseband waveform data of each sub-band according to the waveform parameters issued by the system control and signal processing module. The high-speed digital-to-analog converter converts the digital baseband signal into an analog intermediate frequency signal for output.

4. The ultra-wideband signal generation and acquisition device according to claim 1, characterized in that, In the multi-subband signal transmission module, the four up-conversion channels correspond to four different local oscillator signal frequencies, and each local oscillator signal frequency differs from the next by one subband bandwidth. Each up-conversion channel is turned on within the corresponding pulse repetition period to upconvert the intermediate frequency signal to its corresponding radio frequency subband and transmit it.

5. The ultra-wideband signal generation and acquisition device according to claim 1, characterized in that, In the multi-subband signal receiving module, the four down-conversion channels correspond to four different local oscillator signal frequencies, and the local oscillator signal frequencies differ sequentially by one subband bandwidth. The conduction sequence of each down-conversion channel is synchronized with the conduction sequence of each up-conversion channel of the multi-subband signal transmitting module, so as to down-convert the received radio frequency echo signals of each subband to intermediate frequency signals with the same center frequency.

6. The ultra-wideband signal generation and acquisition device according to claim 1, characterized in that, The reference frequency source module uses a high-stability crystal oscillator as a reference source and generates a system operating clock, a sampling clock, and multiple local oscillator signals for up-conversion and down-conversion respectively through a phase-locked loop and a frequency multiplication and division link. The system operating clock is sent to the system control and signal processing module, the sampling clock is sent to the intermediate frequency signal generation module and the intermediate frequency signal acquisition module, and the multiple local oscillator signals are sent to the four up-conversion channels of the multi-subband signal transmission module and the four down-conversion channels of the multi-subband signal receiving module respectively.

7. The ultra-wideband signal generation and acquisition device according to claim 2, characterized in that, The intermediate frequency signal acquisition module uses an FPGA and a high-speed analog-to-digital converter to acquire the intermediate frequency echo signals of each sub-band. The sampling rate of the high-speed analog-to-digital converter only needs to cover the bandwidth of a single sub-band. The FPGA performs digital down-conversion, filtering and decimation processing on the acquired digital intermediate frequency signals in sequence to obtain the baseband echo data of each sub-band.

8. The ultra-wideband signal generation and acquisition device according to claim 1, characterized in that, When the system control and signal processing module performs time alignment and frequency domain stitching on the baseband echo data of each sub-band, it first shifts the baseband echo data of each sub-band in the time domain by the corresponding time offset, then shifts the frequency of each sub-band signal to compensate for the frequency offset between each sub-band, then compensates for the phase offset between each sub-band to ensure the phase continuity after stitching, and finally sums the compensated sub-band signals in the time domain.

9. The ultra-wideband signal generation and acquisition device according to claim 8, characterized in that, The time offset and the frequency offset are determined by the sub-band number and the sub-band bandwidth, and the time offset is set to an integer multiple of the discrete sampling interval to ensure the continuity of the synthesized signal in the time domain.

10. The ultra-wideband signal generation and acquisition device according to claim 1, characterized in that, There are no overlapping areas or guard intervals between the sub-bands. Adjacent sub-bands are directly and continuously spliced ​​together in the frequency domain to form the total bandwidth as the complete signal of the ultra-wideband signal bandwidth to be transmitted.

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