A bandgap reference circuit with process fluctuation compensation and a process compensation method thereof

Abstract

This invention discloses a bandgap reference circuit with process variation compensation and its process compensation method. The circuit includes a startup module, a bandgap reference core module, a BJT process variation compensation module, and an output stage module. The bandgap reference core module adopts a voltage-mode bandgap reference structure and generates ΔV through bipolar transistors with different current densities. BE And PTAT current, and make the drain-source voltage of the operational amplifier equalization current mirror branch to reduce the impact of op-amp input offset voltage on ΔV BE The direct impact of the item. The output of the compensation current mirror unit in the compensation module is connected to the collector branch of the output bipolar transistor Q6 to generate and inject a compensation current related to the BJT process angle variation, thereby adjusting the collector current of Q6 and compensating for V. BE Process drift. This invention reduces reliance on post-test adjustments and digital calibration, improving reference voltage consistency, temperature stability, and power supply robustness across the entire process angle and wide temperature range.

Description

Technical Field

[0001] This invention relates to a bandgap reference circuit with process fluctuation compensation and a process compensation method thereof, belonging to the technical field of analog integrated circuits and mixed-signal integrated circuits. Background Technology

[0002] Bandgap reference circuits are fundamental modules in analog and mixed-signal chips, typically used to provide stable bias and reference voltages for amplifiers, low-dropout linear regulators, analog-to-digital converters, sensor interface circuits, and power management systems. For high-precision systems, the temperature coefficient, process corner consistency, power supply rejection capability, and mismatch robustness of the bandgap reference voltage directly affect the overall system accuracy.

[0003] On the one hand, existing high-precision bandgap references typically rely on methods such as fuse tuning, multi-temperature point calibration, digital-assisted calibration, or post-test parameter writing to compensate for global process errors and local mismatch errors. While these methods can improve reference voltage accuracy, they increase chip area, testing time, production costs, and mass production complexity, and are not conducive to low-cost and large-scale applications.

[0004] Existing solutions typically fall into two categories: first, correcting the output voltage by adjusting the resistor ratio or the PTAT (Proportional To Absolute Temperature) current coefficient; second, reducing temperature drift through curvature compensation or MOS threshold-related compensation. However, these solutions mostly address temperature coefficients or fixed output deviations, failing to address the output bipolar transistor saturation current I. S V due to changes in process angle BE Drift establishes an adaptive simulation compensation path.

[0005] On the other hand, operational amplifiers in traditional bandgap references typically clamp the voltages of the two bipolar transistor branches directly. When an operational amplifier has an input offset voltage, this offset voltage can easily be directly superimposed on ΔV. BE This term causes a fixed offset in the reference voltage. Furthermore, the saturation current of a BJT (bipolar junction transistor) is significantly affected by the base doping concentration and the effective base width, leading to an increase in the output stage voltage V. BE Significant drift occurs under different manufacturing batches and process angles.

[0006] Therefore, a high-precision bandgap reference circuit with process variation compensation is needed, which can reduce the impact of operational amplifier input offset voltage on ΔV. BE The direct impact of the item, and can also utilize the process-dependent nature of BJT devices to affect the output stage V. BE The drift is adaptively compensated by simulation, and the influence of process deviations on the reference voltage is further suppressed. Summary of the Invention

[0007] The technical problem to be solved by this invention is to provide a bandgap reference circuit with process fluctuation compensation and its process compensation method, which solves the following four problems: First, the operational amplifier input offset voltage is easily directly superimposed on ΔV. BE First, it reduces the accuracy of the reference voltage; second, the BJT saturation current I S and base-emitter voltage V BE The reference voltage is significantly affected by process angle variations, resulting in large deviations across process angles. Third, the absolute value deviations of parameters in other passive components, such as resistors, caused by process angle variations, will, to some extent, alter the branch current and indirectly affect the output stage voltage. BE Fourth, solutions that rely on post-test adjustments or digital calibration are costly to manufacture and complex to test, which is not conducive to low-cost, high-precision simulation systems.

[0008] To solve the above-mentioned technical problems, the present invention adopts the following technical solution: A bandgap reference circuit with process fluctuation compensation, the bandgap reference circuit includes: a bandgap reference core module, a BJT process fluctuation compensation module, an output stage module and a startup module; The startup module is used to inject startup current into the core module of the bandgap reference circuit during the initial power-on phase and to turn off after the normal bias of the core module of the bandgap reference circuit is established. The bandgap reference core module includes two bipolar transistors with different current densities, a resistor network, a current mirror branch, an operational amplifier, and a base current compensation branch. This core module is used to generate ΔV. BE The term sums the PTAT current proportional to the absolute temperature; the base current compensation branch is used to compensate for the current error caused by the shunt of the base currents of the two bipolar transistors to the branch that generates the PTAT current. The BJT process fluctuation compensation module includes a compensation bipolar transistor (BPT), a compensation current mirror unit connected to the BPT, and a compensation current injection node connected between the output terminal of the compensation current mirror unit and the collector branch of the output BPT. The BPT is connected in a diode configuration, with its collector connected in series with the input terminal of the compensation current mirror unit to form a bias branch. This allows the current flowing through the compensation current mirror unit to be modulated by the current gain β of the BPT. The output terminal of the compensation current mirror unit is connected to the collector network of the output BPT through the compensation current injection node to reflect the compensation current I. BJT_C Directly injected into the collector branch of the output bipolar transistor; The output stage module includes an output bipolar transistor and an output current mirror unit. The base-emitter voltage of the output bipolar transistor and the voltage corresponding to the PTAT current together form the reference voltage V. REF .

[0009] The startup module includes a startup resistor, a startup NMOS transistor, and a startup PMOS transistor. During the initial power-on phase, the startup PMOS transistor injects startup current into the bandgap reference core module. Once the bandgap reference core module establishes a normal bias, the startup control node is pulled to the shutdown level, causing the startup PMOS transistor to turn off.

[0010] The input terminals of the operational amplifier are connected to the detection nodes of the first current mirror branch and the second current mirror branch, respectively. The output terminal of the operational amplifier is connected to the gate of at least one current mirror transistor to adjust the drain-source voltage of the first current mirror branch and the second current mirror branch so that the operating voltage of the two branches tends to be consistent, thereby reducing the influence of channel length modulation effect on the accuracy of PTAT current replication.

[0011] Instead of directly clamping the base-emitter voltage difference between the two bipolar transistors in the bandgap reference core module, the operational amplifier improves the current replication accuracy by adjusting the bias state of the current mirror branch, thus making the operational amplifier input offset voltage more sensitive to ΔV. BE The effect of the terms changes from direct linear superposition to the effect of small signals with weak logarithmic correlation.

[0012] The base current, collector current, or mirror current derived from the bipolar transistor (BJT) varies with the BJT current gain β. The compensation current mirror unit generates a current mirror corresponding to the BJT saturation current I based on this variation. S Compensation current I related to the direction of change BJT_C When the BJT saturation current I S The V of the output bipolar transistor changes with the process angle. BE When the current decreases, the compensation current I BJT_C By changing the collector current of the output bipolar transistor, V BE It generates a correction in the opposite direction; when the BJT saturation current I... S The V of the output bipolar transistor changes with the process angle. BE When the current increases, the compensation current I BJT_C The collector current of the output bipolar transistor is adjusted in the opposite direction, thereby reducing the reference voltage V. REF Cross-process angle offset.

[0013] The current compensation mirror unit includes M mirror units. 11 The compensation mirror transistor, the output current mirror unit includes M mirror units. 12 The output mirror transistor, M 11Used to adjust the intensity of BJT process fluctuation compensation, M 12 Used to adjust the output stage V BE The ratio of M items to PTAT items 11 With M 12 The configuration is coordinated to simultaneously meet process corner consistency and temperature coefficient targets. The number of mirror cells M of the compensated mirror transistor. 11 The number of mirror units M of the output mirror transistor is 16. 12 It is 56.

[0014] The two bipolar transistors, the compensation bipolar transistor, and the output bipolar transistor in the bandgap reference core module are vertical NPN transistors, parasitic bipolar transistors, lateral PNP transistors, or bipolar devices available in CMOS / BCD processes.

[0015] Compared with the prior art, the present invention, employing the above technical solution, has the following technical effects: 1. Compared with existing technologies that compensate for output errors through fuse adjustment, digital calibration codes, or post-test coding, this invention utilizes the β and I of BJT devices. S The process correlation between the two is used to construct a simulated adaptive compensation path, which can adaptively compensate for BJT process drift without relying on external testing and adjustment procedures. Introducing BJT process fluctuation compensation through simulation can reduce output deviation across the entire process angle and reduce reliance on fuse adjustment or digital calibration procedures.

[0016] 2. Compared with the traditional bandgap structure where the operational amplifier directly clamps the BJT branch voltage, the operational amplifier in this invention is mainly used to balance the drain-source voltage of the current mirror branch, and does not directly clamp ΔV. BE This prevents the op-amp input offset from being directly superimposed on the bandgap core term in a linear form, thereby improving the accuracy of the reference voltage.

[0017] 3. Compared to solutions that only compensate for temperature curvature, MOS threshold drift, or resistance temperature characteristics, this invention directly injects the compensation current into the collector branch of the output bipolar transistor, making the output stage V... BE The term can target the BJT saturation current I. S The process drift produces corrections in the opposite direction, with a clear structural path and target.

[0018] 4. This invention utilizes M 11 With M 12 The proportional optimization of the current mirror balances process compensation and temperature coefficient optimization. By using the coordinated setting of the resistor network and the current mirror, the impact of resistor fluctuations on the output voltage is reduced, improving the circuit's robustness to manufacturing deviations. Attached Figure Description

[0019] Figure 1 This is a schematic diagram of the overall structure of a bandgap reference circuit with process fluctuation compensation according to the present invention; Figure 2 This is a schematic diagram of the core module of the operational amplifier offset-tolerant bandgap reference proposed in this invention; Figure 3 This is a schematic diagram of the BJT process fluctuation compensation module and compensation current injection path proposed in this invention; Figure 4 The present invention proposes the BJT current gain β and saturation current I. S Simulation diagram illustrating the correlation between them; Figure 5 This is a detailed circuit diagram of a bandgap reference circuit with process fluctuation compensation proposed in this invention. Figure 6 These are the temperature characteristic curves of the output reference voltage of the present invention simulated under typical process angles and all 45 process angles, where (a) is the typical process angle and (b) is all 45 process angles. Figure 7 This is a Monte Carlo simulation histogram of the output reference voltage value and its temperature coefficient as a function of the process according to an embodiment of the present invention, with 500 sampling points, where (a) is the output reference voltage and (b) is the temperature coefficient. Detailed Implementation

[0020] The technical solution of the present invention will be described below with reference to the accompanying drawings. It should be understood that the embodiments described are only for explaining the present invention and are not intended to limit the scope of protection of the present invention. Without departing from the core concept of the present invention, those skilled in the art can make equivalent substitutions or combinations of device types, mirror ratios, bias methods, layout implementation methods, and output voltage levels. The parameters and device numbers in each embodiment are used to illustrate a feasible implementation method and should not be construed as the sole limitation on the scope of protection.

[0021] like Figure 1 As shown, the bandgap reference circuit with process variation compensation proposed in this invention includes a bandgap reference core module, a BJT process variation compensation module, a startup module, and an output stage module. The bandgap reference core module is used to generate PTAT current and ΔV. BE The output stage module is used to connect the PTAT voltage term to the BJT's V. BE The combination of terms forms the reference voltage V REF The BJT process fluctuation compensation module is used to generate the compensation current I. BJT_C The startup module is used to ensure that the circuit moves away from the zero-current stable point after power-on.

[0022] In one specific implementation, the bandgap reference circuit can be implemented using a 0.18 μm BCD process, with an operating supply voltage range of 2.8V to 5.0V. Under simulation conditions, the circuit operates within a temperature range of -40°C to 125°C, and verification is performed for multiple process corner combinations of MOS, BJT, and resistors. The above process node, power supply range, and temperature range are merely examples and can be adjusted according to the chip platform in actual implementation.

[0023] like Figure 2 As shown, the core module of the bandgap reference includes bipolar transistors Q1 and Q2, a resistor network, a current mirror branch for replicating the current, operational amplifier A1, and a base current compensation branch. Q1 and Q2 have different current densities, thus generating ΔV. BE Based on thermal voltage and current density ratio The PTAT current can be obtained, and its basic relationship is as follows: ; Unlike traditional bandgap references where the operational amplifier directly clamps the voltages of the two BJT branches, in this embodiment, operational amplifier A1 is primarily used to provide current mirror bias and balance the drain-source voltage of the mirror branch through virtual shorting, thus reducing the channel length modulation effect when the current mirror replicates the current. Therefore, the operational amplifier input offset voltage will not be directly linearly superimposed on ΔV. BE This improves the reference accuracy of the bandgap core and provides a more stable current basis for subsequent process fluctuation compensation.

[0024] To compensate for the branch current error caused by the BJT base current, this embodiment can set up a base current compensation branch composed of compensation bipolar transistor Q3, compensation bipolar transistor Q4, PMOS transistor MP7, and PMOS transistor MP8. By making the base current generated by the compensation branch approximately equal to the sum of the shunt base currents in the main branch, the influence of the base current on the accuracy of PTAT current generation can be reduced.

[0025] like Figure 3 As shown, the BJT process fluctuation compensation module includes a compensation bipolar transistor Q5, a compensation current mirror unit MP11, and a compensation current injection node. The output stage includes an output bipolar transistor Q6 and an output current mirror unit MP12. The output terminal of the compensation current mirror unit is connected to the collector branch of the output bipolar transistor Q6, causing the compensation current I... BJT_C The collector current I of Q6 can be directly adjusted. C6 .

[0026] For the output stage, V in the reference voltage BE6 The term relates to the BJT saturation current I. S6 Highly sensitive, and IS6 It will shift significantly with changes in base region doping concentration and effective base region width during the manufacturing process. Therefore, V BE6 Process drift is a significant source of deviation in the bandgap reference output voltage across the process angle, specifically manifested as: ; In a typical BCD process, the BJT current gain β and the saturation current I S Both are affected by the physical parameters of the base region. When the base region width increases or the doping concentration increases, β and I... S Typically, β and I decrease; as the base region narrows or the doping concentration decreases, β and I... S It usually increases. Therefore, β and I S A positive correlation is observed under different BJT process corners. To verify the relationship between the BJT current gain β and the saturation current I... S To illustrate the relationship between these factors, this embodiment employs a Monte Carlo simulation with 100 sampling points to map their distribution under varying process conditions. For example... Figure 4 As shown, with β as the y-axis and I... S Simulation results plotted as the x-axis show that β and I S The two sides exhibit a major proportional relationship, and the nonlinearity can be ignored, thus verifying the feasibility of the compensation scheme proposed in this invention.

[0027] Based on the above principle, the compensation bipolar transistor Q5 generates a current carrying β change information in the bias state, and the compensation current mirror unit MP11 converts this information into a compensation current I. BJT_C .

[0028] , Where M9, M11, and M12 represent the number of units in the corresponding current mirrors. Therefore, the expression for the output reference voltage can be derived as follows: , From the expression, we can see that when the BJT process angle causes I... S6 When I increases, in the absence of compensatory mechanisms, C6 Unchanged, therefore V BE6 The tendency to decrease leads to a drift in the output reference due to process angle correlation; based on process characteristics and Monte Carlo simulation results, β and I S It is directly proportional to I under different BJT process angles, therefore β varies with I S6 It increases linearly with increasing I. After adding the BJT process angle compensation module, the compensation branch changes I... BJT_C make I C6 This produces a change proportional to the value of β, thereby causing V BE6This generates a correction in the opposite direction. When the BJT process angle causes I... S6 When the current decreases, the compensation current adjusts I in the opposite direction. C6 This reduces V BE6 The reference voltage shift caused by the increase. This results in information about BJT process angle variation, β variation, compensation current, output stage collector current, and V. BE The modified closed-loop action path.

[0029] By adjusting the number of mirror units M of MP11 11 The intensity of process fluctuation compensation can be changed; by adjusting the number of mirror units M of MP12. 12 It can change V in the output stage BE The ratio of M items to PTAT items. Due to separate adjustment of M 11 It may change V at the same time BE / ΔV BE The proportion and temperature coefficient are affected; in this embodiment, M is... 11 and M 12 By configuring the system in a coordinated manner, BJT process corner deviation compensation and reference voltage temperature coefficient optimization can be achieved simultaneously.

[0030] In one implementation, to obtain an effective current density ratio, the resistance ratio R7 / R6 can be set to 2.5, where R7 is the sum of the resistance values ​​of resistors R7_1 and R7_2, the current ratio of I1 to I2 is 2:15, the area ratio of Q1 to Q2 is 4:1, and the number of relevant current mirror units is configured proportionally. By adjusting M... 11 and M 12 To optimize the scan, you can select, for example, M. 11 = 16, M 12 The combination of 56 minimizes the peak-to-peak variation of the reference voltage across the entire PVT range. The above values ​​are merely one example; actual product values ​​can be adjusted based on target output voltage, process platform, and layout matching requirements.

[0031] like Figure 5 As shown, in a specific implementation circuit, the startup module includes startup resistors R1~R5, startup NMOS transistors MN1~MN4, and startup PMOS transistors MP1~MP6. The gate of startup PMOS transistor MP1 is connected to one end of startup resistor R2, the drain of startup NMOS transistor MN1, and the gate of startup NMOS transistor MN2. The source of startup PMOS transistor MP1 is connected to the other end of startup resistor R2 and one end of startup resistor R1. The gate of startup NMOS transistor MN1 is connected to the source of startup NMOS transistor MN2 and one end of startup resistor R3. The drain of startup NMOS transistor MN2 is connected to the drain of startup PMOS transistor MP2.

[0032] The gate of PMOS transistor MP2 is connected to the gate of PMOS transistor MP3 and the gate of PMOS transistor MP5. The gate of NMOS transistor MN3 is connected to the drain of PMOS transistor MP3 and one end of the start-up resistor R5. The drain of NMOS transistor MN4 is connected to the other end of the start-up resistor R5 and one end of the start-up resistor R4. The drain of NMOS transistor MN3 is connected to the drain of PMOS transistor MP4 and the gate of PMOS transistor MP6. The source of PMOS transistor MP6 is connected to the drain of PMOS transistor MP5.

[0033] The other end of the start-up resistor R1, the source of start-up PMOS transistor MP2, the source of start-up PMOS transistor MP3, the source of start-up PMOS transistor MP4, and the source of start-up PMOS transistor MP5 are all connected to the power supply voltage. The drain of start-up PMOS transistor MP1, the source of start-up NMOS transistor MN1, the other end of start-up resistor R3, the other end of start-up resistor R4, the source of start-up NMOS transistor MN4, and the source of start-up NMOS transistor MN3 are all grounded.

[0034] The core module of the bandgap reference includes a base current compensation branch and a PTAT current generation branch. The base current compensation branch includes a compensation bipolar transistor Q3, a compensation bipolar transistor Q4, a PMOS transistor MP7, and a PMOS transistor MP8. The PTAT current generation branch includes a current mirror unit MP9, a current mirror unit MP10, an operational amplifier A1, a bipolar transistor Q1, a bipolar transistor Q2, and a resistor R6.

[0035] The emitter of the compensation bipolar transistor Q4 is connected to the collector of the compensation bipolar transistor Q3. The base of the compensation bipolar transistor Q4 is connected to the drain of the PMOS transistor MP7, the gate of the PMOS transistor MP7, and the gate of the PMOS transistor MP8. The base of the compensation bipolar transistor Q3 is connected to one end of the resistor R6, the collector of the bipolar transistor Q1, and the base of the bipolar transistor Q1. The base of the bipolar transistor Q2 is connected to the other end of the resistor R6, the positive input terminal of the operational amplifier A1, the drain of the PMOS transistor MP8, and the drain of the current mirror unit MP9. The output terminal of the operational amplifier A1 is connected to the gate of the current mirror unit MP9, the gate of the current mirror unit MP10, and the gate of the start-up PMOS transistor MP4.

[0036] The drain of the current mirror unit MP10 is connected to the drain of the startup PMOS transistor MP6, the negative input terminal of the operational amplifier A1, and the collector of the bipolar transistor Q2 at the first common connection point. The first common connection point is used as the startup control node. After the normal bias of the bandgap reference core module is established, the startup control node is pulled to the off level.

[0037] The collector of the compensation bipolar transistor Q4, the source of the PMOS transistor MP7, the source of the PMOS transistor MP8, the source of the current mirror unit MP9, and the source of the current mirror unit MP10 are all connected to the power supply voltage; the emitters of the compensation bipolar transistor Q3, the emitters of the bipolar transistor Q1, and the emitters of the bipolar transistor Q2 are all grounded.

[0038] The BJT process fluctuation compensation module includes a compensation bipolar transistor Q5 and a compensation current mirror unit MP11. The output stage module includes an output bipolar transistor Q6, an output current mirror unit MP12, resistor R7_1, and resistor R7_2.

[0039] The gates of the compensation current mirror unit MP11 and the output current mirror unit MP12 are connected to the gate of the startup PMOS transistor MP4, respectively. The drain of the compensation current mirror unit MP11 is connected to the base of the compensation bipolar transistor Q5. The drain of the output current mirror unit MP12 is connected to one end of the resistor R7_2 via resistor R7_1. The base of the output bipolar transistor Q6, the emitter of the compensation bipolar transistor Q5, the other end of the resistor R7_2, and the collector of the output bipolar transistor Q6 are connected to the second common connection point, which is used as the compensation current injection node. The common connection of resistors R7_1 and R7_2 is connected to the gate of the startup NMOS transistor MN4. The drain of the output current mirror unit MP12 and the common connection of resistor R7_1 output a reference voltage.

[0040] The source of the compensation current mirror unit MP11, the source of the output current mirror unit MP12, and the collector of the compensation bipolar transistor Q5 are all connected to the power supply voltage, while the emitter of the output bipolar transistor Q6 is grounded.

[0041] The startup module injects startup current into the bandgap reference core during the power-on phase and turns off after normal bias is established; the base current compensation branch reduces the error caused by the shunt current of Q1 and Q2; the PTAT current generation branch uses the current density difference between Q1 and Q2 to generate ΔV. BE The BJT process fluctuation compensation module uses Q5, MP11 and Q6, MP12 to form the compensation current generation and injection path.

[0042] In this specific implementation, the startup module may include devices such as MN1, MN3, MP6, MP4, and a startup resistor. Upon power-up, the startup branch causes the core circuit to move away from the zero-current stable point; once the bandgap core has established a normal operating state, the startup control node is pulled to the shutdown level, and the startup current injection stops.

[0043] Integrated resistors are affected by manufacturing factors such as doping concentration, etching precision, and film thickness, and may exhibit absolute deviations between fast and slow process angles. Since the collector current of the output stage bipolar transistor can be determined by ΔV... BE The relationship between R and V determines that the absolute value deviation of the resistance will cause a change in current, and further affect V. BE .

[0044] However, BJT's V BE With collector current I C There is a logarithmic relationship between them. Therefore, even if the current change caused by the resistance is large, it will still be proportional to V. BE The voltage change will still be compressed by a logarithmic relationship. At room temperature, when the current changes by 20%, V BE The change is on the order of several millivolts, relative to a typical V BE The value accounts for a relatively small proportion. Therefore, in the structure of this invention, the absolute value of the resistance, particularly the process deviation, is not the main source of output error; the main source of process error is the BJT saturation current I. S The absolute deviation. This invention further suppresses the influence of the resistor process by coordinating the resistor network and the current mirror scaling unit.

[0045] This invention also provides a method for generating a high-precision bandgap reference voltage with process fluctuation compensation. First, ΔV is generated using bipolar transistors Q1 and Q2 with different current densities. BE The PTAT current is generated based on a resistor network. Secondly, the drain-source voltage of the current mirror branch is balanced using operational amplifier A1, improving the accuracy of current replication while preventing the op-amp offset voltage from being directly superimposed on ΔV. BE Next, current information varying with the BJT current gain β is obtained using a compensated bipolar transistor, and a compensated current I is generated through a compensated current mirror unit. BJT_C The compensation current I BJT_C Injected into the collector branch of the output stage bipolar transistor to regulate the collector current of the output stage bipolar transistor. Finally, using the process-compensated V... BE The term is combined with the PTAT term to generate the reference voltage V. REF This reduces the combined impact of process fluctuations, operational amplifier offset, and resistor deviations on the reference voltage.

[0046] In a post-simulation verification embodiment, to reflect the actual operating conditions of the simulated system, a full simulation verification is performed with an output capacitor load. The circuit can be implemented using a 0.18μm BCD process, with a power supply voltage range of 2.8V to 5.0V. Simulations are performed across the entire temperature range and multiple process corner combinations under 5V power supply and capacitor load conditions. Figure 6As shown in (a) and (b), under typical process corners, the maximum variation of the reference voltage is approximately 1.694 mV in the range of -40°C to 125°C, corresponding to a temperature coefficient of approximately 8.2 ppm / °C. Under the combination of MOS, BJT, and resistor process corners and across the entire temperature range, the maximum deviation of the output voltage is approximately 11.41 mV, indicating that the process fluctuation compensation structure can effectively improve consistency across process corners.

[0047] Furthermore, to evaluate the system's robustness to random variations in process technology, a global Monte Carlo simulation was performed on the entire circuit under 5V power supply and capacitive load conditions. For example... Figure 7 As shown in (a) and (b), the average temperature coefficient is 14.97 ppm / ℃ with a standard deviation of 7.86 ppm / ℃; the average reference voltage is 1.256 V with a standard deviation of 4.43 mV. These results indicate that the circuit as a whole is insensitive to process variations and exhibits good stability under different operating conditions and manufacturing deviations.

[0048] The above embodiments are merely illustrative of the technical concept of the present invention and should not be construed as limiting the scope of protection of the present invention. Any modifications made to the technical solutions based on the technical concept proposed in this invention shall fall within the scope of protection of this invention.

Claims

1. A bandgap reference circuit with process fluctuation compensation, characterized in that, The bandgap reference circuit includes: a startup module, a bandgap reference core module, a BJT process fluctuation compensation module, and an output stage module; The startup module is used to inject startup current into the core module of the bandgap reference circuit during the initial power-on phase of the bandgap reference circuit, and to turn off after the normal bias of the core module of the bandgap reference circuit is established. The bandgap reference core module includes a base current compensation branch and a PTAT current generation branch; the PTAT current generation branch is used to generate a PTAT current proportional to the absolute temperature, and to generate a base-emitter voltage difference using two bipolar transistors with different current densities; the base current compensation branch is used to compensate the current error caused by the shunting of the base currents of the two bipolar transistors with different current densities to the PTAT current generation branch. The BJT process fluctuation compensation module includes a compensation bipolar transistor, a compensation current mirror unit connected to the compensation bipolar transistor, and a compensation current injection node connected between the output terminal of the compensation current mirror unit and the collector branch of the output bipolar transistor. The base and collector of the compensation bipolar transistor are connected in a diode configuration, and its collector is connected in series with the input terminal of the compensation current mirror unit to form a bias branch, so that the current flowing through the compensation current mirror unit is modulated by the current gain β of the compensation bipolar transistor. The output terminal of the compensation current mirror unit is connected to the collector network of the output bipolar transistor through the compensation current injection node to reflect the compensation current I. BJT_C Directly injected into the collector branch of the output bipolar transistor; The output stage module includes an output bipolar transistor and an output current mirror unit, used to combine the base-emitter voltage of the output bipolar transistor with the voltage corresponding to the PTAT current to form a reference voltage V. REF Output.

2. The bandgap reference circuit with process fluctuation compensation according to claim 1, characterized in that, The startup module includes startup resistors R1~R5, startup NMOS transistors MN1~MN4, and startup PMOS transistors MP1~MP6. The gate of startup PMOS transistor MP1 is connected to one end of startup resistor R2, the drain of startup NMOS transistor MN1, and the gate of startup NMOS transistor MN2. The source of startup PMOS transistor MP1 is connected to the other end of startup resistor R2 and one end of startup resistor R1. The gate of startup NMOS transistor MN1 is connected to the source of startup NMOS transistor MN2 and one end of startup resistor R3. The drain of startup NMOS transistor MN2 is connected to the drain of startup PMOS transistor MP2. The gate of PMOS transistor MP2 is connected to the gate of PMOS transistor MP3 and the gate of PMOS transistor MP5. The gate of NMOS transistor MN3 is connected to the drain of PMOS transistor MP3 and one end of the start-up resistor R5. The drain of NMOS transistor MN4 is connected to the other end of the start-up resistor R5 and one end of the start-up resistor R4. The drain of NMOS transistor MN3 is connected to the drain of PMOS transistor MP4 and the gate of PMOS transistor MP6. The source of PMOS transistor MP6 is connected to the drain of PMOS transistor MP5. The other end of the start-up resistor R1, the source of start-up PMOS transistor MP2, the source of start-up PMOS transistor MP3, the source of start-up PMOS transistor MP4, and the source of start-up PMOS transistor MP5 are all connected to the power supply voltage. The drain of start-up PMOS transistor MP1, the source of start-up NMOS transistor MN1, the other end of start-up resistor R3, the other end of start-up resistor R4, the source of start-up NMOS transistor MN4, and the source of start-up NMOS transistor MN3 are all grounded.

3. The bandgap reference circuit with process fluctuation compensation according to claim 2, characterized in that, The bandgap reference core module includes a base current compensation branch and a PTAT current generation branch. The base current compensation branch includes a compensation bipolar transistor Q3, a compensation bipolar transistor Q4, a PMOS transistor MP7, and a PMOS transistor MP8. The PTAT current generation branch includes a current mirror unit MP9, a current mirror unit MP10, an operational amplifier A1, a bipolar transistor Q1, a bipolar transistor Q2, and a resistor R6. The emitter of the compensation bipolar transistor Q4 is connected to the collector of the compensation bipolar transistor Q3. The base of the compensation bipolar transistor Q4 is connected to the drain of the PMOS transistor MP7, the gate of the PMOS transistor MP7, and the gate of the PMOS transistor MP8. The base of the compensation bipolar transistor Q3 is connected to one end of the resistor R6, the collector of the bipolar transistor Q1, and the base of the bipolar transistor Q1. The base of the bipolar transistor Q2 is connected to the other end of the resistor R6, the positive input terminal of the operational amplifier A1, the drain of the PMOS transistor MP8, and the drain of the current mirror unit MP9. The output terminal of the operational amplifier A1 is connected to the gate of the current mirror unit MP9, the gate of the current mirror unit MP10, and the gate of the start-up PMOS transistor MP4. The drain of the current mirror unit MP10 is connected to the drain of the startup PMOS transistor MP6, the negative input terminal of the operational amplifier A1, and the collector of the bipolar transistor Q2 at the first common connection point. The first common connection point is used as the startup control node. After the normal bias of the bandgap reference core module is established, the startup control node is pulled to the off level. The collector of the compensation bipolar transistor Q4, the source of the PMOS transistor MP7, the source of the PMOS transistor MP8, the source of the current mirror unit MP9, and the source of the current mirror unit MP10 are all connected to the power supply voltage; the emitters of the compensation bipolar transistor Q3, the emitters of the bipolar transistor Q1, and the emitters of the bipolar transistor Q2 are all grounded.

4. The bandgap reference circuit with process fluctuation compensation according to claim 3, characterized in that, The BJT process fluctuation compensation module includes a compensation bipolar transistor Q5 and a compensation current mirror unit MP11, and the output stage module includes an output bipolar transistor Q6, an output current mirror unit MP12, a resistor R7_1, and a resistor R7_2. The gates of the compensation current mirror unit MP11 and the output current mirror unit MP12 are connected to the gate of the startup PMOS transistor MP4, respectively. The drain of the compensation current mirror unit MP11 is connected to the base of the compensation bipolar transistor Q5. The drain of the output current mirror unit MP12 is connected to one end of the resistor R7_2 via resistor R7_1. The base of the output bipolar transistor Q6, the emitter of the compensation bipolar transistor Q5, the other end of the resistor R7_2, and the collector of the output bipolar transistor Q6 are connected to the second common connection point, which is used as the compensation current injection node. The common connection of resistors R7_1 and R7_2 is connected to the gate of the startup NMOS transistor MN4. The drain of the output current mirror unit MP12 and the common connection of resistor R7_1 output a reference voltage. The source of the compensation current mirror unit MP11, the source of the output current mirror unit MP12, and the collector of the compensation bipolar transistor Q5 are all connected to the power supply voltage, while the emitter of the output bipolar transistor Q6 is grounded.

5. The bandgap reference circuit with process fluctuation compensation according to claim 4, characterized in that, Bipolar transistors Q1, Q2, Q5 (compensation bipolar transistor), and Q6 (output bipolar transistor) are vertical NPN transistors, parasitic bipolar transistors, lateral PNP transistors, or bipolar devices in CMOS / BCD processes.

6. The bandgap reference circuit with process fluctuation compensation according to claim 4, characterized in that, The current compensation mirror unit MP11 includes M mirror units. 11 The compensation mirror transistor, wherein the output current mirror unit MP12 includes M mirror units. 12 The output mirror transistor, M 11 Used to adjust the intensity of BJT process fluctuation compensation, M 12 M is used to adjust the ratio of the base-emitter voltage of the output bipolar transistor Q6 to the voltage corresponding to the PTAT current. 11 With M 12 The coordinated settings minimize the peak-to-peak variation of the reference voltage across the entire PVT range, thereby simultaneously meeting the objectives of process corner consistency and temperature coefficient.

7. The bandgap reference circuit with process fluctuation compensation according to claim 6, characterized in that, The number of mirror units M of the compensation mirror transistor 11 The number of mirror units M of the output mirror transistor is 16. 12 It is 56.

8. A process compensation method for a bandgap reference circuit with process fluctuation compensation according to any one of claims 4 to 7, characterized in that, The specific process compensation method is as follows: The base-emitter voltage difference ΔV is generated using bipolar transistors Q1 and Q2 with different current densities. BE The PTAT current is generated by a branch based on the PTAT current; the drain-source voltage of the current mirror unit MP9 and the current mirror unit MP10 is balanced by operational amplifier A1 instead of directly clamping ΔV. BE To suppress the direct impact of the operational amplifier A1 input offset voltage on the reference voltage; to compensate for the current carrying current gain β change information generated by bipolar transistor Q5 under BJT process angle variation, the compensation current mirror unit MP11 converts the current carrying current gain β change information into compensation current I. BJT_C and will compensate current I BJT_C The collector current of the output bipolar transistor Q6 is injected into the collector branch, and the collector current of the output bipolar transistor Q6 is thus adaptively adjusted according to the change of the BJT process angle, thereby offsetting the base-emitter voltage drift of the bipolar transistor Q6 caused by the change of the BJT saturation current. The reference voltage V is generated based on the PTAT current, the base-emitter voltage of the output bipolar transistor Q6 after process fluctuation compensation, and the optimized ratio of the mirror units of the compensation current mirror unit MP11 and the output current mirror unit MP12. REF ; Reference voltage V REF The expression is: ， in, This is the base-emitter voltage of the output bipolar transistor Q6 after process fluctuation compensation. This represents the voltage drop across resistors R7_1 and R7_2 caused by the PTAT current. Thermoelectric voltage, To provide the saturation current of the output bipolar transistor Q6, To compensate for the current gain of bipolar transistor Q5, , and These represent the number of mirror units for the output current mirror unit MP12, the compensation current mirror unit MP11, and the current mirror unit MP9, respectively. This is the sum of the resistance values ​​of resistors R7_1 and R7_2. The PTAT current is generated by the PTAT current generation branch and replicated to the output stage module. The ratio of the current densities of bipolar transistors Q1 and Q2. This is the resistance value of resistor R6.

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