SLC NAND cross-tier data migration method and system

CN122816558APending Publication Date: 2026-09-25SHEN ZHEN XINCUN TECH CO LTD
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Patent Information

Application Number
CN202611329566.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-08-31
Publication Date
2026-09-25

AI Technical Summary

Technical Problem

[0005]本发明提供了一种SLC NAND跨层数据迁移方法及系统,以解决现有技术中存在的掉电状态下SLC NAND跨层数据迁移规模与残余供电能力不匹配的问题

Benefits of technology

(1)本发明通过根据储能电容的残余电压、最低工作电压及电容值确定掉电可用能量,并结合日志保留能耗和单位迁移能耗确定可迁移页数,使跨层数据迁移规模与掉电状态下的实际供电能力相对应,减少因迁移页数超过可用能量范围而造成的数据页编程中断,提高掉电状态下跨层数据迁移的完成度。

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Abstract

The application relates to the technical field of SLC NAND storage control, and discloses an SLC NAND cross-layer data migration method and system, which comprises the following steps: acquiring to-be-migrated page information of a source physical layer and idle page information of a target physical layer in a power-off state, allocating a target page address and associating a source page address to obtain a migration task; acquiring a residual voltage of an energy storage capacitor for supplying power to SLC NAND storage media, determining power-off available energy and a number of migratable pages; selecting an execution task according to the number of migratable pages, reading source page data and generating a programming instruction sequence; sending the programming instruction sequence, receiving programming state information and determining a passed task; generating mapping log data according to the passed task, writing the mapping log data into a preset log area, and obtaining an SLC NAND cross-layer data migration result. The method can limit the number of cross-layer data migration pages according to the power-off available energy, and record a passed task after completing programming.
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Description

Technical Field

[0001] This invention relates to the field of SLC NAND storage control technology, and in particular to a method and system for cross-layer data migration in SLC NAND. Background Technology

[0002] Currently, SLC NAND flash memory features simple cell states, short programming latency, and high write / erase durability, making it widely used in storage devices requiring fast writing and reliable data retention. As storage array capacity and the number of physical layers increase, storage controllers need to migrate data from the source physical layer to the target physical layer based on data management requirements, in order to organize storage space and maintain data status.

[0003] In one existing technology, the storage controller detects the power supply status via an application-specific integrated circuit (ASIC). When a power failure event is detected, it reads the data to be migrated from the source physical layer according to a pre-set migration order and writes the data to be migrated sequentially to the target physical layer. Since the storage device mainly relies on energy storage elements to maintain short-term operation after a power failure, existing technologies typically perform data migration according to a fixed number of pages or a fixed migration order. This fails to adjust the number of data pages to be migrated based on the actual remaining power of the energy storage elements. This can easily lead to interruptions in subsequent data page writes when the migration task exceeds the power supply capacity, and result in missing corresponding migration records for already programmed data pages.

[0004] Existing technologies suffer from a mismatch between the scale of cross-layer data migration in SLC NAND under power failure conditions and the remaining power supply capacity. Summary of the Invention

[0005] This invention provides a method and system for cross-layer data migration in SLC NAND to solve the problem in the prior art where the scale of cross-layer data migration in SLC NAND under power failure conditions does not match the residual power supply capacity.

[0006] Firstly, in order to solve the above-mentioned technical problems, the present invention provides a method for cross-layer data migration in SLC NAND, comprising: Obtain the page information to be migrated from the source physical layer and the free page information from the target physical layer under power failure conditions; allocate the target page address according to the free page information; associate the source page address in the page information to be migrated with the target page address to obtain the migration task. Obtain the residual voltage of the energy storage capacitor that powers the SLC NAND storage medium, determine the available energy during power failure based on the residual voltage, the preset minimum operating voltage and the capacitance value of the energy storage capacitor, and determine the number of pages that can be migrated based on the available energy during power failure, the preset log retention energy consumption and the preset unit migration energy consumption. Based on the number of migrateable pages, select an execution task from the migration tasks, read the source page data corresponding to the execution task, and generate a programming instruction sequence based on the source page data and the execution task; The programming instruction sequence is sent to the SLC NAND storage medium, the programming status information returned by the SLC NAND storage medium is received, and the successful task is determined from the execution tasks based on the programming status information; When the pass task exists, mapping log data is generated according to the pass task, and the mapping log data is written into the preset log area of ​​the SLC NAND storage medium to obtain the SLC NAND cross-layer data migration result.

[0007] In a second aspect, the present invention provides an SLC NAND cross-layer data migration system, comprising: a memory, a processor, and a computer program stored on the memory and executable on the processor, wherein the processor executes the program to implement the method described above.

[0008] Compared with the prior art, the present invention has the following beneficial effects: (1) This invention determines the available energy during power outages based on the residual voltage, minimum operating voltage, and capacitance value of the energy storage capacitor, and determines the number of pages that can be migrated by combining log retention energy consumption and unit migration energy consumption. This makes the scale of cross-layer data migration correspond to the actual power supply capacity under power outage conditions, reduces data page programming interruptions caused by the number of migrated pages exceeding the available energy range, and improves the completion rate of cross-layer data migration under power outage conditions.

[0009] (2) The present invention selects the execution task according to the number of migrateable pages, reads the corresponding source page data and sends the programming instruction to the target physical layer, and filters the passing task according to the programming status information returned by the SLC NAND storage medium, so that the successfully programmed data pages and the failed programming data pages are processed separately, avoiding the impact of the programming failure of a single data page on other completed programming data pages, and improving the effective retention ratio of data to be migrated under limited residual power supply conditions.

[0010] (3) The present invention encapsulates the source page address and target page address corresponding to the task into mapping log data and writes the mapping log data into a preset log area, so that the data pages that have been programmed have corresponding persistent migration records, providing a basis for subsequent identification of cross-layer migration results and recovery of data page correspondence, and improving the consistency of cross-layer data migration records under power failure. Attached Figure Description

[0011] Figure 1 This is a schematic diagram of the SLC NAND cross-layer data migration method provided in the first embodiment of the present invention. Detailed Implementation

[0012] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0013] Reference Figure 1 The first embodiment of the present invention provides a method for cross-layer data migration in SLC NAND, including the following steps: S1, obtain the page information to be migrated from the source physical layer and the free page information from the target physical layer under power failure state, allocate the target page address according to the free page information, associate the source page address in the page information to be migrated with the target page address to obtain the migration task; S2, obtain the residual voltage of the energy storage capacitor that powers the SLC NAND storage medium, determine the available energy during power failure based on the residual voltage, the preset minimum operating voltage and the capacitance value of the energy storage capacitor, and determine the number of pages that can be migrated based on the available energy during power failure, the preset log retention energy consumption and the preset unit migration energy consumption. S3, select an execution task from the migration tasks according to the number of migrateable pages, read the source page data corresponding to the execution task, and generate a programming instruction sequence according to the source page data and the execution task; S4, send the programming instruction sequence to the SLC NAND storage medium, receive the programming status information returned by the SLC NAND storage medium, and determine the successful task from the execution tasks based on the programming status information; S5, when the passing task exists, generate mapping log data according to the passing task, write the mapping log data into the preset log area of ​​the SLC NAND storage medium, and obtain the SLC NAND cross-layer data migration result.

[0014] In step S1, the source physical layer page information to be migrated and the target physical layer free page information are obtained under power failure conditions. The target page address is allocated according to the free page information. The source page address in the page information to be migrated is associated with the target page address to obtain the migration task.

[0015] The process includes allocating a target page address based on the free page information, associating the source page address in the page to be migrated information with the target page address to obtain a migration task, including: Extract the source page address from the page information to be migrated, and count the number of pages to be migrated; Select a target free page from the free page information that has the same number of pages to be migrated, and obtain the target page address; The source page address and the target page address are associated page by page to obtain the migration task.

[0016] In one implementation, the source physical layer and the target physical layer are physical storage regions divided by the storage controller according to logical units, planes, and physical block address ranges. The physical layer number belongs to the page management information maintained by the storage controller and is not sent as an independent address cycle in the SLC NAND storage medium interface.

[0017] During device initialization, the storage controller reads the parameter page of the SLC NAND storage medium. Based on the number of logical cells, the number of planes, the number of physical blocks per plane, and the number of pages per physical block recorded in the parameter page, it establishes a correspondence between physical layer numbers and physical block address ranges, and writes this correspondence into the non-volatile configuration area. When sending page read or page program instructions, the storage controller converts the physical layer number, block number, and intra-block page number into row address bytes specified by the SLC NAND storage medium interface according to the correspondence.

[0018] The power failure state refers to the operating state where, after the power supply monitoring circuit outputs a power failure signal, the energy storage capacitor continues to supply power to the storage controller and the SLC NAND storage medium via the power supply switching circuit. Upon receiving the power failure signal, the storage controller stops receiving new data write requests, locks the current page management information, and reads the queue of pages to be migrated and the target free page table, respectively.

[0019] The queue of pages to be migrated is established under normal power supply conditions. When the page management module generates a data page migration request, it writes the source page address of the corresponding data page into the queue of pages to be migrated. Each source page address includes a storage medium number, a physical layer number, a block number, and an intra-block page number.

[0020] The target free page table records target free pages in the target physical layer that have been erased and have not been allocated. During the device initialization phase, the storage controller reads the factory bad block markers of the SLC NAND storage medium and reads the retired block table maintained by the storage controller, deleting pages located in bad blocks and retired blocks from the target free page table.

[0021] The retired block table records physical blocks that experienced erase or page programming failures during operation. The erase failure and page programming failure are determined based on status register information returned by the SLC NAND storage medium. Once a physical block is written to the retired block table, the pages within that physical block are no longer written to the target free page table.

[0022] Under normal power supply conditions, the storage controller partitions a power-down migration page region in the target physical layer and writes the pages within the power-down migration page region that are located in valid physical blocks, have been erased, and have not been allocated into the target free page table. When any target free page is allocated, the storage controller modifies the page status recorded for the corresponding page to the allocated status.

[0023] Upon the generation of a power failure signal, the storage controller freezes the target free page table. Once frozen, the target free page table no longer responds to regular page allocations.

[0024] When the number of page records in the page queue to be migrated is greater than the number of page records in the target free page table, the storage controller selects page records from the page queue to be migrated in the order they appear in the queue, matching the number of page records in the target free page table, to obtain the page information to be migrated. Unselected page records remain in the page queue to be migrated.

[0025] In this embodiment, source page addresses are extracted one by one from the page information to be migrated, and the number of source page addresses is determined as the number of pages to be migrated. Then, starting from the first page record of the frozen free page information, target free pages are selected in ascending order of target page addresses until the number of selected target free pages is the same as the number of pages to be migrated. The address corresponding to the selected target free pages is then determined as the target page address.

[0026] After selecting the target page address, the storage controller changes the page status of the corresponding target free page to a reserved state. The target free page in the reserved state does not participate in the allocation of other pages during this power outage.

[0027] This embodiment maintains the order of the source page addresses in the page information to be migrated, and also maintains the selection order of the target page addresses in the free page information. Source page addresses and target page addresses with the same order are grouped into a migration task. Each migration task includes a task number, a source page address, and a target page address. Multiple migration tasks are grouped into a migration task set according to their task numbers.

[0028] For example, the page information to be migrated contains 3 page records, with corresponding source page addresses pointing to pages 4, 5, and 6 in the source physical layer, respectively. The first 3 page records in the free page information point to pages 0, 1, and 2 in the target physical layer, respectively. After associating the pages one by one according to the record order, 3 migration tasks are obtained, each of which records one source page address and one target page address.

[0029] It is worth noting that this step only establishes the page-level association between the source page address and the target page address; it does not read source page data from the source physical layer, nor does it send page programming instructions to the target physical layer. The migration task constitutes the input for steps S2 and S3.

[0030] In step S2, the residual voltage of the energy storage capacitor that powers the SLC NAND storage medium is obtained. The available energy during power failure is determined based on the residual voltage, the preset minimum operating voltage, and the capacitance value of the energy storage capacitor. The number of pages that can be migrated is determined based on the available energy during power failure, the preset log retention energy consumption, and the preset unit migration energy consumption.

[0031] The determination of usable energy during a power outage, based on the residual voltage, the preset minimum operating voltage, and the capacitance value of the energy storage capacitor, includes: Calculate the difference between the square of the residual voltage and the square of the minimum operating voltage to obtain the voltage square difference; Multiply the capacitance value of the energy storage capacitor by the square difference of the voltage, and determine half of the result as the usable energy of the capacitor. The available energy of the capacitor is calculated based on the preset power conversion efficiency to obtain the available energy after power failure.

[0032] In one implementation, the energy storage capacitor is connected between the power supply input and the power-down branch. When the power supply monitoring circuit detects that the external power supply voltage drops to the power-down trigger voltage, it synchronously outputs a power-down signal to the power supply switching circuit and the analog-to-digital converter circuit. In response to the power-down signal, the analog-to-digital converter circuit samples the voltage across the energy storage capacitor and latches the generated voltage conversion code into the voltage sampling register.

[0033] In response to the power failure signal, the power supply switching circuit disconnects the external power supply branch and connects the power failure power supply branch, allowing the energy storage capacitor to continue supplying power to the storage controller and the SLC NAND storage medium. In step S2, the storage controller reads the voltage conversion code from the voltage sampling register and, based on the voltage division ratio of the voltage divider sampling branch, the reference voltage of the analog-to-digital converter circuit, and the quantization bit depth, converts the voltage conversion code into the voltage of the energy storage capacitor at the time the power failure signal was generated, thus obtaining the residual voltage.

[0034] The power failure trigger voltage is determined by the undervoltage detection threshold of the power supply monitoring circuit. The undervoltage detection threshold is the lower limit of the normal power supply voltage range of the storage device and is written into the configuration register of the power supply monitoring circuit during the device configuration phase.

[0035] The voltage division ratio is determined based on the resistance values ​​of the two resistors in the voltage division sampling branch. The reference voltage and the number of quantization bits are taken from the device parameters of the analog-to-digital converter circuit. The resistance values ​​of the two resistors ensure that the charging cutoff voltage of the energy storage capacitor, after voltage division, does not exceed the upper limit of the input voltage of the analog-to-digital converter circuit.

[0036] The minimum operating voltage is the minimum allowable voltage at the energy storage capacitor terminal. During the device initialization phase, based on the undervoltage lockout threshold and minimum input voltage recorded in the power conversion circuit datasheet, as well as the minimum operating voltage recorded in the datasheets of the storage controller and the SLC NAND storage medium, the minimum voltage corresponding to the energy storage capacitor terminal is calculated, and the maximum value among the minimum voltages is determined as the minimum operating voltage.

[0037] It should be noted that the capacitance value of the energy storage capacitor is the minimum capacitance value specified in the device datasheet within the operating voltage and temperature range of this embodiment. When the device datasheet only records the nominal capacitance value and negative tolerance, the capacitance value of the energy storage capacitor is obtained by multiplying the nominal capacitance value by a factor obtained by subtracting the negative tolerance.

[0038] When multiple energy storage capacitors are connected in parallel, the minimum capacitance value of each energy storage capacitor is determined, and the minimum capacitance values ​​are added together to obtain the total capacitance value of the energy storage capacitor. This determination process does not use the average value of the pulse current, nor does it establish an equivalent model of a constant current load.

[0039] In this embodiment, the voltage square difference is determined according to the following formula: ; in, This represents the difference in squared voltages. This refers to the residual voltage. This indicates the minimum operating voltage.

[0040] The available energy of the capacitor is determined according to the following formula: ; in, This indicates the available energy of the capacitor. This indicates the capacitance value of the energy storage capacitor.

[0041] The power conversion efficiency represents the proportion of energy output from the energy storage capacitor that is transferred to the storage controller and the SLC NAND storage medium via the power conversion circuit. The power conversion efficiency is the lowest conversion efficiency recorded in the power conversion circuit datasheet within the range of the residual voltage to the minimum operating voltage and within the range of power-down migration load.

[0042] When the power conversion circuit datasheet does not specify the minimum conversion efficiency covering the voltage range and the power-down migration load range, this embodiment performs source page reading, target page programming, and programming status query of a data page at the upper limit, lower limit, and middle value of the voltage range, respectively, and simultaneously measures the voltage and current at the input and output terminals of the power conversion circuit.

[0043] The input voltage and input current at each sampling time are multiplied, and then multiplied by the corresponding sampling time interval. The products are accumulated to obtain the input energy. The output energy is obtained in the same way. The output energy is divided by the input energy to obtain the conversion efficiency under the corresponding test conditions, and the minimum conversion efficiency among the three test conditions is determined as the energy conversion efficiency.

[0044] The available energy during the power outage is determined according to the following formula: ; in, This indicates the available energy during the power outage. This indicates the energy conversion efficiency.

[0045] For example, the residual voltage is 5 volts, the minimum operating voltage is 3.3 volts, and the capacitance of the energy storage capacitor is 0.001 farads. The difference between the square of 5 volts and the square of 3.3 volts is calculated, yielding a voltage square difference of 14.11 square volts. 0.001 farads are multiplied by 14.11 square volts, and half of the result is determined as 0.007055 joules of usable energy from the capacitor. The energy conversion efficiency is 0.82; multiplying 0.007055 joules by 0.82 yields 0.0057851 joules of usable energy after power loss.

[0046] The 0.001 farad is the minimum capacitance value of the energy storage capacitor selected in this embodiment within the corresponding operating voltage and temperature range, and the 0.82 is the lowest conversion efficiency of the selected power conversion circuit within the aforementioned input voltage and power-down migration load range. When the residual voltage is not greater than the minimum operating voltage, the available energy during power-down is determined to be zero, and subsequent source page reads and target page programming are not performed.

[0047] The unit migration energy consumption includes the energy required to complete the source page read, target page programming, and programming status query for a data page.

[0048] Log retention energy consumption includes the energy required to complete the writing of a log page and the query of log status.

[0049] The determination of the number of migrateable pages based on the available energy during power outages, preset log retention energy consumption, and preset unit migration energy consumption includes: The migration allocation energy is obtained by subtracting the preset basic operating energy consumption and the log retention energy consumption from the available energy after the power outage; Calculate the ratio between the migration allocation energy and the unit migration energy consumption, and round the ratio down to obtain the initial number of migrated pages; Count the number of pages to be migrated in the migration task; The minimum value among the initial number of migrateable pages, the number of pages to be migrated, and the preset log page capacity is selected to obtain the number of migrateable pages. The log page capacity is the number of migration tasks that one log page can record.

[0050] In one implementation, the unit migration energy consumption, the log retention energy consumption, and the basic operating energy consumption are all determined during the device calibration phase. The calibration process uses the same storage controller, SLC NAND storage medium, interface frequency, power conversion circuit, and power supply branch as the actual migration process.

[0051] In one implementation, this embodiment employs a power analysis device with synchronous voltage sampling, current sampling, and energy integration functions to measure the energy consumed by the corresponding operation. The voltage sampling terminal of the power analysis device is connected in parallel to one side of the power supply branch from the power conversion circuit output to the storage controller and the SLC NAND storage medium, and the current sampling terminal of the power analysis device is connected in series to the same side of the power supply branch, so that the unit migration energy consumption, the log retention energy consumption, and the basic operating energy consumption are based on the same energy statistical benchmark as the power-down available energy converted by the power conversion efficiency.

[0052] The storage controller outputs a start trigger signal to the power analysis device when the measured operation begins and an end trigger signal when the measured operation is completed. The power analysis device synchronously samples the voltage and current of the power supply branch between the start and end trigger signals, multiplies the voltage and current at the same sampling moment to obtain the instantaneous power, and integrates the instantaneous power over time to obtain the energy consumed by the measured operation.

[0053] The power analysis device employs its pulse energy measurement mode, and the input bandwidth and sampling rate corresponding to the pulse energy measurement mode are set according to the device parameters of the power analysis device.

[0054] The measurement start point for the unit migration energy consumption is the moment when the storage controller reads a migration task and begins generating the corresponding page read instruction, and the measurement end point is the moment when the reading of the programming status register of the corresponding target page is completed. Between the measurement start point and the measurement end point, the page read instruction generation, source page reading, page programming instruction generation, target page programming, and programming status query for a single migration task are executed sequentially. To ensure that the calibration covers the actual batch migration status in steps S3 and S4, source page reading, source page data cache retention, target page programming, and programming status query are executed continuously according to the maximum number of execution tasks allowed to be processed in a single power-down migration in this embodiment. The total energy consumption measured in the batch stage is divided by the actual number of data pages completed to obtain the single-page energy consumption, which is compared with the aforementioned single-page measurement result. The larger value is taken as the unit migration energy consumption, so that the unit migration energy consumption covers the data cache retention energy consumption in the batch migration.

[0055] The measurement start point for log retention energy consumption is the moment when the storage controller begins generating mapped log data of one log page length based on the task, and the measurement end point is the moment when the log write status of the corresponding log page is completed. Between the measurement start point and the measurement end point, the following processes are executed sequentially: mapped log data encapsulation, log page programming instruction generation, log page writing, and log status query.

[0056] The basic operating energy consumption includes the energy consumption corresponding to page management information locking, page information reading to be migrated, free page information reading, target page address allocation, migration task generation, and migration page number calculation after the voltage conversion code latch is completed.

[0057] The measurement starting point for the basic operating power consumption is the moment when the analog-to-digital conversion circuit completes the voltage conversion code latch, and the measurement ending point is the moment when the number of migrateable pages is calculated. During calibration, the number of pages to be migrated is based on the log page capacity, ensuring that the basic operating power consumption covers the maximum number of migration tasks allowed to be processed in a single power-down migration in this embodiment. During the measurement, no source page read instructions, target page programming instructions, or log page programming instructions are sent to the SLC NAND storage medium.

[0058] The above three types of measurements are performed at the lower limit of the operating voltage range, the rated operating voltage, and the upper limit of the operating voltage range specified in the device datasheet, respectively, and the maximum energy value measured under each voltage condition is determined as the unit migration energy consumption, the log retention energy consumption, and the basic operating energy consumption, respectively.

[0059] It should be noted that, under the same page capacity, the same SLC NAND storage medium, and the same interface frequency, the unit migration energy consumption includes one source page read, one target page programming, and one programming status query; the log retention energy consumption includes one log page programming and one log status query. All energy consumption values ​​are based on the actual measurement results described above.

[0060] In this embodiment, the basic operating energy consumption and the log retention energy consumption are deducted from the available energy after a power outage, and the remaining energy is determined as the migration allocation energy. When the available energy after a power outage is less than or equal to the sum of the basic operating energy consumption and the log retention energy consumption, both the migration allocation energy and the initial number of migrateable pages are set to zero.

[0061] When the migration allocation energy is greater than zero, the initial number of migrated pages is determined according to the following formula: ; Wherein, in the formula This indicates the available energy during the power outage. This represents the initial number of migrated pages. This indicates the basic operating energy consumption. This indicates the energy consumption of the log retention. The symbol represents the energy consumption per unit migration. This indicates rounding down to the nearest integer.

[0062] The log page capacity is the number of migration tasks that a single log page can record. The storage controller subtracts the number of bytes occupied by the log page header from the data area capacity of the log page to obtain the migration record area capacity; the migration record area capacity is then divided by the number of bytes occupied by a single page migration record, and the result is rounded down to obtain the log page capacity.

[0063] The number of pages to be migrated is determined by the number of migration tasks generated in step S1. The storage controller compares the initial number of migrateable pages, the number of pages to be migrated, and the log page capacity, and selects the minimum value among the three as the number of migrateable pages.

[0064] For example, the available energy during power outage is 5.7851 millijoules, the base operating energy consumption obtained according to the aforementioned measurement process is 0.5 millijoules, the log retention energy consumption is 0.08 millijoules, and the unit migration energy consumption is 0.12 millijoules. The unit migration energy consumption includes one source page read, one target page programming, and one programming status query, and its value is greater than the log retention energy consumption which only includes one log page programming and one log status query.

[0065] Subtracting 0.5 mJ and 0.08 mJ from 5.7851 mJ yields a migration allocation energy of 5.2051 mJ. Dividing 5.2051 mJ by 0.12 mJ and rounding down gives an initial number of 43 migrateable pages. The number of pages to be migrated is 40, and the log page capacity is 255 entries. The minimum value among 43, 40, and 255 is selected to obtain the 40 migrateable pages.

[0066] The above energy consumption values ​​are exemplary values ​​obtained according to the hardware connection and energy consumption measurement process described in this embodiment, and are not used as fixed parameters for other hardware configurations.

[0067] It is worth noting that the log retention energy consumption is deducted separately before calculating the initial number of migrateable pages, and the write energy consumption of the mapped log data is not repeatedly included in the unit migration energy consumption. The number of migrateable pages constitutes the upper limit of the number of tasks selected in step S3.

[0068] In step S3, an execution task is selected from the migration tasks according to the number of migrateable pages, the source page data corresponding to the execution task is read, and a programming instruction sequence is generated based on the source page data and the execution task.

[0069] The process includes selecting an execution task from the migration tasks based on the number of migrateable pages, and reading the source page data corresponding to the execution task, including: The migration tasks are arranged according to the order of the source page addresses to obtain a task sequence; Select migration tasks from the task sequence, the number of which is the same as the number of migrateable pages, to obtain execution tasks; Based on the source page address in the execution task, a page read instruction is sent to the SLC NAND storage medium, and the source page data returned by the SLC NAND storage medium is received.

[0070] In one implementation, this embodiment uses an SLC NAND storage medium that supports an ONFI asynchronous parallel interface. During the device initialization phase, the storage controller reads the parameter pages of the SLC NAND storage medium and records the page size, the number of address cycles, the address bit width corresponding to each address cycle, the maximum page read time, and the maximum page programming time.

[0071] The task sequence is a set of migration tasks arranged according to source page addresses. During sorting, the storage medium numbers in each source page address are compared first; if the storage medium numbers are the same, the physical layer numbers are compared; if the physical layer numbers are the same, the block numbers are compared; if the block numbers are the same, the page numbers within the block are compared. All numbers are arranged in ascending order.

[0072] After sorting, the storage controller assigns consecutive numbers to each migration task according to their position, resulting in the task sequence. When the number of migrated pages is zero, no task is selected for execution; when the number of migrated pages is greater than zero, migration tasks are selected consecutively starting from the first migration task in the task sequence until the number of selected migration tasks matches the number of migrated pages, at which point the selected migration tasks are designated as execution tasks.

[0073] Migration tasks not selected for execution will not enter the source page reading process during this power outage. In this embodiment, the source page addresses of each unselected migration task will remain in the queue of pages to be migrated, and the page status of the page corresponding to the target page address in each unselected migration task will be restored from the reserved state to the idle state, so that the corresponding page is rewritten into the target free page table.

[0074] After the page state is restored, all unselected migration tasks are removed from the current migration task set. The executed tasks constitute the migration task set that continues to be processed under the current power outage state.

[0075] For each execution task, the storage controller selects the corresponding SLC NAND storage medium based on the storage medium number in the source page address, and converts the source page address into the row address byte specified by the interface according to the correspondence between the physical layer number and the physical block address range established in step S1.

[0076] In this embodiment, hexadecimal instruction 00H is used as the page read establish instruction, and hexadecimal instruction 30H is used as the page read confirm instruction. The storage controller first sends the page read establish instruction, then sends the address cycle in the order of column address first, row address last, and then sends the page read confirm instruction.

[0077] The column address points to the starting column address of the source page's main data area, and the row address is generated according to the address format specified in the SLC NAND storage medium parameter page. The physical layer number is not sent as an independent address period.

[0078] After sending the page read confirmation command, the storage controller monitors the ready busy signal output by the SLC NAND storage medium. When the ready busy signal switches from a busy state to a ready state, it continuously reads data of one page length from the data interface to obtain the source page data corresponding to the task to be executed. The source page data is valid page data after the storage controller has performed existing ECC checks and correctable error processing, and subsequent programming instruction sequences use the valid page data.

[0079] If the ready busy signal corresponding to any execution task fails to switch to the ready state within the maximum page read duration, the storage controller stops reading the remaining execution tasks and terminates the generation of the current programming instruction sequence. Subsequent target page programming and mapping log data writing will not be performed during this power-down state.

[0080] Since this step has not yet sent page programming instructions to the pages corresponding to the target page addresses, this embodiment restores the page state of the pages corresponding to the target page addresses in each execution task from the reserved state to the idle state, keeps the source page addresses in each execution task in the page queue to be migrated, and clears the source page data that has been read from the data cache. The source page data in the source physical layer remains valid.

[0081] The source page data is written to the data cache according to the task sequence number of the executed task. The storage controller records the starting position and data length of each source page data in the data cache, and combines the starting position, the data length, and the corresponding task sequence number to form a data index.

[0082] The capacity of the data buffer is not less than the product of the number of migrated pages and the page size of the SLC NAND storage medium. During device initialization, the storage controller allocates the data buffer according to the log page capacity and the page size.

[0083] For example, the migration task includes 6 migration tasks, with corresponding block page numbers of 18, 12, 22, 13, 21, and 17, and the number of migrated pages is 4. After arranging according to the source page address, a task sequence with block page numbers of 12, 13, 17, 18, 21, and 22 is obtained. The first 4 migration tasks are selected from the task sequence to obtain 4 execution tasks.

[0084] When the page size recorded in the parameter page is 4096 bytes and the number of address cycles is 5, the storage controller sends page read instructions to the 4 source page addresses respectively, and reads 4096 bytes of source page data after the ready busy signal switches to the ready state.

[0085] The process of generating a programming instruction sequence based on the source page data and the execution task includes: Extract the target page address corresponding to each of the source page data from the execution task; According to the SLC NAND interface timing, the page programming setup instruction, the target page address, the source page data, and the page programming confirmation instruction are arranged in sequence to obtain the programming instruction sequence.

[0086] The storage controller reads the target page address in the corresponding execution task according to the task number of each execution task, and reads the source page data corresponding to the same task number according to the data index, and combines the target page address and the source page data to form a page programming record.

[0087] When all source page data corresponding to each execution task has been read, the storage controller generates a sequence of programming instructions based on the source page data and the corresponding execution task.

[0088] In this embodiment, hexadecimal instruction 80H is used as the page programming setup instruction, and hexadecimal instruction 10H is used as the page programming confirmation instruction. For each page programming record, the page programming setup instructions are arranged first, then the address cycles corresponding to the target page address are arranged, followed by the data input cycles corresponding to the source page data, and finally the page programming confirmation instructions are arranged.

[0089] The target page address is converted into row address bytes as specified by the SLC NAND storage medium interface based on the correspondence between physical layer numbers and physical block address ranges established in step S1. The column address in the target page address points to the starting column address of the target page's main data area.

[0090] After arranging one page programming record, the process continues to arrange the page programming records corresponding to the next task number, until all execution tasks with complete source page data are arranged, resulting in the programming instruction sequence. Each page programming record retains its corresponding task number.

[0091] For example, the four execution tasks correspond to four target page addresses, and each source page data contains 4096 bytes. For the first execution task, the programming instruction sequence sequentially records 80H, five target page address cycles, 4096 bytes of source page data, and 10H; the remaining execution tasks form corresponding page programming records in the same order.

[0092] It is worth noting that this step only generates the programming instruction sequence and does not send page programming instructions to the SLC NAND storage medium. The programming instruction sequence is sent in step S4 according to the task sequence number.

[0093] In step S4, the programming instruction sequence is sent to the SLC NAND storage medium, the programming status information returned by the SLC NAND storage medium is received, and the successful task is determined from the execution tasks based on the programming status information.

[0094] The process includes sending the programming instruction sequence to the SLC NAND storage medium and receiving programming status information returned by the SLC NAND storage medium, including: According to the programming instruction sequence, the page programming creation instruction, target page address, source page data and page programming confirmation instruction corresponding to each execution task are sent to the SLC NAND storage medium in sequence; For each of the execution tasks, monitor the ready busy signal output by the SLC NAND storage medium. When the ready busy signal switches from a busy state to a ready state, send a status read command to the SLC NAND storage medium. Read the status register of the SLC NAND storage medium to obtain the programming status information corresponding to each of the execution tasks.

[0095] In one implementation, the storage controller reads the programming instruction sequence sequentially according to the task number. For the currently executing task, it selects the corresponding SLC NAND storage medium based on the storage medium number in the target page address, and sequentially sends a page programming setup instruction, a target page address, source page data, and a page programming confirmation instruction.

[0096] After sending the page programming confirmation instruction, the SLC NAND storage medium begins internal page programming and switches the ready busy signal to a busy state. The storage controller pauses sending the page programming setup instruction corresponding to the next execution task and continues to read the ready busy signal.

[0097] The maximum page programming time is taken from the parameter page of the SLC NAND storage medium. When the parameter page does not specify the maximum page programming time, the maximum page programming time specified in the datasheet of the selected SLC NAND storage medium is used. The maximum page programming time is written to the non-volatile configuration area during the device initialization phase.

[0098] When the ready busy signal switches from a busy state to a ready state within the maximum page programming time, the storage controller sends a status read instruction and reads the status register of the SLC NAND storage medium.

[0099] When the ready busy signal fails to switch to the ready state within the maximum page programming duration, the currently executing task is marked as a programming timeout task, and the executing tasks in the SLC NAND storage medium that have not yet sent page programming instructions are marked as inactive tasks. Sending the remaining page programming instructions to the SLC NAND storage medium is then stopped. Executing tasks corresponding to other SLC NAND storage media continue to execute according to the programming instruction sequence. Executing tasks that have completed status queries retain their respective programming status information. Neither the programming timeout task nor the inactive task is written to the passed task set. For the inactive task, since its target page has not yet received a page programming instruction, the storage controller restores the page state of the corresponding target page from the reserved state to the idle state and retains the corresponding source page address in the queue of pages to be migrated. For the programming timeout task, the corresponding target page is not restored to the idle state and no valid mapping relationship is loaded; subsequent processing is performed during page management after normal power restoration.

[0100] In this embodiment, when using the ONFI asynchronous parallel interface, the status read instruction uses hexadecimal instruction 70H. The ready status bit and programming failure flag bit in the status register are determined according to the status register definition in the selected SLC NAND storage medium parameter page or datasheet.

[0101] Before sending the page programming setup instruction corresponding to the currently executing task, the storage controller writes the task sequence number of the currently executing task into the pending task register. After reading the status register, the task sequence number, the status register value, and the programming timeout status are associated to obtain the programming status information corresponding to the currently executing task.

[0102] The programming status information includes the task sequence number, status register value, and programming timeout status. After generating the programming status information for the currently executing task, the storage controller continues to process the next executing task.

[0103] For example, when the selected SLC NAND storage medium defines the least significant bit of the status register as the programming failure flag and the sixth bit as the ready status flag, the status register values ​​returned by the four execution tasks are 40H, 40H, 41H, and 40H, respectively. The least significant bit of 40H is zero, and the least significant bit of 41H is one, thus obtaining four programming status messages associated with the corresponding execution tasks.

[0104] The process of determining the passing task from the execution tasks based on the programming status information includes: Extract the programming failure flag from the programming status information corresponding to each of the execution tasks; Select the task whose programming failure flag is not set to obtain the successful task.

[0105] The storage controller reads each programming status information sequentially according to the task sequence number. When the programming status information includes a programming timeout status, the corresponding execution task is determined to be a programming failure task; when the programming status information does not include a programming timeout status, the programming failure flag is extracted from the corresponding status register value.

[0106] When the programming failure flag is not set, the corresponding execution task is determined as a pass task; when the programming failure flag is set, the corresponding execution task is determined as a programming failure task.

[0107] In this embodiment, a task set is established, and the task number, source page address, and target page address of each task are written into the task set. The source page address and the target page address are directly taken from the corresponding execution task, without reallocating the target page address.

[0108] For example, the status register values ​​corresponding to the four execution tasks are 40H, 40H, 41H, and 40H respectively, and none of the four execution tasks have encountered a programming timeout. After extracting the least significant bit of each status register value, we obtain zero, zero, one, and zero. The first, second, and fourth execution tasks are determined to be successful tasks, and the third execution task is determined to be a programming failure task.

[0109] Programming failure tasks are not written to the set of approved tasks, nor do they participate in the generation of page migration records in step S5. The programming failure status of any executing task does not change other already determined approved tasks. If the target page corresponding to a programming failure task has already undergone page programming, it will not be restored to an idle state, and the corresponding physical block will be processed according to the existing management rules of the decommissioned block table described in step S1 after normal power is restored.

[0110] When all execution tasks are programming failure tasks, the pass task set is empty, and the mapping log data generation in step S5 is not executed; when at least one execution task is determined to be a pass task, the pass task set constitutes the input of step S5.

[0111] In step S5, when the passing task exists, mapping log data is generated according to the passing task, and the mapping log data is written into the preset log area of ​​the SLC NAND storage medium to obtain the SLC NAND cross-layer data migration result.

[0112] Specifically, according to the task-generated mapping log data, the mapping log data is written into a preset log area of ​​the SLCNAND storage medium to obtain the SLC NAND cross-layer data migration result, including: Generate page migration records based on the source page address and target page address in the task, as described above; Each page migration record is encapsulated into a log page according to a preset log format to obtain mapped log data; Write the mapped log data into the log area and read the log write status returned by the SLC NAND storage medium; When the log write status is "write successful", the source page address and target page address in each page migration record are determined as the successfully migrated page pair, and an SLC NAND cross-layer data migration result containing the successfully migrated page pair is generated. When the log write status is "write failed", an SLC NAND cross-layer data migration result indicating log write failure is generated.

[0113] In one implementation, the log area is a pre-defined physical storage area within the SLC NAND storage medium. During the device configuration phase, the storage controller, starting from the last physical block of the target physical layer, reads the factory bad block markers and retired block records of each physical block in descending order of physical block address. The first physical block that is neither marked as a bad block nor recorded as a retired block is identified as the log block, and the physical block address of the log block is written to the non-volatile configuration area. After identifying the log block, the storage controller excludes the pages within the log block from the target free page table, only writing the pages that have been erased and have not yet had data written to them into the log free page table.

[0114] The retired block record is maintained by the storage controller under normal power supply conditions. When the log block fails to erase or page programming, the storage controller writes the log block into the retired block record according to the status register information returned by the SLC NAND storage medium, determines a new log block according to the aforementioned selection order, updates the physical address of the log block recorded in the non-volatile configuration area, and simultaneously excludes the pages in the new log block from the target free page table.

[0115] The storage controller writes the erased pages (without data written) from the log block to the log free page table. Under normal power supply, if there are no free log pages in the log free page table, the storage controller selects a valid physical block from the target physical layer, erases it, and then designates the valid physical block as the new log block. If a power failure occurs and there are still no free log pages in the log free page table, the cross-layer data migration will not be performed.

[0116] Upon entering a power-down state, the storage controller freezes the log free page table, reads the log page address from the first page record of the log free page table, and modifies the page status corresponding to the log page address to the reserved state. Log pages in the reserved state do not participate in the allocation of other log pages during this power-down state.

[0117] In this embodiment, the tasks are arranged in ascending order of task number, and the source page address and target page address of the same task are grouped into a page migration record. The page migration record does not include the source page address and target page address corresponding to programming failure tasks, programming timeout tasks, and tasks that were not executed.

[0118] The preset log format includes a log header and a migration record area. The log header is located at the beginning of the data area of ​​the log page, and the migration record area is located after the log header. The log header includes a log sequence number, the number of page migration records, and a log checksum. The log sequence number, the number of page migration records, and the log checksum are each stored using a storage controller data word.

[0119] The number of bytes in a storage controller data word is determined by the processor's data bus width. When the processor's data bus width is 32 bits, one storage controller data word occupies 4 bytes, and the log page header occupies 12 bytes.

[0120] Each page migration record is arranged in the order of source page address first, followed by target page address. Both the source and target page addresses are stored as complete page addresses that uniquely locate the page. Each complete page address includes at least the storage medium number and the valid SLC NAND interface address bytes generated according to the correspondence described in step S1, and is aligned upwards according to the number of bytes in the storage controller data word. Bytes not occupied by the log header and page migration records are padded with hexadecimal FF.

[0121] The log sequence number is incremented according to the writing order of valid log pages. Under normal power supply, the storage controller reads the log pages that have been written to the log area and extracts the log sequence number, the number of page migration records, the log checksum, and the corresponding number of page migration records from each log page.

[0122] The log checksum uses a CRC32 cyclic redundancy check. In this embodiment, the log checksum is obtained by performing cyclic redundancy checks on the log sequence number, the number of page migration records, and the valid bytes in the migration record area using parameters including polynomial 0x04C11DB7, initial value 0xFFFFFFFF, bitwise reflection of input data, bitwise reflection of output results, and XORing the final result with 0xFFFFFFFF.

[0123] Under normal power supply conditions, the storage controller re-performs cyclic redundancy check on the read log sequence number, the number of page migration records, and the valid bytes in the migration record area using the same calculation parameters. When the recalculated log checksum is the same as the log checksum stored in the corresponding log page, and the number of page migration records is not greater than the log page capacity, the corresponding log page is determined to be a valid log page.

[0124] The storage controller selects the valid log page with the largest log sequence number from all valid log pages, increments the log sequence number in the valid log page by one to obtain the log sequence number corresponding to the next mapped log data, and writes the log sequence number corresponding to the next mapped log data into the non-volatile configuration area. In the power-off state, the storage controller directly reads the log sequence number in the non-volatile configuration area without traversing the log area.

[0125] It should be noted that when there are no valid log pages in the log area, the initial log sequence number is set to zero. The initial log sequence number only indicates the writing order of the first valid log page and does not participate in the filtering and address calculation of the page migration records.

[0126] The log page capacity is the number of page migration records that a single log page can store. The storage controller subtracts the number of bytes occupied by the log page header from the data area capacity of the log page to obtain the migration record area capacity; the migration record area capacity is then divided by the number of bytes occupied by a single page migration record, and the result is rounded down to obtain the log page capacity. The number of migrateable pages determined in step S2 is not greater than the log page capacity.

[0127] For example, the data area of ​​the log page has a capacity of 4096 bytes, the data bus width of the processor is 32 bits, and each data word of the storage controller occupies 4 bytes. The log page header includes the log sequence number, the number of page migration records, and the log checksum, occupying a total of 12 bytes.

[0128] The SLC NAND storage medium uses 5 address cycles. With the storage medium number stored using 1 valid byte, the source page address and the destination page address each contain 1 storage medium number byte and 5 interface valid address bytes, totaling 6 valid bytes. These are then aligned upwards to 8 bytes according to the 4-byte storage controller data word. A single page migration record occupies 16 bytes. Subtracting 12 bytes from 4096 bytes yields a migration record area capacity of 4084 bytes. Dividing 4084 by 16 and rounding down yields a log page capacity of 255 page migration records. The 4096 bytes and 5 address cycles are taken from the parameter page of the SLC NAND storage medium, and the 4-byte data word width is taken from the data bus width of the processor.

[0129] In this embodiment, the current log sequence number and the number of completed tasks are written into the log page header, and each page migration record is written into the migration record area in sequence according to the task sequence number. Cyclic redundancy check is performed on the current log sequence number, the number of completed tasks, and the valid bytes in the migration record area. The calculated log check code is written into the log page header to obtain mapped log data of one log page length.

[0130] The storage controller generates log page programming instructions based on the log page address. The log page programming instructions sequentially include a page programming setup instruction, the log page address, the mapped log data, and a page programming confirmation instruction. The timing sequence for sending the log page programming instructions is the same as the SLC NAND interface timing used when sending the programming instruction sequence in step S4.

[0131] After sending the page programming confirmation command, the storage controller monitors the ready busy signal output by the SLC NAND storage medium. When the ready busy signal switches from a busy state to a ready state within the maximum page programming duration, the storage controller sends a status read command and reads the status register of the SLC NAND storage medium.

[0132] When the programming failure flag in the status register is not set, the log write status is determined to be successful; when the programming failure flag is set, or the ready busy signal does not switch to the ready state within the maximum page programming duration, the log write status is determined to be failed.

[0133] For example, step S4 yields three passing tasks, each containing source page addresses A1, A2, and A4, and corresponding target page addresses B1, B2, and B4. The storage controller generates three page migration records according to the task sequence number, writes the current log sequence number and the value 3 into the log page header, sequentially writes the three page migration records into the migration record area, and writes the calculated log checksum into the log page header to obtain the mapped log data.

[0134] When the log write status is "write passed", the source page address A1 and target page address B1, the source page address A2 and target page address B2, and the source page address A4 and target page address B4 are respectively determined as successfully migrated page pairs, and an SLC NAND cross-layer data migration result containing the three successfully migrated page pairs, the log page address, and the write passed status is generated.

[0135] When the log write status is "write failed," an SLC NAND cross-layer data migration result containing the log page address and the log write failure status is generated. The source page address and target page address in each page migration record are not identified as successfully migrated page pairs. At this time, the source page remains valid, and the target page, which has been programmed but has not yet formed a valid log record, is not loaded with page mapping management information. After normal power is restored, the page management module treats the target page as an uncommitted page and processes it according to the existing page recycling process.

[0136] When the mapping log data is successfully written, the cross-layer data migration enters the committed state, and each page migration record constitutes a non-volatile correspondence record between the source page address and the target page address. The source page in the source physical layer remains valid during this power-down state and is not erased or marked as invalid.

[0137] Under normal power supply conditions, the page management module reads the log sequence number and the number of page migration records from each valid log page. Based on the number of page migration records, it sequentially reads the corresponding page migration records and loads the source page address and target page address from each page migration record into the page mapping management information. After updating the page mapping management information, the corresponding source page is marked as a page to be recycled.

[0138] It is worth noting that the identification of valid log pages and loading of address relationships belong to the page management process under normal power supply conditions, and are not part of the log writing sub-step in step S5. The SLC NAND cross-layer data migration results constitute the output of the cross-layer data migration process under this power failure condition.

[0139] In summary, this invention determines the available energy during power outages based on the residual voltage of the energy storage capacitor, determines the number of migrateable pages by combining the unit migration energy consumption and log retention energy consumption, performs source page reading and target page programming according to the number of migrateable pages, and filters successful tasks based on programming status information, writing the source page address and target page address corresponding to the successful tasks into the log area. This achieves the matching of migration scale with residual power supply capacity under power outage conditions, independent recording of successfully programmed pages, and persistent storage of SLC NAND cross-layer data migration results.

[0140] A second embodiment of the present invention provides an SLC NAND cross-layer data migration system, comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the method described above.

[0141] It should be noted that the SLC NAND cross-layer data migration system provided in this embodiment of the invention is used to execute all the process steps of the SLC NAND cross-layer data migration method in the above embodiment. The working principle and beneficial effects of the two are one-to-one, so they will not be described again.

[0142] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above descriptions are merely specific embodiments of the present invention and are not intended to limit the scope of protection of the present invention. In particular, it should be noted that any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention for those skilled in the art.

Claims

1. A method for cross-layer data migration in SLC NAND, characterized in that, include: Obtain the page information to be migrated from the source physical layer and the free page information from the target physical layer under power failure conditions; allocate the target page address according to the free page information; associate the source page address in the page information to be migrated with the target page address to obtain the migration task. Obtain the residual voltage of the energy storage capacitor that powers the SLC NAND storage medium, calculate the difference between the square of the residual voltage and the square of the preset minimum operating voltage as the voltage square difference; multiply the capacitance value of the energy storage capacitor by the voltage square difference, and determine half of the multiplication result as the available energy of the capacitor; The available energy of the capacitor is calculated based on the preset power conversion efficiency to obtain the available energy during power outage; the preset basic operating energy consumption and log retention energy consumption are deducted from the available energy during power outage to obtain the migration allocation energy, and the number of pages that can be migrated is determined based on the migration allocation energy and the preset unit migration energy consumption. Based on the number of migrateable pages, select an execution task from the migration tasks, read the source page data corresponding to the execution task, and generate a programming instruction sequence based on the source page data and the execution task; The programming instruction sequence is sent to the SLC NAND storage medium, the programming status information returned by the SLC NAND storage medium is received, and the successful task is determined from the execution tasks based on the programming status information; When the pass task exists, mapping log data is generated according to the pass task, and the mapping log data is written into the preset log area of ​​the SLC NAND storage medium to obtain the SLC NAND cross-layer data migration result.

2. The SLC NAND cross-layer data migration method according to claim 1, characterized in that, The step of allocating a target page address based on the free page information and associating the source page address in the page to be migrated information with the target page address to obtain a migration task includes: Extract the source page address from the page to be migrated information, and count the number of pages to be migrated based on the source page address; Select a target free page from the free page information that has the same number of pages to be migrated, and obtain the target page address; The source page address and the target page address are associated page by page to obtain the migration task.

3. The SLC NAND cross-layer data migration method according to claim 1, characterized in that, The unit migration energy consumption includes the energy required to complete the source page reading, target page programming, and programming status query of a data page; the log retention energy consumption includes the energy required to complete the log writing and log status query of a log page; the determination of the number of migrateable pages based on migration allocation energy and preset unit migration energy consumption includes: Calculate the ratio between the migration allocation energy and the unit migration energy consumption, and round the ratio down to obtain the initial number of migrated pages; Count the number of pages to be migrated in the migration task; The minimum value among the initial number of migrateable pages, the number of pages to be migrated, and the preset log page capacity is selected to obtain the number of migrateable pages. The log page capacity is the number of migration tasks that one log page can record.

4. The SLC NAND cross-layer data migration method according to claim 1, characterized in that, The step of selecting an execution task from the migration tasks based on the number of migrateable pages and reading the source page data corresponding to the execution task includes: The migration tasks are arranged according to the order of the source page addresses to obtain a task sequence; Select migration tasks from the task sequence, the number of which is the same as the number of migrateable pages, to obtain execution tasks; Based on the source page address in the execution task, a page read instruction is sent to the SLC NAND storage medium, and the source page data returned by the SLC NAND storage medium is received.

5. The SLC NAND cross-layer data migration method according to claim 1, characterized in that, The step of generating a programming instruction sequence based on the source page data and the execution task includes: Extract the target page address corresponding to each of the source page data from the execution task; According to the SLC NAND interface timing, the page programming setup instruction, the target page address, the source page data, and the page programming confirmation instruction are arranged in sequence to obtain the programming instruction sequence.

6. The SLC NAND cross-layer data migration method according to claim 1, characterized in that, The step of sending the programming instruction sequence to the SLC NAND storage medium and receiving the programming status information returned by the SLC NAND storage medium includes: According to the programming instruction sequence, the page programming creation instruction, target page address, source page data and page programming confirmation instruction corresponding to each execution task are sent to the SLC NAND storage medium in sequence; For each of the execution tasks, monitor the ready busy signal output by the SLC NAND storage medium. When the ready busy signal switches from a busy state to a ready state, send a status read command to the SLC NAND storage medium. Read the status register of the SLC NAND storage medium to obtain the programming status information corresponding to each of the execution tasks.

7. The SLC NAND cross-layer data migration method according to claim 1, characterized in that, The step of determining the task from the execution tasks based on the programming state information includes: Extract the programming failure flag from the programming status information corresponding to each of the execution tasks; Select the task whose programming failure flag is not set to obtain the successful task.

8. The SLC NAND cross-layer data migration method according to claim 1, characterized in that, The step of generating mapping log data through the task and writing the mapping log data into a preset log area of ​​the SLC NAND storage medium to obtain the SLC NAND cross-layer data migration result includes: Generate page migration records based on the source page address and target page address in the task, as described above; Each page migration record is encapsulated into a log page according to a preset log format to obtain mapped log data; Write the mapped log data into the log area and read the log write status returned by the SLC NAND storage medium; When the log write status is "write successful", the source page address and target page address in each page migration record are determined as the successfully migrated page pair, and an SLC NAND cross-layer data migration result containing the successfully migrated page pair is generated. When the log write status is "write failed", an SLC NAND cross-layer data migration result indicating log write failure is generated.

9. A cross-layer data migration system for SLC NAND, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the program, it implements the method according to any one of claims 1 to 8.