An apparatus for generating a cache simulator

CN122816774BActive Publication Date: 2026-10-27METAX INTEGRATED CIRCUITS (SHANGHAI) CO LTD
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Patent Information

Application Number
CN202611243052.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2026-08-17
Publication Date
2026-10-27
Estimated Expiration
2046-08-17

AI Technical Summary

Technical Problem

[0003]对于不同的高速缓存,其结构设计等都是不同的,针对不同的高速缓存验证人员需要花费大量时间精力去建立高速缓存仿真器,浪费人力物力

Benefits of technology

本申请实施例提供的高速缓存仿真器的生成装置在缓存行信息表中区分性的设置了通用信号和特有信号的。针对通用信号,预设好了信号名,在使用时只需要输入对应的通用信号位宽值,并通过特有信号位宽值和特有信号名队列设置当前要进行仿真验证的高速缓存的特有信号相关信息,即可通过高速仿真器生成模块自动化的生成封装器实例和缓存行实例。并通过对封装器实例发送相关指令控制缓存行实例进行高速缓存仿真验证,避免了高速缓存验证时,重复建立不同模型的重复性代码编写操作,且操作简单仅需要输入组数量、路数量、通用信号位宽值、特有信号位宽值和特有信号名队列中的特有信号名称即可。

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Abstract

The application provides a cache emulator generation device, which comprises a cache line information table and a cache emulator generation module; the cache line information table stores the number of groups, the number of ways, a plurality of general signal bit width values, a plurality of unique signal bit width values and a unique signal name queue filled by a user; the cache emulator generation module stores a cache line class and a wrapper class; the cache emulator generation module is used for generating a wrapper instance according to the wrapper class; the wrapper instance is used for generating a plurality of cache line instances according to the cache line class and the number of groups, the number of ways, the plurality of general signal bit width values, the plurality of unique signal bit width values and the unique signal name queue input into the wrapper instance when the wrapper instance is instantiated. The cache emulator generation device provided by the application can be used for the generation and simulation verification of cache emulators of caches with various structures.
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Description

Technical Field

[0001] This application relates to the field of cache simulation, and in particular to a cache simulator generation apparatus. Background Technology

[0002] A cache is a temporary storage device located between the CPU and main memory, used to store frequently accessed data to improve computer access speed. Cache simulation verification is a crucial step in computer architecture design, primarily used to verify the correctness, performance, and efficiency of cache designs using software cache simulators. It is typically performed before or in parallel with hardware design to ensure the cache system functions as expected before actual manufacturing.

[0003] Different caches have different structural designs, and verification personnel need to spend a lot of time and effort to build cache simulators for different caches, which is a waste of human and material resources.

[0004] Therefore, there is an urgent need for a universal device for generating cache emulators. Summary of the Invention

[0005] To address the aforementioned technical problem, the technical solution adopted in this application is as follows: In one aspect of this application, a cache emulator generation apparatus is provided, the apparatus comprising: a cache line information table and a cache emulator generation module.

[0006] The cache line information table stores the number of groups, the number of paths, several general signal bit width values, several unique signal bit width values, and a unique signal name queue filled in by the user.

[0007] The cache simulator generation module stores cache line classes and wrapper classes; the cache line class includes several first general signal variables, several unique signal variables, and several unique signal name variables; the several first general signal variables and several general signal bit width values ​​correspond one-to-one, the several unique signal variables and several unique signal bit width values ​​correspond one-to-one, and the several unique signal variables and several unique signal name variables correspond one-to-one and are bound to each other according to the correspondence.

[0008] The cache simulator generation module is used to generate a wrapper instance based on the wrapper class.

[0009] The wrapper instance is used to generate several cache line instances based on the cache line class and the number of groups, number of paths, several general signal bit width values, several specific signal bit width values, and specific signal name queues passed to the wrapper instance when it is instantiated.

[0010] This application has at least the following beneficial effects: The cache simulator generation device provided in this application embodiment distinguishes between general signals and specific signals in the cache line information table. For general signals, signal names are pre-set. During use, only the corresponding general signal bit width value needs to be input, and the specific signal information of the cache to be simulated and verified is set through the specific signal bit width value and the specific signal name queue. The high-speed simulator generation module can then automatically generate wrapper instances and cache line instances. By sending relevant instructions to the wrapper instances, the cache line instances are controlled to perform cache simulation verification. This avoids repetitive code writing operations during cache verification, which involves repeatedly building different models. The operation is simple, requiring only the input of the number of groups, the number of paths, the general signal bit width value, the specific signal bit width value, and the specific signal name from the specific signal name queue. Attached Figure Description

[0011] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0012] Figure 1 This is a schematic diagram of the structure of a cache simulator generation device provided in an embodiment of this application. Detailed Implementation

[0013] The technical solutions in the embodiments of this application will be clearly and completely described below. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0014] It is worth noting that in the following description, specific details such as particular system structures and techniques are set forth for illustrative purposes rather than for limiting purposes, in order to provide a thorough understanding of the embodiments of this application. However, those skilled in the art will understand that this application can also be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, apparatuses, circuits, and methods are omitted so as not to obscure the description of this application with unnecessary details.

[0015] It should be understood that in this application specification and the appended claims, the terms "comprising," "including," "including but not limited to," "including but not limited to," "mainly composed of," or "mainly made of" all indicate the presence of the described features, integrals, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or collections thereof.

[0016] It should be understood that in this application specification and the appended claims, the use of the terms "consisting of" or "component of" indicates the presence of the described feature, integral, step, operation, element and / or component, but excludes the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or collections thereof.

[0017] It should be understood that, in this application specification and the appended claims, the term "and" indicates a combination in which multiple of the associated listed items exist simultaneously. For example, "A, B, C, and D" means a combination in which "A and B and C and D exist simultaneously".

[0018] It should be understood that in this application specification and the appended claims, the use of the term "or" indicates a combination in which one of the associated listed items exists alone. For example, "A, B, C or D" refers to the four combinations of "A alone", "B alone", "C alone", and "D alone".

[0019] It should be understood that in this application specification and the appended claims, the terms "described", "the above", "the", "said", "described", "mentioned", etc., may be understood in context to refer to the content mentioned above.

[0020] It should be understood that in this application specification and the appended claims, the terms "first," "second," "third," etc., are used only for distinguishing descriptions and should not be construed as indicating or implying relative importance, nor are they used to describe a specific order or sequence.

[0021] Please refer to Figure 1 As shown, a cache simulator generation device is provided, the generation device comprising: a cache line information table and a cache simulator generation module; The cache line information table stores the number of groups, the number of paths, several general signal bit width values, several unique signal bit width values, and a unique signal name queue filled in by the user.

[0022] The cache simulator generation module stores cache line classes and wrapper classes; the cache line class includes several first general signal variables, several unique signal variables, and several unique signal name variables; the several first general signal variables and several general signal bit width values ​​correspond one-to-one, the several unique signal variables and several unique signal bit width values ​​correspond one-to-one, and the several unique signal variables and several unique signal name variables correspond one-to-one and are bound to each other according to the correspondence.

[0023] The cache simulator generation module is used to generate a wrapper instance based on the wrapper class.

[0024] The wrapper instance is used to generate several cache line instances based on the cache line class and the number of groups, number of paths, several general signal bit width values, several specific signal bit width values, and specific signal name queues passed to the wrapper instance when it is instantiated.

[0025] When generating a cache line instance, the wrapper instance sets the bit width of each first general signal variable to its corresponding general signal bit width value, and sets the bit width of each specific signal name variable to its corresponding specific signal bit width value.

[0026] Furthermore, the cache simulator generation device can also set a second general-purpose signal variable, which corresponds to a second general-purpose signal. The second general-purpose signal is a signal whose bit width does not need to be set. For the second general-purpose signal variable, when generating the cache simulator, the verifier does not need to input the corresponding signal bit width value. Instead, the bit width of each second general-purpose signal variable is pre-set within the cache simulator generation device and passed as a parameter when creating the wrapper instance and cache line instance.

[0027] In one exemplary embodiment of this application, each unique signal name variable in the cache line class has a corresponding sequence number, and several unique signal name variables are arranged in ascending order of sequence number; When the wrapper instance generates a cache line instance, if the unique signal name queue is not empty, it assigns a value to at least one unique signal name variable among several unique signal name variables according to the order of at least one unique signal name in the unique signal name queue.

[0028] Among them, the number of groups and the number of paths are used to determine the number of cache line instances that need to be generated. It can be understood that a cache line instance is an instance with the same cache line structure as the cache in the cache to be simulated and verified.

[0029] The general signal bit width value is used to define the bit width of general signals. General signals can be set according to actual needs. Only the signal name of each general signal needs to be set in advance when editing the cache simulator's generation device. This way, when creating the cache simulator (which can be understood as a wrapper instance and a cache line instance), only the corresponding bit width needs to be entered. Specifically, general signals can be information commonly found in regular caches, such as valid, addr, tag, data, dirty_mask, and age.

[0030] For unique signals, several sets of unique variable pairs are set in the generation device of the cache simulator. Each unique variable pair includes a logic-type variable to store the value of the information and a string-type variable to store the name of the information. Specifically, the specific values ​​of the two variables can be passed in as parameters when instantiating the cache line instance. In this embodiment, these are the unique signal bit width value in the cache line information table and the unique signal name stored in the unique signal name queue. In a specific embodiment, 15 sets of unique variable pairs can be set. One set of unique variable pairs includes Signal. i _name and Signal i There are two unique variables, _value and _i, where i takes values ​​from 0 to 14, corresponding to 15 pairs of unique variables. Correspondingly, 15 slots for the unique signal width values ​​are set in the cache line information table, and an array of length 15 is set in the unique signal name queue.

[0031] The cache line information table can be a map in the form of macros, with corresponding operations pre-set in it to simplify the amount of operations required when actually performing cache simulation verification.

[0032] The specific values ​​of the two variables in a unique signal variable pair can be set using pre-defined functions in the cache simulator's generation device. When the cache simulator's generation device runs, the corresponding function (such as set_Signal) will be triggered. i The _name() function retrieves the corresponding value from the cache line information table and passes it in when instantiating the cache line instance.

[0033] set_Signal i The specific form of _name can be: function void set_Signal 1 _name(string name); Singal 1 _name; In this example, i=1. That is, in actual use, 15 corresponding functions can be set for each of the 15 unique variable pairs.

[0034] After a cache line instance is generated, it initializes the values ​​of each first general-purpose signal variable and each specific signal variable according to a preset initialization function. Furthermore, after the cache line instance is generated, it also initializes the values ​​of each second general-purpose signal variable according to a preset initialization function. It's important to note that this initialization refers to setting the values ​​of each first general-purpose signal variable, each second general-purpose signal variable, and each specific signal variable to 0. It does not modify the bit width of the variables.

[0035] Furthermore, each cache line instance is configured to reset the values ​​of the first general signal variable, the second general signal variable, and the specific signal variable when the cache line instance is reset. It should be noted that this can be understood as only resetting the values ​​of the first general signal variable, the second general signal variable, and the specific signal variable; the bit width is not reset. Furthermore, the specific signal name variable is not reset.

[0036] Specifically, when resetting a cache line instance, the cache line initialization function is run. After the cache line initialization function is triggered, the values ​​of each first general signal variable, each second general signal variable, and each specific signal variable in the cache line instance are set to 0. Then, other variable setting functions are triggered, passing in the number of groups, number of paths, general signal bit width values, and specific signal bit width values ​​stored in the cache line information table.

[0037] The cache simulator generation device provided in this application embodiment distinguishes between general signals and specific signals in the cache line information table. For general signals, signal names are pre-set. During use, only the corresponding general signal bit width value needs to be input, and the specific signal information of the cache to be simulated and verified is set through the specific signal bit width value and the specific signal name queue. The high-speed simulator generation module can then automatically generate wrapper instances and cache line instances. By sending relevant instructions to the wrapper instances, the cache line instances are controlled to perform cache simulation verification. This avoids repetitive code writing operations during cache verification, which involves repeatedly building different models. The operation is simple, requiring only the input of the number of groups, the number of paths, the general signal bit width value, the specific signal bit width value, and the specific signal name from the specific signal name queue.

[0038] In one exemplary embodiment of this application, both the cache line class and the wrapper class are parameterized classes. This allows for global modification of the cache line information table during the generation and use of the cache simulator by simply modifying the relevant values ​​in the cache line information table.

[0039] In one exemplary embodiment of this application, several first general signal variables, several unique signal variables, and several unique signal name variables in the cache line class are all declared using the `protected` keyword, so that the several first general signal variables, several unique signal variables, and several unique signal name variables in the cache line instance are configured to be modified only using the interface functions preset by the cache line instance. This can prevent external parties from arbitrarily changing the stored information, and at the same time, the unified read and write interface is also beneficial for debugging.

[0040] In one exemplary embodiment of this application, a number of cache line instance control functions are provided in the wrapper instance.

[0041] Specifically, instance control functions can include the `set_item_name()` function, which sets the signal names for each unique piece of information within a cache line instance. Its parameter is a queue of string type (i.e., a queue of unique signal names). The strings stored in the unique signal name queue are arranged from beginning to end as Signal. 1 To Signal 14 The signal name. If the queue depth of the passed-in unique signal name is insufficient to accommodate the number of unique variable pairs in the cache line, the remaining unique signals cannot be used.

[0042] Furthermore, the following control functions may also be included: Set_valid() / get_valid(): Used to set the validity of the corresponding group or bit cache line through the set_valid() function, and to query whether the corresponding group or bit cache line is valid.

[0043] `Calculate_way_by_lru()`: Returns a replaceable cache line based on a specified number of sets. (If a cache line in the set is invalid and not currently being used by any processor, the cache line with the smallest way is returned; otherwise, the cache line that is not currently being used by any processor and has not been accessed for the longest time is returned. If none of the cache lines in all ways are currently being used by any processor, then there is no replaceable cache line, and an error is raised.)

[0044] In actual implementation, verification personnel can pre-configure other control functions in the wrapper instance according to their own needs.

[0045] In this application embodiment, a non-transitory computer-readable storage medium is also provided. The non-transitory computer-readable storage medium can be disposed in an electronic device to store at least one instruction or at least one program related to implementing the method provided in any embodiment of this application. The at least one instruction or the at least one program is loaded and executed by a processor to implement the method provided in any embodiment of this application and can achieve the same technical effect.

[0046] Examples of non-transitory computer-readable storage media include: computer read-only memory (ROM), random access memory (RAM), erasable programmable read-only memory (EPROM), compact disc read-only memory (CD-ROM), flash memory, magnetic disk, optical disk, portable computer disk, hard disk and / or solid-state drive, etc.

[0047] In this application embodiment, an electronic device is also provided, the electronic device including a processor and the non-transitory computer-readable storage medium. The processor loads and executes at least one instruction or at least one program stored in the non-transitory computer-readable storage medium related to implementing the method provided in any embodiment of this application, so as to implement the method provided in the embodiment of this application.

[0048] For example, the electronic device may be a mobile electronic device or a non-mobile electronic device that also includes other functions, such as personal digital assistant and / or music player functions. Further, the mobile electronic device may be any one of a mobile phone, tablet computer, laptop computer, PDA, in-vehicle electronic device, wearable device, ultra-mobile personal computer (UMPC), netbook, or personal digital assistant (PDA); the non-mobile electronic device includes any one of a server, network attached storage (NAS), personal computer (PC), television (TV), ATM, or self-service machine.

[0049] Exemplary embodiments of this application also provide a feasible structure for an electronic device. For example, the electronic device may include a processor, an external memory interface, internal memory, a universal serial bus (USB) interface, a charging management module, a power management module, a battery, a first antenna, a second antenna, a mobile communication module, a wireless communication module, an audio module, a speaker, a receiver, a microphone, a headphone jack, a sensor module, buttons, a motor, an indicator, a camera, a display screen, and / or a subscriber identification module (SIM) card interface, etc. The sensor module may include pressure sensors, gyroscope sensors, barometric pressure sensors, magnetic sensors, accelerometers, distance sensors, proximity sensors, fingerprint sensors, temperature sensors, touch sensors, ambient light sensors, and / or bone conduction sensors, etc.

[0050] It should be understood that the exemplary structures of the embodiments of this application do not constitute a specific limitation on the electronic device. In other embodiments of this application, the electronic device may include more or fewer components than the structure described herein, or combine some components, or split some components, or have different component arrangements. The components may be implemented in hardware, software, or a combination of software and hardware.

[0051] For example, the processor may include one or more processing units, wherein the processing units include an application processor (AP), a modem processor, a graphics processing unit (GPU), an image signal processor (ISP), a controller, a video codec, a digital signal processor (DSP), a baseband processor, and / or a neural network processing unit (NPU). Different processing units may be independent devices or integrated into one or more processors. The controller may generate operation control signals based on instruction opcodes and timing signals to control instruction fetching and execution.

[0052] For example, the processor may further include a memory for storing instructions and data. In some embodiments of this application, the memory in the processor is a cache memory. The memory can store instructions or data that the processor has just used or that are used repeatedly. If the processor needs to use the instructions or data again, it can directly retrieve them from the memory.

[0053] For example, the processor may also include one or more interfaces. These interfaces include inter-integrated circuit (I2C) interfaces, inter-integrated circuit sound (I2S) interfaces, pulse code modulation (PCM) interfaces, universal asynchronous receiver / transmitter (UART) interfaces, mobile industry processor interfaces (MIPI), general-purpose input / output (GPIO) interfaces, SIM card interfaces, and / or USB interfaces, etc.

[0054] The integrated circuit interface is a bidirectional synchronous serial bus, which includes a serial data line (SDA) and a serial clock line (SCL).

[0055] Integrated circuits with built-in audio interfaces can be used for audio communication. In some embodiments of this application, the processor may include one or more sets of integrated circuit-based audio interfaces. The processor can couple with an audio module through the integrated circuit-based audio interface to achieve communication between the processor and the audio module.

[0056] The pulse code modulation interface can also be used for audio communication, specifically for sampling, quantizing, and encoding analog signals. In some embodiments of this application, the audio module and the wireless communication module can be coupled through the pulse code modulation interface.

[0057] A Universal Asynchronous Receiver / Transmitter (UART) is a universal serial data bus interface used for asynchronous communication. This bus can be a bidirectional communication bus interface. It converts the data to be transmitted between serial and parallel communication. In some embodiments of this application, the processor and the wireless communication module can be connected via the UART.

[0058] Mobile industry processor interfaces can be used to connect processors to peripheral devices such as displays and cameras.

[0059] The general-purpose input / output interface (GPIO) can be configured via software. Furthermore, the GPIO can be configured as a control signal or a data signal. In some embodiments of this application, the GPIO can be used to connect a processor to a camera, display screen, wireless communication module, audio module, sensor module, etc.

[0060] A USB interface is an interface that conforms to the USB standard specification, and can be a Mini USB interface, Micro USB interface, USB Type-C interface, etc. A USB interface can be used to connect a charger to charge electronic devices, and it can also be used for data transfer between electronic devices and peripheral devices.

[0061] It should be understood that the interface connection relationships between the modules illustrated in the embodiments of this application are merely illustrative and do not constitute a limitation on the structure of the electronic device. In other embodiments of this application, the electronic device may also employ different interface connection methods or a combination of multiple interface connection methods as described in the embodiments.

[0062] The charging management module receives charging input from a charger, which can be either a wireless or wired charger. In some wired charging embodiments, the charging management module receives charging input from the wired charger via a USB interface. In some wireless charging embodiments, the charging management module receives wireless charging input via the wireless charging coil of the electronic device. While charging the battery, the charging management module can also supply power to various parts of the electronic device via the power management module.

[0063] The power management module is used to connect the battery, the charging management module, and the processor.

[0064] Wireless communication functionality in electronic devices can be achieved through a first antenna, a second antenna, a mobile communication module, a wireless communication module, a modem processor, and a baseband processor.

[0065] Mobile communication modules can enable wireless communication solutions, including 2G / 3G / 4G / 5G, for use in electronic devices.

[0066] A modem processor may include a modulator and a demodulator. The modulator modulates a low-frequency baseband signal to be transmitted into a mid-to-high frequency signal. The demodulator demodulates a received electromagnetic wave signal into a low-frequency baseband signal. The demodulator then transmits the demodulated low-frequency baseband signal to a baseband processor for processing. After processing by the baseband processor, the low-frequency baseband signal is transmitted to an application processor. The application processor outputs sound signals through an audio device or displays images or videos on a display screen. The audio device includes a speaker, a receiver, etc. In some embodiments of this application, the modem processor may be a separate device. In other embodiments, the modem processor may be independent of the processor and may be housed within the same device as a mobile communication module or other functional modules.

[0067] Wireless communication modules enable solutions for wireless communication applications in electronic devices, including Wireless Local Area Networks (WLAN), Bluetooth (BT), Global Navigation Satellite System (GNSS), Frequency Modulation (FM), Near Field Communication (NFC), and / or Infrared (IR). WLAN includes Wireless Fidelity (Wi-Fi) networks, among others.

[0068] In some embodiments of this application, the first antenna of the electronic device is coupled to the mobile communication module, and the second antenna is coupled to the wireless communication module, enabling the electronic device to communicate with networks and other devices via wireless communication technology.

[0069] Electronic devices implement display functions through GPUs, displays, and application processors. A GPU is a microprocessor for graphics and / or image processing, connecting the display and the application processor. GPUs are used to perform mathematical and geometric calculations and for graphics rendering. A processor may include one or more GPUs, which execute program instructions to generate or modify display information.

[0070] The display screen is used to display images, videos, etc. The display screen includes a display panel. The display panel can be a liquid crystal display (LCD), or a display panel made of materials selected from organic light-emitting diodes (OLEDs), active-matrix organic light-emitting diodes (AMOLEDs), flexible light-emitting diodes (FLEDs), minimized, microLEDs, micro-OLEDs, or quantum dot light-emitting diodes (QLEDs). In some embodiments of this application, the electronic device may include one or more display screens. In some embodiments of this application, the display screen may also integrate touch functionality and may also be referred to as a touch screen.

[0071] Electronic devices can achieve shooting functions through ISPs, cameras, video codecs, GPUs, displays, and application processors.

[0072] External storage interfaces can be used to connect external memory cards, such as Micro SD cards, to expand the storage capacity of electronic devices.

[0073] Internal memory can be used to store executable program code for a computer, which includes instructions. The processor executes the instructions stored in internal memory to perform various functional applications and data processing of electronic devices.

[0074] Electronic devices can implement audio functions through audio modules, speakers, receivers, microphones, headphone jacks, and application processors. Examples include music playback and recording.

[0075] The audio module converts digital audio information into analog audio signals for output, and also converts analog audio input into digital audio signals. The speaker, also called a "horn," converts audio electrical signals into sound signals. The receiver, also called a "handset," converts audio electrical signals into sound signals. The microphone, also called a "microphone" or "voice transducer," converts sound signals into electrical signals. The headphone jack is used to connect wired headphones.

[0076] Pressure sensors are used to sense pressure signals and convert them into electrical signals. In some embodiments of this application, the pressure sensor can be located on the display screen. A gyroscope sensor can be used to determine the motion posture of the electronic device. A barometric pressure sensor is used to measure air pressure. In some embodiments of this application, the electronic device calculates altitude using the air pressure value measured by the barometric pressure sensor, assisting in positioning and navigation. An accelerometer can detect the magnitude of acceleration of the electronic device in various directions (generally three axes). A distance sensor is used to measure distance. A fingerprint sensor is used to collect fingerprints. A touch sensor, also known as a "touch panel," can be located on the display screen, forming a touchscreen, also known as a "touch screen." A bone conduction sensor can acquire vibration signals. In some embodiments of this application, a bone conduction sensor can acquire vibration signals from vibrating bone fragments in the human vocal cords. A bone conduction sensor can also contact the human pulse to receive blood pressure signals.

[0077] The buttons include a power button and volume buttons. A motor can generate vibration alerts. Indicators can be indicator lights, used to show charging status, battery level changes, messages, missed calls, notifications, etc. A SIM card slot is used to connect a SIM card.

[0078] Embodiments of this application also provide a computer program product including program code that, when the program product is run on an electronic device, causes the electronic device to perform the steps of the methods described in this specification according to various exemplary embodiments of this application.

[0079] This application also provides a chip, which includes a processor and a communication interface. The communication interface is used to receive signals and transmit the signals to the processor, which processes the signals to execute the methods described in the various exemplary embodiments of this application.

[0080] While specific embodiments of this application have been described in detail by way of examples, those skilled in the art should understand that the examples are for illustrative purposes only and not intended to limit the scope of this application. Those skilled in the art should also understand that various modifications can be made to the embodiments without departing from the scope and spirit of this application. The scope of this application is defined by the appended claims.

Claims

1. A device for generating a cache emulator, characterized in that, The generation device includes: a cache line information table and a cache simulator generation module; The cache line information table stores the number of groups, the number of paths, several general signal bit width values, several unique signal bit width values, and a unique signal name queue filled in by the user. The cache simulator generation module stores cache line classes and wrapper classes. The cache line class includes several first general signal variables, several unique signal variables, and several unique signal name variables. The several first general signal variables and several general signal bit width values ​​correspond one-to-one, and the several unique signal variables and several unique signal bit width values ​​correspond one-to-one. The several unique signal variables and several unique signal name variables correspond one-to-one and are bound to each other according to the correspondence. The general signal bit width value is used to define the bit width of the corresponding first general signal variable, and the unique signal bit width value is used to define the bit width of the corresponding unique signal name variable. The cache simulator generation module is used to generate a wrapper instance based on the wrapper class. The wrapper instance is used to generate several cache line instances based on the cache line class and the number of groups, number of paths, several general signal bit width values, several specific signal bit width values, and specific signal name queues passed to the wrapper instance when it is instantiated.

2. The apparatus for generating a cache emulator according to claim 1, characterized in that, When generating a cache line instance, the wrapper instance sets the bit width of each first general signal variable to its corresponding general signal bit width value, and sets the bit width of each specific signal name variable to its corresponding specific signal bit width value.

3. The apparatus for generating a cache emulator according to claim 1, characterized in that, Each unique signal name variable in the cache line class has a corresponding ordinal number, and several unique signal name variables are arranged in ascending order of ordinal number; When the wrapper instance generates a cache line instance, if the unique signal name queue is not empty, it assigns a value to at least one unique signal name variable among several unique signal name variables according to the order of at least one unique signal name in the unique signal name queue.

4. The apparatus for generating a cache emulator according to claim 1, characterized in that, Both the cache line class and the wrapper class are parameterized classes.

5. The apparatus for generating a cache emulator according to claim 1, characterized in that, In the cache line class, several first general signal variables, several unique signal variables, and several unique signal name variables are all declared using the protected keyword, so that the several first general signal variables, several unique signal variables, and several unique signal name variables in the cache line instance are configured to be modified only using the interface functions preset by the cache line instance.

6. The apparatus for generating a cache emulator according to claim 1, characterized in that, The wrapper instance contains several cache line instance control functions.

7. The apparatus for generating a cache emulator according to claim 1, characterized in that, After the cache line instance is generated, it initializes the values ​​of each first general signal variable and each specific signal variable according to the preset initialization function.

8. The apparatus for generating a cache emulator according to claim 1, characterized in that, Each cache line instance is configured to reset the values ​​of the first general semaphore variable and the specific semaphore variable when the cache line instance is reset.

Citation Information

Patent Citations

  • Cache simulation model and construction method thereof, white box verification platform and related product

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  • Storage module wrapper determination method, electronic equipment and storage medium

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