Virtualized access processing method and apparatus, electronic device, and storage medium
Patent Information
- Application Number
- CN202611264823.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-08-20
- Publication Date
- 2026-09-25
AI Technical Summary
[0003]然而,在传统的虚拟化访问处理方法中,主设备侧程序通常按照连续地址空间进行编程和发起访问,而下游设备侧实际可供访问的地址空间可能是离散且不连续的
[0053]本公开的示例实施例中的虚拟化访问处理方法,通过片上网络的请求通道接收包含处于连续地址空间中的初始地址和用户字段信息的第一数据包,该用户字段信息用于标识虚拟功能,在请求通道对应的数据传输路径中,根据用户字段信息确定第一数据包对应的虚拟功能编号,并根据虚拟功能编号确定与第一数据包对应的虚拟化地址映射信息,基于该虚拟化地址映射信息将初始地址重映射为第二设备中允许访问的目标地址,再基于目标地址更新第一数据包的地址字段并发送至第二设备,那么,第一设备在发起访问时无需直接感知或处理第二设备侧离散且不连续的实际地址空间,而仍可基于连续地址空间进行访问,进而减少软件持续参与地址适配与处理的需求,降低虚拟化访问处理的复杂度。并且,由于虚拟功能编号是根据第一数据包自身携带的用户字段信息在请求通道对应的数据传输路径中确定的,因此不同虚拟功能对应的地址映射关系能够随数据包传输过程被逐包识别和应用,无需软件在每次访问前介入配置,从而在保持虚拟化隔离的同时进一步降低虚拟化访问处理的复杂度。
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Figure CN122816775A_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the fields of computer architecture and chip design, and more specifically, to a virtualization access processing method, apparatus, electronic device, and storage medium. Background Technology
[0002] In modern data centers, cloud computing, and high-performance computing scenarios, graphics processor (GPU) virtualization technology allows multiple virtual machines or user processes to share the same physical GPU hardware resources to meet the needs of multiple users concurrently using the GPU. Among existing GPU virtualization technologies, dynamic virtualization schemes based on system software scheduling are common. These schemes typically involve a software scheduler in the host operating system or virtualization layer uniformly managing multiple virtual instances or tasks, and using time-slicing to allocate GPU computing time sequentially to different instances or tasks.
[0003] However, in traditional virtualization access processing methods, the master device-side program is typically programmed and initiates accesses according to a contiguous address space, while the actual accessible address space on the downstream device side may be discrete and discontinuous. In this case, existing technologies often require software to continuously participate in the adaptation and processing between continuous input addresses and actual access addresses, and to constantly modify the code to determine discrete working addresses or available addresses, resulting in high complexity in address access processing.
[0004] It should be noted that the information disclosed in the background section above is only used to enhance the understanding of the background of this disclosure, and therefore may include information that does not constitute prior art known to those skilled in the art. Summary of the Invention
[0005] The purpose of this disclosure is to provide a virtualization access processing method, apparatus, electronic device, and computer-readable storage medium that can reduce the complexity of virtualization access processing.
[0006] Other features and advantages of this disclosure will become apparent from the following detailed description, or may be learned in part from practice of this disclosure.
[0007] According to a first aspect of the present disclosure, a virtualization access processing method is provided, applied to a graphics processor, the graphics processor including an on-chip network, the method comprising:
[0008] The first data packet sent by the first device is received through the request channel of the on-chip network. The first data packet includes an initial address in a contiguous address space and user field information, which is used to identify virtual functions.
[0009] In the data transmission path corresponding to the request channel, the virtual function number corresponding to the first data packet is determined according to the user field information, and the virtualization address mapping information corresponding to the first data packet is determined according to the virtual function number.
[0010] The initial address is remapped based on the virtualized address mapping information to obtain the target address; the target address is the address that is allowed to be accessed in the second device.
[0011] The address field of the first data packet is updated based on the target address to obtain the second data packet, and the second data packet is sent to the second device through the request channel so that the second device can perform an access operation based on the target address.
[0012] In some example embodiments of this disclosure, based on the foregoing scheme, the virtualized address mapping information includes a start index, which represents the starting position of the mapping address range corresponding to the first data packet; determining the target mapping entry from the virtualized address mapping set according to the virtualized address mapping information includes:
[0013] Based on the initial address, determine the relative index within the mapped address range;
[0014] The target entry index in the virtualized address mapping set is determined based on the relative index and the starting index;
[0015] From the set of virtualized address maps, determine the target map entry that the target entry index points to.
[0016] In some example embodiments of this disclosure, based on the foregoing scheme, the virtualized address mapping information further includes virtualized address granularity information, which is used to characterize the address segmentation granularity; based on the initial address, determining the relative index in the mapped address range includes:
[0017] Based on the virtualized address granularity information, the corresponding first address segment is extracted from the initial address as a relative index in the virtualized address mapping set; the offset of the starting bit of the first address segment from the least significant bit of the initial address is positively correlated with the address segmentation granularity of the virtualized address granularity information.
[0018] In some example embodiments of this disclosure, based on the foregoing scheme, the virtualization address mapping information further includes an entry isolation range, which indicates the range of entry indexes that the current virtual function is allowed to access in the virtualization address mapping set; the method further includes:
[0019] Determine if the target entry index is within the entry isolation range;
[0020] If the target entry index is within the entry isolation range, the target entry index verification passes, and the step of determining the target mapping entry pointed to by the target entry index from the virtualized address mapping set is executed.
[0021] In some example embodiments of this disclosure, based on the foregoing scheme, determining the virtualization address mapping information corresponding to the first data packet according to the virtual function number includes:
[0022] Determine whether the virtual function number is within the preset range of virtual function numbers;
[0023] If the virtual function number is within the preset range of virtual function numbers, determine the virtualization address mapping information corresponding to the first data packet based on the virtual function number;
[0024] If the virtual function number is not within the preset range of virtual function numbers, a virtual function number out-of-bounds exception message is generated and transmitted along the data transmission path.
[0025] In some example embodiments of this disclosure, based on the foregoing scheme, the initial address is remapped according to the address range contained in the target mapping entry to obtain the target address, including:
[0026] Based on virtualized address granularity information, a second address segment is extracted from the initial address; the second address segment is a low-order address segment in the initial address that is located on the lower side of the first address segment and does not overlap with the first address segment;
[0027] Extract the third address segment from the address segments contained in the target mapping entry; the third address segment is the high-order bit of the address segments contained in the target mapping entry;
[0028] The target address is obtained based on the third address segment and the second address segment.
[0029] In some example embodiments of this disclosure, based on the foregoing scheme, extracting a third address segment from the address segments contained in the target mapping entry includes:
[0030] Based on the virtualized address granularity information, the corresponding third address segment is extracted from the address segments contained in the target mapping entry; the bit width of the third address segment is negatively correlated with the address segmentation granularity of the virtualized address granularity information.
[0031] In some example embodiments of this disclosure, based on the foregoing scheme, the data transmission path is configured with at least four pipeline stages, including a first-stage pipeline, a second-stage pipeline, a third-stage pipeline, and a fourth-stage pipeline; the method further includes:
[0032] The first data packet sent by the first device is received through the request channel of the on-chip network via the first-stage pipeline. The virtual function number is determined according to the user field information, and the virtualization address mapping information corresponding to the first data packet is determined according to the virtual function number. The first data packet includes the initial address in the contiguous address space.
[0033] Through the second and third pipelines, the initial address is remapped according to the virtualized address mapping information to obtain the target address, and the first data packet is updated based on the target address to obtain the second data packet;
[0034] The second data packet is sent to the second device via the request channel through the fourth-level pipeline, so that the second device can perform an access operation based on the target address.
[0035] In some example embodiments of this disclosure, based on the foregoing scheme, the initial address is remapped according to the virtualized address mapping information through the second-level pipeline and the third-level pipeline to obtain the target address, and the first data packet is updated based on the target address to obtain the second data packet, including:
[0036] The second-level pipeline determines the target mapping entry from the virtualized address mapping set based on the virtualized address mapping information. The virtualized address mapping set includes multiple address mapping entries, each of which includes the address range that the second device will actually access.
[0037] The third-level pipeline remaps the initial address based on the address range contained in the target mapping entry to obtain the target address, and updates the address field of the first data packet based on the target address to obtain the second data packet.
[0038] In some example embodiments of this disclosure, based on the foregoing scheme, the first data packet further includes credit information for executing the credit flow control protocol. The credit information includes credit type and credit quantity. The credit type is used to indicate the type of target resource requested by the first data packet, and the credit quantity is used to characterize the amount of target resource required by the access transaction. The target resource includes at least one of virtual channel resources, cached access resources, and network bandwidth resources.
[0039] Sending the second data packet to the second device via the request channel includes:
[0040] According to the credit flow control protocol, based on the credit type, credit quantity, and the current resource status in the on-chip network, it is determined whether to authorize the access transaction corresponding to the second data packet to access the target resource.
[0041] If it is determined that the authorized access transaction accesses the target resource, the credit amount is deducted from the available credit amount corresponding to the target resource, and a second data packet is sent.
[0042] In some example embodiments of this disclosure, based on the foregoing scheme, the on-chip network includes multiple routing nodes; according to the credit flow control protocol, determining whether to authorize the access transaction corresponding to the second data packet to access the target resource based on the credit type, credit quantity, and the current resource status in the on-chip network includes:
[0043] According to the credit flow control protocol, when the second data packet arrives at the current routing node, the current routing node determines whether to authorize the access transaction to access the target resource based on the credit type, credit quantity, and the local buffer status of the current routing node.
[0044] If the authorized access transaction is determined to access the target resource, the second data packet is forwarded through the current routing node; wherein, the current routing node completes the authorization of the access transaction and the forwarding of the second data packet within the same hardware clock cycle.
[0045] According to a second aspect of the present disclosure, a virtualization access processing apparatus is provided, applied to a graphics processor, the graphics processor including an on-chip network, the apparatus comprising:
[0046] The data packet receiving module is used to receive a first data packet sent by a first device through the request channel of the on-chip network. The first data packet includes an initial address in a contiguous address space and user field information, which is used to identify virtual functions.
[0047] The mapping information determination module is used to determine the virtual function number corresponding to the first data packet based on the user field information in the data transmission path corresponding to the request channel, and to determine the virtualization address mapping information corresponding to the first data packet based on the virtual function number.
[0048] The address remapping module is used to remap the initial address according to the virtualized address mapping information to obtain the target address; the target address is the address that is allowed to be accessed in the second device.
[0049] The data packet update module is used to update the address field of the first data packet based on the target address to obtain the second data packet, and send the second data packet to the second device through the request channel so that the second device can perform an access operation based on the target address.
[0050] According to a third aspect of the present disclosure, an electronic device is provided, comprising: a processor; and a memory storing computer-readable instructions that, when executed by the processor, implement the virtualization access processing method as described in the first aspect.
[0051] According to a fourth aspect of the present disclosure, a computer-readable storage medium is provided having a computer program stored thereon, which, when executed by a processor, implements the virtualization access processing method as described in the first aspect.
[0052] The technical solutions provided in this disclosure may have the following beneficial effects:
[0053] The virtualization access processing method in the example embodiments of this disclosure receives a first data packet containing an initial address and user field information in a contiguous address space through a request channel of an on-chip network. The user field information is used to identify virtual functions. In the data transmission path corresponding to the request channel, the virtual function number corresponding to the first data packet is determined based on the user field information, and virtualization address mapping information corresponding to the first data packet is determined based on the virtual function number. Based on this virtualization address mapping information, the initial address is remapped to a target address allowed for access in the second device. Then, the address field of the first data packet is updated based on the target address and sent to the second device. Therefore, when the first device initiates access, it does not need to directly perceive or process the discrete and discontinuous actual address space on the second device side, but can still access based on a contiguous address space. This reduces the need for continuous software involvement in address adaptation and processing, lowering the complexity of virtualization access processing. Furthermore, since the virtual function number is determined based on the user field information carried by the first data packet itself in the data transmission path corresponding to the request channel, the address mapping relationship corresponding to different virtual functions can be identified and applied packet by packet during data packet transmission, eliminating the need for software intervention in configuration before each access. This further reduces the complexity of virtualization access processing while maintaining virtualization isolation.
[0054] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description
[0055] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure. It is obvious that the drawings described below are merely some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort.
[0056] Figure 1 The illustration shows a schematic diagram of a virtualization access processing method according to some embodiments of the present disclosure.
[0057] Figure 2 The illustration schematically shows a flowchart of the steps for remapping an initial address to obtain a target address based on virtualized address mapping information according to some embodiments of the present disclosure.
[0058] Figure 3 A schematic diagram of a virtualization access processing apparatus according to some embodiments of the present disclosure is shown.
[0059] Figure 4 The schematic diagram illustrates the structural schematic of a computer system of an electronic device according to some embodiments of the present disclosure.
[0060] Figure 5 A schematic diagram of a computer-readable storage medium according to some embodiments of the present disclosure is shown.
[0061] In the accompanying drawings, the same or corresponding reference numerals indicate the same or corresponding parts. Detailed Implementation
[0062] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numerals in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this specification. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this specification as detailed in the appended claims.
[0063] Furthermore, the accompanying drawings are for illustrative purposes only and are not necessarily drawn to scale. The block diagrams shown in the drawings are merely functional entities and do not necessarily correspond to physically independent entities. That is, these functional entities can be implemented in software, in one or more hardware modules or integrated circuits, or in different network and / or processor devices and / or microcontroller devices.
[0064] In this example embodiment, a virtualization access processing method is first provided. This method can be applied to electronic devices with graphics processor virtualization access processing capabilities, specifically including computing systems integrating graphics processor chips and network-on-chip (NoC), artificial intelligence accelerators, high-performance computing platforms, cloud graphics processing servers, or other hardware processing platforms with on-chip interconnect and address translation logic. Such electronic devices may include a processor, memory, on-chip network infrastructure, credit flow control protocol processing logic, a virtualized address mapping storage structure, and a pipelined processing unit. The on-chip network infrastructure is used to carry the transmission of protocol data packets within the chip; the credit flow control protocol processing logic is used to parse control information, user information, and address information in the protocol data packets; the virtualized address mapping storage structure is used to store multiple address mapping entries; and the pipelined processing unit is used to perform virtualization context recognition, mapping entry determination, address remapping, and updated data packet output processing on the protocol data packets.
[0065] Furthermore, the aforementioned electronic device may include a first device and a second device. The first device is used to initiate an access request and send a first data packet including an initial address, and the second device is used to receive a second data packet after address remapping and perform an access operation based on the target address. In some embodiments, the virtualized address mapping information corresponding to the current first data packet may be pre-stored in a memory or configuration structure. This virtualized address mapping information may include at least virtualized address granularity information, starting index information, and entry isolation range information for use in subsequent address remapping processing.
[0066] In some implementations, the virtualization access processing method described above can be deployed within a network-on-chip graphics processor chip and run in a data transmission environment based on a proprietary credit flow control protocol. This protocol can define request and response channels between the master and slave devices. The request channel carries control information and data payloads related to the access request, while the response channel carries read return data, write response information, or other response information.
[0067] Furthermore, the request data packet may include header identification information, trailer identification information, address information, length information, transaction identification information, operation type information, data payload presence identifier, data payload information, byte enable information, instruction attribute information, and user field information, etc.
[0068] The header identifier information is used to indicate whether the current flow control unit (Flit) is the first flow control unit of a packet, thus triggering the parsing of address and control information when the header identifier information is valid; the tail identifier information is used to indicate whether the current flow control unit is the last flow control unit of a packet, thus indicating the end of the current packet transmission when the tail identifier information is valid; the address information is used to indicate the target address corresponding to the current access request; the length information is used to indicate the length of the current packet or the payload length; the transaction identifier information is used to associate request packets and response packets of the same transaction; the operation type information is used to indicate the operation type corresponding to the current packet, which in some implementations may include read request, write request, read response, or write response; the data payload presence identifier is used to indicate whether the current packet includes valid data; the data payload information is used to indicate the actual data transmitted in the current packet; the byte enable information is used to indicate which bytes in the data field are valid; the instruction attribute information can be used to indicate whether the current access is related to instruction prefetching; the user field information can be used to indicate the physical or virtual function to which the current access request belongs, for subsequent determination of the virtualization address mapping information corresponding to the current first packet.
[0069] In some implementations, address remapping can be performed on data packets in the request channel, while a bypass approach can be used for the response channel. In other implementations, address remapping can also be performed on data packets in the response channel.
[0070] In some specific implementations, the aforementioned virtualized access processing logic can be deployed in the data path corresponding to the Master To Network Slave (MTNS) interface. The MTNS interface can serve as the entry point for the graphics processing unit's internal computing core to enter the on-chip network, carrying access request data packets for transmission to downstream resource units. In some implementations, the number of supported MTNS interfaces can be configured via the parameter MTNS_NUM, allowing multiple request channels to access the same set of virtualized access processing logic in parallel. This way, the first data packets from different upstream request sources can all enter the corresponding pipeline for subsequent address remapping processing. Furthermore, in some implementations, virtualized address remapping processing can be performed on the request channels corresponding to the MTNS interface, while a bypass pass-through method can be used for the response channels.
[0071] In some other embodiments, the virtualization access processing described above can also be applied to graphics processing unit (GPU) chips based on credit flow control protocols. This virtualization access processing logic can also be applied to a dynamic allocation system for virtualized resources in GPU chips based on credit flow control protocols, where it is used to perform address adaptation processing. Specifically, the computing resources, storage resources, or bandwidth resources within the GPU can be abstracted into virtualized resource units that can be quantified and authorized through credit. Corresponding quantities and types of credit information are allocated to different virtualized objects as the basis for their permission to request and occupy relevant resources.
[0072] Based on this, when the access request (first data packet) is transmitted in the on-chip network, in addition to carrying address information and context information for address remapping processing, it can also combine the credit information corresponding to the current virtualized object. The routing node, arbitration node, or resource management unit can determine whether to allow the current access request to continue accessing the corresponding resource based on the current resource status, credit quantity, or credit type.
[0073] In some implementations, the aforementioned credit information can be dynamically issued, deducted, reclaimed, or supplemented to form a dynamic adjustment mechanism corresponding to the resource usage status. Through this method, address remapping not only enables the conversion between contiguous address spaces and the actual accessible address space, but also further serves the dynamic resource allocation process based on the credit flow control protocol, thereby allowing address adaptation and resource access control to be completed collaboratively within the same hardware data path.
[0074] Figure 1 The illustration schematically shows a flowchart of a virtualization access processing method according to some embodiments of the present disclosure. (Reference) Figure 1 As shown, the virtualization access processing method may include the following steps:
[0075] Step S110: Receive a first data packet sent by the first device through the request channel of the on-chip network. The first data packet includes an initial address in a contiguous address space and user field information, which is used to identify virtual functions.
[0076] Step S120: In the data transmission path corresponding to the request channel, determine the virtual function number corresponding to the first data packet based on the user field information, determine the virtualization address mapping information corresponding to the first data packet based on the virtual function number, and remap the initial address based on the virtualization address mapping information to obtain the target address; the target address is an address that is allowed to be accessed in the second device.
[0077] Step S130: Update the address field of the first data packet based on the target address to obtain the second data packet, and send the second data packet to the second device through the request channel so that the second device can perform an access operation based on the target address.
[0078] According to the virtualization access processing method in this example embodiment, by receiving a first data packet containing an initial address in a continuous address space, determining the virtualization address mapping information corresponding to the first data packet, and remapping the initial address to a target address that is allowed to be accessed in the second device based on the virtualization address mapping information, and then updating the first data packet based on the target address and sending it to the second device, the first device does not need to directly perceive or process the discrete and discontinuous actual address space on the second device side when initiating access, but can still access based on the continuous address space, thereby reducing the need for software to continuously participate in address adaptation and processing, and reducing the complexity of virtualization access processing.
[0079] In some implementations, this approach not only reduces the complexity of virtualization access processing but also makes address adaptation processing more suitable for execution within the hardware data path corresponding to the dedicated on-chip network protocol, thus forming a highly efficient, transparent, secure, and flexible graphics processor hardware virtualization address management scheme on the dedicated on-chip network protocol. Furthermore, in some implementations, this scheme can also perform address adaptation processing in an architecture where data and control information are tightly coupled in a single channel, minimizing additional impact on the network-on-chip (NoC) bandwidth. By configuring different virtualization address granularity information for different virtual functions, it can also support the parallel operation of virtual machines or other virtualized objects with different address granularity requirements. In some specific implementations, it can also support multiple virtual function instances and allow each virtual function to independently configure the minimum virtual address granularity, thereby improving the flexibility, isolation, and adaptability to diverse application scenarios in virtualization access scenarios.
[0080] The virtualization access processing method in this example embodiment will be further described below.
[0081] In step S110, a first data packet sent by the first device is received through the request channel of the on-chip network. The first data packet includes an initial address in a contiguous address space and user field information, which is used to identify virtual functions.
[0082] In this context, the first device refers to the source device that initiates the access request, used to send access-related data packets to downstream devices to request read / write access or other types of transaction processing to the target resource. In some implementations, the first device may be the main device interface unit inside the graphics processor chip, or it may be other request initiating units connected to the on-chip interconnect structure.
[0083] For example, the first device may include an access initiation unit corresponding to a streaming multiprocessor, a direct memory access controller, a command processing unit, a cache control unit, or other hardware modules capable of initiating address access requests to the target device.
[0084] The first data packet refers to a data unit encapsulated and sent by the first device according to a preset transmission protocol, used to carry the address information and control information corresponding to this access request. In some embodiments, the first data packet may be a request data packet in the request channel, used to represent a read request, a write request, or other types of transaction requests.
[0085] In other embodiments, the first data packet may include, in addition to the initial address, other information related to the current access transaction. For example, the first data packet may include header identification information to indicate whether the currently transmitted content is the beginning of a data packet; it may also include tail identification information to indicate whether the current data packet transmission has ended; and it may also include length information, transaction identification information, operation type information, priority information, data payload presence identifier, data payload information, byte enable information, permission attribute information, security attribute information, and user field information, etc., and is not limited thereto.
[0086] In some implementations, the user field information may further include identification content related to the virtualization context, such as identification information that characterizes the virtual function or virtual instance to which the current access request belongs, so as to determine the virtualization address mapping information corresponding to the first data packet in subsequent processing.
[0087] In some implementations, user field information is used to identify virtual functions; that is, the user field information carries identification content to distinguish different virtual functions. The graphics processor can support multiple virtual functions, each corresponding to a different virtual machine, virtual instance, or other virtualized object. When the first device generates the first data packet, it writes the identification content corresponding to the virtual function to which the current access request belongs into the user field information. This allows the first data packet to carry its own virtualization context identifier when transmitted through the request channel of the on-chip network, without needing to transmit the identifier through additional sideband signals or a separate channel, thus avoiding additional impact on the on-chip network bandwidth.
[0088] A contiguous address space refers to a range of addresses that can be accessed consecutively using a linear addressing method from the perspective of the first device or the corresponding virtualization context. Within this address range, adjacent addresses satisfy a preset increasing relationship. Therefore, the first device can generate read and write requests using the usual contiguous address access method without needing to perform additional processing based on whether the actual addresses on the downstream device side are discretely distributed. In other words, the contiguous address space reflects the continuity from the perspective of upstream access, but does not mean that the actual access addresses corresponding to these addresses on the downstream device side are also contiguous.
[0089] In some embodiments, a contiguous address space can be understood as a logical address range allocated to a specific virtual instance, virtual function, or other virtualized object. After the first device initiates an access request within this logical address range, subsequent processing logic converts the initial address in the contiguous address space into a target address that is allowed to be accessed in the second device, thereby achieving transparent access to the discrete physical address space.
[0090] The initial address refers to the address information originally carried by the first data packet before it enters the virtualization access processing link, that is, the address that has not yet undergone address remapping processing. This initial address is located in the contiguous address space visible to the first device and is used to indicate the address location that the first device wants to access. In some implementations, the initial address may be located in the address field of the first data packet, for example, within the address field of the request header.
[0091] The initial address can be represented using a fixed address width, such as a 48-bit address, or other bit widths can be used. The specific configuration depends on the chip architecture and protocol format, and is not limited here.
[0092] It is understandable that, since the address space that the downstream second device is actually allowed to access may be discrete and discontinuous, the initial address cannot be used directly as the final access address. Instead, it needs to be remapped in subsequent steps in combination with virtualized address mapping information to generate a target address that matches the actual address space of the second device.
[0093] In some implementations, receiving the first data packet sent by the first device may include: receiving the first data packet sent by the first device through an upstream interface; extracting header identification information from the first data packet and detecting whether the header identification information is valid; if valid, extracting and caching the initial address and transaction attribute information related to subsequent address processing in the first data packet; if invalid, continuing to sequentially transmit the current non-header portion.
[0094] It is understandable that by detecting whether the header identification information in the first data packet is valid, address resolution can be avoided repeatedly for the non-address portion of the same data packet, which helps reduce hardware processing overhead and improve pipeline processing efficiency.
[0095] In some scenarios, the virtualization context of the first device needs to access resources on the second device side. However, due to virtualization isolation requirements, the first device is only allowed to program and access resources using a logically contiguous address space, while the actual accessible address space on the second device side may consist of multiple separate address segments. In this case, the initial address carried in the first data packet sent by the first device is a logical address generated for the virtualized contiguous address space. Upon receiving this first data packet, the subsequent processing unit can convert the logical address into a target address that can actually be accessed by the second device side, based on the virtualization address mapping information corresponding to the data packet. Thus, the first device can continue to initiate access using a contiguous address space approach without requiring continuous software intervention in the adaptation process between the logical and actual addresses, thereby reducing the complexity of address access processing.
[0096] In some implementations, the first data packet sent by the first device may correspond to different virtualization objects. That is, although different first data packets all include an initial address in a contiguous address space, their virtualization context, corresponding mapped address range, and subsequent applicable virtualization address mapping information may be different.
[0097] Therefore, when receiving the first data packet, in addition to extracting the initial address, the context identification information corresponding to the current data packet can also be extracted simultaneously, so that the matching virtualization address mapping information can be determined subsequently based on this context identification information. For example, the virtual function identification information carried in the user field can be used as a basis for distinguishing different virtualization contexts, and is used to determine which mapping relationship the current first data packet should correspond to.
[0098] In some implementations, the initial address can be further understood as including a high-order bit portion representing the interval position and a low-order bit portion representing the offset within the interval. After receiving the first data packet sent by the first device, the initial address can be completely retained so that subsequent steps can extract the corresponding address segment from it for processing based on the virtualized address mapping information.
[0099] In other embodiments, the first device may not be a single device, but may be any one of multiple upstream request sources. Each first device can send a first data packet to its corresponding processing unit, thus allowing reception and subsequent processing of first data packets from different sources to be performed separately.
[0100] In other embodiments, the initial address in the first data packet may also be pre-configured by the upper-layer driver, virtual machine hypervisor, or other resource management module into the contiguous address space visible to the first device, which is not limited here.
[0101] In step S120, in the data transmission path corresponding to the request channel, the virtual function number corresponding to the first data packet is determined according to the user field information, and the virtualization address mapping information corresponding to the first data packet is determined according to the virtual function number. The initial address is remapped according to the virtualization address mapping information to obtain the target address; the target address is the address that is allowed to be accessed in the second device.
[0102] The virtualized address mapping information refers to the information used to characterize the address mapping relationship corresponding to the current first data packet in a virtualized access scenario. This virtualized address mapping information is used to establish the correspondence between addresses in the contiguous address space on the first device side and the actual accessible addresses on the second device side, so that access requests initiated by the first device according to the contiguous address space can be converted into access requests that can be actually executed on the second device side.
[0103] In some implementations, virtualization address mapping information can correspond to the virtualization context to which the first data packet belongs. The first data packets corresponding to different virtual functions, different virtual machines, or different virtual instances can each correspond to different virtualization address mapping information. This allows multiple virtualization objects to have their own independent address mapping relationships while sharing the same physical hardware resources, thereby ensuring that the access addresses of each virtualization object are isolated from each other.
[0104] Specifically, the address mapping basis that the current first data packet should use can be determined based on the identification information carried in the first data packet or the context information associated with the first data packet.
[0105] In some implementations, the first data packet may include a user field, which may include identification information representing the virtual function, virtual instance, or other virtualized object to which the current access request belongs. Upon receiving the first data packet, the virtualization address mapping information corresponding to the current virtualized object can be read from a pre-configured mapping information storage area based on this identification information. That is, the virtualization address mapping information may not be fully carried in the first data packet, but rather searched and determined based on the virtualization context corresponding to the first data packet. In this way, hardware configuration tables, register sets, memory, or other information carriers can be used to uniformly configure and manage the address mapping relationships of different virtualized objects.
[0106] A virtual function number (VFC) is a unique identifier within the graphics processor (GPU) that uniquely identifies the virtual function to which the first data packet belongs, determined based on user field information. In other words, user field information carries the virtual function identifier at the protocol level, while the VFC is obtained by parsing and converting this identifier in the data transmission path corresponding to the request channel; it can be directly used to index configuration information. In some implementations, the virtual function identifier can be extracted from the corresponding bit segments of the user field information, and the VFC can be obtained according to a preset conversion relationship. For example, in some implementations, the VFC can be `req_user[6:0]+1`, meaning the lower 7 bits of the user field are used as the virtual function identifier, and the VFC is obtained by offsetting from it, thus reserving number 0 for use by the physical function.
[0107] The data transmission path corresponding to the request channel refers to the hardware path in the on-chip network that carries the data packet transmission of the request channel. In some implementations, the virtual function number determination process, as well as the subsequent mapping information determination, address remapping, and data packet update process, are all completed along with the data packet transmission process in this data transmission path, without needing to retrieve the data packet from the request channel, process it in software, and then write it back. This allows the address adaptation process and the data packet transmission process to be completed collaboratively in the same hardware path.
[0108] In some implementations, determining the virtualized address mapping information corresponding to the first data packet based on the virtual function number includes: determining whether the virtual function number is within a preset virtual function number range; if the virtual function number is within the preset virtual function number range, determining the virtualized address mapping information corresponding to the first data packet based on the virtual function number; if the virtual function number is not within the preset virtual function number range, generating virtual function number out-of-bounds exception information, and transmitting the virtual function number out-of-bounds exception information along the data transmission path.
[0109] The preset virtual function number range refers to the legal value range of virtual function numbers supported by the current graphics processor. This range can be determined by the number of virtual functions supported by the hardware implementation or set through configuration parameters. It is understandable that since the virtual function number is determined based on the user field information carried in the first data packet, and the value of the user field information may exceed the number of virtual functions supported by the current hardware due to upstream configuration errors, software anomalies, or unexpected access, it is necessary to determine whether the virtual function number is within the preset virtual function number range before reading the configuration information based on the virtual function number.
[0110] In some implementations, virtual function number (VFN) out-of-bounds exception information can continue to be transmitted as an exception identifier along the data packet to subsequent stages without interrupting the transmission of other fields on the current data transmission path. This allows for interception, discarding, reporting, or other processing of the abnormal access in subsequent stages. In other words, the out-of-bounds detection result does not need to be obtained via software readback registers but is transmitted synchronously with the data packet along the same data transmission path. It is understandable that by performing a range check on the VFN before determining the virtualization address mapping information, it is possible to avoid reading configuration information that does not belong to any virtual function based on an out-of-bounds VFN, thus preventing the generation of incorrect target addresses. It also ensures that exception information is transmitted promptly along the data transmission path, thereby improving the isolation and reliability of the virtualization access processing.
[0111] In some implementations, virtualization address mapping information may include at least one parameter characterizing the current address mapping relationship. For example, virtualization address mapping information may include information characterizing the starting position of the mapping, information characterizing the address segmentation method, and information characterizing access range restrictions. Based on this information, the position of the current initial address in the corresponding mapping relationship can be determined, and the target address corresponding to that initial address can be further determined. The specific content of the virtualization address mapping information can be configured according to the actual virtualization architecture and is not limited here.
[0112] Remapping refers to the process of converting an initial address in the contiguous address space of a first device into an address that is actually allowed to be accessed on the second device, based on virtualized address mapping information. This remapping process is not a simple replacement of the initial address; rather, it reinterprets the meaning of the initial address according to the address mapping relationship corresponding to the current first data packet, enabling the initial address to establish a correspondence with the actual address space on the second device. By executing this remapping process, transparent access to the discrete address space on the second device can be achieved while maintaining the contiguous addressing method on the first device, thereby reducing the complexity caused by continuous software involvement in address adaptation processing.
[0113] The target address refers to the address obtained after remapping the initial address according to the virtualized address mapping information. This target address is an address that is allowed to be accessed in the second device. In other words, the target address is within the range of accessible addresses defined by the virtualized address mapping relationship corresponding to the current first data packet, and can be used by the second device to perform actual access operations.
[0114] It is understandable that the target address is an address that is allowed to be accessed in the second device. This includes addresses whose address format can be recognized by the second device, as well as addresses that belong to the address range authorized for use by the current virtualized object, and not addresses belonging to the address range of other virtualized objects or unauthorized access areas. By converting the initial address to a target address that is allowed to be accessed in the second device, it can be ensured that when the second device performs access operations based on this target address, it satisfies both virtualization isolation requirements and access correctness requirements.
[0115] The second device refers to a downstream device that receives the data packet with the updated address and performs an access operation based on the target address. In some implementations, the second device may be a storage control unit, on-chip storage resources, on-chip interconnect downstream interfaces, or other target devices capable of responding to the access request.
[0116] Understandably, since the actual accessible address space on the second device side may not be contiguously distributed, the initial address directly sent by the first device usually cannot be directly used by the second device for access. By determining the virtualized address mapping information and completing the address remapping, the second device can continue to perform access based on its own actual address space without being aware of the conversion process between the contiguous address space on the first device side and the actual address space on the second device side.
[0117] In some implementations, during the remapping of the initial address based on the virtualized address mapping information, a mapping relationship matching the initial address can first be determined based on the virtualized address mapping information corresponding to the current first data packet, and then the target address can be generated based on this mapping relationship. This mapping relationship can originate from a pre-established set of virtualized address mappings or from other forms of address mapping configuration structures; no limitation is made here.
[0118] In some implementations, the determination of virtualized address mapping information and the conversion from initial address to target address can be completed synchronously as the first data packet is transmitted downstream along the data path. This eliminates the need for software to sequentially adapt the access address, allowing address mapping processing to be integrated with the data packet transmission process, thereby reducing software overhead and improving access processing efficiency. In other implementations, a pipelined approach can be used to balance processing timing and access throughput, which is not limited here.
[0119] In step S130, the address field of the first data packet is updated based on the target address to obtain the second data packet, and the second data packet is sent to the second device through the request channel so that the second device can perform an access operation based on the target address.
[0120] The second data packet refers to the data packet obtained by updating the initial address in the first data packet to the target address. The second data packet and the first data packet can correspond to the same access transaction. That is, the second data packet is consistent with the first data packet in terms of transaction semantics and still corresponds to the same read request, write request, or other access request.
[0121] Specifically, the target address can be written into the address field of the first data packet to obtain the second data packet, so that the updated second data packet carries the address that is allowed to be accessed in the second device. That is to say, when the first data packet is generated on the first device side, it carries the initial address in the contiguous address space; after virtualization access processing, the initial address in the first data packet is updated to the target address that is actually accessible on the second device side, so that the data packets sent to the second device match the actual access requirements of the second device at the address level, without the second device needing to perform adaptation processing on the original initial address again.
[0122] In other embodiments, the second data packet may retain other information from the first data packet in addition to the destination address. For example, the second data packet may also include header identification information, trailer identification information, length information, transaction identification information, operation type information, priority information, data payload presence identifier, data payload information, byte enable information, permission attribute information, security attribute information, and user field information, etc.
[0123] In some implementations, the first data packet may include a header and a payload, with the destination address located in the address field of the header. Therefore, during an update operation, the address field in the header can be updated, while the payload and other non-address fields remain unchanged and continue to be transmitted. For example, in a write request scenario, the write data carried in the first data packet still corresponds to the current access transaction. After the address field is updated to the destination address, the write data can be sent to the second device along with the updated address, allowing the second device to perform the corresponding data write operation at the destination address.
[0124] After obtaining the second data packet, the second data packet, including the target address, can be output to the second device along the downstream data path, enabling the second device to directly perform access operations based on the target address carried in the second data packet. In some embodiments, the second data packet can be sent to on-chip storage resources, storage control units, on-chip interconnect downstream interfaces, or other target devices via a request path.
[0125] It is understandable that since the second data packet already includes a target address that matches the actual address space of the second device, the second device can directly perform the corresponding access based on the target address after receiving the second data packet, without having to process it based on the initial address in the continuous address space of the first device, and without having to perform additional address adaptation processing.
[0126] The second device can perform read access, write access, or other transaction processing on the resource location corresponding to the target address based on the target address carried in the second data packet. For example, when the second data packet corresponds to a read request, the second device can read the data at the corresponding address location based on the target address; when the second data packet corresponds to a write request, the second device can write the data carried in the second data packet to the corresponding address location based on the target address; when the second data packet corresponds to other types of access requests, the second device can also perform corresponding processing based on the target address.
[0127] It is understandable that since the target address is generated based on the virtualization address mapping information corresponding to the current first data packet and belongs to the address that is allowed to be accessed in the second device, when the second device performs an access operation based on the target address, it can satisfy both the access correctness requirement and the isolation requirement in the virtualization scenario.
[0128] In some implementations, if it is found that the target address does not meet the access requirements, or the current data packet does not meet the conditions for continued transmission, before updating the first data packet or sending the second data packet, the transmission of the second data packet can be stopped, or corresponding exception handling can be performed. The exception handling method can be configured as needed and is not limited here.
[0129] The contents of steps S110 to S130 will be described in detail below.
[0130] In an example embodiment of this disclosure, such as Figure 2 As shown, the initial address is remapped according to the virtualized address mapping information to obtain the target address, including the following steps S210 to S220:
[0131] Step S210: Determine the target mapping entry from the virtualized address mapping set according to the virtualized address mapping information; the virtualized address mapping set includes multiple address mapping entries, and each address mapping entry includes the address range of the second device when it is actually accessed.
[0132] The virtualized address mapping set refers to a pre-configured set of mapping relationships for implementing virtualized address translation, used to establish the correspondence between the contiguous address space on the first device side and the actual accessible address space on the second device side. This virtualized address mapping set can include multiple address mapping entries, each representing a different address mapping relationship. By setting the virtualized address mapping set, access requests in the contiguous address space on the first device side can be mapped to the actual allowed address range on the second device side.
[0133] An address mapping entry is a single mapping unit in a virtualized address mapping set, used to represent a specific address mapping relationship. Each address mapping entry can include the address range of the second device when it is actually accessed, that is, a segment of address information in the actual address space of the second device. The address ranges included in different address mapping entries can correspond to different actual accessible address locations on the second device side. Therefore, different address requests in the continuous address space on the first device side can be mapped to different actual address ranges on the second device side through different address mapping entries.
[0134] A target mapping entry refers to the address mapping entry determined for generating the target address during the address remapping process corresponding to the current first data packet. Since the target mapping entry includes the address range of the second device during actual access, once the target mapping entry is determined, the address range in that target mapping entry can be used as the basis for the current address remapping. In essence, the target mapping entry is used to map the logical access location corresponding to the initial address on the first device side to the corresponding address range in the actual address space of the second device side.
[0135] In some implementations, the target mapping entry to be used for the current address remapping process can be determined from multiple address mapping entries in the virtualized address mapping set based on the virtualized address mapping information corresponding to the current first data packet. That is, the virtualized address mapping information not only characterizes the virtualization context to which the current first data packet belongs, but also indicates that the current initial address should correspond to a target mapping entry in the virtualized address mapping set. Different first data packets, different virtualization contexts, or different initial address positions can correspond to different target mapping entries, thereby achieving fine-grained management of address mapping relationships.
[0136] In other implementations, the virtualized address mapping information includes target entry identification information. Based on the target entry identification information, the corresponding address mapping entry can be directly located in the virtualized address mapping set, and the address mapping entry can be identified as the target mapping entry.
[0137] In other implementations, the virtualized address mapping information also includes address range matching information. This allows for the comparison of the initial address with the address ranges corresponding to each address mapping entry in the virtualized address mapping set, and the address mapping entry matching the initial address is determined as the target mapping entry. In other words, each address mapping entry, in addition to including the address range accessed by the second device, may also correspond to a logical address range used to match the initial address. The target mapping entry to be used is determined through range matching.
[0138] In other implementations, other methods may be used to determine the target mapping entries, which are not limited here.
[0139] In some embodiments, the virtualized address mapping information includes a start index, which represents the starting position of the mapping address range corresponding to the first data packet; determining the target mapping entry from the virtualized address mapping set based on the virtualized address mapping information includes: determining a relative index in the mapping address range based on the initial address; determining the target entry index in the virtualized address mapping set based on the relative index and the start index; and determining the target mapping entry pointed to by the target entry index from the virtualized address mapping set.
[0140] The starting index refers to the index information used to characterize the starting entry position of the mapped address range corresponding to the first data packet in the virtualized address mapping set. In other words, multiple address mapping entries can be pre-configured in the virtualized address mapping set, and different virtualization objects, different virtualization contexts, or different mapped address ranges can correspond to different entry ranges in the virtualized address mapping set. The starting index indicates from which entry position in the virtualized address mapping set the mapped address range corresponding to the current first data packet begins to establish the mapping relationship. By setting the starting index, different virtualization objects can start address mapping from different starting entry positions when sharing the same virtualized address mapping set, thereby achieving address mapping isolation between different virtualization objects.
[0141] A mapped address range refers to a logical address mapping range corresponding to the first data packet. This logical address mapping range corresponds to a consecutive entry range in the virtualized address mapping set. It can be understood that a portion of the address space in the first device's consecutive address space can correspond to multiple consecutive address mapping entries in the virtualized address mapping set, and the starting index is used to characterize the starting position of these multiple consecutive address mapping entries in the virtualized address mapping set. After determining the mapped address range corresponding to the current first data packet, the specific address mapping entry to be accessed can be determined by further combining the position of the initial address within that mapped address range.
[0142] A relative index refers to the relative position index of the initial address within the current mapped address range. In other words, the relative index reflects the positional relationship of the initial address relative to the start position of the mapped address range, rather than the absolute entry position of the initial address within the entire virtualized address mapping set. By determining the relative index, the positional relationship of the initial address within the contiguous address space on the first device side can be converted into its corresponding entry positional relationship within the current mapped address range.
[0143] In some implementations, the relative entry position of the initial address can be determined based on its position within the current mapped address range, thus determining the relative index of the relative entry position. That is, a positional correspondence is established between the initial address and the current mapped address range to obtain the relative index of the initial address within that range.
[0144] In other embodiments, the virtualized address mapping information also includes virtualized address granularity information, which is used to characterize the address segmentation granularity. Based on the initial address, determining the relative index in the mapped address interval includes: based on the virtualized address granularity information, extracting the corresponding first address segment from the initial address as the relative index in the virtualized address mapping set; the offset of the starting bit of the first address segment in the initial address relative to the least significant bit of the initial address is positively correlated with the address segmentation granularity of the virtualized address granularity information.
[0145] The virtualized address granularity information refers to the information used to characterize the address segmentation scale in the current virtualized address mapping process. In other words, this virtualized address granularity information is used to indicate: when resolving the initial address, what address granularity is used to segment the initial address, and further determine which part of the address information is used to characterize the relative position of the current initial address in the mapped address range.
[0146] In some implementations, different virtualization objects, different virtualization contexts, or different mapped address ranges can correspond to different virtualization address granularity information, thereby enabling different access requests to determine relative indexes according to their respective address segmentation granularity. By setting virtualization address granularity information, the address mapping process can be compatible with address mapping units of different sizes, improving the flexibility of virtualization address mapping processing.
[0147] Address segmentation granularity refers to the scale at which address intervals are divided when resolving an initial address. It can be understood that when the address segmentation granularity is small, the mapping unit corresponding to the initial address is finer, so the address segment representing the position within the interval can be located in a relatively lower address bit segment; when the address segmentation granularity is large, the address range covered by a single mapping unit is larger, so the address segment representing the position within the interval needs to be shifted to a higher address bit segment accordingly. In other words, changes in address segmentation granularity affect the location of the address segment selected when extracting the relative index from the initial address.
[0148] In some implementations, the virtualized address mapping information includes encoded virtualized address granularity information. Decoding the encoded virtualized address granularity information yields decoded virtualized address granularity information.
[0149] For example, the encoded virtualization address granularity information is CLINT_GRANDULE[2:0]=3'b000, and after decoding, the virtualization address granularity is 32MB (megabytes); the encoded virtualization address granularity information is CLINT_GRANDULE[2:0]=3'b001, and after decoding, the virtualization address granularity is 64MB (megabytes); the encoded virtualization address granularity information is CLINT_GRANDULE[2:0]=3'b010, and after decoding, the virtualization address granularity is 128MB (megabytes); the encoded virtualization address granularity information is CLIN T_GRANDULE[2:0]=3'b011, after decoding, the virtualized address granularity is 256MB (megabytes); the encoded virtualized address granularity information is CLINT_GRANDULE[2:0]=3'b100, after decoding, the virtualized address granularity is 512MB (megabytes); the encoded virtualized address granularity information is CLINT_GRANDULE[2:0]=3'b101, after decoding, the virtualized address granularity is 1GB (gigabytes); the encoded virtualized address granularity information is CLINT_GRANDULE[2:0]=3'b110, after decoding, the virtualized address granularity is 16GB (gigabytes); the encoded virtualized address granularity information is CLINT_GRANDULE[2:0]=3'b111, after decoding, the virtualized address granularity is 128GB (gigabytes).
[0150] The first address segment refers to the address segment extracted from the initial address based on virtualized address granularity information, used to characterize the relative position of the current initial address within the mapped address range. This first address segment serves as a relative index in the virtualized address mapping set, used subsequently in conjunction with the starting index to determine the target entry index. In other words, the first address segment does not directly represent the target address in the second device, but rather indicates which address mapping entry the current initial address corresponds to within the current mapped address range.
[0151] The offset of the starting bit of the first address segment relative to the least significant bit of the initial address is positively correlated with the address segmentation granularity of the virtualized address granularity information. This means that as the address segmentation granularity increases, the starting bit of the first address segment in the initial address shifts to a higher bit position, and the offset increases accordingly; conversely, as the address segmentation granularity decreases, the starting bit of the first address segment in the initial address shifts to a lower bit position, and the offset decreases accordingly. This can be understood as follows: a larger address segmentation granularity results in a larger address range corresponding to each address mapping entry, thus requiring higher bits of address information to distinguish different mapping units; a smaller address segmentation granularity results in a smaller address range corresponding to each address mapping entry, thus allowing the use of relatively lower bits of address information to represent different mapping units. By maintaining this correspondence between the starting bit of the first address segment and the address segmentation granularity, it can be ensured that the extracted relative index, under different address segmentation granularities, can correctly reflect the relative position of the initial address within the current mapped address range. For example, when the virtualization address granularity is 32MB (megabytes), the first address segment can be req_addr[35:25], and the offset number of its starting bit relative to the least significant bit of the initial address is 25; when the virtualization address granularity is 64MB (megabytes), the first address segment can be req_addr[36:26], and the offset number of its starting bit is 26. That is, as the address segmentation granularity increases, the offset number of its starting bit increases accordingly.
[0152] In some implementations, the virtualization address granularity information can be provided by virtualization configuration parameters. After determining the virtualization address granularity information corresponding to the current first data packet, the corresponding first address segment can be extracted from the initial address according to the address segmentation rules corresponding to the virtualization address granularity information. That is to say, the same segment is not extracted for all initial addresses, but the position of the address segment to be extracted is dynamically determined according to different virtualization address granularity information. This can adapt to the differences in address mapping granularity of different virtualization objects, enabling the same set of address mapping processing logic to support multiple different address segmentation methods.
[0153] In some implementations, the first address segment, after being used as a relative index, can be used to characterize the relative entry position of the current initial address within the mapped address range.
[0154] In some implementations, the address information located at the lower end of the first address segment in the initial address can correspond to the offset information within the interval of the current address mapping unit, while the first address segment is used to distinguish different address mapping units. On the one hand, the first address segment can be used to locate different address mapping entries in the virtualized address mapping set; on the other hand, it can also retain the relative position information of the initial address within a single mapping unit for use when generating the target address later.
[0155] In some implementations, the virtualization address granularity information may include multiple different granularity values, each corresponding to a different starting position of the first address segment. Based on the granularity value corresponding to the current virtualization address granularity information, the first address segment at the corresponding position can be selectively extracted from the initial address as a relative index. In this way, the same virtualization address mapping set can support entry location requirements at different address granularities, thereby enhancing the adaptability of this solution to different virtualization resource allocation scenarios.
[0156] It is understandable that by setting virtualized address granularity information in the virtualized address mapping information, and extracting the corresponding first address segment from the initial address as a relative index based on the virtualized address granularity information, a clear correspondence is established between the determination method of the relative index and the address segmentation granularity. This not only enables the correct extraction of address segments for entry location based on different address granularities, but also allows the determination of subsequent target entry indexes to be based on relative indexes that match the current virtualization granularity, thereby improving the accuracy and adaptability of virtualized address mapping processing.
[0157] In some specific implementations, the current virtualized address granularity information can be decoded to determine the address segmentation granularity used for the current address remapping. Address segmentation granularities can include 32MB, 64MB, 128MB, 256MB, 512MB, 1GB, 16GB, and 128GB. Based on this, the corresponding bit field can be extracted from the input address req_addr[47:0] as a relative index according to the current virtualized address granularity information.
[0158] For example, in some implementations, when the virtualization address granularity is 32MB (megabytes), the relative index can be req_addr[35:25]; when the virtualization address granularity is 64 MB (megabytes), the relative index can be req_addr[36:26]; when the virtualization address granularity is 128 MB (megabytes), the relative index can be req_addr[37:27]; when the virtualization address granularity is 256 MB (megabytes), the relative index can be req_addr[38:28]; when the virtualization address granularity is 512 MB (megabytes), the relative index can be req_addr[39:29]; when the virtualization address granularity is 1GB (gigabytes), the relative index can be req_addr[40:30]; when the virtualization address granularity is 16 GB (gigabytes), the relative index can be req_addr[44:34]; when the virtualization address granularity is 128... When the value is GB (gigabytes), the relative index can be req_addr[47:37].
[0159] Understandably, since the relative index only represents the positional relationship within an interval, it is also necessary to combine it with the starting index to locate the specific target entry position in the virtualized address mapping set. The target entry index refers to the index position in the virtualized address mapping set used to represent the current target mapping entry.
[0160] Determining the target entry index in the virtualized address mapping set based on the relative index and the start index involves combining the starting entry position of the mapped address range within the virtualized address mapping set with the relative position of the initial address within that range to determine the actual entry position corresponding to the current initial address in the virtualized address mapping set. In other words, the start index provides the starting point of the current mapped address range within the virtualized address mapping set, and the relative index provides the position of the current initial address within that range. Combining these two provides the target entry index. Therefore, logical address positions in the contiguous address space on the first device side can be converted into specific entry locations within the virtualized address mapping set.
[0161] In some implementations, the starting index is used as a reference position, and the target entry index is obtained by offsetting this reference position according to the relative index. For example, the target entry position corresponding to the current initial address in the virtualized address mapping set can be directly obtained according to the correspondence of "target entry index = starting index + relative index". Without needing to search each entry individually, the corresponding target entry index can be directly located based on the starting position of the mapping address interval corresponding to the current first data packet and the relative position of the initial address within that interval, thus improving the efficiency of determining the target mapping entry.
[0162] In some implementations, the virtualization index can satisfy Virtualization Index[10:0] = relative index[10:0] + Starting Index[10:0]. Here, Virtualization Index[10:0] is the target entry index, relative index[10:0] is the relative index, and Starting Index[10:0] is the starting index.
[0163] In other implementations, the basic entry range corresponding to the first data packet can be determined first based on the starting index, and then the target entry index can be determined by locating within the range based on the relative index. That is, the starting index is used to determine the starting entry range of the current mapped address range in the virtualized address mapping set, and the relative index is used to determine the specific position of the initial address within the entry range, thereby determining the target entry index.
[0164] In other implementations, other methods may be used to determine the target entry index, which are not limited here.
[0165] Multiple address mapping entries in the virtualized address mapping set are stored in index order. After determining the target entry index, the virtualized address mapping set can be accessed based on the target entry index to determine the corresponding target mapping entry. Upon receiving the first data packet, the target entry index can be located directly based on the starting index and relative index, and the target mapping entry can be further determined without the software having to perform entry lookups sequentially, thus improving the efficiency of virtualized address mapping processing.
[0166] Understandably, by setting a starting index in the virtualized address mapping information, determining the relative index within the mapped address range based on the initial address, and then determining the target entry index based on the relative index and the starting index, the target mapping entry is finally determined from the virtualized address mapping set. This transforms the address position relationships in the continuous address space on the first device side into specific entry location results in the virtualized address mapping set. This approach not only distinguishes the entry ranges of different virtualized objects in the virtualized address mapping set but also accurately locates the target mapping entry based on the relative position of the initial address within the current mapped address range.
[0167] Step S220: Remap the initial address according to the address range contained in the target mapping entry to obtain the target address.
[0168] The address range in the target mapping entry can be used in conjunction with the access location information represented by the initial address to generate the target address that is allowed to be accessed in the second device. The address range contained in the target mapping entry represents the actual address range corresponding to the target address on the second device side, while the initial address represents the position of the current access request in the contiguous address space on the first device side.
[0169] In some implementations, the address range contained in the target mapping entry can be used to determine a portion of the address information in the target address, while another portion of the address information in the initial address can be retained after remapping to maintain the relative positional relationship of the current access request within the corresponding address range. Therefore, when different initial addresses are mapped to the address range corresponding to the same target mapping entry, the correct correspondence between the access positions within the range can still be maintained.
[0170] In some implementations, the virtualized address mapping set can be stored in memory, register sets, lookup tables, or other hardware-accessible configuration structures. Upon receiving a first data packet, the virtualized address mapping set can be accessed based on the virtualized address mapping information corresponding to the first data packet to determine the target mapping entry corresponding to the current address remapping, and the address segment information in the target mapping entry can be read.
[0171] Understandably, since multiple address mapping entries in the virtualized address mapping set can be pre-configured, the determination of the target mapping entry and the generation of the target address can be completed directly during the data packet transmission process, without the need for software to participate in the address adaptation process step by step.
[0172] In some embodiments, remapping an initial address based on the address segments contained in the target mapping entry to obtain a target address includes: extracting a second address segment from the initial address based on virtualized address granularity information; the second address segment is a low-order address segment in the initial address that is located on the lower side of the first address segment and does not overlap with the first address segment; extracting a third address segment from the address segments contained in the target mapping entry; the third address segment is located in the higher-order address segment of the address segments contained in the target mapping entry; and obtaining the target address based on the third address segment and the second address segment.
[0173] The second address segment refers to a segment of low-order address information extracted from the initial address, located at the lower end of the first address segment and not overlapping with it. It can be understood that the initial address includes both the first and second address segments. The first address segment serves as a relative index to determine the target mapping entry in the virtualized address mapping set, while the second address segment, after the target mapping entry has been determined, represents the relative position of the current access request within the address range corresponding to that target mapping entry. In other words, the second address segment is no longer used to locate the target mapping entry, but rather to preserve the positional information of the initial address within the corresponding address range.
[0174] The second address segment is located below the first address segment in the lower bits and does not overlap with it. This means that in the initial address bit distribution, the second address segment is in the lower bits below the first address segment, and their corresponding bit ranges are independent and do not intersect. With this configuration, the first and second address segments can perform different functions: the first address segment is used to distinguish different mapping units, and the second address segment is used to represent the address location within the same mapping unit. Because they do not overlap, they can be extracted separately and used in different address remapping stages, thus making the address resolution process more explicit.
[0175] In some implementations, the bit width of the second address segment is also determined by the address segmentation granularity represented by the virtualized address granularity information. That is, the starting bit of the first address segment is determined from the initial address based on the current address segmentation granularity, and the address portion below the starting bit is used as the second address segment. For example, when the virtualized address granularity is 32MB (megabytes), the second address segment can be req_addr[24:0]; when the virtualized address granularity is 128GB (gigabytes), the second address segment can be req_addr[36:0].
[0176] In some implementations, the second address segment can be the lower-order address portion retained from the initial address under the current address segmentation method. Since this address information is located below the first address segment, the second address segment can still be used to represent the specific location of the current access within the corresponding address interval after the target mapping entry has been determined. In this way, the relative positional relationships within intervals in the continuous address space on the first device side can be preserved through the second address segment during the address remapping process.
[0177] The third address segment refers to the high-order address information extracted from the address segments contained in the target mapping entry, used to provide the address range basis on the second device side for the target address. Since the target mapping entry includes the address range used by the second device during actual access, the third address segment extracted from this address range can characterize which actual address range on the second device side the current target address should fall into. In other words, the third address segment corresponds to the high-order part of the target address, while the second address segment corresponds to the low-order part of the target address.
[0178] Specifically, extracting a third address segment from the address segments contained in the target mapping entry includes: extracting the corresponding third address segment from the address segments contained in the target mapping entry based on the virtualized address granularity information; the bit width of the third address segment is negatively correlated with the address segmentation granularity of the virtualized address granularity information.
[0179] Based on the address segmentation granularity corresponding to the current virtualization address granularity information, a corresponding range of address information can be selected as the third address segment from the high-order part of the address segment contained in the target mapping entry. Under different address segmentation granularities, the same size high-order address segment is not always extracted; instead, the extraction range of the third address segment is dynamically determined according to the current granularity configuration.
[0180] The bit width of the third address segment is negatively correlated with the address segmentation granularity of the virtualized address granularity information. This means that as the address segmentation granularity increases, the bit width of the extracted third address segment decreases accordingly; conversely, as the address segmentation granularity decreases, the bit width of the extracted third address segment increases accordingly. This can be understood as follows: a larger address segmentation granularity allows for a larger address range represented by the lower bits of the initial address, thus reducing the amount of high-order address information provided by the target mapping entry in the target address; conversely, a smaller address segmentation granularity results in a smaller address range represented by the lower bits of the initial address, requiring a larger range of high-order address information from the target mapping entry.
[0181] In some implementations, although the third address segment is always located in the high-order portion of the address segment contained in the target mapping entry, its specific bit width can vary depending on the address segmentation granularity represented by the virtualized address granularity information. That is, when the current address segmentation granularity is large, relatively fewer high-order bits can be extracted from the address segment contained in the target mapping entry as the third address segment; when the current address segmentation granularity is small, relatively more high-order bits can be extracted as the third address segment.
[0182] In some implementations, the extracted third address segment can be combined with the second address segment to generate a target address. In this case, the third address segment is used to provide the high-order address information of the second device side that matches the current address segmentation granularity, and the second address segment is used to retain the low-order position information of the initial address within the corresponding address interval. The combination of the two can form a target address that meets the requirements of the current virtualization address granularity.
[0183] Understandably, by extracting the corresponding third address segment from the address segments contained in the target mapping entry based on the virtualized address granularity information, and making the bit width of the third address segment negatively correlated with the address segmentation granularity of the virtualized address granularity information, the high-order address information provided by the target mapping entry can match the low-order address information retained by the initial address side. This approach not only adapts to the target address generation requirements under different address segmentation granularities but also improves the accuracy and consistency of the virtualized address remapping process.
[0184] After extracting the high-order address information from the target mapping entry as the third address segment and extracting the low-order address information from the initial address as the second address segment, the second address segment and the third address segment can be combined to generate the target address that is allowed to be accessed in the second device.
[0185] In other words, the high-order bits of the target address are determined by the address range contained in the target mapping entry, while the low-order bits are determined by the second address range in the initial address. Thus, the target address can reflect both the second device-side address range information represented by the target mapping entry and the access location information within the range represented by the initial address.
[0186] This can be understood as follows: the third address segment is used to determine the address range to which the target address belongs on the second device side, and the second address segment is used to determine the specific location of the target address within that address range. Together, they constitute the final target address. This not only enables the mapping from the continuous address space on the first device side to the actual address range on the second device side using the target mapping entries, but also preserves the relative positional relationship of the initial address within the corresponding range.
[0187] In some implementations, when multiple initial addresses correspond to the same target mapping entry, these initial addresses may have the same third address segment but different second address segments, thereby forming different target addresses within the address range corresponding to the same target mapping entry. When different initial addresses correspond to different target mapping entries, their third address segments may also be different, thus mapping to different actual address ranges on the second device side.
[0188] In some implementations, the specific bit ranges of the second and third address segments can be determined based on the current address mapping configuration, and are not limited here.
[0189] In some specific implementations, the virtualized page table memory can be accessed based on the virtualized index to read the corresponding target mapping entry. The virtualized page table memory may include multiple entries, for example, 2048 entries, and the target mapping entry read may be a 32-bit entry, such as entry[31:0].
[0190] After reading the target mapping entry, the high-order address information can be extracted from the target mapping entry according to the current virtualization address granularity, and then concatenated with the low-order address information in the input address req_addr[47:0] to form the target address addr_dst[47:0].
[0191] For example, when the virtualization address granularity is 32 MB (megabytes), the target address can be formed as addr_dst[47:0]={entry[31:9],req_addr[24:0]}; when the virtualization address granularity is 64 MB (megabytes), the target address can be addr_dst[47:0]={entry[31:10],req_addr[25:0]}; when the virtualization address granularity is 128 MB (megabytes), the target address can be addr_dst[47:0]={entry[31:11],req_addr[26:0]}; when the virtualization address granularity is 256 MB (megabytes), the target address can be addr_dst[47:0]={entry[31:12],req_addr[27:0]}; when the virtualization address granularity is 512... When the virtualization address granularity is 1 GB (megabytes), the target address can be addr_dst[47:0]={entry[31:13],req_addr[28:0]}; when the virtualization address granularity is 1 GB (gigabytes), it can be addr_dst[47:0]={entry[31:14],req_addr[29:0]}; when the virtualization address granularity is 16 GB (gigabytes), the target address can be addr_dst[47:0]={entry[31:18],req_addr[33:0]}; when the virtualization address granularity is 128 GB (gigabytes), the target address can be addr_dst[47:0]={entry[31:21],req_addr[36:0]}.
[0192] Understandably, by extracting a second address segment located at the lower end of the first address segment and not overlapping with it from the initial address, and extracting a third address segment located at the higher end of the address segment contained in the target mapping entry, and then obtaining the target address based on the third and second address segments, the address range information of the second device side corresponding to the target mapping entry is combined with the positional information within the range in the initial address. This ensures that the target address falls within the address range allowed by the second device, while maintaining the relative positional relationship of the initial address within the corresponding address range, thereby improving the accuracy of address remapping.
[0193] Understandably, by setting up a virtualized address mapping set containing multiple address mapping entries, determining the target mapping entry from it based on the virtualized address mapping information, and then remapping the initial address using the address range included in the target mapping entry, this scheme can convert address access requests in the contiguous address space of the first device side into target addresses in the actual accessible address space of the second device side. This not only adapts to the discrete distribution of the address space on the second device side but also helps reduce the complexity of software-involved address adaptation processing and improves processing efficiency in virtualized access scenarios.
[0194] In some embodiments, the virtualization address mapping information further includes an entry isolation range, which indicates the range of entry indexes that the current virtual function is allowed to access in the virtualization address mapping set; the method further includes: determining whether the target entry index is within the entry isolation range; if the target entry index is within the entry isolation range, then the target entry index is verified and the step of determining the target mapping entry pointed to by the target entry index from the virtualization address mapping set is performed.
[0195] The entry isolation range refers to the range of legal entries associated with the virtualization address mapping relationship corresponding to the first data packet. It indicates the range of entry indexes that the virtual function to which the current first data packet belongs is allowed to access within the virtualization address mapping set. In other words, although the virtualization address mapping set can include multiple address mapping entries, the virtualization object to which the current first data packet belongs is only allowed to access the entry range defined by the entry isolation range, and is not allowed to access other address mapping entries that do not belong to the current virtualization object. By setting the entry isolation range, the range of accessible entries for different virtualization objects within the virtualization address mapping set can be limited, thereby enhancing the mapping isolation between different virtualization objects.
[0196] In some implementations, the entry isolation range can be used to characterize the legal entry boundary corresponding to the mapped address range of the current first data packet in the virtualized address mapping set. For example, the entry isolation range may include start boundary information and end boundary information, or it may adopt other information forms that can reflect the range of entries that the current virtualized object is allowed to access, which is not limited here.
[0197] In some implementations, validating the target entry index may include: determining whether the target entry index is located between the start and end boundaries defined by the entry isolation range; and if the target entry index is located within this valid range, determining that the target entry index has passed the validation.
[0198] In some implementations, if the target entry index fails validation, subsequent steps to determine the target mapping entry from the virtualized address mapping set can be stopped. This situation can then be treated as an out-of-bounds access or illegal mapping access.
[0199] It is understandable that by setting an entry isolation range in the virtualization address mapping information, and performing a validity check on the target entry index after the target entry index is determined but before the target mapping entry is determined, and only proceeding to determine the target mapping entry if the check passes, an entry access constraint is added before the address mapping entry is accessed. This can prevent the target entry index from accessing the address mapping entry corresponding to other virtualization objects out of bounds, and can also improve the isolation and security of the virtualization address mapping process.
[0200] In some embodiments, the data transmission path described above is configured with at least four pipeline stages, including a first pipeline stage, a second pipeline stage, a third pipeline stage, and a fourth pipeline stage. The method further includes: receiving a first data packet sent by a first device through the first pipeline stage; determining virtualized address mapping information corresponding to the first data packet; the first data packet including an initial address in a contiguous address space; remapping the initial address according to the virtualized address mapping information through the second and third pipeline stages to obtain a target address; updating the first data packet based on the target address to obtain a second data packet; the target address is an address that is allowed to be accessed in the second device; and sending the second data packet to the second device through the fourth pipeline stage, so that the second device performs an access operation based on the target address.
[0201] The processing results of each pipeline stage can be passed step by step in pipeline order. The information related to the first data packet output by the first pipeline stage and the virtualization address mapping information can be passed to the second and third pipeline stages. The second data packet obtained after processing by the second and third pipeline stages can continue to be passed to the fourth pipeline stage, which then completes the transmission to the second device.
[0202] In other embodiments, the above method can also be executed through a five-level, six-level, or other order-of-magnitude pipeline. Other pipeline levels can be set according to specific implementation requirements, and no limitation is made here.
[0203] The first-stage pipeline is used to receive the first data packet sent by the first device and determine the virtualized address mapping information corresponding to the first data packet. That is, in the first-stage pipeline, on the one hand, the first data packet from the first device is received, and on the other hand, the virtualized address mapping information corresponding to the subsequent address remapping processing of the current first data packet is determined.
[0204] In some implementations, the first-stage pipeline can be used to receive a first data packet sent by a first device and determine virtualized address mapping information corresponding to the first data packet.
[0205] In some specific implementations, the first-level pipeline can cache header identification information in the request channel and, if the header identification information is valid, extract virtual function identification information from the user field to determine the virtual function number to which the current first data packet belongs. For example, in some implementations, the virtual function number can be determined by the corresponding bit field in the user field, such as req_user[6:0]+1.
[0206] Furthermore, the first-level pipeline can also determine whether the virtual function number is within the preset range of virtual function numbers; if the virtual function number is not within the preset range of virtual function numbers, it can generate a virtual function number out-of-bounds exception message and pass the virtual function number out-of-bounds exception message to the next stage along with the pipeline.
[0207] The first-level pipeline can also read the configuration information corresponding to the current virtual function from the configuration storage structure based on the virtual function number. The configuration information may include at least whether the current virtual function is valid, virtualization address granularity information, starting index information, and entry isolation range information. When the header identification information is invalid, the first-level pipeline may not update the configuration information related to the current virtual function, but will continue to pass other protocol fields other than the configuration information to the subsequent stages.
[0208] In some implementations, in addition to receiving the initial address in the first data packet, the first-stage pipeline may also receive other transaction information in the first data packet and pass this transaction information, along with the determined virtualization address mapping information, to the second-stage pipeline.
[0209] The second and third stage pipelines are used to remap the initial address according to the virtualized address mapping information to obtain the target address, and update the first data packet based on the target address to obtain the second data packet.
[0210] In some implementations, the second-stage pipeline and the third-stage pipeline can jointly complete the conversion process from the initial address to the target address and the update process from the first data packet to the second data packet. The target address is an address that is allowed to be accessed in the second device; therefore, the second data packet obtained after processing by the second-stage and third-stage pipelines already includes the target address that the second device can directly access.
[0211] Specifically, through the second-level and third-level pipelines, the initial address is remapped according to the virtualized address mapping information to obtain the target address, and the first data packet is updated based on the target address to obtain the second data packet. This includes: through the second-level pipeline, determining the target mapping entry from the virtualized address mapping set according to the virtualized address mapping information; the virtualized address mapping set includes multiple address mapping entries, each address mapping entry including the address range of the second device during actual access; through the third-level pipeline, remapping the initial address according to the address range contained in the target mapping entry to obtain the target address, and updating the address field of the first data packet based on the target address to obtain the second data packet.
[0212] The second-stage pipeline is used to perform the target mapping entry determination process. That is, after the first-stage pipeline has received the first data packet and determined the virtualized address mapping information corresponding to the first data packet, the second-stage pipeline can access the virtualized address mapping set based on the virtualized address mapping information and determine the target mapping entry corresponding to the current first data packet.
[0213] In some implementations, the second-stage pipeline locates the target mapping entry to be used for the current address remapping process from multiple address mapping entries in the virtualized address mapping set, based on the virtualized address mapping information corresponding to the current first data packet. After determining the target mapping entry corresponding to the current first data packet, the second-stage pipeline can pass the target mapping entry to the third-stage pipeline.
[0214] In some specific implementations, the second-stage pipeline can also record abnormal information related to entry access during the process of determining the target entry index, such as entry index overflow information and illegal address access information. When the header identification information in the request channel is invalid, the signals related to bit field extraction and index calculation in the second-stage pipeline can remain unchanged to reduce unnecessary power consumption. This allows the second-stage pipeline to simultaneously handle entry location, abnormal recording, and low-power control.
[0215] In some implementations, the second-level pipeline, while determining the target mapping entry, can also pass the relevant transaction information from the first data packet to the third-level pipeline. Thus, upon receiving the target mapping entry, the third-level pipeline can not only obtain the address segment information used for address remapping, but also simultaneously acquire the address field and other transaction information from the first data packet, in order to continue completing the target address generation and the second data packet update process.
[0216] The third-level pipeline is used to perform address remapping and packet update processing. That is, after the second-level pipeline has determined the target mapping entry, the third-level pipeline can remap the initial address based on the address range contained in the target mapping entry to obtain the target address, and further update the first packet based on this target address to obtain the second packet. By arranging target address generation and packet update in the third-level pipeline, the target mapping entry output by the second-level pipeline can be directly used in the subsequent pipeline stage to form an access request executable by the second device.
[0217] In some implementations, the third-level pipeline may update the address field in the first data packet, while keeping other transaction information in the first data packet unchanged, and then combine the updated address field with this transaction information to form the second data packet.
[0218] Understandably, by arranging the determination of target mapping entries in the second-level pipeline and the processing of address remapping and packet updates based on target mapping entries in the third-level pipeline, the division of labor between the second-level and third-level pipelines is further clarified. The second-level pipeline outputs the target mapping entry, and the third-level pipeline generates the target address and forms the second data packet based on the target mapping entry, thus making the pipelined address mapping process clearer.
[0219] In some specific implementations, when the header identifier information in the request channel is valid and the current data is valid, the third-level pipeline can perform address remapping processing to obtain the target address and update the first data packet; when the header identifier information is invalid and the current data is valid, the third-level pipeline can keep the original req_addr[47:0] and continue to pass it to the next level without performing new address remapping processing.
[0220] Furthermore, after completing the address field update, the third-level pipeline can continue to pass the updated address field, along with header identifier information, tail identifier information, length information, operation type information, transaction identifier information, priority information, storage type information, non-security attribute information, permission attribute information, instruction attribute information, data payload presence identifier, data payload information, byte enable information, and user field information, to the fourth-level pipeline in a valid and ready handshake manner.
[0221] The fourth-stage pipeline is used to send the second data packet to the second device, enabling the second device to perform an access operation based on the target address. In other words, after the third-stage pipeline has generated the target address and obtained the second data packet, the fourth-stage pipeline can act as an output stage, sending the second data packet downstream to the second device. This allows the second device to directly perform an access operation based on the target address carried in the second data packet, without needing to perform further adaptation processing on the initial address in the contiguous address space of the first device.
[0222] In some implementations, the fourth-level pipeline can send not only the target address in the second data packet but also other transaction information from the second data packet. Thus, upon receiving the second data packet, the second device can directly perform the corresponding read access, write access, or other transaction processing based on the target address while maintaining the original access transaction semantics.
[0223] In some implementations, a pipeline with at least four stages allows different data packets to be processed in parallel at different stages. That is, at any given time, the first stage pipeline can receive a new first data packet, the second and third stages pipelines can perform address remapping and data packet update processing on previously input data packets, and the fourth stage pipeline can send the updated second data packet to a second device, thereby improving processing capabilities in scenarios involving continuous data packet access.
[0224] It is understood that this implementation uses at least four pipeline stages to pipeflate the virtualization access processing method, so that the first data packet reception, virtualization address mapping information determination, initial address remapping, second data packet generation, and second data packet transmission are completed in different pipeline stages. This makes the virtualization access processing process more suitable for hardware pipeflation and helps improve processing efficiency in continuous access scenarios.
[0225] Furthermore, in some embodiments, the aforementioned at least four-stage pipeline setup can also be used to meet the target operating frequency requirements of a graphics processing unit (GPU) chip or on-chip network (CNIC). Specifically, during address segmentation and remapping based on virtualized address mapping information, it is necessary to determine the target entry index based on the virtual function number, starting index, and virtualized address granularity information corresponding to the first data packet, and access the virtualized address mapping set based on the target entry index to read the target mapping entry from the virtualized address mapping set, which has a page table-like structure. After reading the target mapping entry, it is also necessary to extract the valid entry information and generate the target address by combining it with the initial address. The above processing involves logic such as index calculation, page table reading, entry validity judgment, address field extraction, and address combination. If these are concentrated in a two- or three-stage pipeline, it can easily lead to excessively long combinational logic in a single-stage pipeline, increasing the critical path delay and making it difficult to meet the target operating frequency.
[0226] By dividing the above processing into at least four pipeline stages, the processes of receiving the first data packet and acquiring virtualized address mapping information, calculating the target entry index, reading the target mapping entry and generating the target address, and outputting the second data packet can be distributed among different pipeline stages for execution. This shortens the combinational logic paths of each pipeline stage, improves timing convergence capability, and enables the virtualized address splitting and remapping processing to operate stably at the target operating frequency. A four-stage pipeline reduces the processing cycles introduced by additional pipeline stages while meeting the target operating frequency, making it a preferred pipeline partitioning method. In other embodiments, a pipeline partitioning of four or more stages can be used to further reduce the complexity of single-stage combinational logic; however, increasing the number of pipeline stages will correspondingly increase request processing latency and register resource overhead.
[0227] In some implementations, the first data packet may further include credit information for executing a credit flow control protocol. Credit information refers to information obtained by quantifying the access rights to shared resources in the on-chip network according to the credit flow control protocol. In some implementations, credit information may include credit type and credit quantity.
[0228] The credit type indicates the type of target resource requested by the first data packet. In other words, accessible resources in the on-chip network can be categorized by type, with different types of resources corresponding to different types of credits, allowing the occupancy of different types of resources by the same data packet to be calculated separately. In some implementations, the target resource may include at least one of virtual channel resources, cached access resources, and network bandwidth resources. Virtual channel resources refer to the virtual channels and their corresponding buffer resources used to carry data packet transmission in the on-chip network; cached access resources refer to access permissions or access entry resources for shared caches; and network bandwidth resources refer to the transmission capacity available for use by the on-chip network link per unit time. It is understood that these resources are shared by multiple virtual functions, and therefore can be identified separately by credit type to impose access constraints according to type.
[0229] Credits are used to characterize the amount of target resources required by an access transaction. An access transaction refers to the same access transaction corresponding to both the first data packet and the updated second data packet. In other words, credits reflect the scale of target resources that the current access transaction will occupy after being authorized, such as the number of buffer entries required, the number of flow control units required, or the bandwidth share required. In some implementations, credits can be determined by the length information, operation type information, or data payload of the first data packet, or by the configuration information corresponding to the current virtual function; this is not limited here.
[0230] In some implementations, sending the second data packet to the second device via a request channel includes: determining, according to the credit flow control protocol, whether to authorize the access transaction corresponding to the second data packet to access the target resource based on the credit type, credit quantity, and the current resource status in the on-chip network; if it is determined that the access transaction is authorized to access the target resource, deducting the credit quantity from the available credit quantity corresponding to the target resource, and sending the second data packet.
[0231] In this context, the current resource status in the on-chip network refers to the availability of the target resource at the current moment, such as the number of remaining entries in the buffer corresponding to the virtual channel, the available access share of the shared cache, or the remaining bandwidth share of the link. In some implementations, the current resource status can be represented by the number of available credits corresponding to the target resource, that is, the number of available credits reflects the scale of the target resource that can still be occupied.
[0232] In some implementations, determining whether to authorize an access transaction to access a target resource may include: determining the target resource requested by the current access transaction based on the credit type, and obtaining the available credit quantity corresponding to the target resource; comparing the credit quantity with the available credit quantity; if the available credit quantity is not less than the credit quantity, determining to authorize the current access transaction to access the target resource; if the available credit quantity is less than the credit quantity, determining not to authorize the current access transaction to access the target resource for the time being, in which case the second data packet can be kept at the current position and wait until the available credit quantity corresponding to the target resource meets the requirements.
[0233] After authorization is granted, the number of credits is deducted from the available credits corresponding to the target resource, ensuring that the authorized resource size is promptly deducted from the available resources. This prevents multiple virtual function access transactions from repeatedly occupying the same target resource. In some implementations, after the target resource is released, such as after the downstream receiver frees up the corresponding buffer entry or completes the corresponding access, a corresponding number of credits can be returned upstream to replenish the available credits corresponding to the target resource, thus forming a dynamic adjustment mechanism corresponding to the resource usage status.
[0234] Understandably, since the second data packet already carries the remapped target address and credit information for executing the credit flow control protocol, the data transmission path of the same request channel achieves both the adaptation of the contiguous address space to the actual accessible address space of the second device and the authorization and calculation of shared resource usage. In other words, address adaptation and resource access control can be completed collaboratively within the same hardware data path, thereby reducing the complexity of virtualization access processing while enabling fine-grained allocation of on-chip network shared resources.
[0235] In some implementations, the on-chip network includes multiple routing nodes. Determining whether to authorize an access transaction to access the target resource based on the credit type, credit quantity, and the current resource status in the on-chip network, according to the credit flow control protocol, may include: when a second data packet arrives at the current routing node, determining whether to authorize the access transaction to access the target resource based on the credit type, credit quantity, and the current routing node's local buffer status; if authorization is granted, forwarding the second data packet through the current routing node; wherein the current routing node completes the authorization of the access transaction and the forwarding of the second data packet within the same hardware clock cycle.
[0236] Here, the current routing node refers to the routing node that the second data packet arrives at during its transmission within the on-chip network. The local buffer state refers to the buffer occupancy or remaining capacity maintained by the current routing node itself. In other words, each routing node authorizes access transactions passing through it based on its own local buffer state, without requiring a centralized scheduler outside the on-chip network to make unified decisions.
[0237] In some implementations, each routing node can maintain the available credit quantity corresponding to each credit type. When the second data packet arrives, it selects the corresponding available credit quantity and local buffer status based on the credit type it carries. If the conditions are met, it authorizes the access transaction and forwards the second data packet to the next hop, while deducting the corresponding credit quantity. If the conditions are not met, it does not forward the second data packet.
[0238] The current routing node completes the authorization of the access transaction and the forwarding of the second data packet within the same hardware clock cycle. This means that the authorization judgment logic and the data packet forwarding logic are within the same hardware clock cycle. In other words, the authorization result can be applied to the forwarding action of the current clock cycle without waiting for the authorization result to return in an additional clock cycle.
[0239] Understandably, adopting a distributed authorization approach serves two purposes. First, authorization decisions are based on the real-time buffer status of the routing nodes, ensuring that resource allocation results closely reflect the real-time changes in transmission load and congestion within the on-chip network, thus avoiding a disconnect between centralized scheduling decisions and the actual hardware status. Second, since authorization and forwarding are completed within the same hardware clock cycle, resource authorization does not introduce additional processing cycles on the data packet transmission path, which helps reduce the response latency of resource allocation.
[0240] In some application scenarios, traditional virtualization access processing methods can be commonly implemented in the following two categories.
[0241] The first type is dynamic virtualization based on system software scheduling. In this type, the host operating system or the software scheduler in the virtualization layer manages multiple virtual instances or tasks uniformly and allocates graphics processor resources through time slicing. While this type offers some flexibility, its resource allocation decisions are typically made centrally by software modules outside the graphics processor, while task execution and access request transmission within the graphics processor occur in the hardware data path. However, this approach has at least the following technical problems: First, resource allocation decisions are separated from the hardware data flow execution process. The scheduling results need to pass through the software stack and system bus before they can be applied to the graphics processor, thus introducing high processing latency and making it difficult to achieve a fast response synchronized with the access request transmission process. Second, the software scheduler can usually only perform coarse-grained management of graphics processor resources at the time slice or resource ratio level, and it is difficult to perform fine-grained processing of on-chip network links, shared cache access, and discrete address space mapping. Therefore, it is not conducive to directly completing the adaptation between the continuous address space and the actual access address space during the access request transmission process. Third, the software scheduler is usually located outside the graphics processor, making it difficult to perceive the real-time status and access status of the on-chip network inside the graphics processor in a timely manner. This can easily lead to a disconnect between scheduling decisions and the actual hardware status, thereby affecting the address access processing efficiency.
[0242] To address the technical problems of the first type of approach described above, this embodiment can receive a first data packet sent by a first device, obtain an initial address in a contiguous address space from the first data packet, determine the virtualized address mapping information corresponding to the first data packet, and remap the initial address to a target address accessible in the second device based on the virtualized address mapping information. Furthermore, the first data packet can be updated based on the target address to obtain a second data packet, which is then sent to the second device. In this way, the first device can still be programmed based on a contiguous address space when initiating access, while the adaptation process between the contiguous address space and the actual accessible address space of the second device can be completed in the hardware processing path during data packet transmission. This reduces the need for continuous software involvement in address adaptation, lowers the processing latency caused by the separation of decision-making and execution, and improves the real-time performance and granularity of address access processing.
[0243] The second type is virtualization based on static hardware partitioning. In this type, computing resources, cache resources, bandwidth resources, or address space resources are typically pre-divided into multiple fixed and isolated regions during the initialization phase, with each region used by different instances. While this approach can improve the isolation between instances to some extent, its design philosophy usually avoids sharing through physical isolation rather than managing sharing through protocol mechanisms. However, this type of approach has at least the following technical problems: First, the partitioning of address space or related resources is difficult to dynamically adjust according to different access requests during runtime, resulting in a relatively static and inflexible adaptation method. Second, when the actual address space on the second device side is discretely distributed, relying solely on static partitioning is not conducive to flexibly converting access requests in the contiguous address space on the first device side into address requests that are actually allowed to be accessed on the second device side. Third, this type of approach typically does not support, nor does it require, on-chip network protocols based on credit flow control to dynamically coordinate shared resources, thus lacking the ability to perform fine-grained mapping processing and access constraints on access requests in the protocol data path, and making it difficult to achieve on-demand dynamic adaptation.
[0244] To address the technical problems of the second type of approach mentioned above, this embodiment utilizes information such as the virtualized address mapping set, target mapping entries, starting index, relative index, and entry isolation range to map and constrain access requests for different virtualized objects. Specifically, the target mapping entry is first determined based on the virtualized address mapping information corresponding to the first data packet. Then, the initial address is remapped according to the address range contained in the target mapping entry, thereby obtaining the target address allowed for access in the second device. This approach converts access requests in the contiguous address space of the first device into actual allowed address requests on the second device side. Furthermore, the entry isolation range restricts the accessibility of different virtualized objects within the address mapping set, improving isolation, access correctness, and address adaptation flexibility during virtualization access. Moreover, since the target mapping entry and target address can be dynamically determined based on the current access request, this approach is more suitable for adapting to access request conversion needs in discrete address space scenarios compared to static partitioning methods, and allows the address mapping process to perform fine-grained adjustments according to the current access request.
[0245] Furthermore, in some implementations, based on the aforementioned address remapping process, and according to a credit flow control protocol, authorization can be granted to the access transaction corresponding to the second data packet to access virtual channel resources, cached access resources, or network bandwidth resources based on the credit type and credit quantity carried by the first data packet and the current resource status in the on-chip network. After authorization, the corresponding available credit quantity is deducted. In this way, the access rights to shared resources can be dynamically issued, deducted, and replenished in the form of credits, without needing to be statically divided into fixed partitions during the initialization phase. Therefore, compared to static hardware partitioning, this method is more conducive to improving the utilization rate of shared resources while maintaining isolation.
[0246] Furthermore, in some embodiments, the above processing can be executed through at least four pipeline stages, so that the first data packet reception, virtualization address mapping information determination, target mapping entry determination, target address generation, data packet update, and second data packet output are performed in different pipeline stages. This reduces the processing overhead caused by continuous software involvement in address adaptation in system software scheduling methods, and also improves the static nature of address adaptation in static hardware partitioning methods, which makes it difficult to flexibly complete address translation in the data path. This allows access requests in the contiguous address space on the first device side to be converted into target address requests allowed by the second device side in the hardware data path, thereby improving address access processing efficiency while maintaining flexibility and isolation in virtualization scenarios.
[0247] In some specific implementations, the aforementioned address remapping process can also be deployed within the on-chip network and credit flow control protocol data path of the graphics processing unit (GPU) chip. This allows the address translation process to be executed in conjunction with the data packet transmission process, making virtualized access processing more suitable for hardware pipelining. This not only reduces the processing overhead caused by continuous software involvement in address adaptation but also improves the adaptation efficiency between contiguous address spaces and the actual accessible address space while maintaining access isolation.
[0248] In some other implementations, similar address adaptation functionality can be achieved in other ways. For example, a virtualized resource allocation module based on the Advanced eXtensible Interface (AXI) protocol can be used, and the AXI protocol can be further converted into a data transmission protocol based on credit flow control through protocol conversion logic to achieve access address translation. However, this approach typically requires additional protocol conversion and interface adaptation logic, which can easily lead to performance loss and hardware area overhead. Therefore, in some specific implementations, virtualized address remapping processing can be performed directly in the data path of the proprietary on-chip network credit flow control protocol to reduce the burden of additional protocol conversion.
[0249] It should be noted that although the steps of the method in this disclosure are described in a specific order in the accompanying drawings, this does not require or imply that the steps must be performed in that specific order, or that all the steps shown must be performed to achieve the desired result. Additional or alternative steps may be omitted, multiple steps may be combined into one step, and / or a step may be broken down into multiple steps.
[0250] Furthermore, in this example embodiment, a virtualization access processing device is also provided, with reference to Figure 3 As shown, the virtualization access processing device 300 includes: a data packet receiving module 310, a mapping information determining module 320, an address remapping module 330, and a data packet updating module 340. Wherein:
[0251] The data packet receiving module 310 is used to receive a first data packet sent by the first device through the request channel of the on-chip network. The first data packet includes an initial address in a contiguous address space and user field information, and the user field information is used to identify virtual functions.
[0252] The mapping information determination module 320 is used to determine the virtual function number corresponding to the first data packet based on the user field information in the data transmission path corresponding to the request channel, and to determine the virtualization address mapping information corresponding to the first data packet based on the virtual function number.
[0253] The address remapping module 330 is used to remap the initial address according to the virtualized address mapping information to obtain the target address; the target address is the address that is allowed to be accessed in the second device.
[0254] The data packet update module 340 is used to update the address field of the first data packet based on the target address to obtain the second data packet, and send the second data packet to the second device through the request channel so that the second device can perform an access operation based on the target address.
[0255] In some example embodiments of this disclosure, based on the foregoing scheme, the address remapping module 330 is configured to: determine a target mapping entry from a virtualized address mapping set according to virtualized address mapping information; the virtualized address mapping set includes multiple address mapping entries, each address mapping entry including the address range of the second device when actually accessing the device; and remap the initial address according to the address range contained in the target mapping entry to obtain the target address.
[0256] In some example embodiments of this disclosure, based on the foregoing scheme, the virtualized address mapping information includes a start index, which represents the starting position of the mapping address range corresponding to the first data packet; the address remapping module 330 is configured to: determine the relative index in the mapping address range based on the initial address; determine the target entry index in the virtualized address mapping set according to the relative index and the start index; and determine the target mapping entry pointed to by the target entry index from the virtualized address mapping set.
[0257] In some example embodiments of this disclosure, based on the aforementioned scheme, the virtualized address mapping information further includes virtualized address granularity information, which is used to characterize the address segmentation granularity; the address remapping module 330 is configured to: extract the corresponding first address segment from the initial address as a relative index in the virtualized address mapping set based on the virtualized address granularity information; the offset number of the starting bit of the first address segment in the initial address relative to the least significant bit of the initial address is positively correlated with the address segmentation granularity of the virtualized address granularity information.
[0258] In some example embodiments of this disclosure, based on the foregoing scheme, the virtualization address mapping information further includes an entry isolation range, which is used to indicate the range of entry indexes that the current virtual function is allowed to access in the virtualization address mapping set; the above-mentioned device further includes a verification module, which is configured to: determine whether the target entry index is within the entry isolation range; if the target entry index is within the entry isolation range, the target entry index verification passes, and at this time the above-mentioned address remapping module 330 is configured to: determine the target mapping entry pointed to by the target entry index from the virtualization address mapping set.
[0259] In some example embodiments of this disclosure, based on the aforementioned scheme, the mapping information determination module 320 is configured to: determine whether the virtual function number is within a preset virtual function number range; if the virtual function number is within the preset virtual function number range, determine the virtualization address mapping information corresponding to the first data packet based on the virtual function number; if the virtual function number is not within the preset virtual function number range, generate virtual function number out-of-bounds exception information, and transmit the virtual function number out-of-bounds exception information along the data transmission path.
[0260] In some example embodiments of this disclosure, based on the foregoing scheme, the address remapping module 330 is configured to: extract a second address segment from the initial address based on virtualized address granularity information; extract a third address segment from the address segments contained in the target mapping entry; the third address segment is located in the high-order bits of the address segments contained in the target mapping entry; and obtain the target address based on the third address segment and the second address segment.
[0261] In some example embodiments of this disclosure, based on the foregoing scheme, the address remapping module 330 is configured to: extract the corresponding third address segment from the address segment contained in the target mapping entry according to the virtualized address granularity information; the bit width of the third address segment is negatively correlated with the address segmentation granularity of the virtualized address granularity information.
[0262] In some example embodiments of this disclosure, based on the aforementioned scheme, the data transmission path is configured with at least four pipelines, including a first pipeline, a second pipeline, a third pipeline, and a fourth pipeline;
[0263] The aforementioned data packet receiving module 310 is configured to receive a first data packet sent by a first device via a request channel of an on-chip network through a first-stage pipeline. The first data packet includes an initial address in a contiguous address space.
[0264] The mapping information determination module 320 is configured to: determine the virtual function number based on the user field information through the first-level pipeline, and determine the virtualization address mapping information corresponding to the first data packet based on the virtual function number;
[0265] The address remapping module 330 is configured to: remap the initial address to obtain the target address based on the virtualized address mapping information through the second-stage pipeline and the third-stage pipeline, and update the first data packet to obtain the second data packet based on the target address;
[0266] The aforementioned data packet update module 340 is configured to send the second data packet to the second device via the request channel through the fourth-level pipeline, so that the second device performs an access operation based on the target address.
[0267] In some example embodiments of this disclosure, based on the foregoing scheme, the address remapping module 330 is configured to: determine a target mapping entry from a virtualized address mapping set according to virtualized address mapping information through a second-level pipeline; the virtualized address mapping set includes multiple address mapping entries, each address mapping entry including the address range of the second device during actual access; and remap the initial address according to the address range contained in the target mapping entry through a third-level pipeline to obtain the target address, and update the address field of the first data packet based on the target address to obtain the second data packet.
[0268] In some example embodiments of this disclosure, based on the foregoing scheme, the first data packet further includes credit information for executing the credit flow control protocol. The credit information includes credit type and credit quantity. The credit type is used to indicate the type of target resource requested by the first data packet, and the credit quantity is used to characterize the demand of the access transaction for the target resource. The target resource includes at least one of virtual channel resources, cached access resources, and network bandwidth resources. The aforementioned data packet update module 340 is configured to: determine whether to authorize the access transaction corresponding to the second data packet to access the target resource according to the credit type, credit quantity, and the current resource status in the on-chip network, based on the credit flow control protocol; if it is determined that the access transaction is authorized to access the target resource, deduct the credit quantity from the available credit quantity corresponding to the target resource, and send the second data packet.
[0269] In some example embodiments of this disclosure, based on the foregoing scheme, the on-chip network includes multiple routing nodes; the aforementioned packet update module 340 is configured to: according to the credit flow control protocol, when the second packet arrives at the current routing node, determine whether to authorize the access transaction to access the target resource based on the credit type, credit quantity, and the local buffer state of the current routing node; if it is determined that the access transaction is authorized to access the target resource, forward the second packet through the current routing node; wherein, the current routing node completes the authorization of the access transaction and the forwarding of the second packet within the same hardware clock cycle.
[0270] The specific details of each module of the virtualization access processing device have been described in detail in the corresponding virtualization access processing methods, so they will not be repeated here.
[0271] It should be noted that although several modules or units of the virtualization access processing apparatus have been mentioned in the detailed description above, this division is not mandatory. In fact, according to embodiments of this disclosure, the features and functions of two or more modules or units described above can be embodied in one module or unit. Conversely, the features and functions of one module or unit described above can be further divided and embodied by multiple modules or units.
[0272] Furthermore, in an exemplary embodiment of this disclosure, an electronic device capable of implementing the virtualization access processing method described above is also provided.
[0273] Those skilled in the art will understand that various aspects of this disclosure can be implemented as a system, method, or program product. Therefore, various aspects of this disclosure can be embodied in the following forms: a completely hardware embodiment, a completely software embodiment (including firmware, microcode, etc.), or an embodiment combining hardware and software aspects, collectively referred to herein as a "circuit," "module," or "system."
[0274] The following reference Figure 4 To describe an electronic device 400 according to such an embodiment of the present disclosure. Figure 4 The electronic device 400 shown is merely an example and should not impose any limitation on the functionality and scope of use of the embodiments disclosed herein.
[0275] like Figure 4 As shown, the electronic device 400 is manifested in the form of a general-purpose computing device. The components of the electronic device 400 may include, but are not limited to: at least one processing unit 410, at least one storage unit 420, a bus 430 connecting different system components (including storage unit 420 and processing unit 410), and a display unit 440.
[0276] The storage unit stores program code that can be executed by the processing unit 410, causing the processing unit 410 to perform the steps described in the "Exemplary Methods" section of this specification according to various exemplary embodiments of this disclosure. For example, the processing unit 410 can perform actions such as... Figure 1 In step S110, the first data packet sent by the first device is received through the request channel of the on-chip network. The first data packet includes an initial address and user field information in a contiguous address space. The user field information is used to identify virtual functions. In step S120, in the data transmission path corresponding to the request channel, the virtual function number corresponding to the first data packet is determined according to the user field information, and the virtualization address mapping information corresponding to the first data packet is determined according to the virtual function number. The initial address is remapped according to the virtualization address mapping information to obtain the target address. The target address is an address that is allowed to be accessed in the second device. In step S130, the address field of the first data packet is updated based on the target address to obtain the second data packet. The second data packet is then sent to the second device through the request channel so that the second device can perform an access operation based on the target address.
[0277] Storage unit 420 may include readable media in the form of volatile storage units, such as random access memory (RAM) 421 and / or cache memory 422, and may further include read-only memory (ROM) 423.
[0278] Storage unit 420 may also include a program / utility 424 having a set (at least one) of program modules 425, including but not limited to: an operating system, one or more application programs, other program modules, and program data, each or some combination of these examples may include an implementation of a network environment.
[0279] Bus 430 can represent one or more of several types of bus structures, including a memory cell bus or memory cell controller, a peripheral bus, a graphics acceleration port, a processing unit, or a local bus using any of the various bus structures.
[0280] Electronic device 400 can also communicate with one or more external devices 470 (e.g., keyboard, pointing device, Bluetooth device, etc.), and with one or more devices that enable a user to interact with electronic device 400, and / or with any device that enables electronic device 400 to communicate with one or more other computing devices (e.g., router, modem, etc.). This communication can be performed via input / output (I / O) interface 450. Furthermore, electronic device 400 can also communicate with one or more networks (e.g., local area network (LAN), wide area network (WAN), and / or public networks, such as the Internet) via network adapter 460. As shown, network adapter 460 communicates with other modules of electronic device 400 via bus 430. It should be understood that, although not shown in the figures, other hardware and / or software modules can be used in conjunction with electronic device 400, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data backup storage systems.
[0281] From the above description of the embodiments, those skilled in the art will readily understand that the exemplary embodiments described herein can be implemented by software or by combining software with necessary hardware. Therefore, the technical solutions according to the embodiments of this disclosure can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (such as a CD-ROM, USB flash drive, external hard drive, etc.) or on a network, including several instructions to cause a computing device (such as a personal computer, server, terminal device, or network device, etc.) to execute the methods according to the embodiments of this disclosure.
[0282] In exemplary embodiments of this disclosure, a computer-readable storage medium is also provided, on which a program product capable of implementing the methods described above is stored. In some possible embodiments, various aspects of this disclosure may also be implemented as a program product including program code that, when the program product is run on a terminal device, causes the terminal device to perform the steps described in the "Exemplary Methods" section of this specification according to various exemplary embodiments of this disclosure.
[0283] refer to Figure 5As shown, a program product 500 for implementing the virtualization access processing method described in embodiments of the present disclosure is illustrated. This product may employ a portable compact disc read-only memory (CD-ROM) and include program code, and may run on a terminal device, such as a personal computer. However, the program product of the present disclosure is not limited thereto. In this document, a readable storage medium may be any tangible medium containing or storing a program that may be used by or in conjunction with an instruction execution system, apparatus, or device.
[0284] The program product may employ any combination of one or more readable media. A readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of readable storage media (a non-exhaustive list) include: an electrical connection having one or more wires, a portable disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.
[0285] Computer-readable signal media may include data signals propagated in baseband or as part of a carrier wave, carrying readable program code. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. A readable signal medium may also be any readable medium other than a readable storage medium, capable of sending, propagating, or transmitting programs for use by or in conjunction with an instruction execution system, apparatus, or device.
[0286] The program code contained on the readable medium may be transmitted using any suitable medium, including but not limited to wireless, wired, optical fiber, RF, etc., or any suitable combination thereof.
[0287] Program code for performing the operations of this disclosure can be written in any combination of one or more programming languages, including object-oriented programming languages such as Java and C++, and conventional procedural programming languages such as C or similar languages. The program code can execute entirely on the user's computing device, partially on the user's computing device, as a standalone software package, partially on the user's computing device and partially on a remote computing device, or entirely on a remote computing device or server. In cases involving remote computing devices, the remote computing device can be connected to the user's computing device via any type of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computing device (e.g., via the Internet using an Internet service provider).
[0288] Furthermore, the above figures are merely illustrative of the processes included in the method according to exemplary embodiments of this disclosure and are not intended to be limiting. It is readily understood that the processes shown in the above figures do not indicate or limit the temporal order of these processes. Additionally, it is readily understood that these processes may be executed synchronously or asynchronously, for example, in multiple modules.
[0289] From the above description of the embodiments, those skilled in the art will readily understand that the exemplary embodiments described herein can be implemented by software or by combining software with necessary hardware. Therefore, the technical solutions according to the embodiments of this disclosure can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (such as a CD-ROM, USB flash drive, external hard drive, etc.) or on a network, including several instructions to cause a computing device (such as a personal computer, server, touch terminal, or network device, etc.) to execute the methods according to the embodiments of this disclosure.
[0290] Other embodiments of this disclosure will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not disclosed herein. The specification and embodiments are to be considered exemplary only, and the true scope and spirit of this disclosure are indicated by the claims.
[0291] It should be understood that this disclosure is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this disclosure is limited only by the appended claims.
Claims
1. A virtualization access processing method, characterized in that, Applied to a graphics processing unit (GPU), the GPU including an on-chip network, the method includes: The first data packet sent by the first device is received through the request channel of the on-chip network. The first data packet includes an initial address in a contiguous address space and user field information, wherein the user field information is used to identify virtual functions. In the data transmission path corresponding to the request channel, the virtual function number corresponding to the first data packet is determined according to the user field information, and the virtualization address mapping information corresponding to the first data packet is determined according to the virtual function number; The initial address is remapped according to the virtualized address mapping information to obtain the target address; the target address is an address that is allowed to be accessed in the second device. The address field of the first data packet is updated based on the target address to obtain the second data packet, and the second data packet is sent to the second device through the request channel so that the second device can perform an access operation based on the target address.
2. The virtualization access processing method according to claim 1, characterized in that, The step of remapping the initial address according to the virtualized address mapping information to obtain the target address includes: Based on the virtualized address mapping information, a target mapping entry is determined from the virtualized address mapping set; the virtualized address mapping set includes multiple address mapping entries, and each address mapping entry includes the address range of the second device when it is actually accessed; The initial address is remapped based on the address range contained in the target mapping entry to obtain the target address.
3. The virtualization access processing method according to claim 2, characterized in that, The virtualized address mapping information includes a starting index, which represents the starting position of the mapping address range corresponding to the first data packet; determining the target mapping entry from the virtualized address mapping set based on the virtualized address mapping information includes: Based on the initial address, determine the relative index within the mapped address range; The target entry index in the virtualized address mapping set is determined based on the relative index and the starting index; From the virtualized address mapping set, determine the target mapping entry pointed to by the target entry index.
4. The virtualization access processing method according to claim 3, characterized in that, The virtualized address mapping information also includes virtualized address granularity information, which is used to characterize the address segmentation granularity; determining the relative index in the mapped address range based on the initial address includes: Based on the virtualized address granularity information, the corresponding first address segment is extracted from the initial address as a relative index in the virtualized address mapping set; the offset of the starting bit of the first address segment in the initial address relative to the least significant bit of the initial address is positively correlated with the address segmentation granularity of the virtualized address granularity information.
5. The virtualization access processing method according to claim 3, characterized in that, The virtualization address mapping information further includes an entry isolation range, which indicates the range of entry indexes that the current virtual function is allowed to access in the virtualization address mapping set; the method further includes: Determine whether the target entry index is within the entry isolation range; If the target entry index is within the entry isolation range, the target entry index is verified and the step of determining the target mapping entry pointed to by the target entry index from the virtualized address mapping set is executed.
6. The virtualization access processing method according to any one of claims 1 to 5, characterized in that, The step of determining the virtualization address mapping information corresponding to the first data packet based on the virtual function number includes: Determine whether the virtual function number is within the preset range of virtual function numbers; If the virtual function number is within the range of the preset virtual function number, determine the virtualization address mapping information corresponding to the first data packet based on the virtual function number; If the virtual function number is not within the preset range of virtual function numbers, a virtual function number out-of-bounds exception message is generated and transmitted along the data transmission path.
7. The virtualization access processing method according to claim 4, characterized in that, The step of remapping the initial address based on the address range contained in the target mapping entry to obtain the target address includes: Based on the virtualized address granularity information, a second address segment is extracted from the initial address; the second address segment is a low-order address segment in the initial address that is located on the lower side of the first address segment and does not overlap with the first address segment; Extract a third address segment from the address segments contained in the target mapping entry; the third address segment is located in the high-order bits of the address segments contained in the target mapping entry. The target address is obtained based on the third address segment and the second address segment.
8. The virtualization access processing method according to claim 7, characterized in that, Extracting the third address segment from the address segments contained in the target mapping entry includes: Based on the virtualized address granularity information, the corresponding third address segment is extracted from the address segments contained in the target mapping entry; the bit width of the third address segment is negatively correlated with the address segmentation granularity of the virtualized address granularity information.
9. The virtualization access processing method according to claim 1, characterized in that, The data transmission path is configured with at least four pipeline stages, including a first-stage pipeline, a second-stage pipeline, a third-stage pipeline, and a fourth-stage pipeline; the method further includes: The first data packet sent by the first device is received through the request channel of the on-chip network via the first pipeline. The virtual function number is determined according to the user field information, and the virtualization address mapping information corresponding to the first data packet is determined according to the virtual function number. The first data packet includes an initial address in a contiguous address space. The initial address is remapped to obtain the target address based on the virtualization address mapping information through the second-stage pipeline and the third-stage pipeline, and the first data packet is updated to obtain the second data packet based on the target address; The second data packet is sent to the second device via the request channel through the fourth-level pipeline, so that the second device performs an access operation based on the target address.
10. The virtualization access processing method according to claim 9, characterized in that, The process of remapping the initial address to obtain the target address based on the virtualized address mapping information through the second-stage pipeline and the third-stage pipeline, and updating the first data packet to obtain the second data packet based on the target address, includes: Through the second-stage pipeline, a target mapping entry is determined from the virtualized address mapping set based on the virtualized address mapping information; the virtualized address mapping set includes multiple address mapping entries, and each address mapping entry includes the address range of the second device when it is actually accessed; The initial address is remapped according to the address range contained in the target mapping entry through the third-level pipeline to obtain the target address, and the address field of the first data packet is updated based on the target address to obtain the second data packet.
11. The virtualization access processing method according to claim 1, characterized in that, The first data packet also includes credit information for executing a credit flow control protocol. The credit information includes a credit type and a credit quantity. The credit type is used to indicate the type of target resource requested by the first data packet, and the credit quantity is used to characterize the amount of demand for the target resource by the access transaction. The target resource includes at least one of virtual channel resources, cached access resources, and network bandwidth resources. Sending the second data packet to the second device through the request channel includes: According to the credit flow control protocol, based on the credit type, the credit quantity, and the current resource status in the on-chip network, it is determined whether to authorize the access transaction corresponding to the second data packet to access the target resource; If it is determined that the access transaction is authorized to access the target resource, the credit amount is deducted from the available credit amount corresponding to the target resource, and the second data packet is sent.
12. The virtualization access processing method according to claim 11, characterized in that, The on-chip network includes multiple routing nodes; the step of determining whether to authorize the access transaction corresponding to the second data packet to access the target resource according to the credit flow control protocol, based on the credit type, the number of credits, and the current resource status in the on-chip network, includes: According to the credit flow control protocol, when the second data packet arrives at the current routing node, the current routing node determines whether to authorize the access transaction to access the target resource based on the credit type, the credit quantity, and the local buffer state of the current routing node. If it is determined that the access transaction is authorized to access the target resource, the second data packet is forwarded through the current routing node; wherein the current routing node completes the authorization of the access transaction and the forwarding of the second data packet within the same hardware clock cycle.
13. A virtualized access processing apparatus, characterized in that, Applied to a graphics processing unit, the graphics processing unit including an on-chip network, the device includes: The data packet receiving module is used to receive a first data packet sent by a first device through the request channel of the on-chip network. The first data packet includes an initial address in a contiguous address space and user field information, wherein the user field information is used to identify virtual functions. The mapping information determination module is used to determine the virtual function number corresponding to the first data packet based on the user field information in the data transmission path corresponding to the request channel, and to determine the virtualization address mapping information corresponding to the first data packet based on the virtual function number. The address remapping module is used to remap the initial address according to the virtualized address mapping information to obtain a target address; the target address is an address that is allowed to be accessed in the second device. The data packet update module is used to update the address field of the first data packet based on the target address to obtain a second data packet, and send the second data packet to the second device through the request channel so that the second device can perform an access operation based on the target address.
14. An electronic device, characterized in that, include: processor; as well as A memory storing computer-readable instructions that, when executed by the processor, implement the virtualization access processing method as described in any one of claims 1 to 12.
15. A computer-readable storage medium, characterized in that, It stores a computer program that, when executed by a processor, implements the virtualization access processing method as described in any one of claims 1 to 12.