Simulation method, device and equipment for server backplane compatibility test and storage medium

Abstract

The application discloses a kind of server backplane compatible test simulation method, device, equipment and storage medium, it is related to server test technical field, the method comprises: in response to protocol type selection instruction, the switching operation of signal passage is executed, to route the signal of first port to the target passage corresponding to protocol type;Through the device behavior of corresponding protocol type is simulated by the target passage, link handshake and training operation are executed to establish link state;Based on the link state, output simulation state signal, wherein the simulation state signal corresponds to the simulation result of compatibility test.The application can solve the problems of interface wear, efficiency bottleneck and high equipment cost caused by frequent physical plugging in existing hard disk backplane test.

Description

Technical Field

[0001] This application relates to the field of server testing technology, and in particular to simulation methods, apparatus, equipment and storage media for server backplane compatibility testing. Background Technology

[0002] As a key component connecting hard drives to the server motherboard, the server hard drive backplane needs to have its compatibility and electrical performance verified for different protocol types during the R&D verification and production testing phases. Hard drives using different protocols employ different link establishment mechanisms at the physical layer—the Non-Volatile Memory Standard Protocol (NVIP) is based on a high-speed peripheral interconnect bus and relies on the receiver's response to enter the link training state; the Serial Connect Small Computer System Interface Protocol (SCSM) and the Serial Advanced Technology Attachment Protocol (SATIP) complete link negotiation and rate matching through out-of-band signal sequences.

[0003] Currently, to avoid link establishment failures due to protocol type mismatches during backplane compatibility testing, physical plugging and unplugging of a real hard drive into the backplane slot is typically used. This allows the hard drive and backplane controller to establish a link through physical layer interaction, verifying whether the backplane can correctly recognize and drive the hard drive. However, since each time a different protocol type is tested, the corresponding real hard drive must be manually replaced and the link establishment process re-executed, the physical connector between the hard drive and the backplane slot undergoes multiple complete plugging and unplugging operations. Connectors have limited design lifespan, and frequent operations can easily lead to irreversible mechanical wear and electrical performance degradation of the backplane interface, affecting the backplane's test pass rate and lifespan. Furthermore, repeated physical plugging and unplugging results in long protocol switching times, severely hindering testing progress. Additionally, maintaining and storing a library of real hard drives with multiple brands, capacities, and firmware versions further increases hardware asset occupancy and maintenance costs.

[0004] Therefore, how to establish a link between the backplane controller and hard drives with different protocols without frequent physical plugging and unplugging is a technical problem that urgently needs to be solved.

[0005] The above content is only used to help understand the technical solution of this application and does not represent an admission that the above content is prior art. Summary of the Invention

[0006] The main purpose of this application is to provide a simulation method, apparatus, device and storage medium for server backplane compatibility testing, aiming to solve the technical problem of how to establish a link between the backplane controller and hard drives with different protocols without frequent physical plugging and unplugging.

[0007] To achieve the above objectives, this application proposes a simulation method for server backplane compatibility testing, the method comprising: In response to the protocol type selection command, a signal path switching operation is performed to route the signal of the first port to the target path corresponding to the protocol type; By simulating the device-side behavior of the corresponding protocol type through the target path, link handshake and training operations are performed to establish the link state; Based on the link status, a simulated status signal is output, wherein the simulated status signal corresponds to the simulated result of the compatibility test.

[0008] In one embodiment, the step of performing the signal path switching operation includes: Implement anti-collision protection to clear the signal state of the preceding protocol; Switch to the target path corresponding to the protocol type; Trigger the server backplane controller to restart the link initialization process.

[0009] In one embodiment, the step of performing anti-collision protection includes: Pull the link reset signal low; Place the high-speed differential signal channel on the target path into a high-impedance state.

[0010] In one embodiment, the step of simulating device-side behavior of the corresponding protocol type through the target path, performing link handshake and training operations to establish link state includes: If the protocol type is a non-volatile memory standard protocol, the link training state machine is configured through the target path, and a receiver detection response is sent to the server backplane to enter the link training sequence. If the protocol type is Serial Connect Small Computer System Interface Protocol or Serial Advanced Technology Annex Protocol, an out-of-band handshake sequence is sent to the server backplane through the physical layer of the target path in response to the link negotiation and rate negotiation of the server backplane.

[0011] In one embodiment, after the step of outputting an analog status signal based on the link state, the method further includes: Parse the power management commands sent by the server backplane for the corresponding protocol layer; According to the power management command, adjust the power consumption level of the electronic load to simulate the power consumption characteristics of the target device under different operating conditions. When the protocol type is switched, the power consumption level of the electronic load is switched to the idle level corresponding to the new protocol.

[0012] In one embodiment, the method further includes: Monitor the presence detection signal of the first port; When the presence detection signal indicates that the first port is physically disconnected from the server backplane, all signal channels are disconnected and the signal lines are put into a high-impedance state, the simulation operation is stopped, and an abnormal indication signal is output. The system monitors the power supply voltage. When the power supply voltage exceeds the rated range, the power supply is cut off and the system enters a protection latch state.

[0013] In one embodiment, the method further includes: In response to the protocol type selection instruction, the presence detection signal and interface detection signal on the first port are pulled low to simulate the physical state of the target device being inserted to the server backplane.

[0014] Furthermore, to achieve the above objectives, this application also proposes a simulation device for server backplane compatibility testing, the simulation device comprising: The switching module is used to perform a signal path switching operation in response to a protocol type selection command, so as to route the signal of the first port to the target path corresponding to the protocol type; The simulation module is used to simulate the device-side behavior of the corresponding protocol type through the target path, perform link handshake and training operations, and establish link status; The output module is used to output a simulated status signal based on the link status, wherein the simulated status signal corresponds to the simulated result of the compatibility test.

[0015] In addition, to achieve the above objectives, this application also proposes a simulation device for server backplane compatibility testing, the device comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, the computer program being configured to implement the steps of the simulation method for server backplane compatibility testing as described above.

[0016] In addition, to achieve the above objectives, this application also proposes a storage medium, which is a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, it implements the steps of the simulation method for server backplane compatibility testing as described above.

[0017] In addition, to achieve the above objectives, this application also provides a computer program product, which includes a computer program that, when executed by a processor, implements the steps of the simulation method for server backplane compatibility testing as described above.

[0018] This application provides a simulation method for server backplane compatibility testing. First, in response to a protocol type selection command, a signal path switching operation is performed to route the signal from the first port to the target path corresponding to the protocol type. This replaces the physical plugging and unplugging action when replacing a physical hard drive with the signal channel routing of an electronic switch matrix, avoiding mechanical wear of connector contacts caused by frequent plugging and unplugging. Based on this, the target path simulates the device-side behavior of the corresponding protocol type, performing link handshake and training operations to establish a link state. This replaces the physical layer interaction of the physical hard drive with device-side signals generated by the protocol simulation chip, enabling link establishment between the backplane and hard drives of different protocols without the need for physical insertion of a physical hard drive. Then, a simulated status signal is output based on the link state, where the simulated status signal corresponds to the simulation result of the compatibility test. This allows the backplane controller to obtain feedback on whether the link establishment was successful without the need for a physical hard drive, thus effectively verifying backplane compatibility.

[0019] In summary, this application combines signal path switching operations with device-side behavior simulation operations to achieve link establishment and compatibility testing between the backplane and hard drives with different protocols without physical plugging and unplugging. This overcomes the technical deficiency of relying on physical plugging and unplugging of real hard drives to perform efficient compatibility testing of the backplane, avoids mechanical wear and electrical performance degradation of the backplane interface, reduces hardware asset occupation and maintenance costs, and improves the efficiency of backplane compatibility testing. Attached Figure Description

[0020] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0021] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0022] Figure 1 A flowchart illustrating an embodiment of the simulation method for server backplane compatibility testing in this application; Figure 2 A flowchart illustrating the second embodiment of the simulation method for server backplane compatibility testing in this application; Figure 3 A flowchart illustrating the simulation method for server backplane compatibility testing in this application, provided in Embodiment 3. Figure 4This is a schematic diagram of the module structure of the simulation device for server backplane compatibility testing according to an embodiment of this application; Figure 5 This is a schematic diagram of the hardware operating environment involved in the simulation method for server backplane compatibility testing in this application embodiment.

[0023] The purpose, features, and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0024] It should be understood that the specific embodiments described herein are merely illustrative of the technical solutions of this application and are not intended to limit this application.

[0025] To better understand the technical solution of this application, a detailed description will be provided below in conjunction with the accompanying drawings and specific implementation methods.

[0026] The main solution of this application embodiment is: in response to the protocol type selection instruction, a signal path switching operation is performed to route the signal of the first port to the target path corresponding to the protocol type; the device-side behavior of the corresponding protocol type is simulated through the target path to perform link handshake and training operations to establish a link state; based on the link state, a simulated state signal is output, wherein the simulated state signal corresponds to the simulation result of the compatibility test.

[0027] Currently, to avoid link establishment failures due to protocol type mismatches during backplane compatibility testing, physical plugging and unplugging of a real hard drive into the backplane slot is typically used. This allows the hard drive and backplane controller to establish a link through physical layer interaction, verifying whether the backplane can correctly recognize and drive the hard drive. However, since each time a different protocol type is tested, the corresponding real hard drive must be manually replaced and the link establishment process re-executed, the physical connector between the hard drive and the backplane slot undergoes multiple complete plugging and unplugging operations. Connectors have limited design lifespan, and frequent operations can easily lead to irreversible mechanical wear and electrical performance degradation of the backplane interface, affecting the backplane's test pass rate and lifespan. Furthermore, repeated physical plugging and unplugging results in long protocol switching times, severely hindering testing progress. Additionally, maintaining and storing a database of real hard drives from multiple brands, capacities, and firmware versions further increases hardware asset usage and maintenance costs. Therefore, how to establish a link between the backplane controller and hard drives with different protocols without frequent physical plugging and unplugging is a pressing technical problem that needs to be solved.

[0028] This application combines signal path switching operations with device-side behavior simulation operations to achieve link establishment and compatibility testing between the backplane and hard drives with different protocols without physical plugging and unplugging. It overcomes the technical defect that makes it impossible to perform efficient compatibility testing of the backplane due to reliance on physical plugging and unplugging of real hard drives, avoids mechanical wear and electrical performance degradation of the backplane interface, reduces hardware asset occupation and maintenance costs, and improves the efficiency of backplane compatibility testing.

[0029] It should be noted that the execution subject of this embodiment can be a simulation system for server backplane compatibility testing, or a computing service device with data processing, network communication, and program execution functions, such as a tablet computer, personal computer, or mobile phone, or a thermal management device capable of implementing the above functions in a simulation system for server backplane compatibility testing. This embodiment does not specifically limit it in this way. The following uses a simulation system for server backplane compatibility testing as the execution subject as an example to describe this embodiment and the following embodiments.

[0030] Based on this, embodiments of this application provide a simulation method for server backplane compatibility testing, referring to... Figure 1 , Figure 1 This is a flowchart illustrating the first embodiment of the simulation method for server backplane compatibility testing in this application.

[0031] In this embodiment, the simulation method for server backplane compatibility testing includes steps S10 to S30: Step S10: In response to the protocol type selection instruction, a signal path switching operation is performed to route the signal of the first port to the target path corresponding to the protocol type. It should be noted that the protocol type selection instruction is a control signal used to instruct the adapter board to switch to the target protocol type. This instruction can be generated by the mode selection unit in response to user operation, or it can be issued by the host computer through the communication interface; this embodiment does not specifically limit this. The mode selection unit can be a DIP switch, jumper cap, button, or touch screen; this embodiment does not specifically limit this. Protocol types include non-volatile memory standard protocols, serial connection small computer system interface protocols, and serial advanced technology annex protocols.

[0032] Additionally, it should be noted that the first port is the interface on the adapter board used to connect to the backplane. The first port is a standard SFF-8639 male connector, used to insert into the female connector of the hard drive backplane of the server under test to establish a physical connection and signal path between the adapter board and the backplane. Only one first port can be provided on the adapter board, or multiple first ports can be provided; this embodiment does not specifically limit this. The target path refers to the signal transmission path corresponding to the currently selected protocol type. Different protocol types correspond to different target paths. For example, when the protocol type is the Non-Volatile Memory Standard Protocol, the target path is the onboard termination matching network; when the protocol type is the Serial Connect Small Computer System Interface Protocol or the Serial Advanced Technology Attachment Protocol, the target path is the physical layer input of the protocol emulation chip; when the protocol type is bypass pass-through mode, the target path is the second port female connector. This embodiment does not limit the specific form of the target path, as long as it can achieve signal transmission for the corresponding protocol type.

[0033] When performing a signal path switching operation, the signal from the first port can be directly routed to the target path, or the current signal path can be disconnected first and then the target path can be connected. This embodiment does not impose any specific limitations on this. When routing the signal from the first port to the target path, the routing switch can be completed in one go, or the routing switch can be completed step by step according to a preset switching sequence. This embodiment does not impose any specific limitations on this.

[0034] Understandably, since protocol switching is accomplished by performing signal path switching operations, there is no need to physically plug and unplug the actual hard drive. This avoids mechanical wear and electrical performance degradation of connector contacts caused by frequent plugging and unplugging. At the same time, it eliminates the need for manual replacement of hard drives and waiting for the operating system to recognize them, which helps to improve the efficiency of backplane compatibility testing.

[0035] In one feasible implementation, the switching operation of the execution signal path may include steps A11 to A13: Step A11: Perform anti-collision protection to clear the signal state of the preceding protocol; It should be noted that anti-collision protection refers to a protection mechanism that prevents residual signals from preceding protocols from interfering with the establishment of the current protocol link during protocol switching. The preceding protocol refers to the protocol type that was in operation before this protocol switch.

[0036] Additionally, it should be noted that clearing the signal state of the preceding protocol means completely disconnecting the signal channel containing the preceding protocol, so that the residual charge and level state on the signal line can be completely released. When clearing the signal state of the preceding protocol, only the signal channel corresponding to the preceding protocol can be disconnected, or all signal channels can be disconnected; this embodiment does not specifically limit this.

[0037] Furthermore, implementing anti-collision protection may include the steps of: pulling the link reset signal low; and placing the high-speed differential signal channel on the target path in a high-impedance state.

[0038] It should be noted that the link reset signal is a control signal used to notify the backplane controller of a change in link status. The link reset signal is the PERST# signal; pulling this signal low notifies the backplane controller that the current link is about to be disconnected. When pulling the link reset signal low, only the link reset signal can be pulled low, or the link reset signal and other related control signals can be pulled low simultaneously; this embodiment does not impose specific limitations on this. The duration for which the link reset signal is pulled low can be set according to actual needs; for example, the duration can be set to be no less than 100ms, or it can be set to other durations; this embodiment does not impose specific limitations on this.

[0039] Additionally, it should be noted that the high-impedance state refers to the signal channel being in an electrically isolated state, neither driven to a high level nor a low level. By placing the high-speed differential signal channel in a high-impedance state, the transmission path of the preceding protocol signal can be cut off, preventing signal reflection from impacting the backplane controller. The high-speed differential signal channel can be placed in a high-impedance state only during the anti-collision protection phase, or it can be placed in a high-impedance state during the abnormal protection phase; this embodiment does not specifically limit this.

[0040] Understandably, because anti-collision protection was performed before the handover operation, the signal state of the preceding protocol was cleared, thus preventing the signal residue of the preceding protocol from interfering with the establishment of the current protocol link and ensuring that the link training after the handover can proceed normally.

[0041] Step A12: Switch to the target path corresponding to the protocol type; It should be noted that switching to the target path corresponding to the protocol type refers to switching the signal transmission channel of the first port from the current path to the path corresponding to the target protocol type through an electronic switch matrix. The electronic switch matrix is ​​composed of high-speed analog switches or multiplexer chips. High-speed analog switches or PCIe (Peripheral Component Interconnect Express) / SAS (Serial Attached SCSI) multiplexer chips can be used, and this embodiment does not make specific limitations on this.

[0042] When switching to the target path, the signal channel can be switched directly to the target path, or the current signal channel can be disconnected first and then the target path can be connected. This embodiment does not make a specific limitation in this regard. When routing the backplane physical link to the target path, the routing switch can be completed in one go, or the routing switch can be completed step by step according to the preset switch control sequence. This embodiment does not make a specific limitation in this regard.

[0043] In one feasible implementation, switching to the target path corresponding to the protocol type includes: routing the backplane physical link to the protocol emulation chip or second port socket corresponding to the protocol type according to the protocol type selection instruction. The second port is an interface on the adapter board used to connect a physical hard drive or leave it floating. The second port is a standard SFF-8639 female connector used to connect a physical hard drive or leave it floating. When the second port is floating, the adapter board internally routes the high-speed differential signal pairs from the backplane to the onboard terminal matching network via an electronic switch matrix, instead of leaving it floating directly.

[0044] Understandably, since the signal path switching is accomplished through an electronic switch matrix, the switching process does not require physical plugging and unplugging, thus avoiding mechanical wear of the connector contacts and improving testing efficiency.

[0045] Step A13 triggers the server backplane controller to restart the link initialization process; It should be noted that the link initialization process refers to the process by which the backplane controller, after detecting a device connection, interacts with the device to establish a link through physical layer interaction. The link initialization process differs for different protocol types. For example, the Non-Volatile Memory Standard Protocol (NVMC) enters the link training sequence by detecting the receiver's response; the Serial Connect Small Computer System Interface Protocol (SCSM) and Serial Advanced Technology Annex (SATTA) complete link negotiation and rate matching through out-of-band signal sequences. This embodiment does not limit the specific link initialization process for different protocol types, as long as it enables the backplane controller and the device to establish a link.

[0046] Triggering the server backplane controller to restart the link initialization process refers to notifying the backplane controller to restart the link establishment process via a control signal. In one feasible implementation, triggering the server backplane controller to restart the link initialization process includes: releasing the link reset signal, i.e., the link reset signal changes from low to high level, and the backplane controller re-initiates link initialization after detecting the release of the reset signal. The link reset signal can be released after both anti-collision protection and handover operations are completed, or it can be released after a preset time delay after the handover operation is completed. This embodiment does not specifically limit this. The preset time can be 10ms, 20ms, 50ms, or 100ms, and this embodiment does not specifically limit this.

[0047] When the server backplane controller is triggered to restart the link initialization process, the backplane controller executes the corresponding link initialization process according to the current protocol type. For example, if the current protocol type is the Non-Volatile Memory Standard Protocol, the backplane controller initiates a receiver detection process; if the current protocol type is the Serial Connect Small Computer System Interface Protocol or the Serial Advanced Technology Annex Protocol, the backplane controller initiates an out-of-band handshake process. This embodiment does not limit the specific way the backplane controller executes the link initialization process.

[0048] Understandably, the backplane controller is triggered to restart the link initialization process after the switching operation is completed, which enables the backplane controller to re-establish the link with the device side after the signal channel is switched to the target path, thereby ensuring that the current protocol can correctly complete the link establishment and status confirmation.

[0049] Furthermore, in response to the protocol type selection instruction, the method further includes: pulling down the presence detection signal and interface detection signal on the first port to simulate the physical state of the target device being inserted to the server backplane.

[0050] It should be noted that the presence detection signal is the PRSNT# signal, and the interface detection signal is the IFDET# signal. Both the PRSNT# and IFDET# signals are long pin signals with a "connect first, then disconnect" physical characteristic, used to realize hot-plug detection of the device. When the PRSNT# and IFDET# signals are pulled low, the server backplane detects the same voltage level as when a real hard drive is inserted, thus recognizing the adapter board as the inserted target device.

[0051] Additionally, it should be noted that the methods for pulling down the presence detection signal and the interface detection signal include: actively pulling them down using onboard pull-up resistors in conjunction with open-drain outputs, or pulling them down using a controllable drive circuit. This embodiment does not specifically limit this method. The presence detection signal and the interface detection signal can be actively pulled down only in analog mode, or the level of these two signals can be determined by the device connected to the second port in bypass pass-through mode. This embodiment does not specifically limit this method either.

[0052] Understandably, by lowering the in-situ detection signal and the interface detection signal, the backplane controller detects the same voltage level as when a real hard drive is inserted, thus recognizing the adapter board as the inserted target device and enhancing the realism of the simulation. Simultaneously, since protocol switching is accomplished by performing a signal path switching operation, physical plugging and unplugging of the real hard drive is unnecessary. This avoids mechanical wear and electrical performance degradation of connector contacts caused by frequent plugging and unplugging, and eliminates the need for manual hard drive replacement and waiting for operating system recognition, thereby improving the efficiency of backplane compatibility testing.

[0053] Step S20: Simulate the device-side behavior of the corresponding protocol type through the target path, perform link handshake and training operations to establish link state; It should be noted that simulating device-side behavior corresponding to the corresponding protocol type refers to generating a device-ready handshake signal for the corresponding protocol through a protocol simulation chip, enabling the backplane controller to recognize it as a physical hard drive connected to the corresponding protocol. The protocol simulation chip is an integrated circuit that integrates protocol physical layer simulation logic and link management simulation logic. The protocol simulation chip can be an application-specific integrated circuit (ASIC) or a field-programmable gate array (FPGA); this embodiment does not specifically limit this. Only one protocol simulation chip can be set on the adapter board, supporting the simulation of multiple protocols simultaneously; alternatively, multiple protocol simulation chips can be set on the adapter board, each supporting the simulation of one protocol; this embodiment does not specifically limit this either. The protocol simulation chip integrates physical layer simulation logic to simulate the physical layer electrical characteristics of the corresponding protocol, including signal transmission and reception, terminal matching, and out-of-band signal detection. When the protocol type is a non-volatile memory standard protocol, the protocol simulation chip is equipped with a link training state machine to execute the receiver's detection response and enter the link training sequence; when the protocol type is a serial connection small computer system interface protocol or a serial advanced technology annex protocol, the protocol simulation chip integrates an out-of-band signal detection circuit to detect and respond to the COMMINT (COMMunicationsINITiate) / COMMUNICES WAKE handshake sequence.

[0054] Additionally, it should be noted that link handshake and training operations refer to the process of establishing a link between the device and the backplane controller through physical layer signal interaction. The link handshake and training operations differ for different protocol types: the Non-Volatile Memory Standard Protocol (NVMC) enters the link training sequence by detecting the response at the receiving end, sequentially passing through the Polling and Configuration states before entering the L0 state; the Serial Connect Small Computer System Interface Protocol (SCSM) or Serial Advanced Technology Attachment Protocol (SATIPP) sends an out-of-band handshake sequence through the physical layer, responding to link negotiation and rate negotiation. This embodiment does not limit the specific link handshake and training operations corresponding to different protocol types. Link status refers to the status information after link training is completed, used to characterize whether the link between the backplane controller and the device has been successfully established. When link training is complete, the link status is "link established"; when link training fails, the link status is "link abnormal." The link status can be determined to be established only when link training is successful, or it can be determined to be abnormal when link training fails; this embodiment does not specifically limit this.

[0055] Understandably, since the device-ready handshake signal corresponding to the protocol is generated by the protocol simulation chip, the backplane controller can complete the link establishment without physical layer interaction with the real hard drive. Therefore, there is no need to store and maintain a library of real hard drives of various brands, capacities and firmware versions, thereby reducing the cost of hardware asset occupation and maintenance, and avoiding the cost of device replacement due to damage to the real hard drive interface.

[0056] In one feasible implementation, step S20 may include steps A21-A22: Step A21: If the protocol type is a non-volatile memory standard protocol, configure the link training state machine through the target path and send the receiver detection response to the server backplane to enter the link training sequence. It should be noted that the link training state machine refers to the logic circuitry within the protocol simulation chip that implements the link training state transitions. The link training state machine includes at least a Polling state, a Configuration state, and an L0 state, with transitions between states following the order specified by the non-volatile memory standard protocol. The link training state machine can be configured only in the non-volatile memory standard protocol mode, or different link training state machines can be configured in other protocol modes; this embodiment does not impose specific limitations on this. The receiver detection response refers to the response signal from the protocol simulation chip, simulating the response from the non-volatile memory standard device to the receiver detection process initiated by the backplane controller. By sending the receiver detection response, the backplane controller can detect the presence of the device and continue the subsequent link training process. When sending the receiver detection response, it can be sent only when the link training state machine is in the initial state, or it can be sent continuously throughout the entire link training process; this embodiment does not impose specific limitations on this.

[0057] Additionally, it should be noted that the link training sequence refers to the link establishment process specified in the non-volatile memory standard protocol. Specifically, the link training sequence includes the Polling state, Configuration state, and L0 state in sequence. The Polling state is the initial state of link training, used to detect whether the link exists; the Configuration state is the link configuration state, used to negotiate link parameters; and the L0 state is the link full-speed working state, indicating that the link has been successfully established. The link establishment can be determined only after the link training sequence is completed, or the link state can be determined gradually during the execution of the link training sequence; this embodiment does not specifically limit this.

[0058] Step A22: If the protocol type is Serial Connect Small Computer System Interface Protocol or Serial Advanced Technology Attachment Protocol, send an out-of-band handshake sequence to the server backplane through the physical layer of the target path in response to the link negotiation and rate negotiation of the server backplane. It should be noted that the out-of-band handshake sequence refers to the low-speed out-of-band signal sequence used for link negotiation in the Serial Connect Small Computer System Interface Protocol (SCSM) and Serial Advanced Technology Annex Protocol (SATIP). The out-of-band handshake sequence includes the COMINIT signal and the COMWAKE signal. The COMINIT signal is sent by the device to initiate link negotiation, and the COMWAKE signal is sent by the device to respond to a link wake-up request from the backplane. The COMINIT signal can be sent only at the start of link negotiation, or it can be sent multiple times throughout the link negotiation process; this embodiment does not impose specific limitations on this.

[0059] Additionally, it should be noted that link negotiation and rate negotiation refer to the link establishment process specified in the Serial Connect Small Computer System Interface Protocol (SCLP) and the Serial Advanced Technology Annex Protocol (SATIP). Link negotiation refers to the process by which the device and the backplane controller confirm the connection through an out-of-band handshake sequence, while rate negotiation refers to the process by which the device and the backplane controller negotiate and determine the data transmission rate. Both link negotiation and rate negotiation are completed through an out-of-band handshake sequence. Rate negotiation can be performed only after link negotiation is completed, or it can be performed simultaneously during link negotiation; this embodiment does not specifically limit this.

[0060] Understandably, since the backplane controller can establish a link without the need for out-of-band signal interaction from the actual hard drive, the link negotiation and rate negotiation can be completed by responding to the backplane's link negotiation and rate negotiation through an out-of-band handshake sequence, which further reduces testing costs and improves testing efficiency.

[0061] Step S30: Based on the link status, output a simulated status signal, wherein the simulated status signal corresponds to the simulated result of the compatibility test; It should be noted that the simulated status signal refers to the status indication signal used to characterize the link status and simulation results. It can be an electrical signal or an optical signal, and this embodiment does not specifically limit it. The simulated status signal can be presented by the lighting color and status of LED (Light Emitting Diode) indicator lights. For example, solid green indicates that the link has been established, flashing red indicates that the link is abnormal or there is an alarm, and yellow or orange indicates that protocol switching is in progress. This embodiment does not limit the specific presentation method of the simulated status signal.

[0062] Additionally, it should be noted that the simulation result refers to the conclusive result obtained through simulation regarding whether the link establishment was successful, such as indications like "link established, test can begin" or "link establishment failed." The simulation result can be determined based on the link status or the feedback signal from the protocol simulation chip; this embodiment does not specifically limit this.

[0063] Understandably, because the simulated status signal corresponding to the compatibility test simulation result is output based on the link status, testers or test systems can intuitively and quickly know the link establishment status, thereby completing the effective verification of backplane compatibility without connecting a real hard drive.

[0064] In one possible implementation, steps A41-A43 may be included after step S30: Step A41: Parse the power management commands sent by the server backplane for the corresponding protocol layer; It should be noted that power management commands refer to protocol-level commands sent by the backplane controller to control the power status of the target device. Different protocol types correspond to different power management commands. For example, the Non-Volatile Memory Standard Protocol corresponds to the Set Feature command, the Serial Advanced Technology Attachment Protocol corresponds to the Power Management Request (PMREQ), and the Serial Connect Small Computer System Interface Protocol corresponds to the Start Stop Unit command. Parsing power management commands refers to the protocol simulation chip receiving and identifying the type and parameters of the power management commands sent by the backplane controller.

[0065] Additionally, it should be noted that different protocol types correspond to different power management commands, specifically: When the protocol type is a serial connection small computer system interface protocol, the start / stop unit command is used to control the device to enter the sleep state, the read / write command is used to control the device to enter the active state, and the device enters the idle state when there is no input / output activity for more than a specified timeout. When the protocol type is Serial Advanced Technology Attachment Protocol, the idle or hibernation command is used to control the device to enter the sleep state, the direct memory access read / write command is used to control the device to enter the active state, and the device enters the idle state when there is no input / output activity. When the protocol type is a non-volatile memory standard protocol, the setting characteristic command or backplane power disable signal is used to control the device to enter sleep mode. When the high-speed peripheral interconnect link enters a low-power state, it enters idle mode. When the high-speed peripheral interconnect link is in full-speed mode, it enters active mode.

[0066] Step A42: According to the power management command, adjust the power consumption level of the electronic load to simulate the power consumption characteristics of the target device under different working conditions; It should be noted that an electronic load refers to a programmable load circuit used to simulate the power consumption characteristics of a target device. It includes a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) and a sampling resistor. The load current is controlled by adjusting the conduction level of the MOSFET, thereby simulating different power consumption levels. Power consumption levels refer to a classification used to characterize the power consumption level of the target device under different operating states, including at least sleep, idle, and active levels. Preferably, the power consumption levels of the power load simulation circuit can be set to the following numerical ranges: In the Serial Connected Small Computer System Interface Protocol (SCLP) simulation mode, the sleep level is 0.5W to 1.5W, the idle level is 2W to 4W, and the active level is 6W to 12W. In the Serial Advanced Technology Annex (SATTA) simulation mode, the sleep level is 0.3W to 1.0W, the idle level is 1W to 3W, and the active level is 4W to 8W. In the non-volatile memory standard protocol (NDRAM) simulation mode, the sleep level is 0.5W to 2W, the idle level is 2W to 5W, and the active level is 8W to 25W. The power consumption ranges for each of these levels are determined based on typical power consumption statistics of real hard drives under actual operating conditions. In practical applications, these ranges can be adjusted adaptively according to the target device model to be simulated; this application does not impose specific limitations on them.

[0067] Furthermore, regardless of the protocol mode, the power load simulation circuit is equipped with a hardware overcurrent protection threshold, with a default value of 15 amps. When the load current exceeds this threshold, the hardware protection circuit automatically disconnects the load circuit to prevent abnormally high power consumption from triggering the backplane power distribution unit's protection or damaging the adapter board itself. This hardware overcurrent protection threshold is independent of software or firmware control and automatically takes effect after the power load simulation circuit is powered on, thus achieving real-time protection.

[0068] Step A43: When the protocol type is switched, the power consumption level of the electronic load is switched to the idle level corresponding to the new protocol. It should be noted that the idle power level refers to the power consumption level of the target device when it is idle. Different protocol types correspond to different idle power levels. For example, the idle power level for the Non-Volatile Memory Standard Protocol (NVMT) is 2W~5W, for the Serial Connectivity Mini-System Interface (Serial MSI) protocol it is 2W~4W, and for the Serial Advanced Technology Annex (SATLI) protocol it is 1W~3W. When the protocol type is switched, the power consumption level of the electronic load is adjusted from the power consumption level of the previous protocol to the idle power level of the new protocol. For example, when switching from the Serial Connectivity Mini-System Interface (SNSI) protocol to the NNVMT protocol, the power consumption level of the electronic load is adjusted from the idle power level of the SNSI protocol (2W~4W) to the idle power level of the NNVMT protocol (2W~5W).

[0069] It is understandable that steps A41 and A42 above are the dynamic power consumption adjustment process after the link is established, and step A43 is the automatic power consumption level matching process when switching protocols. Together, they constitute the linkage mechanism between the power load simulation circuit and the protocol simulation chip, so that the adapter board can simulate the power consumption characteristics of a real hard drive while simulating protocol behavior.

[0070] This embodiment provides a simulation method for server backplane compatibility testing. First, in response to a protocol type selection command, a signal path switching operation is performed to route the signal from the first port to the target path corresponding to the protocol type. This replaces the physical plugging and unplugging action when replacing a physical hard drive with the signal path routing of an electronic switch matrix, avoiding mechanical wear of connector contacts caused by frequent plugging and unplugging. Based on this, the target path simulates the device-side behavior of the corresponding protocol type, performing link handshake and training operations to establish a link state. This replaces the physical layer interaction of the physical hard drive with device-side signals generated by the protocol simulation chip, enabling link establishment between the backplane and hard drives of different protocols without the need for physical insertion of a physical hard drive. Then, a simulated status signal is output based on the link state, where the simulated status signal corresponds to the simulation result of the compatibility test. This allows the backplane controller to obtain feedback on whether the link establishment was successful without the need for a physical hard drive, thus effectively verifying backplane compatibility.

[0071] In summary, this embodiment combines signal path switching operations with device-side behavior simulation operations to achieve link establishment and compatibility testing between the backplane and hard drives with different protocols without physical plugging and unplugging. This overcomes the technical deficiency of relying on physical plugging and unplugging of real hard drives to perform efficient compatibility testing of the backplane, avoids mechanical wear and electrical performance degradation of the backplane interface, reduces hardware asset occupation and maintenance costs, and improves the efficiency of backplane compatibility testing.

[0072] Based on the first embodiment of this application, in the second embodiment of this application, the content that is the same as or similar to that in Embodiment 1 above can be referred to the above description, and will not be repeated hereafter. Based on this, please refer to... Figure 2 The simulation method for server backplane compatibility testing further includes steps S01 to S03: Step S01: Monitor the presence detection signal of the first port; It should be noted that the presence detection signal is the PRSNT# signal, used to indicate whether the adapter board is physically inserted into the server backplane socket. The PRSNT# signal is a long pin signal with a "connect first, disconnect later" physical characteristic; the signal is pulled low when physically inserted and returns to a high level when physically removed. Only the PRSNT# signal can be monitored, or both the PRSNT# and IFDET# signals can be monitored simultaneously; this embodiment does not specifically limit this. Furthermore, an RC (Resistor-Capacitor) filter network is set on the path between the presence detection signal and the interface detection signal, with a resistance value of 1 kΩ, a capacitance value of 0.1 μF, and a time constant of approximately 100 μs, to filter out instantaneous level jitter caused by mechanical vibration and prevent false alarms.

[0073] Additionally, it should be noted that the presence detection signal is monitored by the onboard MCU (Microcontroller Unit) / CPLD (Complex Programmable Logic Device). The MCU / CPLD reads the level of the PRSNT# signal through the general-purpose input / output interface. When the signal is low, it is determined to be in the presence state; when the signal transitions from low to high, it is determined to be in the off state.

[0074] Step S02: When the presence detection signal indicates that the first port is physically disconnected from the server backplane, disconnect all signal channels and put the signal lines into a high-impedance state, stop performing the simulation operation, and output an abnormal indication signal. It should be noted that physical disconnection refers to the in-situ detection signal changing from low to high, indicating that the adapter board has been removed from the backplane socket. Disconnecting all signal channels means that the electronic switch matrix cuts off the electrical connection of all high-speed differential signal channels. High impedance state means that the signal channel is in an electrically isolated state, neither driven to high nor low level. By placing the signal line in a high impedance state, signal reflection can be avoided from impacting the backplane controller. Stopping simulation operation means that the protocol simulation chip stops generating the device ready handshake signal and exits the simulation mode. The abnormality indication signal is used to indicate to the tester that there is an abnormal state. It can trigger the LED indicator to flash red to indicate the abnormality. This embodiment does not specifically limit this.

[0075] Additionally, it should be noted that the aforementioned actions of disconnecting all signal channels, putting the signal lines into a high-impedance state, stopping analog operations, and outputting an abnormal indication signal are multiple protection actions executed in parallel. These multiple protection actions can be executed simultaneously or sequentially according to a preset order; this embodiment does not impose a specific limitation on this. In one feasible implementation, upon detecting a physical disconnection, the internal control logic automatically executes the aforementioned multiple protection actions within 10ms.

[0076] Step S03: Monitor the power supply voltage. When the power supply voltage exceeds the rated range, cut off the power supply and enter the protection latch state. It should be noted that the supply voltage refers to the power supply voltage provided by the server backplane to the adapter board through the first port. The supply voltage includes two voltage ranges: +12V and +3.3V. +12V is used to drive the electronic switch matrix and power load analog circuitry, while +3.3V is used to drive the protocol analog chip and control logic. The rated range refers to the normal operating range of the supply voltage. For example, the rated range for +12V is +12V ± 10% (i.e., 10.8V to 13.2V), and the rated range for +3.3V is +3.3V ± 5% (i.e., 3.135V to 3.465V). Only the +12V supply voltage can be monitored, or both +12V and +3.3V can be monitored simultaneously; this embodiment does not specifically limit this.

[0077] Additionally, it should be noted that the protection latch-up state refers to the circuit remaining in a disconnected state after detecting a power supply abnormality, requiring a power-on reset to restore operation. Overvoltage protection can be achieved through a TVS diode array or other overvoltage protection circuits during power disconnection; this embodiment does not specifically limit the implementation of such protection.

[0078] Understandably, automatically disconnecting the signal channel and placing the signal line in a high-impedance state upon detecting a physical disconnection prevents signal reflection from impacting the backplane controller; stopping analog operations and outputting an abnormality indication signal prevents damage to the adapter board itself due to abnormal conditions and alerts testers to the current anomaly; and automatically cutting off power and entering a protection latch state when the supply voltage exceeds the rated range prevents overvoltage or undervoltage from damaging the internal circuitry of the adapter board. These anomaly detection and protection mechanisms collectively ensure the safety and reliability of the adapter board under abnormal conditions.

[0079] Based on the first and second embodiments of this application, the same or similar content as the above embodiments in this third embodiment can be referred to the above description and will not be repeated hereafter. This embodiment mainly describes the terminal matching processing method when the second port is floating. Please refer to... Figure 3The terminal matching processing method when the second port is floating includes steps B10 to B40: Step B10: When the second port is floating, route the high-speed differential signal pair at the backplane end to the onboard terminal matching network. It should be noted that the second port is a standard female interface connector, used to connect a physical hard drive or leave it floating. When the second port is floating, the adapter board internally uses an electronic switch matrix to route the high-speed differential signal pairs from the backplane to the onboard terminal matching network, instead of leaving it floating directly.

[0080] Step B20: If the current protocol type is a non-volatile memory standard protocol, switch the high-speed differential pair to the onboard 100-ohm differential terminating resistor. It should be noted that the 100-ohm differential terminating resistor has an accuracy of ±1% and is used to simulate the impedance matching of the receiver end of the high-speed peripheral component interconnect device, enabling the backplane controller to complete the receiver detection process and enter the link training state normally. This terminating resistor is dynamically controlled by the protocol simulation chip to connect and disconnect, and is only enabled in simulation mode.

[0081] Step B30: If the current protocol type is Serial Connect Small Computer System Interface Protocol or Serial Advanced Technology Attachment Protocol, switch the high-speed signal pair to the physical layer input of the protocol analog chip. It should be noted that the protocol simulation chip integrates an out-of-band signal detection circuit and a termination matching network. The impedance of the termination matching network is 100 ohms differential, which can respond to the COMINIT / COMWAKE handshake sequence initiated by the backplane.

[0082] Step B40: If the current protocol type is bypass pass-through mode, the high-speed signal at the backplane end will be directly routed to the second port motherboard. It should be noted that in bypass pass-through mode, if the second port is connected to a real hard drive, the hard drive will provide the termination matching; if the second port is left unconnected, the high-speed signal line will be in an unterminated state, and the backplane controller will detect a link abnormality, such as failure of high-speed peripheral component interconnection receiver detection. This state is used to verify the backplane's error handling capability for empty slots.

[0083] It should be noted that steps B20, B30 and B40 are three parallel implementation methods. In actual applications, one of them should be executed according to the protocol type indicated by the protocol type selection instruction.

[0084] Additionally, it should be noted that the terminal matching process in this embodiment coordinates with the signal path switching operation in the aforementioned embodiments. During protocol switching, the electronic switch matrix first performs anti-collision protection, disconnecting the current signal channel and putting the signal line into a high-impedance state. Then, according to the target protocol type, it executes the corresponding steps in steps B20, B30, or B40 to route the signal to the corresponding terminal matching network. After routing is completed, the link reset signal is released, triggering the backplane controller to restart the link initialization process.

[0085] Understandably, when the second port is left floating, by routing the high-speed differential signal to the physical layer input of the onboard terminal matching network or protocol simulation chip, the adapter board can provide a complete terminal matching and signal interaction environment for the backplane controller without connecting a real hard drive. This enables backplane compatibility testing without a hard drive, avoids interface wear caused by frequent plugging and unplugging of real hard drives, and reduces the cost of testing equipment.

[0086] The protocol simulation logic core of the protocol simulation chip in this application is not limited to application-specific integrated circuit (ASIC) fixed-function chips. In one feasible implementation, a field-programmable gate array (FPGA) can be used to replace the ASIC to implement the protocol simulation function.

[0087] Specifically, different logic IP cores, such as serial connection small computer system interface protocol initiator IP cores and non-volatile memory standard protocol solid-state drive controller IP cores, are programmed into the field programmable gate array to simulate the device-side behavior of the corresponding protocols.

[0088] Field-programmable gate arrays (FPGAs) offer greater flexibility by enabling firmware upgrades to adapt to future protocol versions and allowing for precise simulation of arbitrary latency and error injection by hard drives through software configuration. However, FPGAs typically consume 3 to 5 watts, higher than the milliwatt-level power consumption of application-specific integrated circuit (ASIC) solutions. In practical implementation, a trade-off between flexibility and power consumption should be struck based on the specific application scenario.

[0089] This application also provides a simulation device for server backplane compatibility testing; please refer to [reference needed]. Figure 4 The simulation device for server backplane compatibility testing includes: The switching module 10 is used to perform a signal path switching operation in response to a protocol type selection command, so as to route the signal of the first port to the target path corresponding to the protocol type; The simulation module 20 is used to simulate the device-side behavior of the corresponding protocol type through the target path, perform link handshake and training operations, and establish link state; The output module 30 is used to output a simulated status signal based on the link status, wherein the simulated status signal corresponds to the simulated result of the compatibility test.

[0090] In one embodiment, the switching module 10 is further configured to perform anti-collision protection to clear the signal state of the preceding protocol; Switch to the target path corresponding to the protocol type; Trigger the server backplane controller to restart the link initialization process.

[0091] In one embodiment, the switching module 10 is also used to pull the link reset signal low; Place the high-speed differential signal channel on the target path into a high-impedance state.

[0092] In one embodiment, the simulation module 20 is further configured to, if the protocol type is a non-volatile memory standard protocol, configure the link training state machine through the target path and send a receiver detection response to the server backplane to enter the link training sequence. If the protocol type is Serial Connect Small Computer System Interface Protocol or Serial Advanced Technology Annex Protocol, an out-of-band handshake sequence is sent to the server backplane through the physical layer of the target path in response to the link negotiation and rate negotiation of the server backplane.

[0093] In one embodiment, the output module 30 is further configured to parse the power management commands corresponding to the protocol layer sent by the server backplane; According to the power management command, adjust the power consumption level of the electronic load to simulate the power consumption characteristics of the target device under different operating conditions. When the protocol type is switched, the power consumption level of the electronic load is switched to the idle level corresponding to the new protocol.

[0094] In one embodiment, the simulation device for server backplane compatibility testing further includes: real-time monitoring of the presence detection signal of the first port; When the presence detection signal indicates that the first port is physically disconnected from the server backplane, all signal channels are disconnected and the signal lines are put into a high-impedance state, the simulation operation is stopped, and an abnormal indication signal is output. The system monitors the power supply voltage. When the power supply voltage exceeds the rated range, the power supply is cut off and the system enters a protection latch state.

[0095] In one embodiment, the simulation device for server backplane compatibility testing further includes: in response to the protocol type selection instruction, pulling down the presence detection signal and the interface detection signal on the first port to simulate the physical state of the target device being inserted into the server backplane.

[0096] The server backplane compatibility testing simulation device provided in this application, employing the server backplane compatibility testing simulation method in the above embodiments, can solve the technical problem of how to establish a link between the backplane controller and hard drives with different protocols without frequent physical plugging and unplugging. Compared with the prior art, the beneficial effects of the server backplane compatibility testing simulation device provided in this application are the same as those of the server backplane compatibility testing simulation method provided in the above embodiments, and other technical features in the server backplane compatibility testing simulation device are the same as those disclosed in the methods of the above embodiments, and will not be repeated here.

[0097] This application provides a simulation device for server backplane compatibility testing. The simulation device includes: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the simulation method for server backplane compatibility testing in Embodiment 1 above.

[0098] The following is for reference. Figure 5 The diagram illustrates a structural schematic of a simulation device suitable for implementing server backplane compatibility testing according to embodiments of this application. The simulation device for server backplane compatibility testing in these embodiments may include, but is not limited to, mobile terminals such as mobile phones, laptops, digital broadcast receivers, PDAs (Personal Digital Assistants), tablets, PMPs (Portable Media Players), and in-vehicle terminals (e.g., in-vehicle navigation terminals), as well as fixed terminals such as digital TVs and desktop computers. Figure 5 The simulated device for server backplane compatibility testing shown is merely an example and should not impose any limitations on the functionality and scope of use of the embodiments of this application.

[0099] like Figure 5As shown, the simulation device for server backplane compatibility testing may include a processing unit 1001 (e.g., a central processing unit, a graphics processing unit, etc.), which can perform various appropriate actions and processes according to a program stored in read-only memory (ROM) 1002 or a program loaded from storage device 1003 into random access memory (RAM) 1004. RAM 1004 also stores various programs and data required for the operation of the simulation device for server backplane compatibility testing. The processing unit 1001, ROM 1002, and RAM 1004 are interconnected via bus 1005. I / O interface 1006 is also connected to the bus. Typically, the following systems can be connected to I / O interface 1006: input devices 1007 including, for example, touchscreens, touchpads, keyboards, mice, image sensors, microphones, accelerometers, gyroscopes, etc.; output devices 1008 including, for example, liquid crystal displays (LCDs), speakers, vibrators, etc.; storage devices 1003 including, for example, magnetic tapes, hard disks, etc.; and communication devices 1009. Communication device 1009 allows the simulated equipment for server backplane compatibility testing to communicate wirelessly or wiredly with other devices to exchange data. While the figure shows simulated equipment for server backplane compatibility testing with various systems, it should be understood that implementation or possession of all the systems shown is not required. More or fewer systems may be implemented alternatively.

[0100] Specifically, according to the embodiments disclosed in this application, the processes described above with reference to the flowcharts can be implemented as computer software programs. For example, embodiments disclosed in this application include a computer program product comprising a computer program carried on a computer-readable medium, the computer program containing program code for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network via a communication device, or installed from storage device 1003, or installed from ROM 1002. When the computer program is executed by processing device 1001, it performs the functions defined in the methods of the embodiments disclosed in this application.

[0101] The server backplane compatibility testing simulation device provided in this application, employing the server backplane compatibility testing simulation method in the above embodiments, can solve the technical problem of establishing a link between the backplane controller and hard drives with different protocols without frequent physical plugging and unplugging. Compared with the prior art, the beneficial effects of the server backplane compatibility testing simulation device provided in this application are the same as those of the server backplane compatibility testing simulation method provided in the above embodiments, and other technical features in this server backplane compatibility testing simulation device are the same as those disclosed in the previous embodiment method, and will not be repeated here.

[0102] It should be understood that the various parts disclosed in this application can be implemented using hardware, software, firmware, or a combination thereof. In the description of the above embodiments, specific features, structures, materials, or characteristics can be combined in any suitable manner in one or more embodiments or examples.

[0103] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

[0104] This application provides a computer-readable storage medium having computer-readable program instructions (i.e., a computer program) stored thereon, the computer-readable program instructions being used to perform the simulation method for server backplane compatibility testing in the above embodiments.

[0105] The computer-readable storage medium provided in this application may be, for example, a USB flash drive, but is not limited to, electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices, or any combination thereof. More specific examples of computer-readable storage media may include, but are not limited to: electrical connections having one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof. In this embodiment, the computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, system, or device. The program code contained on the computer-readable storage medium may be transmitted using any suitable medium, including but not limited to: wires, optical cables, RF (Radio Frequency), etc., or any suitable combination thereof.

[0106] The aforementioned computer-readable storage medium may be included in the simulation device for server backplane compatibility testing; or it may exist independently and not be assembled into the simulation device for server backplane compatibility testing.

[0107] The aforementioned computer-readable storage medium carries one or more programs that, when executed by a simulation device for server backplane compatibility testing, cause the simulation device for server backplane compatibility testing to: respond to a protocol type selection instruction, perform a signal path switching operation to route the signal of the first port to a target path corresponding to the protocol type; simulate device-side behavior of the corresponding protocol type through the target path, perform link handshake and training operations to establish a link state; and output a simulated state signal based on the link state, wherein the simulated state signal corresponds to the simulation result of the compatibility test.

[0108] Computer program code for performing the operations of this application can be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, and C++, and conventional procedural programming languages ​​such as the "C" language or similar programming languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving remote computers, the remote computer can be connected to the user's computer via any type of network—including a Local Area Network (LAN) or a Wide Area Network (WAN)—or can be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0109] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of this application. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.

[0110] The modules described in the embodiments of this application can be implemented in software or hardware. The names of the modules do not necessarily limit the functionality of the unit itself.

[0111] The readable storage medium provided in this application is a computer-readable storage medium that stores computer-readable program instructions (i.e., a computer program) for performing the simulation method of the above-described server backplane compatibility test. This solves the technical problem of establishing a link between the backplane controller and hard drives using different protocols without frequent physical plugging and unplugging. Compared with the prior art, the beneficial effects of the computer-readable storage medium provided in this application are the same as those of the simulation method for server backplane compatibility testing provided in the above embodiments, and will not be repeated here.

[0112] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the steps of the simulation method for server backplane compatibility testing as described above.

[0113] The computer program product provided in this application solves the technical problem of establishing a link between the backplane controller and hard drives with different protocols without frequent physical plugging and unplugging. Compared with the prior art, the beneficial effects of the computer program product provided in this application are the same as those of the server backplane compatibility testing simulation method provided in the above embodiments, and will not be repeated here.

[0114] The above description is only a part of the embodiments of this application and does not limit the patent scope of this application. All equivalent structural transformations made under the technical concept of this application and using the contents of the specification and drawings of this application, or direct / indirect applications in other related technical fields, are included in the patent protection scope of this application.

Claims

1. A simulation method for server backplane compatibility testing, characterized in that, The method includes: In response to the protocol type selection command, a signal path switching operation is performed to route the signal of the first port to the target path corresponding to the protocol type; By simulating the device-side behavior of the corresponding protocol type through the target path, link handshake and training operations are performed to establish the link state; Based on the link status, a simulated status signal is output, wherein the simulated status signal corresponds to the simulated result of the compatibility test.

2. The simulation method for server backplane compatibility testing as described in claim 1, characterized in that, The steps for performing the signal path switching operation include: Implement anti-collision protection to clear the signal state of the preceding protocol; Switch to the target path corresponding to the protocol type; Trigger the server backplane controller to restart the link initialization process.

3. The simulation method for server backplane compatibility testing as described in claim 2, characterized in that, The steps for implementing anti-collision protection include: Pull the link reset signal low; Place the high-speed differential signal channel on the target path into a high-impedance state.

4. The simulation method for server backplane compatibility testing as described in claim 1, characterized in that, The step of simulating device-side behavior of the corresponding protocol type through the target path, performing link handshake and training operations to establish link state includes: If the protocol type is a non-volatile memory standard protocol, the link training state machine is configured through the target path, and a receiver detection response is sent to the server backplane to enter the link training sequence. If the protocol type is Serial Connect Small Computer System Interface Protocol or Serial Advanced Technology Annex Protocol, an out-of-band handshake sequence is sent to the server backplane through the physical layer of the target path in response to the link negotiation and rate negotiation of the server backplane.

5. The simulation method for server backplane compatibility testing as described in claim 1, characterized in that, After the step of outputting a simulated status signal based on the link status, the method further includes: Parse the power management commands sent by the server backplane for the corresponding protocol layer; According to the power management command, adjust the power consumption level of the electronic load to simulate the power consumption characteristics of the target device under different operating conditions. When the protocol type is switched, the power consumption level of the electronic load is switched to the idle level corresponding to the new protocol.

6. The simulation method for server backplane compatibility testing as described in any one of claims 1 to 5, characterized in that, The method further includes: Monitor the presence detection signal of the first port; When the presence detection signal indicates that the first port is physically disconnected from the server backplane, all signal channels are disconnected and the signal lines are put into a high-impedance state, the simulation operation is stopped, and an abnormal indication signal is output. The system monitors the power supply voltage. When the power supply voltage exceeds the rated range, the power supply is cut off and the system enters a protection latch state.

7. The simulation method for server backplane compatibility testing as described in any one of claims 1 to 5, characterized in that, The method further includes: In response to the protocol type selection instruction, the presence detection signal and interface detection signal on the first port are pulled low to simulate the physical state of the target device being inserted to the server backplane.

8. A simulation device for server backplane compatibility testing, characterized in that, The device includes: The switching module is used to perform a signal path switching operation in response to a protocol type selection command, so as to route the signal of the first port to the target path corresponding to the protocol type; The simulation module is used to simulate the device-side behavior of the corresponding protocol type through the target path, perform link handshake and training operations, and establish link status; The output module is used to output a simulated status signal based on the link status, wherein the simulated status signal corresponds to the simulated result of the compatibility test.

9. A simulation device for server backplane compatibility testing, characterized in that, The device includes: a memory, a processor, and a computer program stored in the memory and executable on the processor, the computer program being configured to implement the steps of a simulation method for server backplane compatibility testing as claimed in any one of claims 1 to 7.

10. A storage medium, characterized in that, The storage medium is a computer-readable storage medium, and a computer program is stored on the storage medium. When the computer program is executed by a processor, it implements the steps of the simulation method for server backplane compatibility testing as described in any one of claims 1 to 7.

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