Method for generating resistance wire path in ceramic heating disc, ceramic heating disc and electronic device

CN122818969APending Publication Date: 2026-09-25JIASHAN FUDAN RESEARCH INSTITUTE
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Patent Information

Application Number
CN202611230528.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-08-14
Publication Date
2026-09-25

AI Technical Summary

Technical Problem

[0005]为了解决现有技术中的陶瓷加热盘表面温度均匀性较差的技术问题,本发明提供一种陶瓷加热盘中电阻丝路径的生成方法、陶瓷加热盘及电子设备

Benefits of technology

由于本发明技术方案中的目标候选电阻丝路径参数方案是通过调用所述代理热模型预测每组候选电阻丝路径参数方案对应的加热盘表面温度分布场数据,基于所述优化目标和所述设计约束条件从所述代理热模型的预测结果中确定的,且还对目标候选电阻丝路径参数方案对应的加热盘表面温度分布场数据进行了热电耦合仿真,仿真得到的加热盘表面温度分布场数据是满足预设的温度均匀性要求的。因此,利用该目标候选电阻丝路径参数方案设计目标加热盘中的电阻丝的路径,那么该最终设计得到的目标加热盘表面的温度分布是满足预设的温度均匀性要求的,从而解决了现有技术中陶瓷加热盘表面温度均匀性较差的技术问题。

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Abstract

The present application relates to a kind of ceramic heating disc in resistance wire path generation method, ceramic heating disc and electronic equipment.The generation method includes: the parameterized representation of resistance wire path is determined, and the value range of resistance wire design parameter under parameterized representation;Simulation obtains the heating disc surface temperature distribution field data corresponding to each group of resistance wire path parameter scheme;Based on the initial simulation database, the proxy thermal model is obtained by training the set depth learning model;Call proxy thermal model to predict the heating disc surface temperature distribution field data corresponding to each group of candidate resistance wire path parameter scheme, determine target candidate resistance wire path parameter scheme from the prediction result;In the case where the heating disc surface temperature distribution field data corresponding to target candidate resistance wire path parameter scheme meets the preset temperature uniformity requirement, resistance wire path in target heating disc is generated using target candidate resistance wire path parameter scheme.The technical scheme of the present application can improve the ceramic heating disc surface temperature uniformity.
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Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing equipment technology, specifically to a method for generating resistance wire paths in a ceramic heating plate, the ceramic heating plate, and electronic equipment. Background Technology

[0002] Ceramic heating plates are indispensable core components in modern semiconductor manufacturing. They are typically formed by hot-pressing and sintering a ceramic substrate with an embedded resistance heating wire, providing a precise, uniform, and stable high-temperature environment for critical processes such as etching, thin film deposition, annealing, and bonding. Advanced processes, exemplified by 300mm wafers, place extremely stringent requirements on the temperature uniformity of the heating plate. For example, within the operating temperature range of 400~600℃, the temperature difference within the heating surface must be controlled within ±1℃; otherwise, it will directly lead to problems such as uneven film thickness, differences in etching rates, and uneven stress distribution, seriously affecting chip yield and performance.

[0003] The temperature uniformity of a ceramic heating plate mainly depends on the thermophysical properties of the substrate material and its spatial distribution uniformity, as well as the planar geometric path layout of the resistance wire within the substrate. Among these factors, the planar geometric path of the resistance wire (hereinafter referred to as the resistance wire path) is the primary factor determining the heat flux density distribution on the heating surface of the ceramic heating plate.

[0004] In relevant technical solutions, such as Figure 1 As shown, the resistance wire path design relies on manual drawing by engineers, following geometric rules such as concentric circles and spirals, and is then verified through finite element simulation, with manual iterative adjustments made based on the simulation results. However, this regularized path design scheme cannot effectively compensate for the asymmetric temperature distribution caused by non-uniform thermal boundary conditions such as edge heat dissipation and spatial differences in material thermal conductivity, resulting in poor temperature uniformity on the surface of the ceramic heating plate, which cannot meet the increasingly stringent temperature uniformity requirements of advanced processes. Summary of the Invention

[0005] To address the technical problem of poor surface temperature uniformity in existing ceramic heating plates, this invention provides a method for generating resistance wire paths in a ceramic heating plate, a ceramic heating plate, and an electronic device.

[0006] Since the target candidate resistance wire path parameter scheme in the technical solution of this invention is determined from the prediction results of the proxy thermal model based on the optimization objective and the design constraints, and thermoelectric coupling simulation is also performed on the heating plate surface temperature distribution field data corresponding to the target candidate resistance wire path parameter scheme, the simulated heating plate surface temperature distribution field data meets the preset temperature uniformity requirements. Therefore, by using the target candidate resistance wire path parameter scheme to generate the path of the resistance wire in the target heating plate, the temperature distribution of the final designed target heating plate surface meets the preset temperature uniformity requirements, thereby solving the technical problem of poor surface temperature uniformity of ceramic heating plates in the prior art.

[0007] According to a first aspect of the present invention, a method for generating a resistance wire path in a ceramic heating plate is provided, the method comprising: The parameterized representation of the resistance wire path and the range of values ​​for the resistance wire design parameters under the parameterized representation are determined in order to construct the parameter design space of the resistance wire path. Multiple sets of resistance wire path parameter schemes are sampled and generated within the parameter design space. Thermoelectric coupling simulation is performed on each set of resistance wire path parameter schemes to obtain the heating plate surface temperature distribution field data corresponding to each set of resistance wire path parameter schemes. An initial simulation database is constructed based on each set of resistance wire path parameter schemes and the corresponding heating plate surface temperature distribution field data. The proxy heat model is obtained by training the set deep learning model based on the initial simulation database; Determine the optimization objective of the target heating plate and the design constraints of the resistance wire path in the target heating plate; The set optimization algorithm generates multiple sets of candidate resistance wire path parameter schemes in the parameter design space. The proxy thermal model is called to predict the heating plate surface temperature distribution field data corresponding to each set of candidate resistance wire path parameter schemes. Based on the optimization objective and the design constraints, the target candidate resistance wire path parameter scheme is determined from the prediction results of the proxy thermal model. The thermoelectric coupling simulation was performed on the target candidate resistance wire path parameter scheme to obtain the heating plate surface temperature distribution field data corresponding to the target candidate resistance wire path parameter scheme. If the surface temperature distribution data of the heating plate corresponding to the target candidate resistance wire path parameter scheme meets the preset temperature uniformity requirements, the resistance wire path in the target heating plate is generated using the target candidate resistance wire path parameter scheme.

[0008] In one possible implementation of the first aspect, the design parameters include at least one of the following: pitch, length of the busbar, length of the helix, and resistance value, respectively corresponding to each segment of the resistance wire.

[0009] In this way, precise control of the resistance wire path can be achieved by adjusting these design parameters, providing clear adjustable variables for sampling and generating multiple resistance wire path parameter schemes in the parameter design space. This helps improve the learning accuracy of the surrogate thermal model in the mapping relationship between the resistance wire path parameter schemes and the temperature distribution field data on the surface of the heating plate.

[0010] In one possible implementation of the first aspect, when the design parameters include the pitch corresponding to each busbar segment of the resistance wire, multiple sets of resistance wire path parameter schemes are sampled and generated within the parameter design space, including: Within the parameter design space, multiple sets of resistance wire path parameter schemes are generated by sampling and changing the pitch ratio of each busbar segment using the Latin hypercube method, random mutation method, or orthogonal experimental design method.

[0011] By changing the pitch ratio of each busbar segment, multiple sets of resistance wire path parameter schemes are generated through sampling. This ensures that the samples in the initial simulation database fully cover different combinations of the pitch of each busbar segment within the parameter design space. Consequently, the surrogate thermal model can fully learn the mapping relationship between the resistance wire path parameter schemes and the surface temperature distribution data of the heating plate under different pitch ratios, which helps to improve the prediction accuracy of the surrogate thermal model for the surface temperature distribution data of the heating plate under different pitch ratios.

[0012] In one possible implementation of the first aspect, the defined deep learning model includes a convolutional neural network model with an encoder-decoder structure, and a proxy hot model is trained based on the initial simulation database, comprising: The resistance wire path parameter scheme in the initial simulation database is used as the input of the convolutional neural network model, and the heating plate surface temperature distribution field data corresponding to the resistance wire path parameter scheme in the initial simulation database is used as the output of the convolutional neural network model to train the convolutional neural network model. Once the temperature prediction accuracy of the convolutional neural network model has been trained to meet the set accuracy requirements, the training of the convolutional neural network model is considered complete, and the surrogate thermal model is obtained.

[0013] In this way, the convolutional neural network model can learn the mapping relationship between the resistance wire path parameter scheme and the temperature distribution field data end-to-end. After the temperature prediction accuracy is trained to meet the set accuracy requirements, the resulting surrogate thermal model can accurately predict the heating plate surface temperature distribution field data corresponding to each group of candidate resistance wire path parameter schemes, thereby ensuring the effectiveness of the target candidate resistance wire path parameter schemes determined based on the prediction results of the surrogate thermal model.

[0014] In one possible implementation of the first aspect, determining the target candidate resistance wire path parameter scheme from the prediction results of the surrogate thermal model based on the optimization objective and the design constraints includes: The prediction results of the surrogate thermal model are evaluated based on the optimization objective and the design constraints. Based on the evaluation results, a target candidate resistance wire path parameter scheme that satisfies the optimization objective and the design constraints is determined from the multiple sets of candidate resistance wire path parameter schemes.

[0015] It is understandable that the target candidate resistance wire path parameter scheme was selected based on temperature uniformity and design feasibility, thereby further ensuring that the temperature distribution field data of the heating plate surface obtained by subsequent thermoelectric coupling simulation can meet the preset temperature uniformity requirements.

[0016] In one possible implementation of the first aspect, the design constraints include at least one of constraints on the total length of the resistance wire in the target heating plate, a minimum bending radius, and the planar geometric topology of the resistance wire path.

[0017] In this way, during the process of determining the target candidate resistance wire path parameter scheme, manufacturing difficulties or performance degradation caused by excessive total resistance wire length, excessively small bending radius, or self-intersection of resistance wire path can be avoided, thereby ensuring that the final generated resistance wire path has good manufacturability and reliability.

[0018] In one possible implementation of the first aspect, the optimization objective is to minimize the sum of the absolute values ​​of the deviations between the temperatures at each point within the effective working area of ​​the target heating plate and the target temperature.

[0019] Since the optimization objective is to minimize the sum of the absolute values ​​of the temperature deviations between each point in the effective working area of ​​the target heating plate and the target temperature, the entire optimization process aims at the temperature uniformity within the effective working area of ​​the target heating plate. This ensures that the final determined target candidate resistance wire path parameter scheme can make the temperature at each point in the effective working area of ​​the heating plate as close as possible to the target temperature, thereby improving the surface temperature uniformity of the heating plate.

[0020] In one possible implementation of the first aspect, the method further includes: If the surface temperature distribution data of the heating plate corresponding to the target candidate resistance wire path parameter scheme does not meet the preset temperature uniformity requirement, the target candidate resistance wire path parameter scheme and the corresponding surface temperature distribution data of the heating plate are stored in the initial simulation database to obtain the updated simulation database. The updated surrogate thermal model is obtained by incrementally fine-tuning the surrogate thermal model using the updated simulation database.

[0021] Therefore, the proxy thermal model can adjust the model parameters based on the results of this verification, providing more accurate prediction results in subsequent optimization processes, thereby forming a closed-loop optimization mechanism and further improving the success rate of resistance wire path optimization.

[0022] According to a second aspect of the present invention, a ceramic heating plate is provided, comprising a ceramic substrate and a resistance wire disposed therein, wherein the path of the resistance wire is generated by the method described in the first aspect and any possible implementation thereof.

[0023] Because the path of the resistance wire in the ceramic heating plate is generated using the method described in the first aspect and any possible implementation thereof, the resistance wire enables the surface temperature distribution data of the heating plate to meet the preset temperature uniformity requirements. Therefore, the ceramic heating plate exhibits high surface temperature uniformity, meeting the stringent requirements of advanced processes for surface temperature uniformity, thereby reducing problems such as uneven film thickness and etching rate differences caused by temperature inhomogeneity, and improving chip yield and performance.

[0024] According to a third aspect of the present invention, an electronic device is provided, including a memory and a processor, the memory being configured to store a computer program executable by the processor; the processor being configured to execute the computer program in the memory to implement the method as described in the first aspect and any possible implementation thereof.

[0025] Compared with the prior art, the beneficial effects of the present invention are as follows: Since the target candidate resistance wire path parameter scheme in the technical solution of this invention is determined from the prediction results of the proxy thermal model based on the optimization objective and the design constraints, and thermoelectric coupling simulation is also performed on the heating plate surface temperature distribution field data corresponding to the target candidate resistance wire path parameter scheme, the simulated heating plate surface temperature distribution field data meets the preset temperature uniformity requirements. Therefore, by using this target candidate resistance wire path parameter scheme to design the path of the resistance wire in the target heating plate, the temperature distribution on the surface of the final designed target heating plate meets the preset temperature uniformity requirements, thus solving the technical problem of poor surface temperature uniformity of ceramic heating plates in the prior art.

[0026] Furthermore, the determination of target candidate resistance wire path parameter schemes is achieved by calling a proxy thermal model to predict the temperature distribution field on the heating plate surface and then determining the parameters from the prediction results. Therefore, it eliminates the need to perform a complete thermoelectric coupling simulation on each candidate resistance wire path parameter scheme to quickly evaluate and screen a large number of candidate schemes, significantly improving the efficiency of determining target candidate resistance wire path parameter schemes and thus shortening the resistance wire path design process and increasing design efficiency. Simultaneously, since the proxy thermal model is a deep learning model trained on an initial simulation database that covers multiple resistance wire path parameter schemes and their corresponding heating plate surface temperature distribution field data within the parameter design space, the proxy thermal model can accurately learn the mapping relationship between resistance wire path parameters and the temperature distribution field. This further ensures that the target candidate resistance wire path parameter schemes determined based on the proxy thermal model's prediction results meet the preset temperature uniformity requirements.

[0027] Furthermore, the technical solution of the present invention reduces the reliance on manual drawing and manual iterative adjustment experience by constructing a parameter design space and using a set optimization algorithm to automatically generate candidate resistance wire path parameter schemes, thereby improving the automation level of the design process and enhancing the applicability to ceramic heating plates of different specifications. Attached Figure Description

[0028] Figure 1 This is a schematic diagram of a conventional regular spiral resistance wire path according to an exemplary embodiment.

[0029] Figure 2 This is a flowchart illustrating a method for generating a resistance wire path in a ceramic heating plate according to an exemplary embodiment.

[0030] Figure 3This is a schematic diagram illustrating the pitch distribution of multiple sets of resistance wire path parameter schemes sampled and generated within a parameter design space, according to an exemplary embodiment.

[0031] Figure 4 This is a schematic diagram showing a comparison between an initial spiral structure and an optimized spiral structure according to an exemplary embodiment.

[0032] Figure 5 This is a temperature distribution cloud map of the heating plate surface when using a conventional regularized path generation scheme, according to an exemplary embodiment.

[0033] Figure 6 This is a temperature distribution cloud map of the heating plate surface when the target candidate resistance wire path parameter scheme is optimized using the technical solution of the present invention, according to an exemplary embodiment.

[0034] Figure 7 This is a block diagram illustrating a ceramic heating plate according to an exemplary embodiment.

[0035] Figure 8 This is a block diagram illustrating an electronic device according to another exemplary embodiment. Detailed Implementation

[0036] Unless otherwise defined, the technical or scientific terms used in this specification and claims shall have the ordinary meaning understood by one of ordinary skill in the art to which this invention pertains. Specific embodiments of the invention will be described below with reference to the accompanying drawings. It should be noted that, in order to provide a concise description, this specification cannot provide a detailed description of all features of the actual embodiments. Without departing from the spirit and scope of the invention, those skilled in the art can make modifications and substitutions to the embodiments of the invention, and the resulting embodiments are also within the protection scope of the invention.

[0037] As mentioned earlier, in related technologies, the design of resistance wire paths relies on manual drawing by engineers, following geometric rules such as concentric circles and spirals, and then being verified through finite element simulation, with manual iterative adjustments made based on the simulation results. This regularized path design scheme cannot effectively compensate for the asymmetric temperature distribution caused by non-uniform thermal boundary conditions such as edge heat dissipation and spatial differences in material thermal conductivity, resulting in poor temperature uniformity on the surface of the ceramic heating plate, which cannot meet the increasingly stringent temperature uniformity requirements of advanced processes.

[0038] To address the technical problem of poor surface temperature uniformity in existing ceramic heating plates, this invention provides a method for generating resistance wire paths in a ceramic heating plate, a ceramic heating plate, and an electronic device.

[0039] Because the target candidate resistance wire path parameter scheme in the technical solution of this invention is determined by calling a proxy thermal model to predict the surface temperature distribution data of the heating plate corresponding to each group of candidate resistance wire path parameter schemes, and based on the optimization objective and design constraints, the target candidate resistance wire path parameter scheme is determined from the prediction results of the proxy thermal model. Furthermore, thermoelectric coupling simulation is performed on the surface temperature distribution data of the heating plate corresponding to the target candidate resistance wire path parameter scheme, and the simulated surface temperature distribution data of the heating plate meets the preset temperature uniformity requirements. Therefore, by using this target candidate resistance wire path parameter scheme to generate the path of the resistance wire in the target heating plate, the temperature distribution on the surface of the final designed target heating plate meets the preset temperature uniformity requirements, thus solving the technical problem of poor surface temperature uniformity of ceramic heating plates in the prior art.

[0040] The following detailed description of some embodiments of the present invention is provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0041] This invention provides a method for generating the resistance wire path in a ceramic heating plate. This method can be applied to electronic devices with computing power, storage capacity, and simulation software operating environments. Please refer to... Figure 2 The method for generating the resistance wire path in the ceramic heating plate may include the following steps S101 to S107: Step S101: Determine the parameterized representation of the resistance wire path and the range of values ​​for the resistance wire design parameters under the parameterized representation, so as to construct the parameter design space of the resistance wire path.

[0042] In some embodiments, the parameterized representation of the resistance wire path and the range of values ​​for the resistance wire design parameters under the parameterized representation are determined according to the heating plate size, process requirements, and design freedom requirements.

[0043] The parameter design space refers to the multi-dimensional parameter space jointly determined by the parameterized representation of the resistance wire path and the value range of each design parameter under the parameterized representation, so as to facilitate subsequent deep learning model processing.

[0044] In some embodiments, the design parameters include at least one of the following: pitch, length of the busbar, helix length, and resistance value, respectively corresponding to each segment of the resistance wire. Therefore, precise control of the resistance wire path can be achieved by adjusting these design parameters, providing clear adjustable variables for subsequently sampling and generating multiple sets of resistance wire path parameter schemes within the parameter design space. This helps improve the learning accuracy of the surrogate thermal model in understanding the mapping relationship between the resistance wire path parameter schemes and the surface temperature distribution field data of the heating plate.

[0045] In some embodiments, the parameterized representation includes one of the following: a coordinate sequence of multiple control points on the resistance wire path, function parameters based on an Archimedean spiral, and a binary occupancy grid image of the resistance wire path in a two-dimensional plane. Specifically, the coordinate sequence of control points defines the resistance wire path using the coordinates of multiple discrete control points; the function parameters based on an Archimedean spiral define the resistance wire path using key parameters of the spiral function; and the binary occupancy grid image defines the resistance wire path using a binary occupancy grid in a two-dimensional plane.

[0046] Step S102: Sample and generate multiple sets of resistance wire path parameter schemes in the parameter design space, perform thermoelectric coupling simulation on each set of resistance wire path parameter schemes, obtain the heating plate surface temperature distribution field data corresponding to each set of resistance wire path parameter schemes, and construct an initial simulation database based on each set of resistance wire path parameter schemes and the corresponding heating plate surface temperature distribution field data.

[0047] In some embodiments, when the design parameters include the pitches corresponding to each busbar segment of the resistance wire, multiple sets of resistance wire path parameter schemes are sampled and generated within the parameter design space. This includes: using the Latin hypercube method, random mutation method, or orthogonal experimental design method within the parameter design space, multiple sets of resistance wire path parameter schemes are sampled and generated by changing the pitch ratio of each busbar segment, for example, generating 1000 to 5000 different resistance wire path parameter schemes.

[0048] In this way, by changing the pitch ratio of each busbar segment, multiple sets of resistance wire path parameter schemes are generated through sampling. This ensures that the samples in the initial simulation database fully cover different combinations of the pitch of each busbar segment within the parameter design space. Consequently, the surrogate thermal model can fully learn the mapping relationship between the resistance wire path parameter schemes and the surface temperature distribution data of the heating plate under different pitch ratios, which helps to improve the prediction accuracy of the surrogate thermal model for the surface temperature distribution data of the heating plate under different pitch ratios.

[0049] Please see Figure 3 The figure shows the pitch distribution of 40 sets of resistance wire path parameter schemes sampled and generated within the parameter design space. Figure 3 The vertical axis represents the numerical range of the pitch, and the horizontal axis represents the group number of the sampled resistance wire path parameter schemes. The vertical lines indicate the allowable fluctuation range of the pitch in each group of resistance wire path parameter schemes, while the broken line represents the average pitch value of each group of resistance wire path parameter schemes. Figure 3As can be seen, the 40 generated schemes not only cover a wide range of values ​​from 2mm to 10mm, but also exhibit significant fluctuations in the average pitch among the various resistance wire path parameter schemes. This demonstrates that the technical solution of this invention can achieve different pitch combinations within the parameter design space. This batch generation and reasonable distribution of resistance wire path parameter schemes facilitates the subsequent construction of a high-quality initial simulation database.

[0050] In some embodiments, a high-fidelity thermoelectric coupling simulation engine can be used to perform thermoelectric coupling simulation on each set of resistance wire path parameter schemes. This can obtain accurate temperature distribution field data on the heating plate surface, thereby ensuring that the proxy thermal model can accurately learn the mapping relationship between resistance wire path parameters and temperature distribution field.

[0051] Step S103: The surrogate heat model is obtained by training the deep learning model set based on the initial simulation database.

[0052] The surrogate thermal model is used to output the corresponding predicted result of the heating plate surface temperature distribution based on the input resistance wire path parameter scheme. After training, the surrogate thermal model can complete the prediction of the heating plate surface temperature distribution field in milliseconds. The prediction accuracy and the root mean square error of the simulation result obtained by thermoelectric coupling simulation must meet the requirements of engineering applications. Therefore, the surrogate thermal model can replace the thermoelectric coupling simulation that takes several hours, providing a fast performance evaluation for subsequent automatic optimization.

[0053] In some embodiments, the defined deep learning model includes a convolutional neural network model with an encoder-decoder structure, preferably U-Net (a convolutional neural network with a symmetric encoder-decoder structure and skip connections) and its variants.

[0054] In some embodiments, training a surrogate thermal model based on an initial simulation database includes: using resistance wire path parameter schemes from the initial simulation database as input to a convolutional neural network (CNN) model, and using the heating plate surface temperature distribution data corresponding to the resistance wire path parameter schemes from the initial simulation database as output to the CNN model; training the CNN model until the temperature prediction accuracy of the CNN model meets a set accuracy requirement, then determining that the CNN model training is complete, and obtaining the surrogate thermal model. This allows the CNN model to learn the mapping relationship between the resistance wire path parameter schemes and the temperature distribution field data end-to-end. The surrogate thermal model obtained after the temperature prediction accuracy training meets the set accuracy requirement can accurately predict the heating plate surface temperature distribution field data corresponding to each set of candidate resistance wire path parameter schemes, thereby ensuring the effectiveness of the target candidate resistance wire path parameter schemes determined based on the prediction results of the surrogate thermal model.

[0055] Step S104: Determine the optimization objective of the target heating plate and the design constraints of the resistance wire path in the target heating plate.

[0056] In some embodiments, the optimization objective includes minimizing the sum of the absolute values ​​of the temperature deviations between all points within the effective working area of ​​the target heating plate and the target temperature. In other words, for each grid point within the effective working area of ​​the heating plate, the difference between the temperature at that point and the target temperature is calculated, the absolute value is taken, and then the absolute values ​​of all grid points are summed to obtain a total. The optimization objective is to minimize this total. The effective working area is the region on the target heating plate used to support the wafer.

[0057] Since the optimization objective is to minimize the sum of the absolute values ​​of the temperature deviations between each point in the effective working area of ​​the target heating plate and the target temperature, the entire optimization process aims at the temperature uniformity within the effective working area of ​​the target heating plate. This ensures that the final determined target candidate resistance wire path parameter scheme can make the temperature at each point in the effective working area of ​​the heating plate as close as possible to the target temperature, thereby improving the surface temperature uniformity of the heating plate.

[0058] In some embodiments, the design constraints include at least one of the following: constraints on the total length of the resistance wire in the target heating plate, constraints on the minimum bending radius, and constraints on the planar geometric topology of the resistance wire path. This avoids manufacturing difficulties or performance degradation caused by excessive total resistance wire length, excessively small bending radius, or self-intersection of the resistance wire path during the determination of target candidate resistance wire path parameters, thereby ensuring that the final generated resistance wire path has good manufacturability and reliability.

[0059] In some embodiments, optimization objectives and design constraints are determined based on the design requirements of the target heating plate. The design requirements include the process specifications of the target heating plate, its dimensions, and the resistance wire material parameters. For example, for an aluminum nitride ceramic heating plate used in a 300mm wafer plasma-enhanced chemical vapor deposition process, if the process requires an operating temperature of 600°C, the target temperature can be set to 600°C, and the effective working area of ​​the target heating plate can be set as a circular region corresponding to the 300mm wafer. The optimization objective is to minimize the sum of the absolute values ​​of the temperature deviations between each point within this effective working area and 600°C. Design constraints can be determined based on the resistance wire material parameters and the heating plate dimensions. For example, when using molybdenum wire with a diameter of 1.0mm, the minimum bending radius is set to not less than 2mm; the upper limit of the total resistance wire length is estimated based on the heating plate dimensions, winding radius, and number of segments, such as being set to 5000mm to 15000mm; simultaneously, the resistance wire path must not self-intersect within the ceramic substrate plane.

[0060] Step S105: Using the set optimization algorithm, multiple sets of candidate resistance wire path parameter schemes are generated in the parameter design space. The proxy thermal model is called to predict the heating plate surface temperature distribution field data corresponding to each set of candidate resistance wire path parameter schemes. Based on the optimization objective and design constraints, the target candidate resistance wire path parameter scheme is determined from the prediction results of the proxy thermal model.

[0061] In some embodiments, determining a target candidate resistance wire path parameter scheme from the prediction results of the surrogate thermal model based on the optimization objective and design constraints includes: evaluating the prediction results of the surrogate thermal model based on the optimization objective and design constraints; and determining a target candidate resistance wire path parameter scheme that satisfies the optimization objective and design constraints from multiple sets of candidate resistance wire path parameter schemes based on the evaluation results.

[0062] It is understandable that the target candidate resistance wire path parameter scheme was selected based on temperature uniformity and design feasibility, thereby further ensuring that the temperature distribution field data of the heating plate surface obtained by subsequent thermoelectric coupling simulation can meet the preset temperature uniformity requirements.

[0063] In some embodiments, the optimization algorithm includes a genetic algorithm, a particle swarm optimization algorithm, or a Bayesian optimization algorithm. For example, in one embodiment, the optimization algorithm is a genetic algorithm with a population size of 200, a crossover probability of 0.8, a mutation probability of 0.1, and 500 iterations.

[0064] Step S106: Perform thermoelectric coupling simulation on the target candidate resistance wire path parameter scheme to obtain the heating plate surface temperature distribution field data corresponding to the target candidate resistance wire path parameter scheme.

[0065] Similarly, a high-fidelity thermoelectric coupling simulation engine can be used to perform thermoelectric coupling simulation on the target candidate resistance wire path parameter scheme. The obtained temperature distribution field data of the heating plate surface corresponding to the target candidate resistance wire path parameter scheme can be used to verify whether the scheme meets the preset temperature uniformity requirements, thereby providing an accurate simulation basis for finally determining the resistance wire path scheme.

[0066] Step S107: If the surface temperature distribution field data of the heating plate corresponding to the target candidate resistance wire path parameter scheme meets the preset temperature uniformity requirements, the resistance wire path in the target heating plate is generated using the target candidate resistance wire path parameter scheme.

[0067] Therefore, by using the target candidate resistance wire path parameter scheme to generate the path of the resistance wire in the target heating plate, the temperature distribution on the surface of the final designed target heating plate meets the preset temperature uniformity requirements, thereby solving the technical problem of poor surface temperature uniformity of ceramic heating plates in the prior art.

[0068] To visually demonstrate the optimization effect of the present invention on the geometry of the resistance wire path, this embodiment will provide a visual comparison of the resistance wire path structure before and after optimization. Please refer to [link / reference]. Figure 4 The diagram shows a comparison between the initial spiral structure and the optimized spiral structure. Figure 4 The X and Y axes in the figure form a two-dimensional plane coordinate system on the surface of the ceramic heating plate. The units of the X and Y axes are millimeters (mm). The origin (0, 0) corresponds to the geometric center of the ceramic heating plate, and the range of the coordinate axes corresponds to the radial dimension of the ceramic heating plate. Figure 4 The left side illustrates an initial spiral structure. Figure 4 The right side illustrates the spiral structure optimized using the technical solution of this invention.

[0069] like Figure 4 As shown, traditional initial helical structures typically follow fixed geometric rules, exhibiting a smooth helical shape with a constant pitch or a pitch that changes monotonically only with the radius. This regular geometric structure struggles to compensate for asymmetric heat loss through its own geometric characteristics when facing non-uniform thermal boundary conditions. However, the helical structure optimized using the technical solution of this invention, while maintaining the overall helical trend, undergoes adaptive geometric adjustments. (Comparison) Figure 4 The images on the left and right sides clearly show that the optimized resistance wire path exhibits obvious wavy or sawtooth-like fluctuations in the circumferential direction, and the local pitch at different radial positions undergoes nonlinear differential adjustments. Figure 4 The unique geometry on the right side can increase the heat generation by reducing the local pitch in areas where heat is easily dissipated (such as edge areas) to increase the resistance wire density, while increasing the local pitch in areas where heat accumulates to reduce the heat generation. This achieves active compensation for non-uniform thermal boundary conditions in terms of physical structure, ensuring the uniformity of temperature distribution on the surface of the ceramic heating plate.

[0070] To more intuitively illustrate the effectiveness of the method for generating resistance wire paths in a ceramic heating plate provided in this embodiment, this embodiment compares and analyzes the traditional regularized path generation scheme with the target candidate resistance wire path parameter scheme optimized by the technical solution of this invention.

[0071] Please see Figure 5 and Figure 6 , Figure 5 This diagram illustrates the temperature distribution cloud map on the surface of the heating plate when using a traditional regularized path generation scheme. Figure 6 The diagram illustrates the temperature distribution cloud map on the surface of the heating plate when the target candidate resistance wire path parameter scheme is optimized using the technical solution of the present invention.

[0072] like Figure 5As shown, when using the traditional regularized path generation scheme, the asymmetric temperature distribution caused by non-uniform thermal boundary conditions such as edge heat dissipation and spatial differences in material thermal conductivity cannot be effectively compensated, resulting in extremely uneven temperature distribution on the heating plate surface. In this case, the temperature distribution cloud map exhibits obvious asymmetric characteristics, clearly failing to meet the increasingly stringent temperature uniformity requirements of advanced processes.

[0073] And such Figure 6 As shown, the temperature distribution cloud map of the heating plate surface obtained by the resistance wire path generation scheme optimized by the technical solution of the present invention shows a high degree of symmetry. The temperature distribution in the effective working area of ​​the entire heating plate surface is relatively uniform, which can meet the increasingly stringent temperature uniformity requirements of advanced processes.

[0074] In some embodiments, the above generation method further includes: when the surface temperature distribution data of the heating plate corresponding to the target candidate resistance wire path parameter scheme does not meet the preset temperature uniformity requirements, storing the target candidate resistance wire path parameter scheme and the corresponding surface temperature distribution data of the heating plate into the initial simulation database to obtain an updated simulation database; and using the updated simulation database to incrementally fine-tune the surrogate thermal model to obtain an updated surrogate thermal model. Therefore, the surrogate thermal model can adjust the model parameters based on the verification results, providing more accurate prediction results in subsequent optimization processes, thereby forming a closed-loop optimization mechanism and further improving the success rate of resistance wire path design.

[0075] The incremental fine-tuning refers to making small adjustments to the model parameters based on the already trained surrogate thermal model using new sample data stored in the initial simulation database, rather than retraining the surrogate thermal model.

[0076] In summary, the technical solution provided by this invention has the following advantages: Because the target candidate resistance wire path parameter scheme in the technical solution of this invention is determined by calling a proxy thermal model to predict the surface temperature distribution data of the heating plate corresponding to each group of candidate resistance wire path parameter schemes, and based on the optimization objective and design constraints, the target candidate resistance wire path parameter scheme is determined from the prediction results of the proxy thermal model. Furthermore, thermoelectric coupling simulation is performed on the surface temperature distribution data of the heating plate corresponding to the target candidate resistance wire path parameter scheme, and the simulated surface temperature distribution data of the heating plate meets the preset temperature uniformity requirements. Therefore, by using this target candidate resistance wire path parameter scheme to design the path of the resistance wire in the target heating plate, the final designed surface temperature distribution of the target heating plate meets the preset temperature uniformity requirements, thus solving the technical problem of poor surface temperature uniformity of ceramic heating plates in the prior art.

[0077] Furthermore, the determination of target candidate resistance wire path parameter schemes is achieved by calling a proxy thermal model to predict the temperature distribution field on the heating plate surface and then determining the parameters from the prediction results. Therefore, it eliminates the need to perform a complete thermoelectric coupling simulation on each candidate resistance wire path parameter scheme to quickly evaluate and screen a large number of candidate schemes, significantly improving the efficiency of determining target candidate resistance wire path parameter schemes and thus shortening the resistance wire path design process and increasing design efficiency. Simultaneously, since the proxy thermal model is a deep learning model trained on an initial simulation database that covers multiple resistance wire path parameter schemes and their corresponding heating plate surface temperature distribution field data within the parameter design space, the proxy thermal model can accurately learn the mapping relationship between resistance wire path parameters and the temperature distribution field. This further ensures that the target candidate resistance wire path parameter schemes determined based on the proxy thermal model's prediction results meet the preset temperature uniformity requirements.

[0078] Furthermore, the technical solution of the present invention reduces the reliance on manual drawing and manual iterative adjustment experience by constructing a parameter design space and using a set optimization algorithm to automatically generate candidate resistance wire path parameter schemes, thereby improving the automation of the design process and enhancing the applicability to ceramic heating plates of different specifications.

[0079] Another exemplary embodiment of the present invention also provides a ceramic heating plate 100. For example... Figure 7 As shown, in this embodiment, the ceramic heating plate 100 includes a ceramic substrate 101 and a resistance wire 102 disposed within the ceramic substrate 101. The path of the resistance wire 102 is generated using the generation method described in any of the above embodiments of the present invention. The resistance wire 102 enables the surface temperature distribution field data of the heating plate to meet the preset temperature uniformity requirements. Therefore, the ceramic heating plate 100 has high surface temperature uniformity, which can meet the stringent requirements of advanced processes for surface temperature uniformity of the heating plate, thereby reducing problems such as uneven film thickness and etching rate differences caused by temperature non-uniformity, and improving chip yield and performance.

[0080] Another exemplary embodiment of the present invention also provides an electronic device 200, such as... Figure 8 As shown, the electronic device 200 includes a memory 201 and a processor 202. The memory 201 is used to store computer programs executable by the processor 202; the processor 202 is used to execute the computer programs in the memory 201 to implement the generation method as described in any of the above embodiments of the present invention.

[0081] like Figure 8 As shown, the electronic device 200 also includes a communication interface 203. The processor 202, memory 201, and communication interface 203 are connected via a communication bus and communicate with each other.

[0082] Processor 202 may be a general-purpose central processing unit (CPU), a microprocessor, an application-specific integrated circuit (ASIC), or one or more integrated circuits used to control the execution of the above scheme program.

[0083] Communication interface 203 is used to communicate with other devices or communication networks, such as Ethernet, Radio Access Network (RAN), Wireless Local Area Networks (WLAN), etc.

[0084] The memory 201 may be a read-only memory (ROM) or other type of static storage device capable of storing static information and instructions, random access memory (RAM) or other type of dynamic storage device capable of storing information and instructions, or electrically erasable programmable read-only memory (EEPROM), compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compressed discs, laser discs, optical discs, digital versatile discs, Blu-ray discs, etc.), magnetic disk storage media or other magnetic storage devices, or any other medium capable of carrying or storing desired program code in the form of instructions or data structures and accessible by a computer, but not limited thereto. The memory may exist independently and be connected to the processor via a bus. The memory may also be integrated with the processor.

[0085] In this invention, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance. The term "multiple" refers to two or more unless otherwise expressly defined.

[0086] The above description of the embodiments is intended to enable those skilled in the art to understand and apply the present invention. It will be apparent to those skilled in the art that various modifications can be made to these embodiments, and the general principles described herein can be applied to other embodiments without creative effort. Therefore, the present invention is not limited to the embodiments described herein, and any improvements and modifications made by those skilled in the art based on the disclosure of the present invention without departing from the scope and spirit of the invention are within the scope of the present invention.

Claims

1. A method for generating a resistance wire path in a ceramic heating plate, characterized in that, include: The parameterized representation of the resistance wire path and the range of values ​​for the resistance wire design parameters under the parameterized representation are determined in order to construct the parameter design space of the resistance wire path. Multiple sets of resistance wire path parameter schemes are sampled and generated within the parameter design space. Thermoelectric coupling simulation is performed on each set of resistance wire path parameter schemes to obtain the heating plate surface temperature distribution field data corresponding to each set of resistance wire path parameter schemes. An initial simulation database is constructed based on each set of resistance wire path parameter schemes and the corresponding heating plate surface temperature distribution field data. The proxy heat model is obtained by training the set deep learning model based on the initial simulation database; Determine the optimization objective of the target heating plate and the design constraints of the resistance wire path in the target heating plate; The set optimization algorithm generates multiple sets of candidate resistance wire path parameter schemes in the parameter design space. The proxy thermal model is called to predict the heating plate surface temperature distribution field data corresponding to each set of candidate resistance wire path parameter schemes. Based on the optimization objective and the design constraints, the target candidate resistance wire path parameter scheme is determined from the prediction results of the proxy thermal model. The thermoelectric coupling simulation was performed on the target candidate resistance wire path parameter scheme to obtain the heating plate surface temperature distribution field data corresponding to the target candidate resistance wire path parameter scheme. If the surface temperature distribution data of the heating plate corresponding to the target candidate resistance wire path parameter scheme meets the preset temperature uniformity requirements, the resistance wire path in the target heating plate is generated using the target candidate resistance wire path parameter scheme.

2. The method for generating the resistance wire path in the ceramic heating plate according to claim 1, characterized in that, The design parameters include at least one of the following: pitch, length of the busbar, length of the spiral, and resistance value, respectively, corresponding to each section of the resistance wire.

3. The method for generating the resistance wire path in the ceramic heating plate according to claim 2, characterized in that, When the design parameters include the pitch corresponding to each busbar segment of the resistance wire, multiple sets of resistance wire path parameter schemes are sampled and generated within the parameter design space, including: Within the parameter design space, multiple sets of resistance wire path parameter schemes are generated by sampling and changing the pitch ratio of each busbar segment using the Latin hypercube method, random mutation method, or orthogonal experimental design method.

4. The method for generating the resistance wire path in the ceramic heating plate according to claim 1, characterized in that, The defined deep learning model includes a convolutional neural network model with an encoder-decoder structure. A proxy hot model is trained based on the initial simulation database, including: The resistance wire path parameter scheme in the initial simulation database is used as the input of the convolutional neural network model, and the heating plate surface temperature distribution field data corresponding to the resistance wire path parameter scheme in the initial simulation database is used as the output of the convolutional neural network model to train the convolutional neural network model. Once the temperature prediction accuracy of the convolutional neural network model has been trained to meet the set accuracy requirements, the training of the convolutional neural network model is considered complete, and the surrogate thermal model is obtained.

5. The method for generating the resistance wire path in the ceramic heating plate according to claim 1, characterized in that, Based on the optimization objective and the design constraints, the target candidate resistance wire path parameter scheme is determined from the prediction results of the surrogate thermal model, including: The prediction results of the surrogate thermal model are evaluated based on the optimization objective and the design constraints. Based on the evaluation results, a target candidate resistance wire path parameter scheme that satisfies the optimization objective and the design constraints is determined from the multiple sets of candidate resistance wire path parameter schemes.

6. The method for generating the resistance wire path in the ceramic heating plate according to claim 5, characterized in that, The design constraints include at least one of the following: constraints on the total length of the resistance wire in the target heating plate, constraints on the minimum bending radius, and constraints on the planar geometric topology of the resistance wire path.

7. The method for generating the resistance wire path in the ceramic heating plate according to claim 5, characterized in that, The optimization objective is to minimize the sum of the absolute values ​​of the temperature deviations between each point within the effective working area of ​​the target heating plate and the target temperature.

8. The method for generating the resistance wire path in the ceramic heating plate according to claim 1, characterized in that, The method further includes: If the surface temperature distribution data of the heating plate corresponding to the target candidate resistance wire path parameter scheme does not meet the preset temperature uniformity requirement, the target candidate resistance wire path parameter scheme and the corresponding surface temperature distribution data of the heating plate are stored in the initial simulation database to obtain the updated simulation database. The updated surrogate thermal model is obtained by incrementally fine-tuning the surrogate thermal model using the updated simulation database.

9. A ceramic heating plate, characterized in that, It includes a ceramic substrate and a resistance wire disposed within the ceramic substrate, wherein the path of the resistance wire is generated using the method described in any one of claims 1 to 8.

10. An electronic device, characterized in that, The system includes a memory and a processor, wherein the memory stores a computer program executable by the processor; and the processor executes the computer program in the memory to implement the method as described in any one of claims 1 to 8.