Radio frequency chip layout generation method and system based on high-order algorithm

Abstract

The application belongs to the technical field of radio frequency chip layout generation, and relates to a radio frequency chip layout generation method and system based on a high-order algorithm, which first acquires an initial layout geometric contour of a radio frequency chip, discretizes the layout contour into control nodes, obtains the sensitivity of output port reflection coefficients to each control node by solving an adjoint field, and forms a sensitivity gradient vector; then, a moving asymptote algorithm is used to iteratively update control node coordinates, and in the iteration, a non-uniform grid is adaptively subdivided according to contour curvature to maintain solution accuracy, and a step size and a penalty factor are dynamically adjusted according to a target change amount to constrain a wiring spacing and a minimum line width; finally, a layout contour satisfying a convergence criterion is output. The application is based on adjoint field analysis and shape optimization, and constructs a high-order optimization algorithm system, realizes automatic generation and accurate optimization of a layout contour, and is helpful to improving the efficiency and performance of radio frequency chip layout design.

Description

Technical Field

[0001] This invention belongs to the field of radio frequency chip layout generation technology, and relates to a method and system for generating radio frequency chip layouts based on high-order algorithms. Background Technology

[0002] In the RF chip design process, layout generation, especially the geometry design of the matching network, directly determines the impedance matching accuracy and operating performance of the chip.

[0003] Currently, there are two existing approaches to generating RF chip layouts: The first is manual, experience-based design, where engineers create an initial layout based on theoretical formulas and experience, followed by full-wave electromagnetic simulation for verification. If the performance does not meet requirements, geometric parameters are manually adjusted, and this process is repeated until convergence. The second approach combines parameter scanning with automated optimization algorithms. Several adjustable dimensions in the layout are parameterized, and gradient-independent optimization algorithms are used to repeatedly call the electromagnetic simulator for parameter searching, or AI surrogate models are employed to predict electromagnetic performance to accelerate the optimization process.

[0004] However, the aforementioned prior art has the following drawbacks:

[0005] 1. The gradient information of the effect of geometric shape changes on electrical performance cannot be obtained. In existing methods, there is a lack of analytical sensitivity calculation path between the layout geometry and the reflection coefficient of the output port. This results in a lack of clear directional guidance for geometric adjustments, making the optimization process largely blind and requiring a large number of simulations and trials to get close to the design goal.

[0006] 2. Limited geometric representation capabilities make it difficult to optimize free-form shapes. Parametric methods constrain the layout shape within a predefined topology, failing to flexibly control non-parametric shapes such as curves and protrusions in the contour. When the electromagnetic field distribution is distorted due to high-frequency coupling effects, the limited design parameters are insufficient to compensate for the resulting impedance shift.

[0007] 3. The numerical accuracy and convergence stability of the optimization process lack an adaptive adjustment mechanism. Existing methods typically use a fixed mesh partition and a constant optimization step size throughout the entire optimization iteration. After the geometric profile changes, the fixed mesh cannot guarantee the accuracy of the electromagnetic solution, while the fixed step size is prone to oscillations near the optimal region or leads to slow convergence. Summary of the Invention

[0008] In view of this, in order to solve the problems mentioned in the background technology, a method and system for generating radio frequency chip layout based on high-order algorithms are proposed.

[0009] The objective of this invention can be achieved through the following technical solution: The first embodiment of this invention provides a method for generating radio frequency chip layout based on a high-order algorithm, including: S1. obtaining the initial layout geometric contour of the radio frequency chip, discretizing the initial layout geometric contour into multiple control nodes, and generating a set of control node coordinates.

[0010] S2. Construct the original electromagnetic field model based on the control node coordinate set, apply excitation and calculate the reflection coefficient of the output port.

[0011] S3. Construct an adjoint electromagnetic field model that satisfies the reciprocity relationship with the original electromagnetic field model. Calculate the sensitivity of the output port reflection coefficient to the coordinates of each control node using the original field distribution and the adjoint field distribution, and combine them to obtain the sensitivity gradient vector.

[0012] S4. Using the sensitivity gradient vector as the optimization direction, the moving asymptote algorithm is used to update the control node coordinate set to obtain the updated layout geometry.

[0013] S5. Perform curvature-adaptive non-uniform meshing on the updated layout geometry to obtain the electromagnetic simulation mesh. Solve the original electromagnetic field model again based on the electromagnetic simulation mesh to obtain the updated output port reflection coefficient.

[0014] S6. Calculate the difference between the output port reflection coefficient of the current iteration and the previous iteration as the target change amount. Based on the target change amount, determine whether the current optimization state is in the acceleration interval or the oscillation interval. If it is in the acceleration interval, increase the step size of the moving asymptote algorithm and decrease the penalty factor; if it is in the oscillation interval, decrease the step size of the moving asymptote algorithm and increase the penalty factor.

[0015] S7. Repeat steps S2 to S6 until the reflection coefficient of the output port meets the convergence condition, and output the final RF chip layout.

[0016] The second embodiment of the present invention provides a radio frequency chip layout generation system based on a high-order algorithm, including: a layout initialization module, a forward solving module, a sensitivity analysis module, an optimization and update module, a mesh reshaping module, an adaptive adjustment module, and an iterative control module.

[0017] The layout initialization module is connected to the forward solving module, the forward solving module is connected to the sensitivity analysis module, the sensitivity analysis module is connected to the optimization and update module, the optimization and update module is connected to the mesh reshaping module, the mesh reshaping module is connected to the adaptive adjustment module, and the adaptive adjustment module is connected to the iterative control module and the optimization and update module respectively.

[0018] The layout initialization module is used to obtain the initial layout geometry of the RF chip, discretize the initial layout geometry into multiple control nodes, and generate a set of control node coordinates.

[0019] The forward solver module is used to construct the original electromagnetic field model based on the control node coordinate set and apply excitation to calculate the reflection coefficient of the output port.

[0020] The sensitivity analysis module is used to construct an adjoint electromagnetic field model that satisfies the reciprocity relationship with the original electromagnetic field model. It uses the original field distribution and the adjoint field distribution to calculate the sensitivity of the output port reflection coefficient to the coordinates of each control node, and combines them to obtain the sensitivity gradient vector.

[0021] The optimization and update module is used to update the control node coordinate set with the sensitivity gradient vector as the optimization direction and the moving asymptote algorithm to obtain the updated geometric contour of the layout.

[0022] The mesh re-division module is used to perform curvature-adaptive non-uniform mesh subdivision on the updated geometric contour of the layout to obtain the electromagnetic simulation mesh. Based on the electromagnetic simulation mesh, the original electromagnetic field model is solved again to obtain the updated output port reflection coefficient.

[0023] The adaptive adjustment module is used to calculate the difference between the output port reflection coefficient of the current iteration and the previous iteration as the target change amount. Based on the target change amount, it determines whether the current optimization state is in the acceleration interval or the oscillation interval. If it is in the acceleration interval, the step size of the moving asymptote algorithm is increased and the penalty factor is decreased. If it is in the oscillation interval, the step size of the moving asymptote algorithm is decreased and the penalty factor is increased.

[0024] The iterative control module controls the forward solution module, sensitivity analysis module, optimization update module, mesh reshaping module, and adaptive adjustment module to execute in a loop until the output port reflection coefficient meets the convergence condition and the final RF chip layout is output.

[0025] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0026] This invention, based on adjoint field analysis and shape optimization, constructs a high-order optimization algorithm system: First, the layout contour is discretized into control nodes. By solving the adjoint field, the precise sensitivity of the reflection coefficient to each node is obtained, forming a gradient vector. Then, the moving asymptote algorithm is used to iteratively update the node coordinates. During the iteration, a non-uniform mesh is adaptively subdivided according to the contour curvature to maintain the solution accuracy. At the same time, the step size and penalty factor are dynamically adjusted according to the change of the objective function, and the trace spacing and minimum linewidth are constrained. Finally, the layout contour that meets the convergence criterion is output. The entire process, through the deep integration of adjoint field analysis and shape optimization, realizes the automated generation and precise optimization of the layout contour, which helps to improve the efficiency and performance of RF chip layout design. Attached Figure Description

[0027] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0028] Figure 1 This is a schematic diagram of the implementation process of the method of the present invention;

[0029] Figure 2 This is a schematic diagram of the module connection of the present invention. Detailed Implementation

[0030] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0031] Please see Figure 1 As shown, the first embodiment of the present invention provides a method for generating radio frequency chip layouts based on high-order algorithms, and the specific steps are as follows:

[0032] S1. Obtain the initial layout geometry of the RF chip, discretize the initial layout geometry into multiple control nodes, and generate a set of control node coordinates.

[0033] To enable subsequent steps to calculate the closure sensitivity using the level set method, this embodiment simultaneously expresses the initial layout geometry as a zero isosurface of a level set function: in the two-dimensional layout region Inside, define the level set function. Its zero isosurface Corresponding to the map outline boundary.

[0034] During initialization, Constructed as a symbolic distance function, i.e., any point on the map... Shortest signed distance to the contour boundary:

[0035] ;

[0036] In this formula, Represents the coordinate vector of any point within the map area. The set of boundary points representing the initial geometric outline of the map. This represents the metal area occupied by the initial geometric outline of the layout. Point With boundary points The Euclidean distance between them , , Representing points respectively Within, on the boundary and outside the metal area occupied by the initial geometric outline, the dimensions of the formula are length, consistent with the dimensions of the geometric distance.

[0037] The level set function is used for shape derivative gradient calculation and contour evolution in step S3, while the control node coordinate set is extracted independently from the original map data through the following steps. The two establish a coordinate mapping relationship through contour boundary sampling points. Specifically, after completing the control node extraction and level set initialization, a preset number of points are uniformly sampled in the parameter space of the spline curve corresponding to the control node. The spatial coordinates of each sampling point and its function value in the level set function are recorded to establish a one-to-one mapping table for use in subsequent steps when mapping the sensitivity from the continuous domain defined by the level set function to the discrete domain of the control node.

[0038] The process for obtaining the control node coordinate set is as follows:

[0039] S11. Obtain the initial metal trace pattern of the network to be matched in the RF chip:

[0040] S111. Read the layout data file and filter out all geometries in the specified metal layer used for routing.

[0041] S112. Based on the circuit netlist, starting from the electrical port coordinates of the active device, a breadth-first search is used to traverse the geometry in the metal layer, and the metal pattern that is connected to the electrical port and extends to the chip output port is marked as the initial metal trace pattern.

[0042] The network to be matched is connected between the electrical port of the active device and the output port of the chip. It is a passive circuit part in the radio frequency chip. Its function is to realize impedance transformation to ensure that the electrical port of the active device and the output port of the chip achieve maximum power transmission or a specific frequency response. The active device refers to an electronic component that requires an external power supply to operate, such as a transistor. The electrical port is the physical connection point on the device for inputting or outputting electrical signals. The output port is the interface for connecting the chip to external circuits or antennas.

[0043] S113. The paths, rectangles, and polygons in the marked initial metal trace graphics are uniformly converted into polygon representations. For graphics containing arcs or Bézier curves, an equal-error linear approximation algorithm is used to discretize them into a sequence of polygon vertices, and an upper limit for the approximation error is set. The equal-error linear approximation algorithm uses chord height error as the approximation criterion, that is, the maximum normal distance between each chord segment and the original curve does not exceed the preset upper limit of error, which is taken as a value of the minimum linewidth of the process. or The smaller of the two.

[0044] S114. Perform a Boolean union operation on all transformed polygons, merge polygons that overlap or have zero margins, eliminate internal boundaries, and obtain at least one simple polygon.

[0045] S115. Extract the sequence of outer boundary vertices of the simple polygon and arrange them in clockwise order to serve as the edge contour of the initial metal trace pattern.

[0046] S12. Identify the edge contour lines of the initial metal trace pattern, perform spline curve fitting on the edge contour lines, and use the control points of the spline curves used for fitting as control nodes.

[0047] The spline curve fitting process is as follows:

[0048] S121. Extract discrete sampling points from the polygon vertex sequence of the edge contour line at equal arc length intervals to form a discrete point set of the contour.

[0049] S122. Perform chord length parameterization on the discrete point set of the contour to obtain the parameter values ​​corresponding to each sampling point.

[0050] S123. Use a cubic B-spline or NURBS curve as the fitting curve, set the curve degree and the number of control points. Specifically, the number of control points is initially set to one-third to one-half of the number of discrete sampling points of the contour, and does not exceed 100. Construct a least squares fitting equation to minimize the sum of squared errors between the values ​​of the fitting curve at the sampling point parameter values ​​and the coordinates of the sampling points.

[0051] S124. Solve the least squares fitting equation to obtain the coordinates of the control points of the spline curve.

[0052] S125. If the fitting error exceeds the preset tolerance, for example, 1% of the minimum linewidth, which is specified by the manufacturing process document of the RF chip, the number of control points is increased successively, and steps S123 to S124 are repeated until the error meets the requirements. The final control point is then used as the control node.

[0053] S13. Read the horizontal and vertical coordinate values ​​of each control node in the layout plane coordinate system and combine them into a control node coordinate set.

[0054] It should be noted that the breadth-first search, Boolean union operation, and equal-error linear approximation in step S11, and the chord length parameterization and least-squares B-spline fitting method in step S12 are all well-known numerical calculation methods in the field, and will not be described in detail here.

[0055] S2. Construct the original electromagnetic field model based on the control node coordinate set, apply excitation, and calculate the reflection coefficient at the output port. The specific execution is as follows:

[0056] S21. Construct a layout geometry model for electromagnetic simulation using the control node coordinate set. The specific construction process is as follows: stretch the edge contour of the initial metal trace pattern along the direction perpendicular to the layout plane to the metal layer thickness value specified in the process file to form a three-dimensional metal body; read the dielectric layer stack structure in the process file, and add the dielectric layer, ground layer and substrate below and above the metal body in sequence. Each layer is assigned corresponding material properties, including conductivity for the metal body, relative permittivity and loss tangent for the dielectric layer, and the ground layer is regarded as an ideal conductor.

[0057] S22. Based on operating frequency and the relative permittivity of the medium Calculate the operating wavelength , Given the speed of light in a vacuum, the maximum cell side length of the initial uniform grid is set to not exceed [a certain value]. Uniform mesh generation is performed using second-order tetrahedral elements; a rectangular port surface is constructed at each port cross-section of the network to be matched, and a lumped port excitation is applied, which can be used to set the port impedance as an example. Incident wave amplitude The model with the mesh, port excitation, and material properties set is defined as the original electromagnetic field model.

[0058] S23. Perform full-wave electromagnetic field numerical calculations based on the finite element method on the original electromagnetic field model. Obtain the scattering parameter matrix of the entire port by solving Maxwell's equations in the frequency domain. Extract the voltage reflection coefficient of the output port as the output port reflection coefficient. Specifically:

[0059] An ideal matching layer is set at the outer boundary of the solution domain, and ideal conductor boundary conditions are set on the metal surface. .

[0060] Discrete Helmholtz equations based on the finite element method This forms a system of algebraic equations, in the Helmholtz equations. It is the electric field intensity vector to be solved. It is the curl operator. It is the relative magnetic permeability of the material. It is the free space wavenumber, defined as , This is a preset constant.

[0061] Solving using a direct solver (such as MUMPS), with the relative residual convergence tolerance set as... .

[0062] Extract the complex amplitudes of the incident and reflected waves from each port from the solution results, and construct the scattering parameter matrix. .

[0063] Determine the index of the output port in the scattering parameter matrix Read As the output port voltage reflection coefficient This represents the result of a ratio calculation with the voltage amplitude incident on the output port as the denominator and the voltage amplitude reflected back from the output port as the numerator.

[0064] S3. Construct an adjoint electromagnetic field model that satisfies the reciprocity relationship with the original electromagnetic field model. Calculate the sensitivity of the output port reflection coefficient to the coordinates of each control node using the original field distribution and the adjoint field distribution, and combine them to obtain the sensitivity gradient vector.

[0065] In this embodiment, step S3 includes:

[0066] S31. The conjugate derivative of the output port reflection coefficient with respect to the port voltage is set as the excitation source of the adjoint electromagnetic field model; the conjugate derivative is derived directly from the definition of the output port reflection coefficient based on the adjoint sensitivity analysis theory and using the well-known complex differentiation rules in the field, and the specific value is automatically calculated by the finite element solver on the port reference surface.

[0067] S32. Solve the accompanying electromagnetic field model to obtain the accompanying electric field. With accompanying magnetic field Spatial distribution.

[0068] S33. The current geometric contour of the map is described as the zero isosurface of the horizontal set function, based on the theory of shape derivatives, utilizing the original field distribution. With the accompanying field distribution Calculate the reflection coefficient of the output port The normal gradient of the contour-normal velocity field is obtained by applying the functional gradient of the contour-normal velocity field. The distribution on the boundary. The calculation formula is as follows:

[0069] ;

[0070] in , Here are the dielectric constant and permeability of the metallic region. , The dielectric constant and permeability of the surrounding medium are given by the given dielectric constant and permeability. For magnetic flux density, satisfying , For the accompanying magnetic flux density, satisfying To obtain the profile normal velocity field with the dimension of length, the output of the calculation formula needs to be combined with the normalization factor. Multiply, ,in The vacuum permittivity, Let be the electric field amplitude corresponding to the incident wave at the port, under the condition that the electromagnetic field on the port cross-section is approximately a uniform transverse electromagnetic mode. Port excitation voltage amplitude and port characteristic impedance according to Confirmed, among which This represents the equivalent area of ​​the port's cross-section; where the port's cross-sectional dimensions are not explicitly defined, It can be directly taken as the amplitude of the incident wave electric field intensity at the port, and output directly by the electromagnetic simulator on the port reference surface.

[0071] S34. The contour normal velocity field is extended from the boundary interpolation to the entire layout area using multiple quadratic radial basis functions: interpolation nodes are selected on the boundary, and the distance from each interpolation node to the target point is used as the independent variable. The multiple quadratic radial basis functions are substituted into the function, which is expressed as the square root of 1 plus the square of the ratio of distance to shape parameter. A system of linear equations is constructed and solved to obtain the weight coefficients. The velocity value of any point in the layout is calculated using the weight coefficients, where the shape parameter is twice the average grid size.

[0072] S35. Based on the Lagrange multiplier distribution obtained from the adjoint field solution, calculate the gradient magnitude and mark the region with a gradient magnitude greater than a preset magnitude threshold as a region of strong electromagnetic field gradient. Apply anisotropic diffusion operation to the normal velocity of the contour within the region: the diffusion coefficient in the tangential direction is set to 10 times the diffusion coefficient in the normal direction. By iteratively solving the diffusion equation 10 times, the filtered velocity field is obtained to suppress false sawtooth patterns. It should be noted that the Lagrange multipliers are dual variables introduced by boundary condition constraints during the solution of the adjoint electromagnetic field model. They are numerically equivalent to the distribution of the tangential component of the adjoint electric field on the metal surface and can be directly extracted from the adjoint field solution results.

[0073] S36. Based on the ratio of the current contour curvature to the local electromagnetic simulation mesh size, adjust the reinitialization period of the level set function. Specifically, calculate the product of the curvature of each point on the current contour and the local mesh size of that point, and take the maximum value. If the maximum value is greater than 0.5, perform level set reinitialization every 5 iterations, resetting the level set function to the signed distance function; if it is between 0.2 and 0.5, perform it every 10 iterations; if it is less than or equal to 0.2, perform it every 20 iterations.

[0074] S37. For each control node, the profile segment affected by the node is determined by the support interval of its corresponding B-spline basis function. Within this segment, the filtered and interpolated normal velocity field is multiplied by the basis function value and integrated along the profile. The integration result is the sensitivity of the output port reflection coefficient to the abscissa of the control node. Similarly, the sensitivity to the ordinate is calculated. The sensitivities of all control nodes are arranged in order to form a sensitivity gradient vector.

[0075] S4. Using the sensitivity gradient vector as the optimization direction, the moving asymptote algorithm is used to update the control node coordinate set to obtain the updated layout geometry.

[0076] In this embodiment, step S4 includes:

[0077] Specifically, after obtaining the sensitivity gradient vector indicating the optimization direction, the geometry of the layout needs to be adjusted based on this vector. This step uses the moving asymptote algorithm, with the sensitivity gradient vector as the optimization direction, to iteratively update the set of control node coordinates, thereby generating a higher-performance updated layout geometry.

[0078] S41. Using the squared magnitude of the reflection coefficient at the output port as the objective function, and utilizing the current sensitivity gradient vector, construct a separable quadratic approximation subproblem of the moving asymptote algorithm by treating the coordinates of each control node as independent variables.

[0079] The idea behind the moving asymptote algorithm is to use the current design point... (i.e., the set of coordinates of the current control node) is near an explicit, separable convex function. To approximate the real, computationally complex implicit objective function For those containing A set of coordinate variables Its separable subproblems take the form of:

[0080] Minimize:

[0081] ;

[0082] The constraints are:

[0083] ;

[0084] In this subproblem It is the new set of control node coordinates to be solved. It is the objective function value at the current design point. and The coefficients are calculated based on the objective function value and the sensitivity gradient vector at the current point. Specifically, for the ... Given coordinate variables, if the corresponding gradient components in the sensitivity gradient vector... , , ;like , , ,like , This ensures that the approximate function matches the true function on the first order. It is the first During the nth iteration The current value of each coordinate variable. and Indicates the first During the nth iteration The downward and upward asymptotes of each coordinate variable constrain the curvature of the approximate function. and It is the first The lower and upper bounds of the range of movement for each coordinate variable are determined. Since each term within the summation symbol is related to only one variable, the entire optimization problem is decomposed into... Each is an independent subproblem.

[0085] S42. Solve analytically for each one-dimensional subproblem and project the solution onto the range of trace spacing and minimum line width constraints. Use the difference between the old and new coordinate sets to obtain the optimization increment of each control node.

[0086] S43. After adding the current coordinates to the optimization increment, limit the single displacement amplitude with the trust region radius (initially 0.1 times the minimum linewidth) as the upper limit, scale the over-limit displacement proportionally, and trim and correct the coordinates that violate the process constraints to generate the updated layout geometry profile.

[0087] S5. Perform curvature-adaptive non-uniform meshing on the updated layout geometry to obtain the electromagnetic simulation mesh. Solve the original electromagnetic field model again based on the electromagnetic simulation mesh to obtain the updated output port reflection coefficient.

[0088] Specifically, after obtaining the updated layout geometry using the moving asymptote algorithm, its electromagnetic properties need to be accurately evaluated to verify the effectiveness of the geometry update. Directly using the initial uniform mesh from step S2 is unsuitable because the geometry has changed, and the original mesh may not accurately capture the details of the new profile, especially in areas where the electromagnetic field may change drastically. Therefore, this step primarily involves performing a curvature-adaptive non-uniform mesh partitioning on the updated layout geometry to generate a high-quality electromagnetic simulation mesh, and recalculating based on this mesh to obtain the updated output port reflection coefficient.

[0089] In this embodiment, step S5 includes:

[0090] The curvature distribution of each geometric boundary segment in the updated layout geometric profile is calculated using differential geometry formulas. Specifically, the updated layout geometric profile is represented as a cubic B-spline curve, and the first-order derivative vector is calculated for each sampling point. and second derivative vector , Represents the position vector of the sampling point. The arc length parameter of the curve is represented by differential geometry formulas. Calculate the curvature value.

[0091] Mesh refinement is performed on regions with curvature values ​​greater than a preset curvature threshold, and mesh sparsification is performed on regions with curvature values ​​less than or equal to the preset curvature threshold. The specific rules are as follows:

[0092] Within the encrypted region, the target mesh cell side length is set to the initial uniform mesh side length. .

[0093] In sparse regions, the target grid cell side length is set to 1.5 times the side length of the initial uniform grid.

[0094] At the boundary between the dense and sparse regions, transition elements are generated through a gradual transition method (the change rate of the edge length of each element does not exceed 1.2 times) to avoid numerical instability caused by abrupt changes in mesh size. After the meshing is completed, the electromagnetic simulation mesh is output.

[0095] The preset curvature threshold is defined as The ratio of the minimum straight line segment length to the minimum straight line segment length in the current layout is obtained by: traversing all boundary segments in the geometric contour of the current layout; if a straight line segment exists, the minimum length of each straight line segment is taken; if the contour is entirely composed of curves and straight line segments cannot be extracted, then one percent of the total perimeter of the contour is used as the substitute value for the minimum straight line segment length.

[0096] The full-wave electromagnetic field numerical calculation was re-executed on the electromagnetic simulation mesh to obtain the updated output port reflection coefficient.

[0097] S6. Calculate the difference between the output port reflection coefficient of the current iteration and the previous iteration as the target change amount. Based on the target change amount, determine whether the current optimization state is in the acceleration interval or the oscillation interval. If it is in the acceleration interval, increase the step size of the moving asymptote algorithm and decrease the penalty factor. If it is in the oscillation interval, decrease the step size of the moving asymptote algorithm and increase the penalty factor.

[0098] In this embodiment, step S6 determines whether the current optimization state is in an acceleration zone or an oscillation zone based on the target change amount. Specifically, the determination process is as follows: if the target change amount is negative for three consecutive iterations, it is determined to be in an acceleration zone; if the target change amount in this iteration is positive or has a different sign than the target change amount in the previous iteration, it is determined to be in an oscillation zone. Furthermore, if the target change amount is zero, the current zone determination remains unchanged, and the zone determination result from the previous iteration is used.

[0099] If the system is in the acceleration zone, then 20% of the original parameter value is used as the adjustment amount to increase the step size of the moving asymptote algorithm and decrease the penalty factor.

[0100] If the system is in an oscillation range, then 30% of the original parameter value is used as the adjustment amount to reduce the step size of the moving asymptote algorithm and increase the penalty factor.

[0101] Specifically, the operation corresponding to the 20% adjustment is to multiply the current step size by 1.2 and the penalty factor by 0.8; the operation corresponding to the 30% adjustment is to multiply the step size by 0.7 and the penalty factor by 1.3.

[0102] The adjustment range of the step size and penalty factor is determined based on the stability of the optimization state: in the acceleration zone, the optimization trend is clear and stable, and a smaller adjustment range (20%) is used to prevent the favorable trend from being destroyed due to over-adjustment; in the oscillation zone, the optimization is repetitive, and a larger adjustment range (30%) is needed to quickly suppress oscillations and guide the algorithm back to a stable descent path. The above adjustment range values ​​are engineering-optimized values ​​that can be determined through a limited number of experiments in this field, and their specific values ​​can be adjusted within ±10% according to the convergence speed and stability of the actual optimization process.

[0103] The adjusted step size and penalty factor are then substituted into the moving asymptote algorithm execution process in the next iteration.

[0104] It should be noted that for the first iteration, the reflection coefficient of the output port corresponding to the initial layout is used as the initial value of the reflection coefficient of the output port in the previous iteration, and the target change amount of the first iteration is set to a preset negative value (such as -0.01), so that the algorithm is initially in the acceleration range by default.

[0105] S7. Repeat steps S2 to S6 until the reflection coefficient of the output port meets the convergence condition, and output the final RF chip layout.

[0106] The convergence condition in step S7 is: the relative change in the magnitude of the output port reflection coefficient in two consecutive iterations is less than a preset change threshold, and the current magnitude of the output port reflection coefficient is less than the design index value.

[0107] Or the number of iterations reaches the preset maximum number of iterations.

[0108] It should be noted that the calculation process for the relative change is as follows: calculate the difference between the magnitude of the reflection coefficient of the output port in the current iteration and the magnitude of the reflection coefficient of the output port in the previous iteration, divide the difference by the magnitude of the reflection coefficient of the output port in the previous iteration, and take the absolute value of the ratio as the relative change.

[0109] The preset change threshold value is 0.001; the design index value is the upper limit threshold value of the output port reflection coefficient modulus value preset according to the application scenario or circuit design requirements of the RF chip, which is directly specified by the designer, and the example value is 0.2.

[0110] See Figure 2 As shown, the second embodiment of the present invention provides a radio frequency chip layout generation system based on a high-order algorithm, including: a layout initialization module, a forward solving module, a sensitivity analysis module, an optimization and update module, a mesh reshaping module, an adaptive adjustment module, and an iterative control module.

[0111] The layout initialization module is connected to the forward solving module, the forward solving module is connected to the sensitivity analysis module, the sensitivity analysis module is connected to the optimization and update module, the optimization and update module is connected to the mesh reshaping module, the mesh reshaping module is connected to the adaptive adjustment module, and the adaptive adjustment module is connected to both the iteration control module and the optimization and update module. The adaptive adjustment module stores the adjusted step size and penalty factor in a memory for the optimization and update module to read in the next iteration.

[0112] The layout initialization module is used to obtain the initial layout geometry of the RF chip, discretize the initial layout geometry into multiple control nodes, and generate a set of control node coordinates.

[0113] The forward solver module is used to construct the original electromagnetic field model based on the control node coordinate set and apply excitation to calculate the reflection coefficient of the output port.

[0114] The sensitivity analysis module is used to construct an adjoint electromagnetic field model that satisfies the reciprocity relationship with the original electromagnetic field model. It uses the original field distribution and the adjoint field distribution to calculate the sensitivity of the output port reflection coefficient to the coordinates of each control node, and combines them to obtain the sensitivity gradient vector.

[0115] The optimization and update module is used to update the control node coordinate set with the sensitivity gradient vector as the optimization direction and the moving asymptote algorithm to obtain the updated geometric contour of the layout.

[0116] The mesh re-division module is used to perform curvature-adaptive non-uniform mesh subdivision on the updated geometric contour of the layout to obtain the electromagnetic simulation mesh. Based on the electromagnetic simulation mesh, the original electromagnetic field model is solved again to obtain the updated output port reflection coefficient.

[0117] The adaptive adjustment module is used to calculate the difference between the output port reflection coefficient of the current iteration and the previous iteration as the target change amount. Based on the target change amount, it determines whether the current optimization state is in the acceleration interval or the oscillation interval. If it is in the acceleration interval, the step size of the moving asymptote algorithm is increased and the penalty factor is decreased. If it is in the oscillation interval, the step size of the moving asymptote algorithm is decreased and the penalty factor is increased.

[0118] The iterative control module controls the forward solution module, sensitivity analysis module, optimization update module, mesh reshaping module, and adaptive adjustment module to execute in a loop until the output port reflection coefficient meets the convergence condition and the final RF chip layout is output.

[0119] The RF chip layout generation system based on a high-order algorithm described in this embodiment can be deployed on a general-purpose computer platform or dedicated hardware device. The system includes: at least one processor (such as a CPU, GPU, or FPGA), a memory coupled to the processor, and computer program instructions stored in the memory and executable by the processor. The memory is also used to store the RF chip layout data, process documents, control node coordinate sets, sensitivity gradient vectors, electromagnetic simulation meshes, and intermediate data during the iteration process.

[0120] The layout initialization module, forward solving module, sensitivity analysis module, optimization and update module, mesh reshaping module, adaptive adjustment module, and iterative control module are all implemented by the processor executing corresponding computer program instructions; or, some of these modules (such as the full-wave electromagnetic field numerical calculation unit in the forward solving module) can be implemented as hardware accelerators (such as application-specific integrated circuits (ASICs) or field-programmable gate arrays (FPGAs) to improve computational efficiency.

[0121] Data transfer between modules is accomplished through the system bus or shared memory, and the iteration control module coordinates the execution order of each module through software interrupts or function calls.

[0122] The above content is merely an example and illustration of the concept of the present invention. Those skilled in the art can make various modifications or additions to the specific embodiments described, or use similar methods to replace them, as long as they do not deviate from the concept of the invention or exceed the scope defined by the present invention, and all such modifications and additions should fall within the protection scope of the present invention.

Claims

1. A method for generating radio frequency chip layouts based on high-order algorithms, characterized in that, include: S1. Obtain the initial layout geometry of the RF chip, discretize the initial layout geometry into multiple control nodes, and generate a set of control node coordinates; S2. Construct the original electromagnetic field model based on the control node coordinate set, apply excitation and calculate the reflection coefficient of the output port; S3. Construct an adjoint electromagnetic field model that satisfies the reciprocity relationship with the original electromagnetic field model. Calculate the sensitivity of the output port reflection coefficient to the coordinates of each control node using the original field distribution and the adjoint field distribution. Combine them to obtain the sensitivity gradient vector. S4. Using the sensitivity gradient vector as the optimization direction, the moving asymptote algorithm is used to update the control node coordinate set to obtain the updated layout geometry. S5. Perform curvature-adaptive non-uniform meshing on the updated layout geometry to obtain the electromagnetic simulation mesh. Solve the original electromagnetic field model again based on the electromagnetic simulation mesh to obtain the updated output port reflection coefficient. S6. Calculate the difference between the output port reflection coefficient of the current iteration and the previous iteration as the target change amount. Based on the target change amount, determine whether the current optimization state is in the acceleration interval or the oscillation interval. If it is in the acceleration interval, increase the step size of the moving asymptote algorithm and decrease the penalty factor. If it is in the oscillation interval, decrease the step size of the moving asymptote algorithm and increase the penalty factor. S7. Repeat steps S2 to S6 until the reflection coefficient of the output port meets the convergence condition, and output the final RF chip layout.

2. The method for generating RF chip layout based on a high-order algorithm according to claim 1, characterized in that, Step S1 includes: Obtain the initial metal trace pattern of the network to be matched in the RF chip, wherein the network to be matched is connected to the electrical port of the active device and the output port of the chip; Identify the edge contour of the initial metal trace pattern, perform spline curve fitting on the edge contour, and use the control points of the spline curve used for fitting as control nodes. Read the horizontal and vertical coordinate values ​​of each control node in the map plane coordinate system and combine them into a control node coordinate set.

3. The method for generating RF chip layout based on a high-order algorithm according to claim 1, characterized in that, Step S2 includes: A layout geometry model for electromagnetic simulation is constructed using the set of control node coordinates; The geometric model of the layout is initially divided into uniform grids, and excitation is applied to each port of the network to be matched to obtain the original electromagnetic field model; The original electromagnetic field model is subjected to full-wave electromagnetic field numerical calculation based on the finite element method. The scattering parameter matrix of the entire port is obtained by solving Maxwell's equations in the frequency domain, and the voltage reflection coefficient of the output port is extracted as the output port reflection coefficient.

4. The method for generating RF chip layout based on a high-order algorithm according to claim 1, characterized in that, Step S3 includes: The conjugate derivative of the output port reflection coefficient with respect to the port voltage is set as the excitation source of the adjoint electromagnetic field model; Solve the accompanying electromagnetic field model to obtain the spatial distribution of the accompanying electric and magnetic fields; The geometric contour of the current map is described as the zero isosurface of the horizontal set function. Based on the theory of shape derivative, the functional gradient of the output port reflection coefficient with respect to the contour normal moving velocity field is calculated using the original field distribution and the adjoint field distribution. Radial basis functions are used to extend the contour normal velocity field from boundary interpolation to the entire layout area; Based on the Lagrange multiplier distribution obtained from the adjoint field solution, the region of strong electromagnetic field gradient is automatically located, and an anisotropic diffusion operation is applied to the normal moving velocity of the contour within the region. Adjust the reinitialization period of the level set function based on the ratio of the current contour curvature to the local electromagnetic simulation mesh size; The normal velocity field after interpolation and diffusion is mapped to the coordinate sensitivity at each control node, and the sensitivity of all control nodes is collected to form a sensitivity gradient vector.

5. The method for generating RF chip layout based on a high-order algorithm according to claim 1, characterized in that, Step S4 includes: With the objective of minimizing the magnitude of the reflection coefficient at the output port, and combining the current set of control node coordinates and the sensitivity gradient vector, a separable subproblem of the moving asymptote algorithm is constructed. Solve the separable subproblems to obtain the optimized increments of the coordinates of each control node; The coordinates of the control nodes are updated incrementally based on optimization, and trust region movement constraints are applied to the displacement of the control nodes to generate the updated layout geometry.

6. The method for generating RF chip layout based on a high-order algorithm according to claim 1, characterized in that, Step S5 includes: Calculate the curvature distribution of each geometric boundary segment in the updated layout geometry; Mesh refinement is performed on regions with curvature values ​​greater than a preset curvature threshold, and mesh sparsification is performed on regions with curvature values ​​less than or equal to the preset curvature threshold to obtain an electromagnetic simulation mesh. The full-wave electromagnetic field numerical calculation was re-executed on the electromagnetic simulation mesh to obtain the updated output port reflection coefficient.

7. The method for generating RF chip layout based on a high-order algorithm according to claim 1, characterized in that, In step S6, the current optimization state is determined to be in the acceleration zone or the oscillation zone based on the target change amount, including the following rules: when the target change amount is negative for three consecutive iterations, it is determined to be in the acceleration zone; when the target change amount is positive or has a different sign than the previous iteration, it is determined to be in the oscillation zone.

8. The method for generating RF chip layout based on a high-order algorithm according to claim 1, characterized in that, After obtaining the initial layout geometry of the RF chip in step S1, and before discretizing it into multiple control nodes, the method further includes: The initial layout geometry is initialized as a level set function, and the symbol distance function distribution of the level set function within the layout region is calculated.

9. The method for generating RF chip layout based on a high-order algorithm according to claim 1, characterized in that, The convergence condition in step S7 is: The relative change in the magnitude of the output port reflection coefficient is less than the preset change threshold in two consecutive iterations, and the current magnitude of the output port reflection coefficient is less than the design index value; Alternatively, the number of iterations may reach the preset maximum number of iterations.

10. A radio frequency chip layout generation system based on a high-order algorithm, used to implement the method described in any one of claims 1 to 9, characterized in that, include: The layout initialization module is used to obtain the initial layout geometry of the RF chip, discretize the initial layout geometry into multiple control nodes, and generate a set of control node coordinates. The forward solver module is used to construct the original electromagnetic field model based on the control node coordinate set, apply excitation, and calculate the reflection coefficient of the output port. The sensitivity analysis module is used to construct an adjoint electromagnetic field model that satisfies the reciprocity relationship with the original electromagnetic field model. It uses the original field distribution and the adjoint field distribution to calculate the sensitivity of the output port reflection coefficient to the coordinates of each control node, and combines them to obtain the sensitivity gradient vector. The optimization and update module is used to update the control node coordinate set with the sensitivity gradient vector as the optimization direction and the moving asymptote algorithm to obtain the updated layout geometry. The mesh re-division module is used to perform curvature-adaptive non-uniform mesh subdivision on the updated layout geometry to obtain the electromagnetic simulation mesh. Based on the electromagnetic simulation mesh, the original electromagnetic field model is solved again to obtain the updated output port reflection coefficient. The adaptive adjustment module is used to calculate the difference between the output port reflection coefficient of the current iteration and the previous iteration as the target change amount. Based on the target change amount, it determines whether the current optimization state is in the acceleration zone or the oscillation zone. If it is in the acceleration zone, the step size of the moving asymptote algorithm is increased and the penalty factor is decreased. If it is in the oscillation zone, the step size of the moving asymptote algorithm is decreased and the penalty factor is increased. The iterative control module controls the forward solution module, sensitivity analysis module, optimization update module, mesh reshaping module, and adaptive adjustment module to execute in a loop until the output port reflection coefficient meets the convergence condition and the final RF chip layout is output.

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