Word line refresh circuit, memory and word line refresh method

Abstract

The present disclosure relates to the technical field of dynamic storage, and particularly relates to a word line refresh circuit, a memory and a word line refresh method. The circuit comprises a first voltage power supply, a ground power supply, an electricity storage module and a word line voltage module. The first voltage power supply, the ground power supply and the electricity storage module are respectively coupled to the word line voltage module. The maximum voltage value of the electricity storage module is less than or equal to the first voltage. In a first time period, the electricity storage module is configured to provide voltage to the word line voltage module. In a second time period, the electricity storage module is closed, and the first voltage power supply is configured to provide the first voltage to the word line voltage module. In a third time period, the first voltage power supply is closed, the electricity storage module is turned on with the word line voltage module, and the word line voltage module is configured to discharge the electricity storage module. In a fourth time period, the electricity storage module is closed, the ground power supply is turned on with the word line voltage module, and the word line voltage of the word line voltage module is pulled down to the ground voltage. The circuit can effectively reduce the dynamic power consumption generated in the word line refresh process.

Description

Technical Field

[0001] This disclosure relates to the field of dynamic storage technology, and in particular to a word line refresh circuit, a memory, and a word line refresh method. Background Technology

[0002] DRAM (Dynamic Random-Access Memory) is widely used in various electronic systems and computing devices due to its advantages such as high integration density, fast read / write speed, and low cost. A DRAM memory array consists of memory cells arranged in a matrix, with each cell typically containing a transistor and a storage capacitor. Word lines (WL) connect to the gates of the transistors in the same row of memory cells, controlling the on / off state of that row of cells to enable data reading or writing.

[0003] During data reading or writing, word lines need to switch frequently between high voltage (typically a positive voltage greater than 2 volts) and low voltage (typically a negative voltage). This high-frequency, high-swing switching process results in huge dynamic power consumption for the chip, and brings about potential heat generation and reliability issues. Summary of the Invention

[0004] This disclosure provides a word line refresh circuit, a memory, and a word line refresh method to solve the technical problem of large dynamic power consumption during word line refresh in related technologies.

[0005] According to some embodiments, a first aspect of this disclosure provides a word line refresh circuit, the word line refresh circuit comprising: A first voltage power supply, a ground power supply, a power storage module, and a word line voltage module; the first voltage power supply, the ground power supply, and the power storage module are respectively coupled to the word line voltage module; the maximum voltage value of the power storage module is less than or equal to the first voltage; During the first time period, the energy storage module is configured to provide voltage to the word line voltage module; During the second time period, the energy storage module is turned off, and the first voltage power supply is configured to provide the first voltage to the word line voltage module; During the third time period, the first voltage power supply is turned off, the energy storage module is connected to the word line voltage module, and the word line voltage module is configured to discharge to the energy storage module. During the fourth time period, the energy storage module is turned off, the ground power supply is connected to the word line voltage module, and the word line voltage of the word line voltage module is pulled down to ground voltage; The first time period is earlier than the second time period, the second time period is earlier than the third time period, and the third time period is earlier than the fourth time period.

[0006] In one embodiment of this disclosure, the word line refresh circuit further includes: a second voltage power supply coupled to the word line voltage module, wherein the second voltage provided by the second voltage power supply is a negative voltage; During the fifth time period, the word line voltage module is connected to the second voltage power supply, and the word line voltage is pulled down to a negative voltage; The fifth time period is later than the fourth time period.

[0007] In one embodiment of this disclosure, the maximum voltage value of the energy storage module is half of the first voltage.

[0008] In one embodiment of this disclosure, the distance from the energy storage module to the word line voltage module is less than the distance from the first voltage power supply to the word line voltage module, and / or less than the distance from the second voltage power supply to the word line voltage module, and / or less than the distance from the ground power supply to the word line voltage module.

[0009] In one embodiment of this disclosure, the first voltage power supply is connected to the word line voltage module via a first switch, the energy storage module is connected to the word line voltage module via a second switch, the ground power supply is connected to the word line voltage module via a third switch, and the second voltage power supply is connected to the word line voltage module via a fourth switch; The first switch, the second switch, the third switch, and the fourth switch are turned on at different times.

[0010] In one embodiment of this disclosure, at the end of the fifth time period, the word line corresponding to the word line voltage module is in the off phase; Before the next word line is turned on, the third switch is in the on state, the word line is connected to the ground power supply, and the word line voltage rises from the negative voltage to the ground voltage.

[0011] In one embodiment of this disclosure, during the first time period of the word line activation process, the second switch is in the on state, and the energy stored in the energy storage module is shared with the word line. The energy stored in the energy storage module originates from the energy released by the word line voltage module in the previous third time period.

[0012] In one embodiment of this disclosure, at the end of the first time period and at the end of the third time period, the word line voltage is half of the first voltage.

[0013] In one embodiment of this disclosure, the word line refresh cycle of the word line refresh circuit includes: a first time period, a second time period, a word line data read / write time period, a third time period, a fourth time period, and a fifth time period arranged in chronological order; During the word line data read / write period, the word line voltage remains unchanged.

[0014] In one embodiment of this disclosure, the energy storage module includes an energy storage capacitor and a voltage regulator, wherein the voltage regulator is used to lock the voltage of the energy storage capacitor at a preset reference potential before the first time period. The voltage regulator is connected to the energy storage capacitor.

[0015] In one embodiment of this disclosure, the word line refresh circuit is applied to the memory, and the energy storage module further includes a voltage regulator switch, wherein the voltage regulator is connected to the energy storage capacitor through the voltage regulator switch; The voltage regulator switch is turned on when the memory is powered on, turned off when the word line refresh circuit enters the word line refresh cycle, and turned on during the word line idle window period, which represents the period during which the word line refresh circuit does not enter the word line refresh cycle.

[0016] In one embodiment of this disclosure, the reference potential represents half of the first voltage.

[0017] According to some embodiments, a second aspect of this disclosure provides a memory comprising: a word line refresh circuit as described in any of the preceding claims.

[0018] In one embodiment of this disclosure, during the word line activation phase, the third switch, the second switch, and the first switch in the word line refresh circuit are sequentially turned on; during the word line deactivation phase, the second switch, the third switch, and the fourth switch in the word line refresh circuit are sequentially turned on. The first switch is located between the first voltage power supply and the word line voltage module, the second switch is located between the energy storage module and the word line voltage module, the third switch is located between the ground power supply and the word line voltage module, and the fourth switch is located between the word line voltage module and the second voltage power supply of the word line refresh circuit.

[0019] According to some embodiments, a third aspect of this disclosure provides a word line refresh method, the method being applied to a word line refresh circuit as described in any of the preceding claims, the method comprising: During the first time period, the energy storage module supplies voltage to the word line voltage module; During the second time period, the energy storage module is turned off, and the first voltage power supply provides the first voltage to the word line voltage module; During the third time period, the first voltage power supply is turned off, causing the word line voltage module to discharge to the energy storage module; During the fourth time period, the energy storage module is turned off, and the connection path between the ground power supply and the word line voltage module is made open, so as to pull the word line voltage down to the ground voltage.

[0020] The beneficial effects of the embodiments of this disclosure are as follows: The word line refresh circuit, memory, and word line refresh method in the embodiments of this disclosure include: a first voltage power supply, a ground power supply, a power storage module, and a word line voltage module; the first voltage power supply, the ground power supply, and the power storage module are respectively coupled to the word line voltage module; the maximum voltage value of the power storage module is less than or equal to the first voltage; in a first time period, the power storage module is configured to provide voltage to the word line voltage module; in a second time period, the power storage module is turned off, and the first voltage power supply is configured to provide the first voltage to the word line voltage module; in a third time period, the first voltage power supply is turned off, the power storage module and the word line voltage module are connected, and the word line voltage module is configured to discharge to the power storage module; in a fourth time period, the power storage module is turned off, the ground power supply and the word line voltage module are connected, and the word line voltage of the word line voltage module is pulled down to the ground voltage; wherein, the first time period is earlier than the second time period, the second time period is earlier than the third time period, and the third time period is earlier than the fourth time period. During word line refresh, this circuit performs segmented step-by-step switching of the word line voltage and recycles the charge, thereby effectively reducing the dynamic power consumption generated during word line refresh. This helps improve product reliability and yield, and is low in cost and highly feasible. Attached Figure Description

[0021] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure. It is obvious that the drawings described below are merely some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort.

[0022] In the attached diagram: Figure 1 This is a schematic diagram of the structure of a conventional word line refresh circuit provided in one embodiment of the present disclosure; Figure 2 This is a schematic diagram of the word line voltage waveform in a conventional word line refresh circuit provided in one embodiment of the present disclosure; Figure 3 This is a schematic diagram of the structure of a word line refresh circuit provided in one embodiment of the present disclosure. Figure 1 ; Figure 4 This is a schematic diagram of the structure of a word line refresh circuit provided in one embodiment of the present disclosure. Figure 2 ; Figure 5 This is a schematic diagram of the structure of a word line refresh circuit provided in one embodiment of the present disclosure. Figure 3 ; Figure 6 This is a schematic diagram of the switching timing in a word line refresh circuit provided in one embodiment of the present disclosure. Figure 1 ; Figure 7 This is a schematic diagram of the word line voltage waveform in a word line refresh circuit provided in one embodiment of the present disclosure; Figure 8 This is a schematic diagram of the structure of a word line refresh circuit provided in one embodiment of the present disclosure. Figure 4 ; Figure 9 This is a schematic diagram of the switching timing in a word line refresh circuit provided in one embodiment of the present disclosure. Figure 2 ; Figure 10 This is a schematic diagram of the structure of a memory provided in one embodiment of the present disclosure; Figure 11 This is a flowchart illustrating a word line refresh method provided in one embodiment of the present disclosure.

[0023] The attached figures are labeled as follows: - The level of the positive power supply in a traditional word line refresh circuit; V1 - Word line refresh control signal; - The level of the negative power supply in a traditional word line refresh circuit; V phDec -Word line signal; - The inverted signal of the word line refresh control signal; 1- Word line refresh circuit; 2- Memory; 110 - First voltage power supply; 120 - Ground power supply; 130 - Energy storage module; 140 - Word line voltage module; 150 - Second voltage power supply; k1 - First switch to be controlled; k2 - Second switch to be controlled; -First voltage; -Second voltage; - Storage capacitor; - Word line load capacitor; S1 - First switch; S2 - Second switch; S3 - Third switch; S4 - Fourth switch; S5 - Voltage regulator switch; 1301 - Voltage Regulator. Detailed Implementation

[0024] The following specific examples illustrate the implementation of this disclosure. Those skilled in the art can easily understand other advantages and effects of this disclosure from the content disclosed in this specification. This disclosure can also be implemented or applied through other different specific embodiments. Various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of this disclosure. In the absence of conflict, the following embodiments and features in the embodiments can be combined with each other.

[0025] It should be noted that the illustrations provided in the following embodiments are only schematic representations of the basic concept of this disclosure. The drawings only show components related to this disclosure and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0026] Numerous details are explored in the following description to provide a more thorough explanation of embodiments of the present disclosure. However, it will be apparent to those skilled in the art that embodiments of the present disclosure may be practiced without these specific details. In other embodiments, well-known structures and devices are shown in block diagram form rather than in detail to avoid obscuring embodiments of the present disclosure.

[0027] In the description of the embodiments of this disclosure, technical terms such as "first" and "second" are used only to distinguish different objects and should not be construed as indicating or implying relative importance or implicitly specifying the number, specific order, or primary or secondary relationship of the indicated technical features. In the description of the embodiments of this disclosure, "multiple" means two or more, unless otherwise explicitly defined. Similarly, "multiple sets" refers to two or more sets (including two sets), and "multiple pieces" refers to two or more pieces (including two pieces).

[0028] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this disclosure. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0029] In the description of the embodiments of this disclosure, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent three cases: A exists, A and B exist simultaneously, and B exists. Additionally, the character " / " in this document generally indicates that the preceding and following related objects have an "or" relationship.

[0030] In this application's embodiments, "electrical connection" or "electrical connection" refers to the ability of corresponding modules to transmit information via electrical signals. In specific implementations, "electrical connection" or "electrical connection" can refer to a direct connection between corresponding modules via wires, or an indirect connection between corresponding modules via other circuit structures. "Coupling" indicates a direct connection or an indirect connection via an intermediate medium, and also includes electrical connections. For those skilled in the art, the specific meaning of the above terms in this application's embodiments can be understood according to the specific circumstances.

[0031] To facilitate understanding of the technical solution disclosed herein, the application scenario in which this disclosure is situated is first introduced. A memory cell in a memory chip consists of transistors and memory capacitors. Word lines connect to the gates of transistors, and the voltage state of the word lines determines whether the transistors are on or off. When a read / write operation is required on a specific row of memory cells, the corresponding word line must first be selected, and the word line voltage is pulled up to a high voltage (typically a positive voltage greater than 2 volts) to turn on the transistor of that row of memory cells, establishing a charge path between the bit line and the memory capacitor. After the read / write operation is completed, the word line voltage is then pulled down to a low voltage (typically a negative voltage) to put the transistor in a deep off state, thus suppressing leakage current in the memory cell. Therefore, during the normal operation of a memory chip, each row operation (a read / write operation on a specific row of memory cells) is accompanied by a complete flip of the word line voltage between a high voltage (typically a positive voltage greater than 2 volts) and a low voltage (typically a negative voltage).

[0032] Figure 1 This is a schematic diagram of a conventional word line refresh circuit provided in one embodiment of the present disclosure. Please refer to... Figure 1 Traditional word line refresh circuits use an inverter structure, which includes a positive power supply connected in sequence (the positive power supply level is...). ), the first switch to be controlled k1, the second switch to be controlled k2, and the negative power supply (the level of the negative power supply is V1 indicates the received word line refresh control signal. The inverted signal representing V1. The signal generated at the connection point between the first controllable switch k1 and the second controllable switch k2 is the word line signal V. phDec Word line signal V phDec It can characterize the voltage state of the word line. In this conventional word line refresh circuit, the word line voltage, within one word line refresh cycle, first changes from the level of the negative power supply through charging. Rise to the level of the positive power supply Then, the level is reduced to the negative power supply level through discharge. . Figure 2 This is a schematic diagram of the word line voltage waveform in a conventional word line refresh circuit provided in one embodiment of the present disclosure. The waveform variation of the word line voltage in a conventional word line refresh circuit within a single word line refresh cycle can be referred to... Figure 2 .

[0033] In a traditional word line refresh circuit, the power consumption of a single word line refresh cycle can be mathematically expressed as: (Equation 1) in, This characterizes the power consumption per word line refresh cycle in a traditional word line refresh circuit. This indicates the power consumption of a traditional word line refresh circuit during the boost process of the word line refresh cycle. This characterizes the power consumption of a traditional word line refresh circuit during the voltage reduction process of the word line refresh cycle. Characterizes the word line load capacitance.

[0034] Assumption =2.8V, =-0.2V, then =6 Based on this, the inventors discovered that in traditional word line refresh circuits, the power consumption per word line refresh cycle is relatively large.

[0035] The mathematical expression for the dynamic power consumption caused by word line switching can be: (Equation 2) in, Characterizes the dynamic power consumption generated by word line flipping. Characterizes the switching amplitude of word line voltage. Characterizes the flip frequency of the letter lines. =2.8V, For example, -0.2V Through analysis, the inventors discovered that dynamic power consumption is proportional to the square of the flip amplitude. In traditional word line refresh circuits, due to the large flip amplitude and frequent flips of the word line voltage, the dynamic power consumption generated during the word line flipping process is relatively large.

[0036] Therefore, this disclosure provides a word line refresh circuit 1, a memory 2, and a word line refresh method to solve the technical problems of high power consumption and high dynamic power consumption in a single word line refresh cycle in the above-mentioned conventional word line refresh circuits. The word line refresh circuit 1, the memory 2, and the word line refresh method provided in this disclosure will be explained and described below by way of embodiments.

[0037] Please see Figure 3 , Figure 3 This is a schematic diagram of the structure of a word line refresh circuit provided in one embodiment of the present disclosure. Figure 1 ,like Figure 3 As shown, the word line refresh circuit 1 includes: A first voltage power supply 110, a ground power supply 120, an energy storage module 130, and a word line voltage module 140 are connected; the first voltage power supply 110, the ground power supply 120, and the energy storage module 130 are respectively coupled to the word line voltage module 140; the maximum voltage value of the energy storage module 130 is less than or equal to the first voltage. ; In the first time period, the energy storage module 130 is configured to provide voltage to the word line voltage module 140; During the second period, the energy storage module 130 is turned off, and the first voltage power supply 110 is configured to provide a first voltage to the word line voltage module 140. ; During the third period, the first voltage power supply 110 is turned off, the energy storage module 130 is connected to the word line voltage module 140, and the word line voltage module 140 is configured to discharge to the energy storage module 130. In the fourth period, the energy storage module 130 is turned off, and the ground power supply 120 is connected to the word line voltage module 140, increasing the word line voltage of the word line voltage module 140. Pulled down to ground voltage ; The first time period is earlier than the second time period, the second time period is earlier than the third time period, and the third time period is earlier than the fourth time period.

[0038] In some examples of this embodiment, the circuit can be applied to word line driving scenarios of memory chips to reduce dynamic power consumption during word line refresh.

[0039] In some examples of this embodiment, the first voltage power supply 110 can be a positive power supply. First voltage Characterized by the voltage output of the first voltage power supply 110, this first voltage It can be a positive voltage greater than 2V, such as 2.8V.

[0040] In some examples of this embodiment, ground power supply 120 is used to provide ground voltage. Ground voltage It is usually 0V.

[0041] In some examples of this embodiment, the energy storage module 130 represents a circuit module for recovering, storing and releasing word line charge.

[0042] In some examples of this embodiment, the word line voltage module 140 represents a voltage node in the word line refresh circuit 1 that is electrically connected to the word line, and the voltage it presents to the outside is the word line voltage. The word line voltage module 140 can be circuitically equivalent to a word line node.

[0043] In some examples of this embodiment, coupling refers to a direct or indirect connection between two or more circuit nodes or components, allowing energy, signal, or voltage fluctuations to be transmitted from one to the other. The form of coupling can be electrical connection, etc.

[0044] In some examples of this embodiment, the word line node is connected to the word line load capacitor. Word line load capacitor The parasitic capacitance of the word line itself, and the sum of the parasitic capacitances generated by the gates of the transistors in the memory cells connected to the word line.

[0045] In some examples of this embodiment, the voltage variation of the word line voltage module 140, i.e., the word line voltage of the word line voltage module 140. This directly determines the open and closed state of the character line.

[0046] In some examples of this embodiment, the maximum voltage value of the energy storage module 130 is limited to be less than or equal to a first voltage. Understandably, the maximum voltage value of the energy storage module 130 is set at the first voltage. Below, it is used to achieve segmented charge transfer when the voltage of the energy storage module 130 is between ground voltage. With the first voltage During this period, the energy storage module 130 can operate at word line voltage. During the rise of the word line voltage, charge is released to the word line voltage module 140, and during the fall of the word line voltage, charge is recovered from the word line voltage module 140, thereby maintaining the word line voltage... It acts as a charge transfer station during both the voltage rise and voltage fall processes.

[0047] In some examples of this embodiment, during a first time period (corresponding to the charge reuse stage), the energy storage module 130 is configured to provide voltage to the word line voltage module 140. That is, the charge stored in the energy storage module 130 is transferred to the word line voltage module 140 through charge sharing, thereby increasing the word line voltage. The charge increases. Since the charge in this stage comes from the charge recovered and stored in the energy storage module 130, the first voltage power supply 110 does not need to provide charge in this stage.

[0048] In some examples of this embodiment, during the second time period, the energy storage module 130 is turned off, and the first voltage power supply 110 is configured to provide a first voltage to the word line voltage module 140. During this phase, the first voltage power supply 110 only needs to replenish a portion of its charge to activate the word line. Assuming that at the end of the first time period, the word line voltage... It is 0.5 Therefore, in the second time period, the first voltage power supply 110 only needs to be supplemented by 0.5. The corresponding power level can be used to determine the voltage of the word line. Pull up This enables the character lines to be enabled.

[0049] In some examples of this embodiment, the first voltage power supply 110 is turned off during the third time period. Here, "the first voltage power supply 110 is turned off" means that the first voltage power supply 110 is in a non-operating state, or that the first voltage power supply 110 is disconnected from the word line voltage module 140.

[0050] In some examples of this embodiment, the third time period corresponds to the charge recovery phase. During the third time period, the charge on the word line voltage module 140 is transferred to the energy storage module 130 through charge sharing, thus reducing the word line voltage. The charge is reduced, thereby achieving charge recovery. The charge recovered in this stage is not released to ground and discarded, but is stored in the energy storage module 130, waiting to be reused in the first period of the next word line refresh cycle.

[0051] In some examples of this embodiment, the energy storage module 130 is turned off during the fourth time period. Here, "energy storage module 130 turned off" means that the energy storage module 130 is in a non-operating state, or that the energy storage module 130 is disconnected from the word line voltage module 140.

[0052] In some examples of this embodiment, during the fourth time period, the word line voltage module 140 discharges to the ground power supply 120, and the word line voltage... Pulled down to ground voltage .

[0053] Understandably, in this embodiment, during the word line activation process, the first voltage power supply 110 only provides a portion of the charge in the second time period. This contrasts with related technologies where a positive power supply needs to provide voltage to the word line. In this embodiment, the charge supply of the first voltage power supply 110 is significantly reduced during the word line turn-on process, covering the entire voltage range from negative to positive. During the word line turn-off process, a portion of the charge on the word line voltage module 140 is recovered and reused in the next word line refresh cycle, forming a charge recycling system.

[0054] This embodiment utilizes the charge recovery and reuse of the energy storage module 130, and the intermediate transition of the ground power supply 120 (to reduce the word line voltage before the word line is completely shut down). Pull down to ground voltage This significantly reduces the dynamic power consumption of word line switching, thereby reducing chip heat generation and reliability risks, helping to improve product reliability and yield, with lower cost and greater feasibility.

[0055] In this embodiment, the segmented, stepped toggle method of the word line refresh circuit 1 not only reduces dynamic power consumption but also improves the transient characteristics of the word line signal. Due to the word line voltage... Instead of a large, high-slope flip, the transition is gradual with multiple small steps, thus reducing the transient voltage change rate of the word line signal. (Word line voltage) The capacitive coupling noise generated by the change on adjacent bit lines is also reduced accordingly. This helps improve word line refresh reliability. At the same time, the lower transient voltage change rate mitigates the hot carrier injection effect, reduces the reliability risk during long-term device operation, and helps extend the chip's lifespan.

[0056] Figure 4 This is a schematic diagram of the structure of a word line refresh circuit provided in one embodiment of the present disclosure. Figure 2Please refer to Figure 4 In some embodiments, the word line refresh circuit 1 further includes: a second voltage power supply 150, coupled to the word line voltage module 140, and the second voltage power supply 150 provides a second voltage. It is a negative voltage; During the fifth time period, the word line voltage module 140 is connected to the second voltage power supply 150, and the word line voltage... It is pulled down to a negative voltage; The fifth period is later than the fourth period.

[0057] In some examples of this embodiment, the second voltage power supply 150 is characterized as being used to provide a second voltage. The negative power supply, the second voltage It can be -0.2V, etc.

[0058] In some examples of this embodiment, at the end of the fourth time period, the word line voltage It has been pulled down to ground voltage During the fifth time period, the word line voltage module 140 is connected to the second voltage power supply 150, and the word line voltage... From ground voltage The voltage is further pulled down to a negative voltage, thus completing the word line shutdown. In the chip, the word line voltage is reduced when the word line is shut down. Pulling the voltage down to a negative level can put the transistors in a deep cutoff state, reduce the subthreshold leakage current of the transistors, and improve the charge retention characteristics of the memory cells.

[0059] This embodiment, while maintaining the power consumption reduction effect brought about by charge recovery, uses the word line voltage in the fifth time period. Pulling down to a negative voltage ensures the integrity of the word line shutdown and reliable cutoff of the memory cell in its non-selected state. Simultaneously, due to the word line voltage... Before entering the fifth period, the voltage had already been pulled down to ground voltage by ground power supply 120 during the fourth period. Therefore, the second voltage power supply 150 only needs to consume the voltage from ground. To the second voltage The charge corresponding to this short voltage range is sufficient to shut down the word line. Compared to related technologies where the word line... In this embodiment, where all the charge carried needs to be neutralized at the negative power source, the charge consumption of the second voltage power source 150 is significantly reduced.

[0060] In some embodiments, the maximum voltage value of the energy storage module 130 is a first voltage. Half of it.

[0061] In some examples of this embodiment, the maximum voltage value of the energy storage module 130 is By setting the maximum voltage value of the energy storage module 130 to... This enables better charge recovery and reuse, and improves the rationality of the maximum voltage value of the energy storage module 130.

[0062] In some examples of this embodiment, the maximum voltage value of the energy storage module 130 is... In the case of the word line voltage at the end of the first time period Raised to At the end of the second time period, the word line voltage... from Pulled up to the first voltage In the third time period, the word line voltage... from Falling back to In the fourth time period, the word line voltage... from Pulled down to ground voltage In the fifth time period, the word line voltage... The low voltage is pulled down to the second voltage. .

[0063] In some examples of this embodiment, the mathematical expression for the power consumption per cycle can be: (Equation 3) in, This characterizes the power consumption of the word line refresh circuit 1 in this embodiment per cycle. Assuming... =2.8V, =-0.2V, then Compared to the 6 in related technologies The power consumption per cycle is significantly reduced.

[0064] In some embodiments, the distance from the energy storage module 130 to the word line voltage module 140 is less than the distance from the first voltage power supply 110 to the word line voltage module 140, and / or less than the distance from the second voltage power supply 150 to the word line voltage module 140, and / or less than the distance from the ground power supply 120 to the word line voltage module 140.

[0065] In some examples of this embodiment, in the chip layout design, the power storage module 130 is close to the word line voltage module 140, that is, the physical distance between the power storage module 130 and the word line voltage module 140 can be shorter than the physical distance from at least one of the power supplies to the word line voltage module 140.

[0066] In some examples of this embodiment, "distance" represents the length of the metal wire on the connection path.

[0067] In some examples of this embodiment, at the layout implementation level, the placement of the energy storage module 130 can be flexibly selected according to the chip's structure. As one implementation, for a 3D stacked structure, the energy storage module 130 can be integrated inside the array die. It is placed close to the word line driving area within the array die to shorten the charge transfer path between it and the word line voltage module 140. Alternatively, the energy storage module 130 can be placed on an off-chip substrate, using 3D stacked packaging technology to introduce it in a heterogeneous integration manner. This approach helps to improve the problem of the energy storage module 130 occupying core area in the chip's internal planar layout and the limitations of its physical layout.

[0068] Understandably, the efficiency of charge recovery and reuse depends on the losses along the charge transport path. In this embodiment, by shortening the physical distance between the energy storage module 130 and the word line voltage module 140, the resistance and parasitic capacitance of the metal lines along the charge sharing path can be reduced, thereby reducing energy loss during the round-trip transfer of charge between the energy storage module 130 and the word line voltage module 140, improving charge recovery efficiency, and enhancing power consumption reduction. Furthermore, a shorter transport path also helps to improve the response speed of charge sharing and improve word line voltage. Transient establishment characteristics in the first and third time periods.

[0069] Figure 5 This is a schematic diagram of the structure of a word line refresh circuit provided in one embodiment of the present disclosure. Figure 3 Please refer to Figure 5 In some embodiments, the first voltage power supply 110 is connected to the word line voltage module 140 via the first switch S1, the energy storage module 130 is connected to the word line voltage module 140 via the second switch S2, the ground power supply 120 is connected to the word line voltage module 140 via the third switch S3, and the second voltage power supply 150 is connected to the word line voltage module 140 via the fourth switch S4. The first switch S1, the second switch S2, the third switch S3, and the fourth switch S4 are turned on at different times.

[0070] In some examples of this embodiment, in terms of circuit connection, the first switch S1 is connected between the first voltage power supply 110 and the word line voltage module 140, for use in the second time period to switch the word line voltage. Pull up to the first voltage The second switch S2 is connected between the energy storage module 130 and the word line voltage module 140, used to realize charge sharing and recovery between the word line voltage module 140 and the energy storage module 130 in the first and third time periods. The third switch S3 is connected between the ground power supply 120 and the word line voltage module 140, used to convert the word line voltage... Charging or discharging to ground voltage The fourth switch S4 is connected between the second voltage power supply 150 and the word line voltage module 140, and is used to switch the word line voltage during the fifth time period. Pull down to the second voltage .

[0071] Figure 5 Chinese character line load capacitor One end is connected to the word line voltage module 140, and the other end is grounded.

[0072] In some examples of this embodiment, at most one switch is in the on state at any given time during a single word line refresh cycle.

[0073] In some examples of this embodiment, the aforementioned multiple switches (first switch S1, second switch S2, third switch S3, and fourth switch S4) can all be implemented using MOS (Metal Oxide Semiconductor) transistors. For example, NMOS (N-channel Metal Oxide Semiconductor) transistors, PMOS (P-channel Metal Oxide Semiconductor) transistors, or a transmission gate composed of NMOS and PMOS transistors connected in parallel can be used. The control terminals of the multiple switches can receive control signals generated by the timing control circuit to realize the phased conduction of the multiple switches in the above embodiments. Those skilled in the art will understand that any switching device capable of realizing the path conduction and disconnection function according to the control signal can be used to implement the first switch S1 to the fourth switch S4, and such equivalent substitutions are all within the scope of the present disclosure.

[0074] This embodiment controls the word line voltage by strictly limiting the mutual exclusion conduction of the first switch S1 to the fourth switch S4. The change process is divided into multiple independent stages, with each stage establishing a path between a power supply or energy storage module 130 and the word line voltage module 140. By adopting this configuration, the timing segmentation required for segmented charge transfer is achieved, and the circuit structure prevents the formation of direct short-circuit paths between different power supplies, reducing direct current and charge leakage between power supplies, and ensuring the safety of circuit operation and the efficiency of charge recovery.

[0075] In some embodiments, at the end of the fifth time period, the word line corresponding to the word line voltage module 140 is in the off phase; Before the next word line is turned on, the third switch S3 is in the ON state, the word line is connected to ground power supply 120, and the word line voltage... From the second voltage to the ground voltage .

[0076] In some examples of this embodiment, before entering the first time period of the next word line refresh cycle, the third switch S3 is closed, the other switches are open, and the word line voltage changes from the second voltage. Rise to ground voltage .

[0077] In some examples of this embodiment, by controlling the third switch S3 to be turned on after the word line is turned off and before it is turned on again, that is, before the first time period of the next word line refresh cycle, the word line voltage is reduced. From the second voltage Reset to ground voltage This ensures that the word line is in a defined initial voltage state, i.e., ground voltage, before each time it enters the first period of charge sharing. This setup ensures consistency and accuracy of the voltage conversion starting point during the charge reuse phase. Simultaneously, the reset process is completed via ground power supply 120, from the second voltage... voltage to ground The charging charge is provided by the ground power supply 120, and there is no need to draw charge from the first voltage power supply 110, so the overall power consumption reduction effect is not weakened.

[0078] In some embodiments, during the first period of the word line opening process, the second switch S2 is in the on state, and the energy stored in the energy storage module 130 is shared with the word line. The energy stored in the energy storage module 130 comes from the energy released by the word line voltage module 140 in the previous third period.

[0079] The first voltage is the maximum voltage of the energy storage module 130. For example, half of it. In some examples of this embodiment, during the charge recovery phase of the previous word line shutdown process, the word line voltage... from Discharge to At that time, the charge released by the word line voltage module 140 is transferred and stored in the energy storage module 130 via the second switch S2. During the first period when the word line is turned on, the stored charge is then shared back to the word line voltage module 140 via the second switch S2, thus increasing the word line voltage. From ground voltage Rise to .

[0080] This embodiment clarifies the charge recycling path: the energy storage module 130 recovers charge when the word line is off and releases charge when the word line is on. As the word line refresh cycle continues, a periodic charge cycle is formed. Through this cycle mechanism, the word line voltage... From ground voltage Rise to The process does not require drawing charge from the first voltage power supply 110, but only from the second time period. Rise to The charge is replenished by the first voltage power supply 110. This configuration reduces the charge consumption of the first voltage power supply 110 per cycle by about half.

[0081] In some embodiments, during the second period of the word line opening process, the second switch S2 is in the off state, the first switch S1 is in the on state, and the path between the word line voltage module 140 and the first voltage power supply 110 is connected. At the end of the second time period, the word line voltage Rise to the first voltage .

[0082] In some embodiments, during the third time period of the word line closing process, the first switch S1 is in the open state, the second switch S2 is in the closed state, the path between the word line voltage module 140 and the energy storage module 130 is connected, and the word line voltage... reduce.

[0083] In some embodiments, during the fourth period of the word line closing process, the second switch S2 is in the open state, the third switch S3 is in the closed state, and the path between the ground power supply 120 and the word line voltage module 140 is connected.

[0084] In some embodiments, during the fifth time period of the word line closing process, the third switch S3 is in the open state and the fourth switch S4 is in the closed state.

[0085] Understandably, the above settings can effectively control the first switch S1 to the fourth switch S4, thereby ensuring the stability of the word line refresh process.

[0086] In some embodiments, at the end of the first time period and the end of the third time period, the word line voltage... The first voltage Half of it.

[0087] In some examples of this embodiment, at the end of the first time period and at the end of the third time period, the word line voltage is When the first voltage At 2.8V, the word line voltage at the end of the first and third time periods. Both are 1.4V. This voltage value is determined by the voltage level of the energy storage module 130. The voltage of the energy storage module 130 is maintained at... Furthermore, the capacitance of the energy storage module 130 is much larger than the word line load capacitor. In this configuration, when the energy storage module 130 and the word line voltage module 140 share charge, due to the significant difference in capacitance ratios at their ends, the equilibrium voltage after charge sharing will approach the initial voltage of the energy storage module 130, i.e. The voltage of the energy storage module 130 itself undergoes only a negligible change before and after sharing.

[0088] In some examples of this embodiment, the charge sharing derivation logic at the end of the first time period and the end of the third time period can be expressed mathematically as follows: (Equation 4) By transforming equation 4, we can obtain: (Equation 5) because Thus, the word line voltages at the end of the first time period and the end of the third time period can be obtained. .

[0089] This embodiment will use the word line voltage after charge sharing. Control at the first voltage Half of this voltage value provides a definite starting voltage for charging the subsequent first voltage power supply 110 during the word line turn-on process and a definite ending voltage for charge recovery during the word line turn-off process, thus ensuring the symmetry and predictability of the voltage conversion process throughout the entire word line refresh cycle. Meanwhile, The capacitance configuration improves the energy storage capacitor The problem of large voltage fluctuations occurring during charge sharing affects word line voltage. It can stabilize at the end of both the first and third time periods. nearby.

[0090] In some embodiments, the word line refresh cycle of the word line refresh circuit 1 includes: a first time period, a second time period, a word line data read / write time period, a third time period, a fourth time period, and a fifth time period arranged in a timing sequence; During the word line data read / write period, the word line voltage It remains unchanged.

[0091] In some examples of this embodiment, the word line data read / write period is located after the second period and before the third period, during which the word line voltage... Stay The level.

[0092] In some examples of this embodiment, the word line data read / write period is the time window during which the chip performs data read or write operations on the memory cell of the selected row. During this period, the word line voltage... It needs to be kept stable at the first voltage. This ensures that the transistors in the memory cell are fully turned on, keeping the charge path between the storage capacitor and the bit line unobstructed, so that the data in the memory cell can be reliably read or written.

[0093] Understandably, by setting a word line data read / write period between the second and third time periods, the word line voltage is... After the voltage surge is completed, the voltage remains stable, providing reliable voltage conditions for data read and write operations. This configuration effectively ensures the performance of charge recovery and segmented charge transfer technologies, reducing power consumption without affecting the chip's normal data read and write functions. It balances power consumption characteristics and functional compatibility, demonstrating good practicality.

[0094] Figure 6 This is a schematic diagram of the switching timing in a word line refresh circuit provided in one embodiment of the present disclosure. Figure 1 Please refer to Figure 6 Before time T1, the third switch S3 is in the on state to reduce the word line voltage. From the second voltage Pull-up to ground voltage In the first time period (T1 to T2), the second switch S2 is on, and the other switches are off, allowing the energy stored in the energy storage module 130 to be shared with the word line. In the second time period (T2 to T3), the first switch S1 is on, and the other switches are off, connecting the word line to the first voltage power supply 110, thus enabling the word line to be turned on. The time interval from T3 to T4 includes the word line data read / write period arranged in sequence and the third time period. In the third time period, the second switch S2 is on, and the other switches are off, connecting the word line voltage module 140 to the energy storage module 130, enabling charge recovery. In the fourth time period (T4 to T5), the third switch S3 is on, and the other switches are off, connecting the word line voltage... Pulled down to ground voltage During the fifth time period (from time T5 to time T6), the fourth switch S4 is turned on, and the other switches are turned off, resulting in a change in word line voltage. Pulled down to the second voltage .

[0095] Figure 7 This is a schematic diagram of the word line voltage waveform in a word line refresh circuit provided in one embodiment of this disclosure. Please refer to... Figure 7 The first voltage is the maximum voltage of the energy storage module 130. Taking half of the value as an example, before time T1, the word line voltage Maintain at the second voltage By opening the third switch S3, word line discharge is achieved at time T1, and the word line voltage... Rise to ground voltage (0V). During the first time period (from time T1 to time T2), the second switch S2 is turned on, and the other switches are turned off, resulting in a word line voltage of 0V. It was pulled up at time T2. This allows for the reuse of the charge recovered in the previous stage. During the second time period (from T2 to T3), the first switch S1 is turned on, and the other switches are turned off. The first voltage power supply 110 charges the word lines, increasing the word line voltage. It was pulled up at time T3. The word line is activated. During the word line data read / write period and the third period (the time interval from time T3 to time T4 includes the word line data read / write period and the third period), the word line voltage... Maintain at At time T4, the word line voltage Pulled down to This enables charge recovery. During the fourth time period (T4 to T5), the third switch S3 is turned on, and the other switches are turned off, allowing the word line to discharge. At time T5, the word line voltage... Pulled down to During the fifth time period (from T5 to T6), the fourth switch S4 is turned on, and the other switches are turned off, charging the word line with the second voltage power supply 150. At time T6, the word line voltage... Pulled down to the second voltage Complete the word line closing.

[0096] Figure 8 This is a schematic diagram of the structure of a word line refresh circuit provided in one embodiment of the present disclosure. Figure 4 Please refer to Figure 8 In some embodiments, the energy storage module 130 includes an energy storage capacitor. And the low-dropout regulator 1301, the regulator 1301 is used to charge the storage capacitor before the first time period. The voltage is locked at a preset reference potential; Voltage regulator 1301 and energy storage capacitor connect.

[0097] Understandably, due to the resistance of the metal wires, the resistance of the contact holes, and the leakage current along the charge transport path, the storage capacitor... After a long period of charge recovery and release cycles, the stored charge on it will gradually decay, leading to the degradation of the storage capacitor. The voltage deviates from the preset value. If the storage capacitor... voltage deviation Then the word line voltage after charge sharing This will also deviate from the target value, thus reducing the efficiency of charge sharing and weakening the power consumption reduction effect. This embodiment uses a voltage regulator 1301 to charge the storage capacitor before the first time period. The voltage is locked at a preset reference potential, which can ensure the energy storage capacitor... The circuit is in the correct voltage state before the start of each word line refresh cycle, thereby reducing the risk of power consumption loss due to voltage decay and ensuring the long-term stability of the power consumption reduction effect of the word line refresh circuit 1 in this embodiment.

[0098] In some embodiments, the word line refresh circuit 1 is applied to the memory 2, and the energy storage module 130 further includes a voltage regulator switch S5. The voltage regulator 1301 is connected to the energy storage capacitor through the voltage regulator switch S5. connect; The voltage regulator switch S5 is turned on when the memory 2 is powered on, turned off when the word line refresh circuit 1 enters the word line refresh cycle, and turned on during the word line idle window period, which represents the period when the word line refresh circuit 1 has not entered the word line refresh cycle.

[0099] Figure 9 This is a schematic diagram of the switching timing in a word line refresh circuit provided in one embodiment of the present disclosure. Figure 2 Please refer to Figure 9 The voltage regulator switch S5 closes during the power-on phase of memory 2 (before entering the word line refresh cycle). During this period, the voltage regulator 1301 supplies power to the storage capacitor. Charging enables the storage capacitor The voltage is quickly established and stabilized at the preset reference potential. Then, the voltage regulator switch S5 opens, completing the initialization. During each word line refresh cycle of the word line refresh circuit 1 during normal operation, the voltage regulator switch S5 remains open, and the voltage regulator 1301 is in the off state. During the word line idle window, the control signal of the voltage regulator switch S5 is applied every n times the word line refresh cycle, i.e., every [time period missing]. During a specific time period, a pulse is output to close the voltage regulator switch S5, where T represents the word line refresh cycle and n is a positive integer. During the period when the voltage regulator switch S5 is closed, the voltage regulator 1301 acts as a storage capacitor. Charging refers to the process of storing electricity in a capacitor. The voltage regulator switch S5 then disconnects again to replenish the charge attenuation caused by leakage and resistance loss.

[0100] In this embodiment, the voltage regulator 1301 is not constantly in contact with the energy storage capacitor. If the voltage regulator 1301 is normally open, its own bias current will persist, introducing additional static power consumption. Conversely, if no charge replenishment mechanism is provided, the storage capacitor... The voltage decay will gradually reduce the power consumption gains. Therefore, this embodiment uses an intermittent conduction mechanism of the voltage regulator switch S5 to complete the energy storage capacitor when the memory 2 is powered on. The initial charging process periodically replenishes charge loss in a pulse manner during the word line idle window, while remaining disconnected during the word line refresh cycle. This achieves a balance between the conflicting requirements of replenishing leakage loss and suppressing static power consumption. This setup enables dynamic voltage replenishment under low dynamic power consumption, balancing power reduction with circuit stability.

[0101] In some embodiments, the reference potential represents the first voltage. Half of it.

[0102] For example, when the first voltage When the voltage is 2.8V, the reference potential is 1.4V, and the regulator 1301 will use the storage capacitor. The voltage is locked at 1.4V. This is achieved by setting the reference potential to the first voltage. Half of the storage capacitor The voltage is consistent with the target voltage shared by the word line charge. At the end of the first time period, the storage capacitor... Capable of transmitting word line voltage Rise to At the end of the third time period, the word line voltage Able to fall back to And the charge in the corresponding region is recovered to the storage capacitor. middle.

[0103] In this embodiment, the reference potential is set as the first voltage. Half of the amount of charge can help achieve a match between the amount of charge recovered and the amount of charge reused (the amount of charge reused), ensuring the efficiency of charge recycling.

[0104] Please refer to Figure 10 This embodiment also provides a memory 2, which includes a word line refresh circuit 1 as described above.

[0105] For example, memory 2 may be a memory device that includes volatile memory cells. For instance, memory 2 may include various dynamic random access memories (DRAMs), such as Double Data Rate Synchronous DRAM (DDR SDRAM), second-generation Double Data Rate Synchronous DRAM (DDR2 SDRAM), third-generation Double Data Rate Synchronous DRAM (DDR3 SDRAM), fourth-generation Double Data Rate Synchronous DRAM (DDR4 SDRAM), fifth-generation Double Data Rate Synchronous DRAM (DDR5 SDRAM), sixth-generation Double Data Rate Synchronous DRAM (DDR6 SDRAM), or low-power Double Data Rate (LPDDR) SDRAM.

[0106] The memory cell array of memory 2 includes multiple memory cells. Each memory cell is connected to the word line refresh circuit 1 through a corresponding word line. The word line voltage module 140 in the word line refresh circuit 1 provides a driving voltage for the word lines of memory 2, thereby reducing the dynamic power consumption of word line switching.

[0107] In other embodiments, the memory 2 may also be a static random access memory (SRAM), NAND flash memory, NOR flash memory, resistive random access memory (RRAM), ferroelectric memory (FRAM) device, phase change memory (PRAM), thermal effect memory (TRAM) device, or magnetoresistive random access memory (MRAM), etc.

[0108] In some embodiments, during the word line enable phase, the third switch S3, the second switch S2, and the first switch S1 in the word line refresh circuit 1 of the memory 2 are turned on in sequence; during the word line disable phase, the second switch S2, the third switch S3, and the fourth switch S4 in the word line refresh circuit are turned on in sequence. The first switch S1 is located between the first voltage power supply 110 and the word line voltage module 140; the second switch S2 is located between the energy storage module 130 and the word line voltage module 140; the third switch S3 is located between the ground power supply 120 and the word line voltage module 140; and the fourth switch S4 is located between the word line voltage module 140 and the second voltage power supply 150 of the word line refresh circuit.

[0109] Understandably, by adopting the above settings, the dynamic power consumption during the word line flipping process can be reduced more effectively.

[0110] Please refer to Figure 11This embodiment also provides a word line refresh method, which is applied to the word line refresh circuit 1 as described in any of the above claims, and the method includes: S1110: In the first time period, the energy storage module supplies voltage to the word line voltage module.

[0111] S1120: In the second time period, the energy storage module is turned off, and the first voltage power supply provides the first voltage to the word line voltage module.

[0112] S1130: In the third time period, the first voltage power supply is turned off, allowing the word line voltage module to discharge to the energy storage module.

[0113] S1140: In the fourth time period, shut down the energy storage module, and connect the ground power supply to the word line voltage module to conduct the connection path, thereby transmitting the word line voltage. Pull down to ground voltage .

[0114] This word line refresh method can effectively reduce dynamic power consumption during word line flipping, has low cost, and is highly feasible.

[0115] The above embodiments are merely illustrative of the principles and effects of this disclosure and are not intended to limit this disclosure. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of this disclosure. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in this disclosure should still be covered by the claims of this disclosure.

Claims

1. A word line refresh circuit, characterized in that, The word line refresh circuit includes: A first voltage power supply, a ground power supply, a power storage module, and a word line voltage module; the first voltage power supply, the ground power supply, and the power storage module are respectively coupled to the word line voltage module; the maximum voltage value of the power storage module is less than or equal to the first voltage; During the first time period, the energy storage module is configured to provide voltage to the word line voltage module; During the second time period, the energy storage module is turned off, and the first voltage power supply is configured to provide the first voltage to the word line voltage module; During the third time period, the first voltage power supply is turned off, the energy storage module is connected to the word line voltage module, and the word line voltage module is configured to discharge to the energy storage module. During the fourth time period, the energy storage module is turned off, the ground power supply is connected to the word line voltage module, and the word line voltage of the word line voltage module is pulled down to ground voltage; The first time period is earlier than the second time period, the second time period is earlier than the third time period, and the third time period is earlier than the fourth time period.

2. The word line refresh circuit according to claim 1, characterized in that, The word line refresh circuit further includes: a second voltage power supply, coupled to the word line voltage module, wherein the second voltage provided by the second voltage power supply is a negative voltage; During the fifth time period, the word line voltage module is connected to the second voltage power supply, and the word line voltage is pulled down to a negative voltage; The fifth time period is later than the fourth time period.

3. The word line refresh circuit according to claim 1, characterized in that, The maximum voltage of the energy storage module is half of the first voltage.

4. The word line refresh circuit according to claim 2, characterized in that, The distance from the energy storage module to the word line voltage module is less than the distance from the first voltage power supply to the word line voltage module, and / or less than the distance from the second voltage power supply to the word line voltage module, and / or less than the distance from the ground power supply to the word line voltage module.

5. The word line refresh circuit according to claim 2, characterized in that, The first voltage power supply is connected to the word line voltage module via a first switch, the energy storage module is connected to the word line voltage module via a second switch, the ground power supply is connected to the word line voltage module via a third switch, and the second voltage power supply is connected to the word line voltage module via a fourth switch; The first switch, the second switch, the third switch, and the fourth switch are turned on at different times.

6. The word line refresh circuit according to claim 5, characterized in that, At the end of the fifth time period, the word line corresponding to the word line voltage module is in the off phase; Before the next word line is turned on, the third switch is in the on state, the word line is connected to the ground power supply, and the word line voltage rises from the negative voltage to the ground voltage.

7. The word line refresh circuit according to claim 6, characterized in that, During the first period of the word line activation process, the second switch is in the on state, and the energy stored in the energy storage module is shared with the word line. The energy stored in the energy storage module comes from the energy released by the word line voltage module in the previous third period.

8. The word line refresh circuit according to claim 1, characterized in that, At the end of the first time period and at the end of the third time period, the word line voltage is half of the first voltage.

9. The word line refresh circuit according to claim 2, characterized in that, The word line refresh cycle of the word line refresh circuit includes: the first time period, the second time period, the word line data read / write time period, the third time period, the fourth time period, and the fifth time period arranged in time sequence; During the word line data read / write period, the word line voltage remains unchanged.

10. The word line refresh circuit according to claim 1, characterized in that, The energy storage module includes an energy storage capacitor and a voltage regulator. The voltage regulator is used to lock the voltage of the energy storage capacitor at a preset reference potential before the first time period. The voltage regulator is connected to the energy storage capacitor.

11. The word line refresh circuit according to claim 10, characterized in that, The word line refresh circuit is applied to the memory, and the energy storage module also includes a voltage regulator switch, with the voltage regulator connected to the energy storage capacitor through the voltage regulator switch; The voltage regulator switch is turned on when the memory is powered on, turned off when the word line refresh circuit enters the word line refresh cycle, and turned on during the word line idle window period, which represents the period during which the word line refresh circuit does not enter the word line refresh cycle.

12. The word line refresh circuit according to claim 10 or 11, characterized in that, The reference potential represents half of the first voltage.

13. A memory, characterized in that, The memory includes: a word line refresh circuit as described in any one of claims 1 to 12.

14. The memory according to claim 13, characterized in that, During the word line activation phase, the third switch, the second switch, and the first switch in the word line refresh circuit are sequentially turned on; during the word line deactivation phase, the second switch, the third switch, and the fourth switch in the word line refresh circuit are sequentially turned on. The first switch is located between the first voltage power supply and the word line voltage module, the second switch is located between the energy storage module and the word line voltage module, the third switch is located between the ground power supply and the word line voltage module, and the fourth switch is located between the word line voltage module and the second voltage power supply of the word line refresh circuit.

15. A method for refreshing character lines, characterized in that, The method is applied to the word line refresh circuit as described in any one of claims 1 to 12, the method comprising: During the first time period, the energy storage module supplies voltage to the word line voltage module; During the second time period, the energy storage module is turned off, and the first voltage power supply provides the first voltage to the word line voltage module; During the third time period, the first voltage power supply is turned off, causing the word line voltage module to discharge to the energy storage module; During the fourth time period, the energy storage module is turned off, and the connection path between the ground power supply and the word line voltage module is made open, so as to pull the word line voltage down to the ground voltage.

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