Semiconductor laser and method of manufacture

CN122823210APending Publication Date: 2026-09-25WUHAN MINDSEMI CO LTD
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Patent Information

Application Number
CN202610974754.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-07-01
Publication Date
2026-09-25

AI Technical Summary

Technical Problem

[0002]当前脊波导边发射半导体激光器追求高功率与稳定单模输出,传统对称侧壁脊波导扩宽脊宽后易激发高阶模,光束质量显著劣化,窄脊结构输出功率普遍不足200mW

Benefits of technology

本申请实施例提供的半导体激光器,脊波导两侧侧壁的夹角的差值大于或等于10°,呈非对称倾角结构,可显著拉大基模与高阶模之间的泄漏损耗差距,实现宽脊条件下稳定单模输出。基模光场集中分布于脊波导中心区域,距离两侧侧壁较远,受侧壁倾角差异影响极小,泄漏损耗可维持在极低水平,能够顺利达到激射阈值;而一阶等高阶模光场存在两个分别贴近左右侧壁的光强峰值,两侧非对称侧壁形成差异化光学边界条件,大幅提升高阶模的辐射泄漏损耗,使其无法满足激射条件,从根源抑制高阶模起振。该结构可将单模工作脊宽拓宽至6μm以上,器件连续输出功率由传统对称脊波导不足200mW提升至400mW以上,大幅提升功率上限。同时非对称侧壁仅通过调整刻蚀参数成型,无需增加光刻、外延工序,工艺容错性大幅提升,侧壁倾角允许±5°工艺偏差,有效降低刻蚀波动对良率的影响,无需改造现有产线即可量产,在改善光束质量、提升输出功率的同时控制生产成本。

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Abstract

The embodiment of the application discloses a semiconductor laser and a preparation method. The semiconductor laser comprises an epitaxial layer stack structure and a ridge waveguide arranged in the epitaxial layer stack structure, and the ridge waveguide is formed in the epitaxial layer stack structure. The ridge waveguide comprises two opposite side walls, one of which has a first included angle with a plane direction of the epitaxial layer stack structure, and the other one has a second included angle with the plane direction of the epitaxial layer stack structure. The angle difference between the first included angle and the second included angle is greater than or equal to 10 degrees. The semiconductor laser can widen the single-mode working ridge width to more than 6 microns, and the continuous output power of the device is increased from less than 200 mW of a traditional symmetric ridge waveguide to more than 400 mW, greatly improving the upper limit of the power.
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Description

Technical Field

[0001] This application relates to the field of semiconductor device technology, and more particularly to a semiconductor laser and its fabrication method. Background Technology

[0002] Current edge-emitting semiconductor lasers with ridge waveguides strive for high power and stable single-mode output. However, widening the ridge width of traditional symmetrical ridge waveguides easily excites higher-order modes, significantly degrading beam quality. Narrow ridge structures generally have an output power of less than 200mW. Existing solutions for improving single-mode characteristics mostly employ asymmetric epitaxy and grating structures, requiring additional epitaxial growth or electron beam lithography. This results in complex processes, high production costs, and stringent requirements for the sidewall tilt angle tolerances, which must be controlled within ±2°. Mass production yields are easily affected by etching fluctuations. The industry urgently needs a wide-ridge single-mode solution that requires no modification to the epitaxial structure, no additional lithography steps, and is compatible with existing production lines. Summary of the Invention

[0003] The summary section introduces a series of simplified concepts, which will be further explained in detail in the detailed description section. This part of the invention is not intended to limit the key features and essential technical features of the claimed technical solution, nor is it intended to determine the scope of protection of the claimed technical solution.

[0004] The present invention aims to solve at least one of the technical problems existing in the prior art or related art.

[0005] Therefore, a first aspect of the present invention provides a semiconductor laser.

[0006] A second aspect of the present invention provides a preparation method.

[0007] In view of the above, a semiconductor laser is provided according to a first aspect of the embodiments of this application, comprising: An epitaxial layer stack structure and a ridge waveguide, wherein the ridge waveguide is formed in the epitaxial layer stack structure; The ridge waveguide includes two opposing sidewalls, one of which forms a first angle with the plane of the epitaxial stack structure, and the other sidewall forms a second angle with the plane of the epitaxial stack structure. The difference between the first angle and the second angle is greater than or equal to 10°.

[0008] In one feasible implementation, the first included angle is greater than the second included angle, and the first included angle is 60° to 85°, while the second included angle is 30° to 70°. The difference between the first included angle and the second included angle is 15° to 25°.

[0009] In one feasible implementation, the etching depth is 0.8 μm to 2.5 μm during the fabrication of the ridge waveguide; The ridge width of the ridge waveguide is 3 μm to 12 μm.

[0010] In one feasible implementation, the epitaxial layer stack structure includes, from bottom to top, an n-type substrate, an n-type lower confinement layer, a lower waveguide layer, an active layer, an upper waveguide layer, a p-type upper confinement layer, and a p-type contact layer, wherein the ridge waveguide is a protrusion structure formed by etching a portion of the p-type upper confinement layer and the p-type contact layer.

[0011] In one feasible implementation, the semiconductor laser further includes: n-sided electrodes, wherein the n-sided electrodes are disposed on the side of the epitaxial layer stack structure opposite to the ridge waveguide; p-face electrode, wherein the p-face electrode is disposed on the side of the ridge waveguide opposite to the epitaxial layer stack structure.

[0012] According to a second aspect of the embodiments of this application, a method for fabricating a semiconductor laser is provided, for fabricating a semiconductor laser as described in any of the above technical solutions, the fabrication method comprising: Provides an epitaxial layer stacking structure; Different process parameters are used to etch the epitaxial layer stack structure so that the included angle between the two opposite sidewalls of the ridge waveguide is different.

[0013] In one feasible implementation, the step of etching the epitaxial layer stack structure using different process parameters to make the ridge waveguide include two opposing sidewalls with different included angles includes: The epitaxial layer stack structure is placed in a plasma etching cavity; The tray supporting the epitaxial layer stack structure is tilted so that the two sidewalls of the ridge waveguide are bombarded by ions at different angles.

[0014] In one feasible implementation, the tray has an inclination angle of 5° to 30°.

[0015] In one feasible implementation, the step of etching the epitaxial layer stack structure using different process parameters to make the ridge waveguide include two opposing sidewalls with different included angles includes: The epitaxial layer stack structure is etched using an etching gas; By controlling the gas flow rate supplied to both sides of the epitaxial layer stack structure to be different, the ridge waveguide includes two opposing sidewalls with different included angles.

[0016] In one feasible implementation, the ratio of gas flow rates on both sides is 1.2 to 2.

[0017] Compared with the prior art, the present invention has at least the following beneficial effects: The semiconductor laser provided in this application has an asymmetric tilt structure where the angle difference between the two sidewalls of the ridge waveguide is greater than or equal to 10°. This significantly widens the leakage loss gap between the fundamental mode and higher-order modes, enabling stable single-mode output under wide-ridge conditions. The fundamental mode optical field is concentrated in the central region of the ridge waveguide, far from the two sidewalls, and is minimally affected by the sidewall tilt difference, maintaining a very low leakage loss and successfully reaching the lasing threshold. In contrast, the first-order and other higher-order mode optical fields have two intensity peaks close to the left and right sidewalls respectively. The asymmetric sidewalls create differentiated optical boundary conditions, significantly increasing the radiation leakage loss of the higher-order modes, preventing them from meeting the lasing conditions and suppressing higher-order mode oscillation at its source. This structure can broaden the single-mode operating ridge width to over 6μm, increasing the continuous output power of the device from less than 200mW in traditional symmetric ridge waveguides to over 400mW, significantly increasing the power ceiling. Meanwhile, the asymmetric sidewalls are formed by adjusting the etching parameters, without the need for additional photolithography and epitaxial processes, which greatly improves the process tolerance. The sidewall tilt angle allows for a process deviation of ±5°, effectively reducing the impact of etching fluctuations on yield. Mass production can be carried out without modifying existing production lines, improving beam quality and increasing output power while controlling production costs.

[0018] The above description is merely an overview of the technical solution of the present invention. In order to better understand the technical means of the present invention and to implement it in accordance with the contents of the specification, and in order to make the above and other objects, features and advantages of the present invention more apparent and understandable, specific embodiments of the present invention are described below. Attached Figure Description

[0019] Various other advantages and benefits will become apparent to those skilled in the art upon reading the following detailed description of preferred embodiments. The accompanying drawings are for illustrative purposes only and are not intended to limit the scope of this application. Furthermore, the same reference numerals denote the same parts throughout the drawings. In the drawings: Figure 1 A schematic structural diagram of a semiconductor laser according to an embodiment of this application; Figure 2 A partially enlarged schematic structural diagram of the ridge waveguide of a semiconductor laser according to an embodiment of this application; Figure 3 A schematic structural diagram illustrating a method for fabricating a semiconductor laser according to an embodiment of this application; Figure 4 A schematic structural diagram of a method for fabricating a semiconductor laser according to another embodiment of this application; Figure 5A schematic flowchart illustrating the steps of a method for fabricating a semiconductor laser according to an embodiment of this application.

[0020] in, Figures 1 to 4 The correspondence between the reference numerals and component names in the attached drawings is as follows: 110. Epitaxial layer stacked structure; 120. Ridge waveguide; 130. n-plane electrode; 140. p-plane electrode; 111. n-type substrate; 112. n-type lower confinement layer; 113. Lower waveguide layer; 114. Active layer; 115. Upper waveguide layer; 116. p-type upper confinement layer; 117. p-type contact layer. Detailed Implementation

[0021] The following description provides numerous specific details to offer a more thorough understanding of the technical solutions provided by this invention. However, it will be apparent to those skilled in the art that the technical solutions provided by this invention can be implemented without one or more of these details.

[0022] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of exemplary embodiments according to the invention. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. Furthermore, it should be understood that when the terms “comprising” and / or “including” are used in this specification, they indicate the presence of the stated features, integrals, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or combinations thereof.

[0023] Exemplary embodiments according to the present invention will now be described in more detail with reference to the accompanying drawings. However, these exemplary embodiments may be implemented in many different forms and should not be construed as being limited to the embodiments set forth herein. It should be understood that these embodiments are provided so that the disclosure of the invention is thorough and complete, and that the concept of these exemplary embodiments is fully conveyed to those skilled in the art.

[0024] Considering that existing ridge waveguide semiconductor lasers face problems such as high-order mode lasing and beam quality degradation when increasing output power, and that traditional solutions for improving mode characteristics (such as asymmetric epitaxial layer structures) are complex and costly, this invention aims to provide a ridge waveguide structure that is simple in structure, has large process tolerance, and is easy to mass-produce. Through an asymmetric sidewall tilt design, it significantly improves output power without sacrificing single-mode characteristics. Current technological developments in the semiconductor laser field have clearly revealed that the biggest obstacle to achieving high-power fundamental mode operation is not the lack of feasible theoretical solutions, but rather the difficulty in achieving a balance between process feasibility and performance indicators in existing solutions. Narrow ridge waveguide solutions are simple to manufacture but have power limitations; asymmetric epitaxial waveguide and grating solutions offer excellent performance but are complex to manufacture; and directly widening wide ridge waveguides is difficult to use due to mode runaway. This situation clearly demonstrates the industry's urgent need for a technological solution that is highly processable, does not rely on complex epitaxial structures, and can effectively achieve wide-ridge single-mode operation. This is precisely the technological impasse that the "asymmetric sidewall tilt" solution proposed in this patent attempts to overcome.

[0025] Based on this, such as Figure 1 and Figure 2 As shown, where Figure 2 In the first aspect of the present application, a semiconductor laser is provided, comprising: an epitaxial layer stacked structure 110 and a ridge waveguide 120, wherein θ1 is the first included angle and θ2 is the second included angle.

[0026] The semiconductor laser provided in this application has an asymmetric tilt structure where the angle difference between the two sidewalls of the ridge waveguide 120 is greater than or equal to 10°. This significantly widens the leakage loss gap between the fundamental mode and higher-order modes, enabling stable single-mode output under wide-ridge conditions. The fundamental mode optical field is concentrated in the central region of the ridge waveguide 120, far from the two sidewalls, and is minimally affected by the sidewall tilt angle difference, maintaining a very low leakage loss and successfully reaching the lasing threshold. In contrast, the first-order and other higher-order mode optical fields have two intensity peaks close to the left and right sidewalls respectively. The asymmetric sidewalls create differentiated optical boundary conditions, significantly increasing the radiation leakage loss of the higher-order modes, preventing them from meeting the lasing conditions and suppressing higher-order mode oscillation at its source. This structure can widen the single-mode operating ridge width to over 6μm, increasing the continuous output power of the device from less than 200mW in a traditional symmetric ridge waveguide 120 to over 400mW, significantly increasing the power ceiling. Meanwhile, the asymmetric sidewalls are formed by adjusting the etching parameters, without the need for additional photolithography and epitaxial processes, which greatly improves the process tolerance. The sidewall tilt angle allows for a process deviation of ±5°, effectively reducing the impact of etching fluctuations on yield. Mass production can be carried out without modifying existing production lines, improving beam quality and increasing output power while controlling production costs.

[0027] like Figure 1 and Figure 2 As shown, in one feasible implementation, the first included angle is greater than the second included angle, and the first included angle is 60° to 85°, while the second included angle is 30° to 70°; the difference between the first included angle and the second included angle is 15° to 25°.

[0028] In this technical solution, the first included angle of the steep sidewall is limited to 60°~85°, and the second included angle of the gentle sidewall is limited to 30°~70°, with the difference between the two controlled at 15°~25°. This maximizes the differentiation between the fundamental mode and higher-order mode losses. If the angle difference is too small, the suppression effect of higher-order modes will be insufficient; if the difference is too large, it will increase the difficulty of process control. This range can ensure that the leakage loss of higher-order modes remains high, stably achieving single-mode lasing, while avoiding optical field distortion caused by excessively steep / gentle sidewalls. At the same time, this parameter range is compatible with the existing ICP etching process window, has good process tolerance, and balances high output power, excellent beam quality, and mass production feasibility.

[0029] It is understandable that the first included angle must always be greater than the second included angle. For example, if the first included angle is 60°, the second included angle is less than or equal to 50°.

[0030] like Figure 1 and Figure 2 As shown, in one feasible embodiment, during the fabrication of the ridge waveguide 120, the etching depth is 0.8 μm to 2.5 μm; the ridge top width of the ridge waveguide 120 is 3 μm to 12 μm, preferably 5 μm to 8 μm.

[0031] In this technical solution, an etching depth of 0.8–2.5 μm effectively confines the lateral optical field without etching to the active layer 114 and disrupting the gain structure; a ridge width of 3–12 μm balances single-mode characteristics and output power. A width less than 3 μm limits power, while a width exceeding 12 μm easily excites higher-order modes; insufficient etching depth results in weak mode confinement, while excessive depth can damage the waveguide layer. This parameter range balances beam quality, power limit, and process safety, adapting to the mass production requirements of multi-band lasers.

[0032] like Figure 1 and Figure 2 As shown, in one feasible embodiment, the epitaxial layer stack structure 110 includes an n-type substrate 111, an n-type lower confinement layer 112, a lower waveguide layer 113, an active layer 114, an upper waveguide layer 115, a p-type upper confinement layer 116, and a p-type contact layer 117 arranged sequentially from bottom to top. The ridge waveguide 120 is a protrusion structure formed by etching a portion of the p-type upper confinement layer 116 and the p-type contact layer 117.

[0033] This technical solution further provides the specific structural composition of the epitaxial stacked structure. The epitaxial stacked structure forms a complete optical field confinement and carrier gain system. The active layer 114 provides optical gain, and the upper p-type upper confinement layer 116 and the lower n-type confinement layer 112 achieve vertical optical field confinement. Only a portion of the p-type upper confinement layer 116 and the p-type contact layer 117 are etched to form the ridge waveguide 120, without damaging the core gain structures such as the lower waveguide layer 113, the active layer 114, and the upper waveguide layer 115, thus ensuring the device gain efficiency. No additional epitaxial growth is required; lateral mode confinement can be achieved with a single etching. The top layer retains the p-type contact layer 117 completely, forming a low-ohmic contact, simultaneously optimizing optical performance, electrical characteristics, and fabrication process costs.

[0034] like Figure 1 and Figure 2 As shown, in one feasible embodiment, the semiconductor laser further includes: an n-side electrode 130 disposed on the side of the epitaxial layer stack 110 away from the ridge waveguide 120; and a p-side electrode 140 disposed on the side of the ridge waveguide 120 away from the epitaxial layer stack 110.

[0035] In this technical solution, the n-side electrode 130 is arranged on the side of the epitaxial layer stack 110 away from the ridge waveguide 120, and the p-side electrode 140 is arranged on the side of the ridge waveguide 120 away from the epitaxial layer stack 110, forming a vertical current injection path. Current is injected into the active layer 114 through the p-side electrode 140, ridge waveguide 120, p-type upper confinement layer 116, and upper waveguide layer 115, where charge carriers concentrate in the gain region for recombination and light emission. The insulating layer in the trench region isolates the adjacent p-type upper confinement layer 116, preventing lateral current diffusion and reducing leakage current. This electrode layout structure is simple, has low contact resistance, and can improve current injection efficiency and device electro-optic conversion efficiency.

[0036] like Figure 5 As shown, a method for fabricating a semiconductor laser is provided according to a second aspect of the embodiments of this application, for fabricating a semiconductor laser as described in any of the above technical solutions, the method comprising: Step 101: Provide an epitaxial layer stack structure; Step 102: Use different process parameters to etch the epitaxial stack structure so that the angle between the two opposite sidewalls of the ridge waveguide is different.

[0037] The semiconductor laser fabrication method provided in this application embodiment is used to fabricate semiconductor lasers as described in any of the above technical solutions, and therefore the semiconductor laser fabrication method possesses all the beneficial effects of the semiconductor lasers described in the above technical solutions.

[0038] The fabrication method provided in this application first provides an epitaxial layer stack structure 110, and then forms ridge waveguide 120 sidewalls with unequal included angles on both sides through differentiated etching process parameters. This method requires no modification to the epitaxial layer stack structure 110 or the photolithography pattern, and does not add photolithography or epitaxial regeneration processes, resulting in no additional manufacturing costs. The difference in the included angles of the two sidewalls can be used to improve leakage loss in higher-order modes, stably achieving wide-ridge single-mode high-power output. The entire process is fully compatible with existing inductively coupled plasma etching cavity production lines, requires minimal process modification, has higher process fault tolerance, and effectively reduces mass production difficulty and costs.

[0039] like Figure 3 As shown, in one feasible embodiment, the step of etching the epitaxial stack structure 110 with different process parameters so that the ridge waveguide 120 includes two opposing sidewalls with different included angles includes: placing the epitaxial stack structure 110 in a plasma etching chamber; tilting the tray supporting the epitaxial stack structure 110 so that the two sidewalls of the ridge waveguide 120 are subjected to different ion bombardment angles.

[0040] In this technical solution, the epitaxial layer stack structure 110 is placed in a plasma etching chamber. By tilting the tray supporting the epitaxial layer stack structure 110, the incident angle of ion bombardment received by the sidewalls of the ridge waveguide 120 is changed. There is no need to adjust the etching gas ratio, photolithography pattern, or epitaxial layer stack structure 110; only the tray tilt angle is changed to achieve the difference in the tilt angle of the sidewalls. This method is simple to operate, does not increase any process steps or equipment modification costs, and can be directly adapted to existing inductively coupled plasma etching chambers in production lines. The difference in ion bombardment angle is stable and controllable, and can accurately form asymmetric sidewalls with angle differences, effectively improving high-order mode leakage loss, while also considering mode suppression effect, process repeatability, and mass production compatibility.

[0041] like Figure 3 As shown, in one feasible implementation, the tray tilt angle is 5° to 30°.

[0042] In this technical solution, the tray tilt angle is limited to the range of 5° to 30°, which can stably control the ion bombardment angle difference between the two sidewalls of the ridge waveguide 120, forming a sidewall tilt angle difference of more than 10°, effectively suppressing higher-order mode lasing. When the tilt angle is less than 5°, the difference in ion incidence on both sides is too small, resulting in insufficient asymmetric effect; when the tilt angle exceeds 30°, it will cause wafer placement instability and deterioration of etching uniformity. This range matches the adjustable range of the plasma etching cavity equipment, balancing mode control performance and etching process stability.

[0043] like Figure 4 As shown, in one feasible embodiment, the step of etching the epitaxial stack structure 110 with different process parameters so that the ridge waveguide 120 includes two opposite sidewalls with different included angles includes: etching the epitaxial stack structure 110 with etching gas; and controlling the gas flow rates supplied to both sides of the epitaxial stack structure 110 to be different so that the ridge waveguide 120 includes two opposite sidewalls with different included angles.

[0044] In this technical solution, etching gas is introduced to etch the overall epitaxial layer stack structure 110, and the flow rate of the etching gas on both sides of the epitaxial layer stack structure 110 is differentially controlled. The difference in etching rate on both sides directly forms the tilt angle difference between the two sidewalls of the ridge waveguide 120. This solution does not require modification of the epitaxial layer stack structure 110 and the photomask; only the cavity gas distribution parameters need to be adjusted to achieve the fabrication of asymmetric sidewalls. The process adjustment is simple and requires minimal equipment modification. The gas flow rate difference can precisely control the sidewall tilt angle, stably increasing the angle difference between the two sidewalls, effectively improving the leakage loss of higher-order modes, and ensuring the single-mode output performance under wide ridge. The entire process is completed within the plasma etching cavity, without adding any new steps or incurring additional production costs. It is fully compatible with existing mass production lines, has good process repeatability, and is suitable for mass production needs.

[0045] like Figure 4As shown, in one feasible implementation, the ratio of the gas flow rates on both sides is 1.2 to 2.

[0046] In this technical solution, the ratio of etching gas flow rates on both sides is controlled within the range of 1.2 to 2, which can create a sufficient etching rate difference and stably obtain a sidewall tilt angle with a difference of ≥10°, effectively suppressing higher-order modes. When the flow rate ratio is below 1.2, the etching difference on both sides is weak, and the asymmetric mode control effect is insufficient; when the ratio is greater than 2, it will cause a severe imbalance in the sidewall etching morphology, reducing device yield. This flow rate range is suitable for the conventional gas supply range of the plasma etching cavity, with a wide process window, balancing mode performance and mass production stability.

[0047] Example like Figures 1 to 5 As shown, the semiconductor laser provided in this embodiment of the application comprises, from bottom to top: an n-type substrate 111, an n-type lower confinement layer 112, a lower waveguide layer 113, an active layer 114 (single quantum well or multiple quantum wells), an upper waveguide layer 115, a p-type upper confinement layer 116, and a p-type contact layer 117. A ridge waveguide 120 is formed by dry etching, with an etching depth of 0.8~2.5μm and a ridge top width of 3~12μm, preferably 5~8μm. The first angle θ1 between the left side wall and the horizontal direction of the ridge waveguide 120 and the second angle θ2 between the right side wall are not equal, and |θ1-θ2|≥10°. Specifically, the steeper side θ1 is 60°~85°, the gentler side θ2 is 30°~70°, and the tilt angle difference Δθ is preferably 15°~25°. The surface of the ridge waveguide 120 is covered with an insulating layer, and a p-side electrode 140 is formed only by opening a window at the top of the ridge; an n-side electrode 130 is formed on the back side of the substrate.

[0048] The working principle of this semiconductor laser is as follows: The fundamental mode optical field is concentrated in the central region of the ridge, far from the sidewalls, and is not sensitive to differences in sidewall tilt angles, resulting in low leakage loss (<1cm). -1 Higher-order modes (such as first-order modes) have two peaks, one near the left sidewall and the other near the right. When the inclination angles of the left and right sidewalls are different, the boundary conditions at the two peaks are asymmetrical, making it easier for the energy of the higher-order mode to couple to the radiation mode, resulting in a significant increase in leakage loss (5~15cm). -1 By designing the gain region to make the fundamental mode gain greater than its loss, while the higher-order modes cannot reach the lasing threshold due to excessive loss, stable single-mode operation is achieved under wide ridge (6~10μm) conditions.

[0049] The fabrication method of this semiconductor laser: The fabrication method does not alter the epitaxial structure or photolithography pattern; it only adjusts the sidewall tilt angles through a single dry etching process. The main methods include: The first method is to tilt the wafer tray: tilt the wafer tray by 5° to 30° in the ICP etching chamber, so that the left and right sidewalls are bombarded by ions at different angles, thus creating a tilt angle difference.

[0050] The second asymmetric gas flow method involves making the etching gas flow rates on the left and right sides unequal (left:right = 1.2:1~2:1), with the sidewall on the high flow side becoming gentler and the sidewall on the low flow side becoming steeper.

[0051] None of the above methods require increasing the number of photolithography layers or changing the epitaxial structure.

[0052] In some examples, the semiconductor laser can be a 980nm GaAs-based laser.

[0053] The epitaxial structure employs: an n-GaAs substrate, an n-Al0.4Ga0.6As lower confinement layer (1.5 μm), an InGaAs / GaAs multi-quantum-well active layer 114, a p-Al0.4Ga0.6As upper confinement layer (1.0 μm), and a p-Al0.4Ga0.6As upper confinement layer (1.0 μm). + -GaAs contact layer (0.2μm).

[0054] The preparation steps specifically include: ① Photolithography defines a 120 mask for the ridge waveguide, with a ridge top width of 6μm; ② ICP etching using the tilted tray method (α=15°): Cl2 / BCl3=20 / 10sccm, gas pressure 5mTorr, etching depth 1.2μm, resulting in θ1≈72°, θ2≈52°; ③Deposit a SiO2 insulating layer and deposit Ti / Pt / AuP surface electrodes at 140° through window evaporation; ④ Thin the substrate to 120μm, deposit AuGe / Ni / AuN surface electrodes 130 and alloy them; ⑤ Cleaving into strips, coating the cavity surfaces (AR<1% for the front cavity surface, HR>95% for the rear cavity surface), and flip-mounting and welding to the heat sink.

[0055] Test results: threshold current 35mA, slope efficiency 0.85W / A, maximum fundamental mode output power 440mW (CW, ridge width 6μm), far-field single lobe, lateral divergence angle 7.2°. Traditional symmetrical structures with the same ridge width exhibit higher-order mode lasing at >300mW.

[0056] In some examples, the geometric parameters of a semiconductor laser may include: ridge width of 3 to 12 μm, etching depth of 0.8 to 2.5 μm, and tilt angle difference of 10° to 40°.

[0057] The semiconductor lasers provided in this application are applicable to GaAs-based (780~1100nm), InP-based (1200~1700nm), GaN-based (400~550nm), and GaSb-based (1.8~3.5μm).

[0058] The semiconductor laser provided in this application embodiment can monolithically integrate a DBR / DFB grating, an electroabsorption modulator, or a photodetector.

[0059] In some examples, the fabrication method may also include using ion beam tilting etching to make the angles between the two opposite sidewalls of the ridge waveguide 120 different, or using multi-step combined etching to make the angles between the two opposite sidewalls of the ridge waveguide 120 different.

[0060] The semiconductor laser fabrication method provided in this application has at least the following beneficial effects: 1. No or very little additional cost: No increase in the number of lithography layers, no introduction of epitaxial regrowth, and no use of expensive equipment such as electron beam lithography.

[0061] 2. Compatible with existing production lines: Only ICP etching parameters (tray tilt angle, airflow distribution) need to be adjusted, and existing Fabs can start production without modification.

[0062] 3. Significant effect: The single-mode operating width is widened from the traditional 3~5μm to more than 6μm, and the output power is increased from <200mW to 400~500mW.

[0063] 4. Strong fault tolerance: Traditional symmetrical ridge waveguides require tilt angle deviation of <±2° on both sides, while this solution allows a deviation of ±5° and is not sensitive to process fluctuations.

[0064] In this invention, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance; the term "multiple" refers to two or more unless otherwise explicitly defined. The terms "install," "connect," "link," and "fix" should be interpreted broadly. For example, "connect" can be a fixed connection, a detachable connection, or an integral connection; "link" can be a direct connection or an indirect connection through an intermediate medium. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0065] In the description of this invention, it should be understood that the terms "upper," "lower," "left," "right," "front," "rear," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or unit referred to must have a specific orientation or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0066] In the description of this specification, the terms "one embodiment," "some embodiments," "specific embodiment," etc., refer to a specific feature, structure, material, or characteristic described in connection with that embodiment or example, which is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0067] The above are merely preferred embodiments of the present invention and are not intended to limit the present invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A semiconductor laser, characterized in that, include: An epitaxial layer stack structure and a ridge waveguide, wherein the ridge waveguide is formed in the epitaxial layer stack structure; The ridge waveguide includes two opposing sidewalls, one of which forms a first angle with the plane of the epitaxial stack structure, and the other sidewall forms a second angle with the plane of the epitaxial stack structure. The difference between the first angle and the second angle is greater than or equal to 10°.

2. The semiconductor laser according to claim 1, characterized in that, Of the first included angle and the second included angle, the value of the first included angle is greater than that of the second included angle, and the first included angle is between 60° and 85°, while the second included angle is between 30° and 70°. The difference between the first included angle and the second included angle is 15° to 25°.

3. The semiconductor laser according to claim 1, characterized in that, During the fabrication of the ridge waveguide, the etching depth is from 0.8 μm to 2.5 μm; The ridge width of the ridge waveguide is 3 μm to 12 μm.

4. The semiconductor laser according to any one of claims 1 to 3, characterized in that, The epitaxial layer stack structure includes, from bottom to top, an n-type substrate, an n-type lower confinement layer, a lower waveguide layer, an active layer, an upper waveguide layer, a p-type upper confinement layer, and a p-type contact layer. The ridge waveguide is a protrusion structure formed by etching a portion of the p-type upper confinement layer and the p-type contact layer.

5. The semiconductor laser according to any one of claims 1 to 3, characterized in that, Also includes: n-sided electrodes, wherein the n-sided electrodes are disposed on the side of the epitaxial layer stack structure opposite to the ridge waveguide; p-face electrode, wherein the p-face electrode is disposed on the side of the ridge waveguide opposite to the epitaxial layer stack structure.

6. A method for fabricating a semiconductor laser, characterized in that, The method for preparing a semiconductor laser as described in any one of claims 1 to 5 comprises: Provides an epitaxial layer stacking structure; Different process parameters are used to etch the epitaxial layer stack structure so that the included angle between the two opposite sidewalls of the ridge waveguide is different.

7. The preparation method according to claim 6, characterized in that, The step of etching the epitaxial layer stack structure using different process parameters to make the ridge waveguide include two opposing sidewalls with different included angles includes: The epitaxial layer stack structure is placed in a plasma etching cavity; The tray supporting the epitaxial layer stack structure is tilted so that the two sidewalls of the ridge waveguide are bombarded by ions at different angles.

8. The preparation method according to claim 7, characterized in that, The tray has an inclination angle of 5° to 30°.

9. The preparation method according to claim 6, characterized in that, The step of etching the epitaxial layer stack structure using different process parameters to make the ridge waveguide include two opposing sidewalls with different included angles includes: The epitaxial layer stack structure is etched using an etching gas; By controlling the gas flow rate supplied to both sides of the epitaxial layer stack structure to be different, the ridge waveguide includes two opposing sidewalls with different included angles.

10. The preparation method according to claim 6, characterized in that, The ratio of gas flow rates on both sides is 1.2 to 2.