Semiconductor laser and method of manufacturing the same

Abstract

The application provides a semiconductor laser and a preparation method thereof. The laser comprises a substrate, a laminated structure with a ridge waveguide, buried structures on both sides of the ridge waveguide, and an upper limiting structure covering the top of the ridge waveguide and the top of the buried structures, which are sequentially arranged. The laminated structure comprises a lower cladding layer, an active region, and an upper cladding layer which are sequentially formed on the substrate. The upper limiting structure comprises a limiting layer and a target layer which are sequentially formed on the laminated structure. The laser further comprises a first space on the top of the limiting layer and a second space on both sides of the first space, and the target layer is formed in the first space. The laser further comprises an ohmic contact layer in the second space, and a first metal electrode covering at least part of the ohmic contact layer and forming an ohmic contact with the ohmic contact layer. The upper limiting structure comprising the limiting layer and the target layer is arranged, and the ohmic contact layer is arranged in the second space, so that the light absorption loss of the active region is reduced and the heat dissipation performance is improved.

Description

Technical Field

[0001] This invention relates to the field of optical chip technology, and in particular to a semiconductor laser and its fabrication method. Background Technology

[0002] Semiconductor lasers are core light sources in fields such as fiber optic communication, lidar, and optical pumping, and their performance improvement has always been a focus of attention in industry and academia. Semiconductor lasers, due to their ability to cover the low-loss transmission window of fiber optic communication, have numerous applications in long-distance fiber optic communication, sensing, and lidar. Buried heterostructure (BH) lasers are one of the commonly used structures for InP-based semiconductor lasers. The BH structure has advantages such as low threshold current, stable waveguide modes, and symmetrical beam distribution, making it a preferred option for high-power semiconductor lasers.

[0003] However, traditional BH lasers suffer from high optical absorption loss under high temperature and high power operating conditions. This absorption loss is particularly significant under high injection current, which severely limits the laser's internal quantum efficiency and photoelectric conversion efficiency.

[0004] Meanwhile, the thermal management of traditional BH lasers mainly relies on the longitudinal heat dissipation path of the substrate. The heat generated in the active region needs to pass through a relatively thick cladding to reach the substrate, resulting in high thermal resistance. When the device operates in a high-temperature environment or under high injection current, heat accumulation leads to an increase in junction temperature, which in turn causes a series of performance degradation problems such as increased threshold current, wavelength drift, and output power attenuation. Summary of the Invention

[0005] The purpose of this invention is to provide a semiconductor laser and its fabrication method, so as to effectively reduce light absorption loss and improve heat dissipation performance.

[0006] To achieve the above-mentioned objective, the present invention provides a semiconductor laser, comprising a substrate, a stacked structure having a ridge waveguide, a buried structure located on both sides of the ridge waveguide, and an upper confinement structure covering the top of the ridge waveguide and the top of the buried structure, arranged sequentially; the stacked structure includes a lower cladding layer, an active region, and an upper cladding layer formed sequentially on the substrate; the upper confinement structure includes a confinement layer and a target layer formed sequentially on the stacked structure; the laser further includes a first space disposed on the top of the confinement layer and a second space located outside the first space, the target layer being formed in the first space; the laser further includes an ohmic contact layer disposed in the second space, and a first metal electrode that at least partially covers the ohmic contact layer and forms an ohmic contact with the ohmic contact layer.

[0007] According to one embodiment of the present invention, the thickness of the upper confining structure is 1 μm to 4 μm, and the thickness of the target layer is 30% to 80% of the thickness of the upper confining structure; the target layer is made of the same material as the confining layer, and the target layer is undoped.

[0008] According to one embodiment of the present invention, the width of the target layer is greater than the width of the laser mode, the width of the laser mode is greater than the minimum width of the ridge waveguide; and / or, along the transverse axis of the laser, the two side edges of the target layer are respectively located outside the two side edges of the top of the ridge waveguide.

[0009] According to one embodiment of the present invention, the laser further includes a blocking layer formed between the target layer and the confinement layer, the blocking layer being used to prevent the second space from extending to the confinement layer; or, the laser further includes a blocking layer formed between the ohmic contact layer and the confinement layer, the blocking layer being used to prevent the first space from extending to the confinement layer.

[0010] According to one embodiment of the present invention, at least the portion of the ohmic contact layer in contact with the first metal electrode is a p-type doped InGaAs layer with a doping concentration greater than 5 × 10¹. 8 cm -3 The second space extends along the cavity length direction of the semiconductor laser.

[0011] According to one embodiment of the present invention, the ohmic contact layer further includes an InP layer or an InGaAsP layer located between the InGaAs layer and the confinement layer; the thickness of the InGaAs layer is greater than or equal to 100 nm.

[0012] According to one embodiment of the present invention, the laser further includes trenches extending from the ohmic contact layer toward the substrate and located on both sides of the ridge waveguide. A dielectric film is disposed on the ohmic contact layer near the trench, and the dielectric film defines an opening. The first metal electrode contacts the ohmic contact layer through the opening formed on the dielectric film. The opening is spaced apart from the trench.

[0013] According to one embodiment of the present invention, the stacked structure is etched to form slots on both sides of the ridge waveguide, and the buried structure is buried in the slots; the top of the buried structure is flush with the top of the ridge waveguide.

[0014] According to one embodiment of the present invention, the stacked structure further includes a grating layer and a grating cover layer located on the upper cladding layer; and / or, the target layer and the confinement layer are InP layers.

[0015] The present invention also provides a method for fabricating a semiconductor laser for fabricating the laser of the above embodiments, comprising the following steps: providing a substrate; epitaxially growing a stacked structure on the substrate, the stacked structure comprising a lower cladding layer, an active region, and an upper cladding layer grown sequentially from the substrate; forming a ridge waveguide based on the stacked structure; epitaxially growing buried structures on both sides of the ridge waveguide; epitaxially growing a confinement layer on the stacked structure and the buried structure; epitaxially growing a target layer inside and outside a first space on the confinement layer, and epitaxially growing an ohmic contact layer inside and outside a second space; the first space being correspondingly disposed to the ridge waveguide, and the second space being located on both sides of the first space; and fabricating a first metal electrode forming an ohmic contact with the ohmic contact layer.

[0016] According to one embodiment of the present invention, the step of epitaxially growing a target layer inside and outside a first space on the confinement layer and epitaxially growing an ohmic contact layer inside and outside a second space includes: epitaxially growing a target layer on the confinement layer, etching the target layer to form a second space located on both sides of the ridge waveguide, and epitaxially growing the ohmic contact layer inside and outside the second space; or, epitaxially growing an ohmic contact layer on the confinement layer, etching the ohmic contact layer corresponding to the ridge waveguide to form a first space on the confinement layer, and epitaxially growing the target layer inside and outside the first space.

[0017] According to one embodiment of the present invention, the step of fabricating the first metal electrode includes: forming trenches extending from the ohmic contact layer toward the substrate on both sides of the ridge waveguide; forming a dielectric film on the target layer and the ohmic contact layer; retaining the dielectric film disposed on the side of the ohmic contact layer near the trench, the dielectric film defining an opening; forming a first metal electrode at least corresponding to the opening, such that the first metal electrode forms an ohmic contact with the ohmic contact layer through the opening.

[0018] The beneficial effects of this invention are as follows: by setting an upper confinement structure containing a target layer above the ridge waveguide, the free carrier concentration in the target layer is low, which can reduce the absorption loss of free carriers when the optical field expands laterally, so that more optical power is confined in the low-loss ridge waveguide, thereby improving the internal quantum efficiency and photoelectric conversion efficiency of the laser; by setting a second space on both sides of the first space on the confinement layer, and setting an ohmic contact layer and a first metal electrode in the second space, the heat generated during operation can be quickly dissipated upward from the active region through the highly thermally conductive ohmic contact layer and the first metal electrode, thereby reducing the operating junction temperature of the laser and breaking through the bottleneck of traditional buried heterojunction lasers that mainly rely on longitudinal heat dissipation of the substrate. Attached Figure Description

[0019] Figure 1 This is a schematic diagram of the cross-sectional structure of a semiconductor laser according to one embodiment of the present invention; Figure 2This is a schematic flowchart of a semiconductor laser fabrication method according to one embodiment of the present invention; Figures 3(a) to 3(g) are schematic diagrams of the structures corresponding to each preparation step in one embodiment of the present invention; Figures 4(a) to 4(b) are schematic diagrams of some preparation steps in another embodiment of the present invention; Figure 5 The graph shows the relationship between the thickness ratio of the target layer in the upper confinement structure and the absorption loss suppression rate. Among them, 1. Substrate; 2. Stacked structure; 21. Lower cladding layer; 22. Active region; 23. Upper cladding layer; 24. Grating layer; 25. Grating cover layer; 26. Ridge waveguide; 27. Groove; 3. Buried structure; 4. Upper confinement structure; 41. Confinement layer; 42. Target layer; 8. Barrier layer; 43. First space; 44. Second space; 5. Ohmic contact layer; 6. Dielectric film; 61. Window; 7. First metal electrode; 9. Trench. Detailed Implementation

[0020] To make the objectives, technical solutions, and advantages of this application clearer, the technical solutions of this application will be clearly and completely described below in conjunction with specific embodiments and corresponding drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0021] Embodiments of the present invention are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0022] For ease of explanation, this document uses terms indicating relative spatial position, such as "above," "below," "behind," and "front," to describe the relationship of one unit or feature shown in the accompanying drawings relative to another unit or feature. Terms indicating relative spatial position can include different orientations of the device during use or operation besides those shown in the figures. For example, if the device in the figures is flipped, a unit described as being "below" or "above" other units or features will be located "below" or "above" other units or features. Therefore, the exemplary term "below" can encompass both "below" and "above" spatial orientations.

[0023] Please refer to Figure 1An embodiment of the present invention provides a semiconductor laser, comprising a substrate 1, a stacked structure 2 having a ridge waveguide 26 formed thereon, a buried structure 3 located on both sides of the ridge waveguide 26, and an upper confinement structure 4 covering the top of the ridge waveguide 26 and the top of the buried structure 3.

[0024] The stacked structure 2 includes a lower cladding layer 21, an active region 22, and an upper cladding layer 23 sequentially formed on the substrate 1.

[0025] The substrate 1 is preferably an N-type InP substrate 1, which provides basic support for the epitaxial growth of the entire laser. Its lattice constant matches that of the subsequent epitaxial layers, which can ensure the crystal quality of the epitaxial growth.

[0026] The active region 22 is typically composed of alternating quantum well layers and barrier layers, effectively confining carriers and improving radiative recombination efficiency, making it the core region for generating optical radiation in a laser. The lower cladding layer 21 is, for example, an N-type InP layer, and the upper cladding layer 23 is, for example, a P-type InP layer. The refractive index of the active region 22 is generally higher than that of the lower and upper cladding layers 21 and 23, thus forming an optical waveguide structure. The lower and upper cladding layers 21 and 23 together confine the optical field within the active region 22. The thickness of the upper cladding layer 23 is preferably less than 1 μm to reduce the free carrier optical absorption loss caused by doping in the upper cladding layer 23.

[0027] The ridge waveguide 26 is formed by etching downward from the upper cladding 23. The etching depth of the ridge waveguide 26 extends at least below the active region 22 to form effective lateral optical field confinement and current confinement.

[0028] In one embodiment, the stacked structure 2 may further include a grating layer 24 and a grating capping layer 25 located on the upper cladding layer 23. The grating layer 24 is used to form a distributed feedback structure to limit the laser output of light at a specific wavelength. The grating capping layer 25 is used to protect the grating layer 24 and provide a smooth growth interface for subsequent epitaxial growth. The grating capping layer 25 is, for example, a p-type doped InP layer. In this embodiment, the ridge waveguide 26 is formed by etching downwards from the grating capping layer 25.

[0029] Furthermore, the grating layer 24 and the grating cover layer 25 can also be omitted according to the actual design requirements of the semiconductor laser, and the present invention does not limit this.

[0030] like Figure 1 The ridge waveguide 26 shown has slots 27 formed on both sides, which extend to the lower cladding 21. The slots 27 achieve lateral confinement of charge carriers and the optical field, which can reduce the threshold current of the laser and improve the output optical power and photoelectric conversion efficiency.

[0031] The laser also includes buried structures 3 located on both sides of the ridge waveguide 26. In this embodiment, the buried structure 3 is a P / N type InP buried heterojunction, specifically formed by epitaxially growing a P-type InP layer 31 and an N-type InP layer 32 on both sides of the ridge waveguide 26. The buried structure 3 is buried in the slot 27, and the top of the buried structure 3 is flush with the top of the ridge waveguide 26 to provide a flat surface for subsequent epitaxial growth, while also forming lateral confinement of the optical field and charge carriers.

[0032] The upper confinement structure 4 is formed on the stacked structure 2 and covers the top of the ridge waveguide 26 and the top of the buried structure 3. The upper confinement structure 4 includes a confinement layer 41 and a target layer 42 formed sequentially on the stacked structure 2. The confinement layer 41 is, for example, a P-type InP layer, and the target layer 42 is an undoped layer. Specifically, the target layer 42 is an InP layer that has not been doped with P-type or N-type. Compared with the doped confinement layer 41, the target layer 42 has a lower free carrier concentration, which can reduce the free carrier absorption loss generated during the lateral spread of the optical field.

[0033] Traditional BH lasers typically use P-type or N-type doped InP as the upper confinement layer. The large number of free carriers introduced by the doping leads to absorption losses in the extended optical field. During propagation, photons interact with free carriers, transferring energy to them and causing a decrease in optical power. This absorption loss is particularly significant under high injection currents.

[0034] The present invention uses the target layer 42 as at least part of the upper confinement structure 4. The free carrier absorption loss is low when the optical field extends through the target layer 42, so that more optical power is confined in the low-loss active waveguide, which significantly improves the internal quantum efficiency and photoelectric conversion efficiency of the laser.

[0035] The total thickness of the upper confinement structure 4 is generally 1μm to 4μm. Figure 5 The graph shows the relationship between the proportion of the thickness of the target layer 42 to the total thickness of the upper confinement structure 4 and the suppression rate of free carrier absorption loss. The higher the proportion of the thickness of the target layer 42, the more obvious the suppression effect of free carrier absorption loss.

[0036] In this invention, the target layer 42 accounts for 30% to 80% of the thickness of the upper limiting structure 4. If the target layer 42 accounts for too low a proportion, such as the thickness of the target layer 42 being less than 30% of the total thickness, the effect of suppressing absorption loss will not be significant enough. If the target layer 42 accounts for too high a proportion, such as the thickness of the target layer 42 being greater than 80% of the total thickness, the thickness of the limiting layer 41 will be too low, resulting in a small contact area between the ohmic contact layer 5 and the limiting layer 41, which will affect the injection of current.

[0037] Preferably, the thickness of the target layer 42 on the upper restricting structure 4 is 40%, 50%, 60% or 70%; more preferably, the thickness of the target layer 42 on the upper restricting structure 4 is 45%, 55% or 65%, so as to ensure sufficient current injection area while suppressing absorption loss.

[0038] The laser also includes a first space 43 disposed on the confinement layer 41 and a second space 44 located on both sides of the first space 43. The target layer 42 is disposed within the first space 43, and the second space 44 contains an ohmic contact layer 5. In other words, along the transverse axis of the laser, the target layer 42 is located in the middle region of the corresponding ridge waveguide 26, while the ohmic contact layers 5 are located on both sides of the target layer 42.

[0039] In one embodiment, along the cavity length direction of the laser, the laser includes a front cavity surface and a rear cavity surface. The ohmic contact layer 5 is provided with a dielectric film near the top of the front cavity surface and the rear cavity surface to avoid damage to the front cavity surface and the rear cavity surface of the laser due to current injection.

[0040] In one embodiment, the first space 43 and the second space 44 are strip-shaped and extend along the cavity length direction of the semiconductor laser (perpendicular to the plane of the paper in Figures 1, 3(a) to 3(g), and 4(a) to 4(b), so that the ohmic contact layer 5 and the subsequently formed first metal electrode 7 are continuously distributed in strip shape, thereby ensuring uniform current injection and heat dissipation along the cavity length direction.

[0041] The width of the target layer 42 needs to be greater than the width of the laser mode, which is the lateral width of the optical field energy distribution region, generally greater than the width of the top of the ridge waveguide. This ensures that the lateral expansion region of the optical field is located within the target layer as much as possible, further reducing optical loss caused by free carrier absorption. In this embodiment, the width of the target layer 42 is set to be at least 2 μm greater than the width of the top of the ridge waveguide to effectively reduce free carrier absorption loss.

[0042] Along the transverse axis of the laser, the two sides of the target layer 42 are located outside the two sides of the top edge of the ridge waveguide 26, so that the lateral extension region of the optical field falls within the range of the target layer 42, thereby maximizing the effect of reducing free carrier absorption loss.

[0043] Preferably, the upper limiting structure 4 is aligned with the central axis of the ridge waveguide 26 to ensure the symmetry of the structures on both sides of the laser and make the optical field and current distribution more uniform.

[0044] This invention provides two fabrication methods for forming the first space 43 and the second space 44, which are adapted to different process requirements and device performance requirements.

[0045] In one embodiment, after the formation of the ridge waveguide 26 and the growth of the buried structure 3 are completed, the confinement layer 41 and the target layer 42 are grown sequentially, and a SiO2 mask is deposited on the surface of the target layer 42. Strip windows are defined at symmetrical positions on both sides of the ridge waveguide 26 structure by photolithography. Then, a second space 44 is formed by selective etching. The bottom of the second space 44 does not penetrate into the confinement layer 41. The first space 43 is the area where the target layer 42 is retained.

[0046] In another embodiment, a confinement layer 41 and an ohmic contact layer 5 are first grown sequentially on the flat epitaxial surface after the buried structure 3 is grown. Similarly, a first space 43 is formed by photolithography and etching at the position in the ridge waveguide 26 corresponding to the ohmic contact layer 5. The bottom of the first space 43 does not extend into the confinement layer 41. The second space 44 is the area where the ohmic contact layer 5 is retained.

[0047] The laser also includes an ohmic contact layer 5 disposed in the second space 44, and a first metal electrode 7 that at least partially covers the ohmic contact layer 5 and forms an ohmic contact with the ohmic contact layer 5.

[0048] At least the portion of the ohmic contact layer 5 that contacts the first metal electrode 7 is a P-type doped InGaAs layer. In this embodiment, the entire ohmic contact layer 5 is made of a heavily doped P-type semiconductor material, such as P... ++ InGaAs material can achieve excellent ohmic contact with the first metal electrode 7 through high-concentration P-type doping, providing effective electrical injection, and at the same time can serve as an efficient heat conduction channel.

[0049] In other embodiments, only the surface layer in contact with the first metal electrode 7 may use a high concentration of P-type doped InGaAs, while the underlying layer uses a lower doping concentration of InP or InGaAsP material. That is, the ohmic contact layer may also include an InP layer or an InGaAsP layer located between the InGaAs layer and the confinement layer, taking into account both electrical and thermal conductivity and material cost control; wherein the InP layer and / or InGaAsP layer is P-type doped.

[0050] In one embodiment, when the ohmic contact layer 5 includes an InP layer or an InGaAsP layer located between the nGaAs layer and the confinement layer 41, the thickness of the InGaAs layer is greater than or equal to 100 nm to avoid excessive contact resistance.

[0051] In this embodiment, the doping concentration of the InGaAs layer is preferably set to be greater than 5 × 10¹. 8 cm -3 This is to ensure the formation of low contact resistance ohmic contacts. If the doping concentration is too low, it will lead to increased contact resistance, which in turn increases the series resistance and heat generation of the device.

[0052] A first metal electrode 7 is formed on the ohmic contact layer 5, and the first metal electrode 7 forms an ohmic contact with the ohmic contact layer 5. The material of the first metal electrode 7 can be Au or other metal materials suitable for forming an ohmic contact with a p-type doped InGaAs layer.

[0053] Since the bottom of the second space 44 is close to the active region 22, and the ohmic contact layer 5 is filled in the second space 44, the first metal electrode 7 approaches the active region 22 through the ohmic contact layer 5, thus constructing a lateral direct heat dissipation path.

[0054] During operation, the heat generated in the active region 22 can be quickly dissipated upwards through the highly thermally conductive ohmic contact layer 5 and the first metal electrode 7, which significantly reduces the operating junction temperature of the laser and breaks through the bottleneck of traditional BH lasers that mainly rely on the longitudinal heat dissipation of the substrate 1, thus greatly improving the heat dissipation capacity.

[0055] Meanwhile, the first metal electrode 7 also acts as a P-type electrode, injecting current into the active region 22 from the second space 44 on both sides through the ohmic contact layer 5, forming lateral electrical injection. Compared with the traditional structure of injecting current from the top of the ridge waveguide 26, this lateral injection method shortens the current transmission path in the P-type cladding 23, which can effectively reduce the series resistance of the device, reduce the Joule heat generated during the current transmission process, further reduce the operating temperature of the device, and improve the stability and service life of the device under high power operating conditions.

[0056] In one embodiment, the laser further includes a dielectric film 6 at least partially disposed on the ohmic contact layer 5. The dielectric film 6 may be made of an insulating material such as silicon oxide (SiO2). The first metal electrode 7 contacts the ohmic contact layer 5 through an opening 61 formed in the dielectric film 6. The dielectric film 6 covers the upper limiting structure 4 and the ohmic contact layer 5, serving to protect the device surface and prevent leakage and short circuits. At the same time, the opening 61 area enables electrical connection between the metal electrode and the ohmic contact layer 5.

[0057] The laser also includes trenches 9 extending from the ohmic contact layer 5 toward the substrate and located on both sides of the ridge waveguide 26. The trenches 9 are symmetrically arranged on both sides of the ridge waveguide 26 to prevent the current from spreading laterally to both sides of the ridge waveguide or to avoid damage to the laser due to breakdown.

[0058] A dielectric film 6 is disposed on the side of the ohmic contact layer 5 near the trench 9, and the dielectric film 6 defines an opening 61. Regarding the arrangement of the opening 61, the present invention provides several optional embodiments. The opening 61 is at least disposed corresponding to the second space 44, that is, at least it is necessary to ensure that a portion of the dielectric film 6 above the ohmic contact layer 5 on both sides of the ridge waveguide 26 is removed so that the first metal electrode 7 can be electrically connected to the ohmic contact layer 5.

[0059] In some implementations, the window 61 is a partial window located only above the ohmic contact layer 5, and the window 61 is spaced apart from the target layer 42. This method is beneficial for precisely confining the current injection area within the ohmic contact layer 5.

[0060] In other embodiments, the window 61 may further extend above the target layer 42, that is, remove part or all of the dielectric film 6 covering the target layer 42, as long as the window 61 is spaced apart from the trenches 9 on both sides of the ridge waveguide 26. This arrangement can reduce the photolithographic alignment accuracy requirements of the electrode fabrication process, while increasing the lateral contact area between the first metal electrode 7 and the ohmic contact layer 5, which is beneficial to further reduce contact resistance and promote heat dissipation. Moreover, since the target layer 42 is an undoped InP layer, the undoped InP layer does not form an ohmic contact with the first metal electrode 7, so it will not cause laser breakdown due to current injection.

[0061] In this embodiment, the window 61 is positioned corresponding to the second space 44 and is spaced apart from the trench 9 and the target layer 42. The larger the size of the window 61, the smaller the contact resistance between the first metal electrode 7 and the ohmic contact layer 5, and the lower the overall voltage; however, the size of the window 61 needs to maintain sufficient spacing from the trench 9 while ensuring effective electrical injection, in order to maintain the electrical stability and structural reliability of the device; the preferred width of the window 61 is 2μm to 15μm.

[0062] The side of the window 61 closest to the groove should be kept at a certain distance from the groove. Otherwise, the area of ​​the window 61 will be connected to the side wall of the groove 9, which may easily cause leakage or electrode short circuit, and at the same time damage the structural stability of the device side of the semiconductor laser.

[0063] In a preferred embodiment, the laser further includes a blocking layer 8. The location of the blocking layer 8 varies depending on the fabrication process.

[0064] As shown in Figure 3(c), in one embodiment, corresponding to the process of first growing the target layer 42, the barrier layer 8 is formed between the target layer 42 and the confinement layer 41 to prevent the etching from extending downward to the confinement layer 41 during the subsequent etching to form the second space 44, thereby protecting the active region 22.

[0065] As shown in Figure 4(a), in another embodiment, corresponding to the process of first growing the ohmic contact layer 5, the barrier layer 8 is formed between the ohmic contact layer 5 and the confinement layer 41, which is used to prevent the etching from extending downward to the confinement layer 41 when the first space 43 is etched, thus protecting the active region 22.

[0066] The material of the barrier layer 8 can be a semiconductor material with a good etching selectivity to InP, such as InGaAsP or AlInAs, and its thickness and composition are precisely designed according to the etching process parameters.

[0067] It should be noted that the barrier layer 8 is an optional structure. If the etching process is controlled precisely enough to control the etching depth without damaging the active region 22, this layer can be omitted.

[0068] In one embodiment, the laser further includes a second metal electrode (not shown in the figure), located on the side of the substrate 1 away from the lower cladding 21, i.e. the bottom surface of the substrate 1, for injecting electrons into the N-type InP substrate 1, forming a complete electro-injection circuit together with the first metal electrode 7.

[0069] The method for fabricating the semiconductor laser of the present invention will be described in detail below with reference to the accompanying drawings.

[0070] Please refer to Figures 3(a) to 3(g) for the fabrication method of the semiconductor laser, which includes the following steps: Step S1: Provide substrate 1 and epitaxially grow stacked structure 2; Step S2: Form a ridge waveguide 26 based on the stacked structure 2; Step S3: Epitaxially grow buried structures 3 on both sides of the ridge waveguide 26; Step S4: An epitaxial confinement layer 41 is grown on the stacked structure 2 and the buried structure 3; Step S5: The target layer 42 is epitaxially grown inside and outside the first space 43 on the confinement layer 41, and the ohmic contact layer 5 is epitaxially grown inside and outside the second space 44; the first space 43 is correspondingly arranged with the ridge waveguide 26, and the second space 44 is located on both sides of the first space 43. Step S6: Prepare a first metal electrode 7 that forms an ohmic contact with the ohmic contact layer 5.

[0071] First, referring to FIG3(a), in step S1, a substrate 1 is provided, for example, an N-type InP substrate 1, the surface of which is cleaned to remove contaminants and the native oxide layer, providing a clean interface for subsequent epitaxial growth.

[0072] A stacked structure 2 is epitaxially grown on substrate 1, as shown in Figure 3(a). The stacked structure 2 includes at least a lower cladding layer 21, an active region 22, and an upper cladding layer 23 grown sequentially from the substrate 1 upwards. The lower cladding layer 21, the active region 22, and the upper cladding layer 23 are epitaxially grown sequentially on substrate 1. The epitaxial growth can be performed using processes such as metal-organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE), with MOCVD being preferred to obtain a high-quality crystalline thin film.

[0073] In one embodiment, after forming the upper cladding layer 23, a grating layer 24 and a grating capping layer 25 may be grown on the upper cladding layer 23 to form a distributed feedback structure to limit the laser output of light at a specific wavelength. The grating capping layer 25 is, for example, a doped InP layer.

[0074] As shown in Figure 3(b), in step S2, the stacked structure 2 is etched to form the ridge waveguide 26. Specifically, a first mask, such as a SiO2 mask, is deposited on the surface of the stacked structure 2. The first mask is photolithographically etched to define the pattern of the ridge waveguide 26. The stacked structure 2 is selectively etched by dry etching or wet etching to form the ridge waveguide 26.

[0075] The etching depth of the ridge waveguide 26 structure extends at least below the active region 22 to ensure effective lateral optical field confinement. Insufficient etching depth will result in inadequate lateral optical field confinement and increased optical loss.

[0076] The cross-section of the ridge waveguide 26 structure is roughly trapezoidal, which is a shape that is naturally formed in conventional etching processes and does not require special process control.

[0077] Remove the first mask after etching is complete.

[0078] In step S3, the buried structure 3 is epitaxially grown on both sides of the ridge waveguide 26 using selective epitaxial growth technology, so that the top of the buried structure 3 is basically flush with the top of the ridge waveguide 26 structure.

[0079] The buried structure 3 is a P / N type InP buried heterojunction, formed by sequentially growing a P-type InP layer 31 and an N-type InP layer 32 on both sides of the ridge waveguide 26. During the growth process, the growth conditions are controlled so that the top of the buried structure 3 is flush with the top of the ridge waveguide 26 to obtain a flat surface for subsequent epitaxial growth.

[0080] Further, as shown in Figure 3(c), step S4 involves epitaxially growing a confinement layer 41 on the stacked structure 2. In this embodiment, the confinement layer 41 is epitaxially grown on the top of the ridge waveguide 26 and the top of the buried structure 3. The confinement layer 41 can be a P-type InP layer, providing basic optical confinement.

[0081] Step S5 involves epitaxially growing the target layer 42 inside and outside the first space 43 on the confinement layer 41, and epitaxially growing the ohmic contact layer 5 inside and outside the second space 44. This step can be implemented in the following two ways: Method 1: As shown in Figure 3(c), a confinement layer 41, a barrier layer 8, and a target layer 42 are sequentially grown on the stacked structure 2. The confinement layer 41 can be a P-type InP layer, providing basic light confinement. The barrier layer 8 is used to prevent etching from extending to the confinement layer 41 during subsequent etching of the second space 44, protecting the active region 22 from over-etching damage. The target layer 42 is the core part of the upper confinement structure 4, used to reduce light absorption loss. It should be noted that the barrier layer 8 is optional. If the etching process is controlled precisely enough, it can be omitted to simplify the process flow.

[0082] As shown in Figure 3(d), step S5 etches a second space 44 on both sides of the ridge waveguide 26 structure to form a space 44 located on the upper confinement structure 4. Specifically, a second mask, such as a SiO2 mask, is deposited on the surface of the upper confinement structure 4, and the second mask is photolithographically formed to form strip windows located symmetrically on both sides of the ridge waveguide 26 structure. The strip windows extend along the cavity length direction of the semiconductor laser.

[0083] The target layer 42 and the barrier layer 8 corresponding to the strip window are removed sequentially by selective wet etching to form the second space 44.

[0084] The bottom of the second space 44 is higher than the active region 22 and lower than the top surface of the upper limiting structure 4. In the embodiment with the barrier layer 8, the second space 44 penetrates the target layer 42, and the barrier layer 8 prevents the second space 44 from extending further downward to the limiting layer 41, thereby protecting the active region 22.

[0085] If the barrier layer 8 is omitted, it is necessary to precisely control the corrosion time and corrosion rate to ensure that the bottom of the second space 44 remains above the confinement layer 41 without damaging the active region 22 below.

[0086] As shown in Figure 3(e), an ohmic contact layer 5 is epitaxially grown inside and outside the second space 44. Selective region epitaxy is used to epitaxially grow the ohmic contact layer 5 inside and outside the second space 44.

[0087] The epitaxial material is grown only on the semiconductor surface exposed in the selected region, i.e., the second space 44, and not on the second mask surface.

[0088] Specifically, an ohmic contact layer 5 is epitaxially grown in the second space 44 using MOCVD technology. The ohmic contact layer 5 is a p-type doped InGaAs layer (P... ++ InGaAs), the doping concentration is controlled to be greater than 5 × 10¹ during epitaxial growth. 8 cm - ³. In other embodiments, the ohmic contact layer 5 may also be a stacked structure in which an InP layer or an InGaAsP layer is first grown, followed by the regeneration of a p-type doped InGaAs layer. The ohmic contact layer 5 covers the second space 44 region, fills the second space 44, and substantially planarizes the surface.

[0089] After growth is complete, the second mask on the surface is removed.

[0090] Method 2: As shown in Figure 4(a): A barrier layer 8 and an ohmic contact layer 5 are epitaxially grown on the confinement layer 41. Then, a second mask, such as a SiO2 mask, is deposited on the surface of the ohmic contact layer 5. A strip window corresponding to the first space 43 above the ridge waveguide 26 is defined by photolithography. The ohmic contact layer 5 in this window area and the barrier layer 8 below it are removed by selective wet etching to form the first space 43 in the middle region, as shown in Figure 4(b).

[0091] The barrier layer 8 can effectively prevent the etching of the first space 43 from extending downward to the confinement layer 41, thus protecting the active region 22.

[0092] Subsequently, a target layer 42 is epitaxially grown inside and outside the first space 43 using selective region epitaxy. In this method, the unetched ohmic contact layer 5 remains on both sides of the first space 43, thus forming an ohmic contact layer 5 located within the second space 44. After the target layer 42 is grown, the second mask on the surface of the ohmic contact layer 5 is removed.

[0093] Regardless of which method is used, the target layer 42 located in the first space 43 and the ohmic contact layer 5 located in the second space 44 on both sides of the first space 43 can be grown and formed.

[0094] As shown in Figure 3(g), in step S6, a first metal electrode 7 is prepared so that the first metal electrode 7 forms an ohmic contact with the ohmic contact layer 5.

[0095] In one embodiment, this step specifically includes: depositing a dielectric film 6, such as silicon oxide, on the target layer 42 and the ohmic contact layer 5 located within the second space 44. Using a photolithography process, at least a portion of the dielectric film 6 located on both sides of the ridge waveguide 26 is removed, leaving the dielectric film 6 on the side of the ohmic contact layer 5 closest to the trench 9. The dielectric film 6 defines a window 61. As previously mentioned, the window 61 may correspond only to the region of the second space 44 where the ohmic contact layer 5 is located, or it may extend further to part or all of the region above the target layer 42, as long as the window 61 is spaced apart from the subsequently formed trench 9.

[0096] At least a first metal electrode 7 is formed corresponding to the opening 61, so that the first metal electrode 7 contacts the ohmic contact layer 5 through the opening 61.

[0097] The first metal electrode 7 is made of Au or other metals suitable for forming an ohmic contact with the ohmic contact layer 5. Due to the presence of the window 61, the first metal electrode 7 directly covers the ohmic contact layer 5 near the active region 22, forming an efficient lateral current injection and heat dissipation channel.

[0098] In one embodiment, after step S5, the fabrication method further includes photolithographically defining trench patterns on both sides of the ridge waveguide 26, and using dry or wet etching to etch the ohmic contact layer 5, the upper confinement structure 4, and the stacked structure 2 to form trenches 9 located on both sides of the ridge waveguide 26 and extending from the ohmic contact layer 5 toward the substrate 1. The trenches 9 are symmetrically arranged on both sides of the ridge waveguide 26 along the cavity length direction, and the etching depth is controlled to near the substrate surface during the etching process. These trenches 9 can block the lateral diffusion of current to the outside of the ridge waveguide 26, reduce losses, and improve the electro-optical conversion efficiency of the device.

[0099] After etching, the photoresist is removed and subsequent processes for depositing dielectric film 6 and fabricating the first metal electrode 7 are carried out.

[0100] Furthermore, the fabrication method also includes fabricating a second metal electrode on the back side of the substrate 1, specifically by evaporating a second metal electrode on the back side of the N-type InP substrate 1. The second metal electrode typically uses Au or an Au alloy system, and good ohmic contact is formed through alloying treatment.

[0101] The subsequent steps include conventional cavity surface coating, cleavage, and encapsulation to complete the fabrication of the semiconductor laser.

[0102] The preparation method of this invention adds the formation of a second space 44, a target layer 42, and a selective epitaxial growth of an ohmic contact layer 5 to the traditional BH laser manufacturing process. It has good compatibility with existing InP-based BH laser manufacturing platforms and does not require the addition of too many complex equipment or processes. However, it can reduce optical loss, improve the heat dissipation capacity of the laser, and improve the efficiency and reliability under high power operation without changing the core advantages of the original structure. It has good process feasibility and industrial application prospects.

[0103] In summary, compared to the traditional design that injects current only from the top of the ridge waveguide 26 and relies on longitudinal heat dissipation from the substrate 1, this invention, by introducing an upper confinement structure 4 including the target layer 42, a second space 44 disposed on both sides of the target layer 42, an ohmic contact layer 5 with a P-type doped InGaAs layer in the second space 44, and a first metal electrode 7 in direct contact with the ohmic contact layer 5, synergistically achieves low light absorption loss and high heat dissipation performance, optimizes the high-power operating performance of the semiconductor laser, effectively improves the output power under high injection current, delays device thermal degradation, and extends service life.

[0104] It should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This way of describing the specification is only for clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

[0105] The detailed descriptions listed above are merely specific descriptions of feasible embodiments of the present invention, and are not intended to limit the scope of protection of the present invention. All equivalent embodiments or modifications made without departing from the spirit of the present invention should be included within the scope of protection of the present invention.

Claims

1. A semiconductor laser, characterized in that, It includes a substrate (1), a stacked structure (2) on which a ridge waveguide (26) is formed, a buried structure (3) located on both sides of the ridge waveguide (26), and an upper confinement structure (4) covering the top of the ridge waveguide (26) and the top of the buried structure (3). The stacked structure (2) includes a lower cladding layer (21), an active region (22), and an upper cladding layer (23) sequentially formed on the substrate (1). The upper limiting structure (4) includes a limiting layer (41) and a target layer (42) formed sequentially on the stacked structure (2). The laser also includes a first space (43) disposed on top of the limiting layer (41) and a second space (44) located outside the first space (43), wherein the target layer (42) is formed in the first space (43). The laser also includes an ohmic contact layer (5) disposed in the second space (44) and a first metal electrode (7) that at least partially covers the ohmic contact layer (5) and forms an ohmic contact with the ohmic contact layer (5).

2. The semiconductor laser according to claim 1, characterized in that, The thickness of the upper confinement structure (4) is 1 μm to 4 μm, and the thickness of the target layer (42) is 30% to 80% of the thickness of the upper confinement structure (4); the target layer (42) is made of the same material as the confinement layer (41), and the target layer (42) is undoped.

3. The semiconductor laser according to claim 1 or 2, characterized in that, The width of the target layer (42) is greater than the width of the laser pattern, and the width of the laser pattern is greater than the minimum width of the ridge waveguide (26); And / or, along the transverse axis of the laser, the two side edges of the target layer (42) are located outside the two side edges of the top of the ridge waveguide (26), respectively.

4. The semiconductor laser according to claim 1, characterized in that, The laser also includes a barrier layer (8) formed between the target layer (42) and the confinement layer (41), the barrier layer (8) being used to prevent the second space (44) from extending into the confinement layer (41). Alternatively, the laser may further include a barrier layer (8) formed between the ohmic contact layer (5) and the confinement layer (41), the barrier layer (8) being used to prevent the first space (43) from extending into the confinement layer (41).

5. The semiconductor laser according to claim 1 or 2, characterized in that, At least the portion of the ohmic contact layer (5) that contacts the first metal electrode (7) is a p-type doped InGaAs layer with a doping concentration greater than 5 × 10¹. 8 cm -3 The second space (44) extends along the cavity length direction of the semiconductor laser.

6. The semiconductor laser according to claim 5, characterized in that, The ohmic contact layer further includes an InP layer or an InGaAsP layer located between the InGaAs layer and the confinement layer (41); The thickness of the InGaAs layer is greater than or equal to 100 nm.

7. The semiconductor laser according to claim 1, characterized in that, The laser also includes trenches (9) extending from the ohmic contact layer (5) toward the substrate (1) and located on both sides of the ridge waveguide (26). A dielectric film (6) is disposed on the side of the ohmic contact layer (5) near the trench (9). The dielectric film (6) defines an opening (61). The first metal electrode (7) contacts the ohmic contact layer (5) through the opening (61) on the dielectric film (6). The window (61) and the groove (9) are spaced apart.

8. The semiconductor laser according to claim 1, characterized in that, The stacked structure (2) is etched to form slots (27) on both sides of the ridge waveguide (26), and the buried structure (3) is buried in the slots (27); The top of the buried structure (3) is flush with the top of the ridge waveguide (26).

9. The semiconductor laser according to claim 1 or 2, characterized in that, The stacked structure (2) further includes a grating layer (24) and a grating cover layer (25) located on the upper cladding layer (23). And / or, the target layer (42) and the restriction layer (41) are InP layers.

10. A method for fabricating a semiconductor laser, characterized in that, To prepare a laser as described in any one of claims 1 to 9, the method comprises the following steps: Provide substrate (1); A stacked structure (2) is epitaxially grown on the substrate (1), the stacked structure (2) including a lower cladding layer (21), an active region (22), and an upper cladding layer (23) grown sequentially from the substrate (1). Based on the stacked structure (2), a ridge waveguide (26) is formed. Buried structures (3) are epitaxially grown on both sides of the ridge waveguide (26); A confinement layer (41) is epitaxially grown on the stacked structure (2) and the buried structure (3); A target layer (42) is epitaxially grown inside and outside the first space (43) on the confinement layer (41), and an ohmic contact layer (5) is epitaxially grown inside and outside the second space (44); the first space (43) is correspondingly arranged with the ridge waveguide (26), and the second space (44) is located on both sides of the first space (43); Prepare a first metal electrode (7) that forms an ohmic contact with the ohmic contact layer (5).

11. The preparation method according to claim 10, characterized in that, The steps of epitaxially growing a target layer (42) inside and outside the first space (43) on the confinement layer (41), and epitaxially growing an ohmic contact layer (5) inside and outside the second space (44) include: A target layer (42) is epitaxially grown on the confinement layer (41), and the target layer (42) is etched to form a second space (44) located on both sides of the ridge waveguide (26). The ohmic contact layer (5) is epitaxially grown inside and outside the second space (44). Alternatively, an ohmic contact layer (5) may be epitaxially grown on the confinement layer (41), and the ohmic contact layer (5) may be etched corresponding to the ridge waveguide (26) to form a first space (43) on the confinement layer (41), and the target layer (42) may be epitaxially grown inside and outside the first space (43).

12. The preparation method according to claim 10, characterized in that, The step of preparing the first metal electrode (7) that forms an ohmic contact with the ohmic contact layer (5) includes: Grooves (9) extending from the ohmic contact layer (5) toward the substrate (1) are formed on both sides of the ridge waveguide (26). A dielectric film (6) is formed on the target layer (42) and the ohmic contact layer (5); A dielectric film (6) is retained on the side of the ohmic contact layer (5) near the trench (9), the dielectric film (6) defining a window (61); At least a first metal electrode (7) is formed corresponding to the opening (61), so that the first metal electrode (7) forms an ohmic contact with the ohmic contact layer (5) through the opening (61).

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