Self-locking short-circuit protection circuit with low transient energy and working method thereof

Abstract

The application discloses a self-locking short-circuit protection circuit with low transient energy and a working method thereof, and the protection circuit comprises a voltage monitoring chip U1, a triode Q1, a triode Q2, a triode Q3, a MOS tube Q4, a MOS tube Q5, and a triode Q6; the working method comprises a normal conduction state, a short-circuit protection process and a self-recovery process; the self-locking short-circuit protection circuit can quickly respond and cut off the main circuit when short circuit occurs in the equipment circuit, the short-circuit protection circuit has excellent short-circuit initial current limiting effect, can effectively inhibit the sharp increase of short-circuit current in the initial stage of short circuit, avoids the occurrence of conditions such as spark energy generated by short-circuit current, and effectively improves the use safety of the equipment circuit; meanwhile, the short-circuit protection circuit can automatically reset according to the actual condition of the equipment circuit after the circuit short-circuit protection is performed, manual operation is not needed, and the maintenance convenience of the equipment circuit is improved.

Description

Technical Field

[0001] This invention relates to the field of circuit protection, and in particular to a low transient energy self-locking short-circuit protection circuit and its operating method. Background Technology

[0002] Intrinsically safe equipment, as special electrical equipment widely used in explosive hazardous environments such as coal mines and chemical plants, relies on strictly limiting the transient energy of electrical sparks released when a short circuit occurs. In principle, suppressing short-circuit transient energy mainly involves two aspects: firstly, shortening the response time of protection actions; and secondly, suppressing the rise of current during the short circuit.

[0003] Currently, intrinsically safe devices mostly use protection ICs or traditional discrete component topologies for short circuit protection. Under strict explosion-proof and waterproof potting conditions, this type of conventional solution has the following drawbacks: 1. Long protection response time and slow circuit shutdown response lead to continuous release of short-circuit energy. 2. Poor initial current limiting capacity, unable to effectively suppress the surge in short-circuit current, easily leading to excessive spark energy and failure. 3. Status reset is inconvenient. After the protection is triggered, a physical reset is required, and manual maintenance is complicated. Summary of the Invention

[0004] The purpose of this invention is to address the above-mentioned problems by providing a self-locking short-circuit protection circuit with low transient energy and a method for its operation, which is simple in structure, can provide short-circuit protection and achieve automatic reset.

[0005] To achieve the above objectives, the technical solution of the present invention is as follows: A low transient energy self-locking short-circuit protection circuit includes a voltage monitoring chip U1, transistors Q1, Q2, Q3, MOSFET Q4, Q5, and Q6. The drain of MOSFET Q5 is connected to one end of a ferrite bead L1, and the other end of ferrite bead L1 is connected to the VCC port and one end of capacitor C1. The source of MOSFET Q5 is connected to one end of resistor R3 and the emitter of transistor Q1. The other end of resistor R3 is connected to one end of resistor R10. The base of transistor Q1 is connected to the gate of MOSFET Q5, the emitter of transistor Q3, one end of capacitor C3, one end of resistor R6, one end of resistor R9, the cathode of diode D1, and the source of MOSFET Q4. The collector of transistor Q1 is connected to one end of resistor R4, one end of capacitor C2, one end of resistor R8, the collector of transistor Q3, one end of resistor R5, and the anode of diode D2. The base of transistor Q3 is connected to the capacitor... The other end of C3 is connected to one end of resistor R7. The other end of resistor R7 is connected to the other end of resistor R6 and the collector of transistor Q2. The other end of resistor R9 is connected to one end of capacitor C4. The other end of capacitor C4 is connected to the drain of MOSFET Q4 and one end of the load device. The gate of MOSFET Q4 is connected to the anode of diode D1, the other end of resistor R5 and the cathode of diode D2. The base of transistor Q2 is connected to the other end of resistor R8 and the collector of transistor Q6. The emitter of transistor Q2 is connected to the VDD pin of voltage monitoring chip U1 and one end of resistor R2. The RESET pin of voltage monitoring chip U1 is connected to one end of resistor R1. The other end of resistor R1 is connected to the base of transistor Q6. The emitter of transistor Q6, the other end of resistor R2, the other end of capacitor C2, the other end of resistor R4, the GND pin of voltage monitoring chip U1, the other end of capacitor C1, and the other end of the load device are all grounded.

[0006] Furthermore, the MOSFET Q5 is a depletion-mode MOSFET, and its gate-source voltage difference is... It is in a low-resistance conducting state; when the loop current is... When current flows through resistors R3 and R10, a negative gate-source voltage difference is generated, which can be calculated using the following formula: .

[0007] Furthermore, transistors Q1 and Q3 are PNP transistors, and transistor Q2 is an NPN transistor. Transistors Q2 and Q3 form a self-locking circuit.

[0008] Furthermore, the voltage monitoring chip U1 is model TLV809EA17DBZR, which is an automatic reset IC with a preset reset countdown.

[0009] A method for operating a low transient energy self-locking short-circuit protection circuit includes the following steps: S1. When the loop current is less than the set protection threshold, the voltage drop of the loop current through resistor R3 is less than the turn-on voltage drop of transistor Q1, and transistor Q1 is in the off state; the gate of MOSFET Q4 is connected to GND through resistor R4, and MOSFET Q4 is in the on state. At this time, the loop current can flow normally through MOSFET Q4. S2. When a short circuit occurs in the load device, the loop current rises rapidly. The magnetic bead L1 forms a high impedance, which limits the current rise rate in the early stage of the short circuit. At the same time, the loop current is limited to the current value set by the structure formed by the combination of MOSFET Q5, resistor R3, and resistor R5. S3. When the circuit current rises to the point where the voltage drop across resistor R3 is greater than the turn-on voltage drop of transistor Q1, transistor Q1 turns on. At this time, the gate of MOSFET Q4 is connected to the VCC port through transistor Q1, and MOSFET Q4 turns off. After S4 and MOSFET Q4 are turned off, the loop current becomes 0. At this time, the voltage drop across resistor R3 is less than the turn-on voltage drop of transistor Q1, so transistor Q1 is in the off state. The gate of MOSFET Q4 is connected to the VCC port through transistor Q3. S5. The base of transistor Q2 is connected to the VCC port through transistor Q1, and transistor Q2 is turned on. The base of transistor Q3 is connected to GND through transistor Q2 and resistor R2, and transistor Q3 is turned on. At this time, transistors Q2 and Q3 form a self-locking structure to ensure the stability of MOSFET Q4 being turned off.

[0010] Furthermore, the working method also includes an automatic recovery process after short-circuit protection, the steps of which are as follows: S6. When transistors Q3 and Q2 form a self-locking structure, transistor Q2 is in the conducting state. The VDD pin of the voltage monitoring chip U1 is powered through transistor Q2. Within 200ms of the voltage monitoring chip U1 being powered, the RESET pin remains at a low level. At this time, the base of transistor Q6 is at a low level, and transistor Q6 is in the off state. S7. When the voltage monitoring chip U1 is powered on for more than 200ms, the RESET pin becomes high level, the base of transistor Q6 also becomes high level, transistor Q6 is turned on, at this time the base of transistor Q2 is directly connected to GND through transistor Q6, and transistor Q2 is turned off. After S8 and transistor Q2 are turned off, the base of transistor Q3 is connected to the VCC port in sequence through resistors R7, R6, R10, and R3, and transistor Q3 is turned off. After transistor Q3 is turned off, the gate of MOSFET Q4 is connected to GND through resistors R5 and R4, and MOSFET Q4 is turned on again, and the loop current begins to rise. If the short circuit condition of the load device is released at this time, the loop current eventually stabilizes to be less than the set protection threshold and returns to the normal conduction state. If the short circuit condition of the load device is not released, the short circuit protection process is repeated.

[0011] Compared with the prior art, the advantages and positive effects of this invention are: This invention proposes a low transient energy self-locking short-circuit protection circuit. Under normal load, MOSFET Q4 is in the conducting state, and the circuit is normally conducting. When a short circuit occurs, a high impedance is formed by the ferrite bead L1 to limit the current rise rate in the initial stage of the short circuit, and the short-circuit current is clamped by MOSFET Q5. At the same time, transistors Q2 and Q3 form a self-locking structure, and the main circuit is cut off by MOSFET Q4. When the preset delay time in the voltage monitoring chip U1 is reached, the voltage monitoring chip U1 turns on MOSFET Q4 again via transistor Q6, and the circuit returns to normal. This self-locking short-circuit protection circuit can quickly respond and disconnect the main circuit when a short circuit occurs in the equipment circuit. Furthermore, this short-circuit protection circuit has an excellent initial current limiting effect during a short circuit, effectively suppressing the surge in short-circuit current in the early stages of a short circuit and preventing situations such as sparking energy from the short-circuit current, thus effectively improving the safety of the equipment circuit. At the same time, after performing short-circuit protection, this short-circuit protection circuit can automatically reset according to the actual condition of the equipment circuit, without the need for manual operation, improving the convenience of equipment circuit maintenance. Attached Figure Description

[0012] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0013] Figure 1 This is a circuit diagram of the present invention. Detailed Implementation

[0014] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, any modifications, equivalent substitutions, improvements, etc., made by those skilled in the art to all other embodiments obtained without creative effort should be included within the protection scope of the present invention.

[0015] This invention provides a low transient energy self-locking short-circuit protection circuit, which shortens the turn-off time and suppresses current rise by introducing multi-level current limiting and discrete self-locking topology; at the same time, it achieves automatic reset effect by combining automatic delay.

[0016] like Figure 1 As shown, the structure of this self-locking short-circuit protection circuit includes a voltage monitoring chip U1, transistors Q1, Q2, Q3, MOSFETs Q4, Q5, and Q6. The drain of MOSFET Q5 is connected to one end of a ferrite bead L1, and the other end of ferrite bead L1 is connected to the VCC port and one end of capacitor C1. The source of MOSFET Q5 is connected to one end of resistor R3 and the emitter of transistor Q1. The other end of resistor R3 is connected to one end of resistor R10 and the emitter of transistor Q6. The base of transistor Q1 is connected to the gate of MOSFET Q5, the emitter of transistor Q3, one end of capacitor C3, one end of resistor R6, one end of resistor R9, the cathode of diode D1, and the source of MOSFET Q4. The collector of transistor Q1 is connected to one end of resistor R4, one end of capacitor C2, one end of resistor R8, the collector of transistor Q3, one end of resistor R5, and the anode of diode D2. The base of transistor Q3 is connected to capacitor C10. The other end of resistor 3 is connected to one end of resistor R7. The other end of resistor R7 is connected to the other end of resistor R6 and the collector of transistor Q2. The other end of resistor R9 is connected to one end of capacitor C4. The other end of capacitor C4 is connected to the drain of MOSFET Q4 and one end of the load device. The gate of MOSFET Q4 is connected to the anode of diode D1, the other end of resistor R5 and the cathode of diode D2. The base of transistor Q2 is connected to the other end of resistor R8 and the collector of transistor Q6. The emitter of transistor Q2 is connected to the VDD pin of voltage monitoring chip U1 and one end of resistor R2. The RESET pin of voltage monitoring chip U1 is connected to one end of resistor R1. The other end of resistor R1 is connected to the base of transistor Q6. The emitter of transistor Q6, the other end of resistor R2, the other end of capacitor C2, the other end of resistor R4, the GND pin of voltage monitoring chip U1, the other end of capacitor C1 and the other end of the load device are all grounded.

[0017] In the above circuit structure, C1 is the input filter capacitor, used to filter out the high-frequency ripple of the input power supply of the previous stage; L1 is a high-frequency ferrite bead, which uses the high impedance characteristics at high frequencies to suppress the current rise rate during the physical buffering stage of the initial short circuit; Q5 is a depletion-type MOSFET, which is the main current limiting element, using the gate-source negative bias to clamp the short-circuit peak current; R3 is a sampling resistor, used to collect the main circuit short-circuit current and convert it into a voltage drop signal, limiting the current of MOSFET Q5 and driving the transistor Q1 to conduct; R10 is a sampling resistor, which is connected in series with resistor R3 to provide the gate-source negative bias voltage for the depletion-type field MOSFET Q5 during short circuit; Q1 is a PNP transistor, which is an overcurrent action recognition element, saturating and conducting when the voltage drop across resistor R3 reaches the conduction threshold; R4 is a pull-down resistor; Q2 is an NPN transistor, Q3 is a PNP transistor, and transistors Q3 and PNP transistors... Q2 forms a self-locking circuit; R7 is a current-limiting resistor; R8 is a current-limiting resistor; R6 is a pull-up resistor; C3 is an anti-interference capacitor, used as an absorption capacitor to prevent the self-locking unit from being falsely triggered by transient spike noise; R2 is a pull-down resistor; D2 is an accelerating diode, which can provide a large current conduction path to improve the turn-off speed of the main switch Q4; R5 is a current-limiting resistor; D1 is a Zener diode, which is connected in parallel between the gate and source of the main switch to provide breakdown protection; Q4 is a PMOS transistor, which serves as the main switch; R9 is a buffer resistor, C4 is a buffer capacitor, and resistor R9 and capacitor C4 are connected in series to form an RC absorption circuit to absorb transient voltage spikes; C2 is an anti-interference capacitor; the voltage monitoring chip U1 is model TLV809EA17DBZR, which is an automatic reset IC. After the circuit enters the self-locking protection, it is powered on and executes the internally preset reset countdown.

[0018] The operation of this self-locking short-circuit protection circuit is specifically divided into three stages: Phase 1: Normal conduction state (loop current is less than the set protection threshold). At this time, the voltage drop across resistor R3 in the circuit (referring to the circuit through VCC, load, and GND) is less than the turn-on voltage drop of PNP transistor Q1 (0.7V, which varies depending on the transistor model), so transistor Q1 is in the off state. At the same time, the gate of MOSFET Q4 is connected to ground (low level) through resistor R4, so MOSFET Q4 is in the on state, and the circuit current can flow normally through MOSFET Q4.

[0019] Phase Two: Short Circuit Protection Process; When a short circuit occurs at the load end, the loop impedance drops significantly due to the short circuit, causing the loop current to rise rapidly. During this rapid current rise, the ferrite bead L1, due to its inherent characteristics, forms a high impedance, limiting the rate of current increase in the initial short-circuit phase. Simultaneously, the current is limited to the current value set by the structure formed by the depletion-mode MOSFET Q5, resistor R3, and resistor R5. When the loop current increases to the point where the voltage drop across resistor R3 exceeds the turn-on voltage drop of the PNP transistor Q1 (0.7V), transistor Q1 turns on. At this time, the gate of MOSFET Q4 is connected to VCC (high level) through transistor Q1, and MOSFET Q4 turns off. Simultaneously, the base of NPN transistor Q2 is also connected to VCC (high level) through transistor Q1, and transistor Q2 turns on. After transistor Q2 turns on, the base of PNP transistor Q3 is connected to GND (low level) through transistor Q2 and resistor R2, and transistor Q3 also turns on. At this point, transistors Q2 and Q3 form a self-locking structure, meaning that turning on transistor Q2 will cause Q3 to turn on, and vice versa. After transistor Q4 is turned off, the loop current will be zero. The voltage drop across resistor R3 is less than the turn-on voltage drop of PNP transistor Q1 (0.7V), so transistor Q1 is off. The gate of MOSFET Q4 is connected to VCC (high level) through transistor Q3. This self-locking structure ensures the stability of MOSFET Q4's turn-off.

[0020] Phase 3: Self-recovery process; When transistors Q3 and Q2 are latched up, transistor Q2 is in the ON state. The VDD (power supply pin) of the voltage monitoring chip U1 (specifically model TLV809EA17DBZR) is powered through transistor Q2. For 200ms, the RESET pin of the voltage monitoring chip U1 remains low. The RESET pin is connected to the base of NPN transistor Q6, at which point the base of transistor Q6 is low, and transistor Q6 is in the OFF state. When the voltage monitoring chip U1 is powered for more than 200ms, the RESET pin goes high, and the base of transistor Q6, connected to the RESET pin via resistor R1, also goes high, turning on transistor Q6. At this point, the base of transistor Q2 is directly connected to GND (low level) through transistor Q6, and transistor Q2 is turned off. After transistor Q2 is turned off, the base of transistor Q3 can only be connected to VCC high level through resistors R7, R6, R10, and R3, thus turning off transistor Q3. After transistor Q3 is turned off, the gate of MOSFET Q4 is connected to GND (low level) through resistors R5 and R4, turning MOSFET Q4 back on, and the loop current begins to rise. If the short circuit at the load is cleared at this time, the loop current eventually stabilizes below the set protection threshold, returning to the normal conduction state; if the short circuit at the load is not cleared, the short circuit protection process in stage two is re-entered.

[0021] In this technical solution, the principle by which the ferrite bead L1 suppresses the rate of rise of short-circuit current is as follows: At the instant a short circuit occurs, the surge in short-circuit current can be equivalent to a step signal. According to Fourier transform theory, this step signal contains extremely rich high-frequency harmonic components. To quantitatively explain the principle of current suppression by the magnetic bead L1 at the instant of a short circuit, the transient Kirchhoff voltage differential equation of the main circuit is established: ; In the formula, and These are the equivalent inductance and equivalent resistance of the ferrite bead at high frequencies, respectively. It is line parasitic impedance, It is the line impedance.

[0022] In the initial stage of a short circuit Since the loop current cannot change abruptly, at this time... The initial current rise rate of the system It can be approximated as: ; As can be seen from this equation, in the very early stages of a short circuit, the magnetic bead L1 significantly increases the inductive reactance in the denominator of the differential equation. This is in contrast to the equation with only a small parasitic inductance. In its initial state, the ferrite bead L1 suppresses the initial rate of current rise. As time increases, the inductive component of the ferrite bead... Rapid decay, resistivity component Increase, become the dominant component, and convert the short-circuit energy stored by inductive reactance into heat energy for safe dissipation.

[0023] In this technical solution, the current limiting principle of the depletion-type MOSFET Q5 is as follows: Unlike enhancement-mode devices, depletion-type MOSFETs naturally possess conductive channels formed by ion implantation. This is because they exhibit different gate-source voltages (gate-source voltage difference). It is in a low-resistance conducting state at that time. When the loop current... When the current flows through resistors R3 and R10, according to Kirchhoff's laws, the gate potential is forcibly pulled low, generating a negative gate-source voltage difference: ; When a short circuit occurs, the current flowing through the feedback resistor increases, and the voltage drop across it increases. This increase in voltage drop will affect the gate-source voltage difference. As the semiconductor shifts in the negative direction and is subjected to a continuously enhanced negative gate electric field, the depletion layer inside the semiconductor expands deeper into the conductive channel, resulting in a sharp reduction in the effective conductive cross-sectional area, which in turn forces the drain transient current back to the equilibrium state.

[0024] This invention proposes a low transient energy self-locking short-circuit protection circuit. Under normal load, MOSFET Q4 is in the conducting state, and the circuit is normally conducting. When a short circuit occurs, a high impedance is formed by the ferrite bead L1 to limit the current rise rate in the initial stage of the short circuit, and the short-circuit current is clamped by MOSFET Q5. At the same time, transistors Q2 and Q3 form a self-locking structure, and the main circuit is cut off by MOSFET Q4. When the preset delay time in the voltage monitoring chip U1 is reached, the voltage monitoring chip U1 turns on MOSFET Q4 again via transistor Q6, and the circuit returns to normal. This self-locking short-circuit protection circuit can quickly respond and disconnect the main circuit when a short circuit occurs in the equipment circuit. Furthermore, this short-circuit protection circuit has an excellent initial current limiting effect during a short circuit, effectively suppressing the surge in short-circuit current in the early stages of a short circuit and preventing situations such as sparking energy from the short-circuit current, thus effectively improving the safety of the equipment circuit. At the same time, after performing short-circuit protection, this short-circuit protection circuit can automatically reset according to the actual condition of the equipment circuit, without the need for manual operation, improving the convenience of equipment circuit maintenance.

Claims

1. A low transient energy self-locking short-circuit protection circuit, characterized in that: The self-locking short-circuit protection circuit includes a voltage monitoring chip U1, transistors Q1, Q2, Q3, MOSFETs Q4, Q5, and Q6. The drain of MOSFET Q5 is connected to one end of a ferrite bead L1, and the other end of ferrite bead L1 is connected to the VCC port and one end of capacitor C1. The source of MOSFET Q5 is connected to one end of resistor R3 and the emitter of transistor Q1. The other end of resistor R3 is connected to one end of resistor R10 and the emitter of transistor Q6. The base of transistor Q1 is connected to the gate of transistor Q5, the emitter of transistor Q3, one end of capacitor C3, one end of resistor R6, one end of resistor R9, the cathode of diode D1, and the source of transistor Q4. The collector of transistor Q1 is connected to one end of resistor R4, one end of capacitor C2, one end of resistor R8, the collector of transistor Q3, one end of resistor R5, and the anode of diode D2. The base of transistor Q3 is connected to the base of capacitor C3. The other end of the resistor is connected to one end of resistor R7. The other end of resistor R7 is connected to the other end of resistor R6 and the collector of transistor Q2. The other end of resistor R9 is connected to one end of capacitor C4. The other end of capacitor C4 is connected to the drain of MOSFET Q4 and one end of the load device. The gate of MOSFET Q4 is connected to the anode of diode D1, the other end of resistor R5 and the cathode of diode D2. The base of transistor Q2 is connected to the other end of resistor R8 and the collector of transistor Q6. The emitter of transistor Q2 is connected to the VDD pin of voltage monitoring chip U1 and one end of resistor R2. The RESET pin of voltage monitoring chip U1 is connected to one end of resistor R1. The other end of resistor R1 is connected to the base of transistor Q6. The emitter of transistor Q6, the other end of resistor R2, the other end of capacitor C2, the other end of resistor R4, the GND pin of voltage monitoring chip U1, the other end of capacitor C1 and the other end of the load device are all grounded.

2. The low transient energy self-locking short-circuit protection circuit as described in claim 1, characterized in that: The MOSFET Q5 is a depletion-mode MOSFET, and its gate-source voltage difference... It is in a low-resistance conducting state; when the loop current is... When current flows through resistors R3 and R10, a negative gate-source voltage difference is generated, which can be calculated using the following formula: 。 3. The low transient energy self-locking short-circuit protection circuit as described in claim 2, characterized in that: Transistors Q1 and Q3 are PNP type transistors, and transistor Q2 is an NPN type transistor. Transistors Q2 and Q3 form a self-locking circuit.

4. The low transient energy self-locking short-circuit protection circuit as described in claim 3, characterized in that: The voltage monitoring chip U1 is model TLV809EA17DBZR, which is an automatic reset IC with a preset reset countdown.

5. A method for operating a low transient energy self-locking short-circuit protection circuit as described in claim 1, characterized in that: Includes the following steps: S1. When the loop current is less than the set protection threshold, the voltage drop of the loop current through resistor R3 is less than the turn-on voltage drop of transistor Q1, and transistor Q1 is in the off state; the gate of MOSFET Q4 is connected to GND through resistor R4, and MOSFET Q4 is in the on state. At this time, the loop current can flow normally through MOSFET Q4. S2. When a short circuit occurs in the load device, the loop current rises rapidly. The magnetic bead L1 forms a high impedance, which limits the current rise rate in the early stage of the short circuit. At the same time, the loop current is limited to the current value set by the structure formed by the combination of MOSFET Q5, resistor R3, and resistor R5. S3. When the circuit current rises to the point where the voltage drop across resistor R3 is greater than the turn-on voltage drop of transistor Q1, transistor Q1 turns on. At this time, the gate of MOSFET Q4 is connected to the VCC port through transistor Q1, and MOSFET Q4 turns off. After S4 and MOSFET Q4 are turned off, the loop current becomes 0. At this time, the voltage drop across resistor R3 is less than the turn-on voltage drop of transistor Q1, so transistor Q1 is in the off state. The gate of MOSFET Q4 is connected to the VCC port through transistor Q3. S5. The base of transistor Q2 is connected to the VCC port through transistor Q1, and transistor Q2 is turned on. The base of transistor Q3 is connected to GND through transistor Q2 and resistor R2, and transistor Q3 is turned on. At this time, transistors Q2 and Q3 form a self-locking structure to ensure the stability of MOSFET Q4 being turned off.

6. The operating method of the low transient energy self-locking short-circuit protection circuit as described in claim 5, characterized in that: The working method also includes an automatic recovery process after short-circuit protection, the steps of which are as follows: S6. When transistors Q3 and Q2 form a self-locking structure, transistor Q2 is in the conducting state. The VDD pin of the voltage monitoring chip U1 is powered through transistor Q2. Within 200ms of the voltage monitoring chip U1 being powered, the RESET pin remains at a low level. At this time, the base of transistor Q6 is at a low level, and transistor Q6 is in the off state. S7. When the voltage monitoring chip U1 is powered on for more than 200ms, the RESET pin becomes high level, the base of transistor Q6 also becomes high level, and transistor Q6 is turned on. At this time, the base of transistor Q2 is directly connected to GND through transistor Q6, and transistor Q2 is turned off. After S8 and transistor Q2 are turned off, the base of transistor Q3 is connected to the VCC port in sequence through resistors R7, R6, R10, and R3, and transistor Q3 is turned off. After transistor Q3 is turned off, the gate of MOSFET Q4 is connected to GND through resistors R5 and R4, and MOSFET Q4 is turned on again, and the loop current begins to rise. If the short circuit condition of the load device is released at this time, the loop current eventually stabilizes to be less than the set protection threshold and returns to the normal conduction state. If the short circuit condition of the load device is not released, the short circuit protection process is repeated.

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