Power controller, system, redundant power system

Abstract

The power supply controller is used for a power supply line, a first resistor and a transistor are connected in series between a first end and a second end of the power supply line, and the power supply controller comprises an acquisition circuit, a detection circuit, a logic processing circuit and a gate driving circuit. The acquisition circuit is configured to acquire a voltage difference between the first resistor, determine a first acquisition signal based on the voltage difference, and transmit the first acquisition signal to the detection circuit. The detection circuit is configured to output a detection signal based on the first acquisition signal, a first threshold voltage and a second threshold voltage. The logic processing circuit is configured to output an enable signal or a non-enable signal based on the detection signal. The gate driving circuit is configured to output a driving voltage signal to a gate of the transistor to turn on the transistor in response to the enable signal, and stop outputting the driving voltage signal to turn off the transistor and disconnect the power supply line in response to the non-enable signal.

Description

Technical Field

[0001] At least one embodiment of this disclosure relates to the field of circuits, specifically to a power controller, system, and redundant power supply system. Background Technology

[0002] In fields where power supply safety and reliability are critical, such as those with multiple power sources connected in parallel or with redundant power supplies, such as servers and data centers, communication base stations, new energy vehicles, energy storage systems, industrial control, medical equipment, aerospace, rail transportation, military electronics, and high-end consumer electronics, power controllers are often required to monitor reverse current or backflow of power and to quickly cut off protection when abnormal conditions such as reverse current are detected. Summary of the Invention

[0003] At least one embodiment of this disclosure provides a power controller for controlling a power line, wherein a first resistor and a transistor are connected in series between a first end and a second end of the power line. The power controller includes a data acquisition circuit, a detection circuit, a logic processing circuit, and a gate driving circuit. The power controller uses the voltage at the first end of the power line as a reference ground. When there is no abnormal state in the power line, the voltage at the first end of the power line is greater than the voltage at the second end. The data acquisition circuit is electrically connected to the first end and the second end of the first resistor and electrically connected to the first input terminal of the detection circuit. The data acquisition circuit is configured to acquire the voltage difference across the first resistor, determine a first acquisition signal based on the voltage difference, and transmit the first acquisition signal to the first input terminal of the detection circuit. The second input terminal of the detection circuit... The first input terminal is used to receive a first threshold voltage, and the third input terminal of the detection circuit is used to receive a second threshold voltage. The detection circuit is configured to output a detection signal indicating whether the power line has the abnormal state based on the first acquisition signal, the first threshold voltage, and the second threshold voltage. The logic processing circuit is electrically connected to the detection circuit and the gate driver circuit, and is configured to output an enable signal or a disable signal to the gate driver circuit based on the received detection signal. The gate driver circuit is also electrically connected to the gate of the transistor, and is configured to output a drive voltage signal to the gate of the transistor in response to receiving the enable signal to turn on the transistor, and to stop outputting the drive voltage signal in response to receiving the disable signal to turn off the transistor and disconnect the power line.

[0004] For example, in a power controller provided in at least one embodiment of this disclosure, the acquisition circuit determines a first acquisition signal based on the voltage difference, including: performing a filtering operation on the voltage difference; and superimposing a common-mode voltage on the filtered voltage difference to obtain the first acquisition signal.

[0005] For example, in a power controller provided in at least one embodiment of this disclosure, the abnormal state includes current backflow or overcurrent in the power line, the first threshold voltage is less than the second threshold voltage, and the detection circuit outputs a detection signal indicating whether the power line has the abnormal state based on the first acquisition signal, the first threshold voltage, and the second threshold voltage, including: outputting a detection signal indicating current backflow in the power line in response to the voltage value of the first acquisition signal being less than the first threshold voltage; outputting a detection signal indicating that the power line has not experienced the abnormal state in response to the voltage value of the first acquisition signal being greater than or equal to the first threshold voltage and less than or equal to the second threshold voltage; and outputting a detection signal indicating that the power line has experienced the overcurrent in response to the voltage value of the first acquisition signal being greater than the second threshold voltage.

[0006] For example, in a power controller provided in at least one embodiment of this disclosure, the detection circuit includes a first comparator and a second comparator. A first input terminal of the first comparator is electrically connected to a first input terminal of the detection circuit, a second input terminal of the first comparator is electrically connected to a second input terminal of the detection circuit, a first input terminal of the second comparator is electrically connected to a third input terminal of the detection circuit, and a second input terminal of the second comparator is electrically connected to a first input terminal of the detection circuit. The first comparator is configured to: output a first signal indicating that the power line has experienced current backflow in response to a voltage value of the first acquired signal being less than a first threshold voltage; and output a second signal indicating that the current backflow has not occurred in response to a voltage value of the first acquired signal being greater than or equal to the first threshold voltage. The second comparator is configured to: output a third signal indicating that the power line has experienced overcurrent in response to a voltage value of the first acquired signal being greater than the second threshold voltage; and output a fourth signal indicating that the overcurrent has not occurred in response to a voltage value of the first acquired signal being less than or equal to the second threshold voltage.

[0007] For example, in a power controller provided in at least one embodiment of this disclosure, the detection circuit further includes a first reference current source and a second reference current source. The first reference current source is electrically connected to a second input terminal of the detection circuit and is configured to provide a first reference current, which is used to adjust the first threshold voltage. The second reference current source is electrically connected to a third input terminal of the detection circuit and is configured to provide a second reference current, which is used to adjust the second threshold voltage.

[0008] For example, in a power controller provided in at least one embodiment of this disclosure, the logic processing circuit outputs an enable signal or a disable signal to the gate driving circuit based on the received detection signal, including: outputting the disable signal to the gate driving circuit in response to receiving a detection signal indicating that the abnormal state has occurred, and outputting the enable signal to the gate driving circuit in response to receiving a detection signal indicating that the abnormal state has not occurred.

[0009] For example, in a power controller provided in at least one embodiment of this disclosure, the gate drive circuit includes a charge pump that provides the drive voltage signal, the voltage value of which is greater than the voltage value of the power line.

[0010] For example, in a power controller provided in at least one embodiment of this disclosure, the power controller includes a primary side portion and a secondary side portion, as well as a digital isolator for transmitting control signals between the primary side portion and the secondary side portion and an isolated power supply for transmitting power signals. The primary side portion and the secondary side portion operate in different voltage domains. The acquisition circuit, the detection circuit, the logic processing circuit, and the gate driving circuit are disposed in the secondary side portion. The primary side portion is configured to receive control signals sent by a microcontroller, wherein the control signals are used to indicate whether to disconnect the power line. The power controller is further configured to control whether to disconnect the power line according to the control signals when the power line does not have the abnormal state.

[0011] For example, in a power controller provided in at least one embodiment of this disclosure, the digital isolator is electrically connected between the logic processing circuit and the microcontroller, the control signal is transmitted from the primary side to the logic processing circuit through the digital isolator, and the logic processing circuit is further configured to receive the control signal and, based on the received detection signal and the control signal, output the enable signal or the disable signal to the gate drive circuit.

[0012] For example, in a power controller provided in at least one embodiment of this disclosure, a logic processing circuit outputs an enable signal or a disable signal to the gate driving circuit based on the received detection signal and the control signal, including: in response to receiving a detection signal indicating that the abnormal state has not occurred, outputting the enable signal when the control signal indicates that the power line is turned on, and outputting the disable signal when the control signal indicates that the power line is turned off; and outputting the disable signal in response to receiving a detection signal indicating that the abnormal state has occurred.

[0013] For example, in a power controller provided in at least one embodiment of this disclosure, the isolated power supply is configured to isolate the primary side portion and the secondary side portion through a transformer, and to transmit the power of the power supply located in the primary side portion to the secondary side portion to supply power to the secondary side portion.

[0014] For example, in a power controller provided in at least one embodiment of this disclosure, the acquisition circuit is further configured to determine a second acquisition signal based on the voltage difference. The power controller also includes an isolation operational amplifier circuit for transmitting the second acquisition signal between the primary side portion and the secondary side portion. The isolation operational amplifier circuit is electrically connected to the acquisition circuit, and the second acquisition signal is transmitted to the primary side portion through the isolation operational amplifier circuit.

[0015] For example, in a power controller provided in at least one embodiment of this disclosure, the primary side portion is further configured to transmit the second acquisition signal to the microcontroller.

[0016] For example, in a power controller provided in at least one embodiment of this disclosure, the acquisition circuit is further configured to determine a second acquisition signal based on the voltage difference, including: performing a filtering operation on the voltage difference; determining a first differential signal and a second differential signal based on the filtered voltage difference; and superimposing a common-mode voltage on the first differential signal and the second differential signal respectively to obtain the second acquisition signal.

[0017] For example, in a power controller provided in at least one embodiment of this disclosure, the power controller is integrated on a chip, the chip including a gate drive port, a reference ground port, two voltage detection ports and two threshold voltage receiving ports, the gate drive port being used to output the drive voltage signal; the reference ground port being used to receive the voltage at the first end of the power line; the two voltage detection ports being used to receive the voltage signals at the first end and the second end of the first resistor, respectively; the two threshold voltage receiving ports being used to receive the first threshold voltage and the second threshold voltage, respectively.

[0018] For example, in a power controller provided in at least one embodiment of this disclosure, the chip further includes a control signal receiving port, a data acquisition signal output port, and a drive voltage receiving port. The control signal receiving port is used to receive control signals sent by the microcontroller; the data acquisition signal output port is used to output data acquisition signals; and the drive voltage receiving port is used to receive power signals.

[0019] For example, in a power controller provided in at least one embodiment of this disclosure, the power line transmits a first voltage signal, and the acquisition circuit, the detection circuit, the logic processing circuit, and the gate driving circuit are powered by a second voltage signal, wherein the voltage value of the first voltage signal is greater than the voltage value of the second voltage signal.

[0020] At least one embodiment of this disclosure also provides a power control system, including a power line and a power controller as described in any embodiment of this disclosure, wherein a first resistor and a transistor are connected in series between a first end and a second end of the power line.

[0021] For example, in a power control system provided in at least one embodiment of this disclosure, a microcontroller is further included, the microcontroller being configured to provide a control signal to the power controller, wherein the control signal is used to indicate whether the power line is disconnected.

[0022] For example, in a power control system provided in at least one embodiment of this disclosure, the microcontroller is further configured to receive a sampling signal output by the power controller and determine the current value or voltage value of the power line based on the sampling signal.

[0023] For example, in a power control system provided in at least one embodiment of this disclosure, a second resistor and a third resistor are further included. A first end of the second resistor is electrically connected to a second input terminal of the detection circuit, and a second end of the second resistor is electrically connected to the reference ground. The second resistor is used to adjust the first threshold voltage. The second input terminal of the detection circuit is also electrically connected to a first reference current source for providing a first reference current. The first threshold voltage is determined based on the first reference current and the second resistor, and the first threshold voltage changes in response to changes in the second resistor. A first end of the third resistor is electrically connected to a third input terminal of the detection circuit, and a second end of the third resistor is electrically connected to the reference ground. The third resistor is used to adjust the second threshold voltage. The third input terminal of the detection circuit is also electrically connected to a second reference current source for providing a second reference current. The second threshold voltage is determined based on the second reference current and the third resistor, and the second threshold voltage changes in response to changes in the third resistor.

[0024] At least one embodiment of this disclosure also provides a redundant power supply system, including a power supply line, a plurality of power supplies, and a plurality of power lines corresponding to the plurality of power supplies. The power supply line provides a plurality of DC input ports, each DC input port being connected to a corresponding power supply via a corresponding power line. The power supply line is connected to a load, and the plurality of power supplies are used to supply power to the load. A first resistor and a transistor are connected in series between the first end and the second end of each power line, respectively. Each power line is controlled by a power controller as described in any embodiment of this disclosure. Attached Figure Description

[0025] To more clearly illustrate the technical solutions of the embodiments of this disclosure, the accompanying drawings of the embodiments will be briefly described below. Obviously, the drawings described below only relate to some embodiments of this disclosure and are not intended to limit this disclosure.

[0026] Figure 1 A schematic structural diagram of a power controller provided for at least one embodiment of this disclosure;

[0027] Figure 2 This is a schematic diagram of a signal provided for at least one embodiment of the present disclosure;

[0028] Figure 3 A schematic structural diagram of a power controller provided for at least one embodiment of this disclosure;

[0029] Figure 4 A schematic structural diagram of a detection circuit provided in at least one embodiment of this disclosure;

[0030] Figure 5A A schematic structural diagram of a power controller provided for at least one embodiment of this disclosure;

[0031] Figure 5B A schematic architecture diagram of another power controller provided for at least one embodiment of this disclosure;

[0032] Figure 6 This is a schematic diagram of a signal provided for at least one embodiment of the present disclosure;

[0033] Figure 7 A schematic structural diagram of a power controller provided in an embodiment of this disclosure;

[0034] Figure 8 A schematic structural diagram of a digital isolator provided in at least one embodiment of this disclosure;

[0035] Figure 9 A schematic structural diagram of an isolated operational amplifier circuit provided in at least one embodiment of this disclosure;

[0036] Figure 10 A schematic structural diagram of a system provided for at least one embodiment of this disclosure; and

[0037] Figure 11 A schematic structural diagram of a redundant power supply system provided for at least one embodiment of this disclosure. Detailed Implementation

[0038] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the described embodiments of this disclosure without creative effort are within the scope of protection of this disclosure.

[0039] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms "first," "second," and similar terms used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as "comprising" or "including" mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. Terms such as "connected" or "linked" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. Terms such as "upper," "lower," "left," and "right" are used only to indicate relative positional relationships, and these relative positional relationships may change accordingly when the absolute position of the described object changes. To keep the following description of the embodiments of this disclosure clear and concise, detailed descriptions of some known functions and components are omitted.

[0040] In the embodiments of this disclosure, a transistor refers to a device that includes at least a gate electrode, a drain electrode, and a source electrode. The transistor has a channel between the drain electrode (drain electrode terminal, drain region, or drain electrode) and the source electrode (source electrode terminal, source region, or source electrode), and current can flow through the drain electrode, the channel, and the source electrode. It should be noted that, in this disclosure, the channel refers to the portion of the active layer corresponding to the orthogonal projection of the transistor's gate onto the active layer, i.e., the region through which current mainly flows.

[0041] In this disclosure, the forward conduction of a transistor refers to the situation where, under forward bias, the main current path meets the conduction conditions, a large number of charge carriers are injected to form a low-resistance conduction channel, the device exhibits a low on-state voltage drop, and the main current is allowed to flow stably in the control direction. The reverse conduction of a transistor refers to the situation where, when the main electrode is reverse biased and the conduction threshold is met, the current can flow in the opposite direction to the forward conduction, and its conduction characteristics are dominated by the carrier transport law of the parasitic PN junction or the reverse channel. Furthermore, for example, for a field-effect transistor, when the transistor operates in the deep linear region, it is in a deep conduction mode; when the transistor is in saturation, the driving strength at the control terminal is sufficient to cause channel pinch-off, the output current no longer increases significantly with the increase of the control signal, the drain-source voltage drop is large, and the device exhibits approximately constant current and high resistance characteristics.

[0042] In this disclosure, the first electrode can be the drain electrode and the second electrode can be the source electrode, or vice versa. In cases where transistors with opposite polarities are used or the current direction changes during circuit operation, the functions of the "source electrode" and "drain electrode" are sometimes interchanged. In embodiments of this disclosure, to distinguish the transistors, one electrode is directly described as the first electrode and the other as the second electrode, except for the gate which serves as the control electrode. Therefore, in embodiments of this disclosure, the first and second electrodes of all or some transistors can be interchanged as needed.

[0043] In this disclosure, "electrical connection" or "coupling" includes the situation where constituent elements are connected together by a component having some electrical function. There are no particular limitations on the "component having some electrical function," as long as it enables the transmission and reception of electrical signals between the connected constituent elements. Examples of "component having some electrical function" include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, and other components with various functions.

[0044] For power controllers in systems such as redundant battery power supplies, diodes are often used to achieve power path switching. However, this architecture generally suffers from the inherent defect of no electrical isolation between the power path and the control path, making it only suitable for medium and low voltage DC bus scenarios. When applied to high voltage bus systems (such as 800V and above), there are significant technical limitations: for example, comparators used for polarity and status detection cannot withstand the high input common-mode voltage introduced by the high voltage bus, easily leading to device breakdown or functional failure; at the same time, the gate drive circuit of the switching transistor connected in series in the high voltage power path needs to rise with the bus potential to provide sufficient drive voltage, and ordinary gate boost drive modules cannot meet the level offset and withstand voltage requirements under high voltage conditions. In addition, voltage fluctuations, spike interference, and surge energy of the high voltage bus itself can be directly coupled to the low voltage control circuit, causing damage to the control chip, making it difficult to guarantee system reliability and safety.

[0045] Furthermore, current power controller designs detect current direction by using the bias state of diodes, which reduces the available voltage to the load and causes power loss during normal operation. Alternatively, another design uses techniques such as current clamping to sample the current in the power line, but this method yields current values ​​with low accuracy and significant errors.

[0046] Furthermore, the protection thresholds of current power controllers are fixed by internal device parameters and do not support flexible external configuration and adjustment. They cannot dynamically modify the protection trigger points according to different bus voltage levels, application scenarios and system requirements, and cannot adapt to the protection point requirements of different voltage platforms and application scenarios. This results in poor circuit scalability and versatility, and limited circuit versatility and scenario adaptability.

[0047] This disclosure provides at least one embodiment of a power controller, system, and redundant power system. The power controller is used for a power line and includes a data acquisition circuit, a detection circuit, a logic processing circuit, and a gate driving circuit. The power controller uses the voltage at a first end of the power line as a reference ground. When there is no abnormal state in the power line, the voltage at the first end of the power line is greater than the voltage at the second end. The data acquisition circuit is electrically connected to the first and second ends of a first resistor and to the first input terminal of the detection circuit. The data acquisition circuit is configured to acquire the voltage difference across the first resistor, determine a first acquisition signal based on the voltage difference, and transmit the first acquisition signal to the first input terminal of the detection circuit. The second input terminal of the detection circuit is used to receive a first threshold voltage and detect the voltage difference. The third input terminal of the circuit is used to receive the second threshold voltage. The detection circuit is configured to output a detection signal indicating whether there is an abnormal state in the power line based on the first acquisition signal, the first threshold voltage, and the second threshold voltage. The logic processing circuit is electrically connected to the detection circuit and the gate driver circuit, and is configured to output an enable signal or a disable signal to the gate driver circuit based on the received detection signal. The gate driver circuit is also electrically connected to the gate of the transistor, and is configured to output a drive voltage signal to the gate of the transistor in response to receiving the enable signal to turn on the transistor, and to stop outputting the drive voltage signal in response to receiving the disable signal to turn off the transistor and disconnect the power line.

[0048] This power controller is used to detect abnormal conditions in the power line and, when an abnormal condition is detected, to disconnect the power line by controlling a transistor connected between the first and second ends of the power line. Specifically, the power controller detects abnormalities by acquiring the voltage difference across a first resistor on the power line. When an abnormality occurs, such as current backflow (e.g., the power supply stops working, and the voltage at the first end is less than the voltage at the second end) or overcurrent (e.g., excessive current on the power line), the detection circuit can generate a detection signal indicating the presence of an abnormal condition and shut down the transistor through a gate drive circuit to isolate the control and prevent the large voltage difference from damaging the detection circuit components and the control path.

[0049] Furthermore, the power controller's detection circuit and logic processing circuit compare the voltage difference across the first resistor with the magnitude of the first threshold voltage and the second threshold voltage, enabling simultaneous current backflow detection and overcurrent detection. This integration of multiple functions simplifies system design and offers greater application flexibility compared to current polarity detection solutions. It also allows for the selection of when to disconnect the power line, resists a certain degree of signal crosstalk, and avoids unnecessary power line shutdown in the event of signal crosstalk, thereby improving system reliability.

[0050] The power controller provided in at least one embodiment of this disclosure can be used for controlling high-voltage power lines, and provides a power controller for backflow protection and overcurrent protection of high-voltage power lines. In the event of an abnormal situation, the detection circuit can output a detection signal indicating an abnormal state of the power line based on a first acquisition signal obtained from the voltage difference across a first resistor. The gate drive circuit can respond quickly and turn off the transistor, thereby disconnecting the power line before the voltage difference of the high-voltage power line damages the detection circuit components, avoiding damage to the control circuit due to high-voltage fluctuations. Furthermore, the power controller uses the voltage at the first end of the power line as a reference ground. Under normal conditions, the control path can operate in a low-voltage environment, and the comparator will not be subjected to the high input common-mode voltage introduced by the high-voltage power line, preventing device breakdown or functional failure. The power controller integrates backflow protection and overcurrent protection functions, enabling real-time monitoring of current direction and magnitude in high-voltage applications, simplifying the design of the upper-level system and improving reliability.

[0051] The present disclosure will now be described through several specific embodiments. To keep the following description of the embodiments of the present disclosure clear and concise, detailed descriptions of known functions and components may be omitted. When any component of the embodiments of the present disclosure appears in more than one drawing, the component is represented by the same or similar reference numerals in each drawing.

[0052] The following detailed description, with reference to the accompanying drawings, describes some embodiments and examples of this disclosure.

[0053] The power controller disclosed herein can be used for the control of high-voltage power lines, and is particularly useful for, for example, backflow protection and overcurrent protection of high-voltage power lines. Of course, it can also be used for the control of medium and low-voltage power lines.

[0054] For example, high-voltage power lines are 500V, 600V, 650V, 800V, 1200V, etc., which are much higher than the voltage of ordinary low-voltage power lines (such as 5V, 15V, etc.).

[0055] This power controller is used to detect abnormal conditions in the power line, such as reverse current flow or overcurrent. When the power controller detects an abnormal condition by measuring the voltage difference across a first resistor, it can also disconnect the power line by controlling a transistor connected between the first and second ends of the power line. For example, in a redundant power supply scenario, the first resistor and transistor are connected in series between the DC input ports of the power supply and power lines. When a power supply abnormality occurs, turning off the transistor disconnects the power circuit containing the power line.

[0056] When there are no abnormal conditions, the voltage at the first end of the power supply line is greater than the voltage at the second end, and the voltage at the first end of the first resistor is slightly greater than the voltage at the second end. In this case, the power supply line is not faulty, current flows from the first end to the second end, and the current magnitude is normal; no overcurrent has occurred.

[0057] Under abnormal conditions, such as reverse current or backflow in the power line, the voltage at the first end of the power line is less than or much less than the voltage at the second end, and the voltage at the first end of the first resistor is less than the voltage at the second end. For example, if the power supply connected to the first end of the first resistor experiences a capacity decrease or a fault, the current in the power line will flow from the second end to the first end.

[0058] In another abnormal state, such as when the power line experiences an overcurrent, for example, when the load at the second end of the power line experiences a short circuit, overload, or other fault, the current in the power line becomes too large, resulting in an excessively large voltage difference measured by the first resistor.

[0059] For example, a power line can be a high-voltage busbar, with one end connected to the power supply and the other end connected to the load. Under normal conditions (without backflow or overcurrent), current flows from the first end of the first resistor to the second end, and the current magnitude is normal. In the event of backflow or reverse current, current flows from the second end of the first resistor to the first end, resulting in a larger voltage difference across the first resistor and the polarity being opposite to the normal situation. In this case, the power controller shuts off the transistor, disconnecting the current path of the power line and preventing backflow to the power supply connected to the first end of the power line, thus avoiding damage to the power supply. In the event of overcurrent, the current in the first resistor exceeds the safety threshold, resulting in a larger voltage difference across the first resistor, with the polarity being either the same as or opposite to the normal situation. In this case, the power controller shuts off the transistor, disconnecting the current path of the power line and preventing excessive current from damaging the power supply and components.

[0060] For example, the first end of the power line is connected to the positive terminal of the power supply. Under normal circumstances, the current flows out from the positive terminal of the power supply, through the first resistor and the conducting transistor, to the load connected to the second end of the power line.

[0061] For example, abnormal conditions may include situations such as the power supply battery being disconnected, its capacity decreasing, or insufficient storage voltage, as well as situations such as a load short circuit or overload. In these cases, current on the power line flows from the second terminal to the first terminal, or the current value is too high.

[0062] In this disclosure, in some scenarios, due to voltage signal disturbances, the voltage at the first terminal may be slightly lower than the voltage at the second terminal for a short period of time, but it will quickly return to normal. It is undesirable to disconnect the power supply in this situation, as it would cause unnecessary losses. In this disclosure, a comparison is set with a first threshold voltage, which can be set according to actual needs. The scenario where the voltage at the first terminal is slightly lower than the voltage at the second terminal is not considered an abnormal state.

[0063] In other words, in this disclosure, when an abnormal state of reverse current exists, the voltage at the first terminal of the first resistor is less than the voltage at the second terminal, and it is very likely that the voltage difference between the first and second terminals of the first resistor is large. However, not all cases where the voltage at the first terminal of the first resistor is less than the voltage at the second terminal are considered abnormal states. Generally, when the voltage at the first terminal of the first resistor is lower than the voltage at the second terminal by a certain degree, it is considered an abnormal state, and this degree can be determined according to actual needs. Therefore, the case where the voltage at the first terminal of the first resistor is slightly less than the voltage at the second terminal can be considered an abnormal state.

[0064] Figure 1 This is a schematic structural diagram of a power controller provided for at least one embodiment of the present disclosure.

[0065] The power controller 100 provided in at least one embodiment of this disclosure includes a data acquisition circuit 101, a detection circuit 102, a logic processing circuit 103, and a gate driving circuit 104.

[0066] The power controller 100 uses the voltage Vin at the first end of the power line as a reference ground. Therefore, the components inside the power controller 100 can be considered to operate in the low-voltage domain under normal conditions, powered and operated by the low-voltage signal provided by the power supply VDD. The power supply VDD can be an external power signal, or it can be a power signal provided by the power module integrated on the power controller; this disclosure does not impose any specific limitations on it.

[0067] Figure 1 In the power supply line, a transistor Q1 and a first resistor Rs are connected in series. The first end of the power supply line is electrically connected to the first end a of the first resistor Rs. The second end b of the first resistor Rs is electrically connected to the first end of the transistor Q1. The second end of the transistor Q1 is electrically connected to the second end of the power supply line. The gate of the transistor Q1 is electrically connected to the power controller 100 and is controlled by the power controller 100.

[0068] For example, the resistance value of the first resistor is set to be relatively small to minimize the voltage drop caused by the first resistor.

[0069] Under normal operating conditions, current flows from the first end of the power line to the second end of the power line. There will be a voltage difference between the first end and the second end of the first resistor Rs. Since the current on the power line is within the normal range and the resistance of the first resistor Rs is small, the voltage difference (voltage drop) across the first resistor Rs is small, and the power loss is small.

[0070] like Figure 1 As shown, the acquisition circuit 101 is electrically connected to the first and second ends of the first resistor Rs, and is electrically connected to the first input terminal in1 of the detection circuit 102.

[0071] The acquisition circuit 101 is configured to acquire the voltage signal across the first resistor Rs, determine the voltage difference Vs based on the voltage signal, for example, the voltage difference Vs across the first resistor Rs is the voltage value at the first terminal a of the first resistor minus the voltage value at the second terminal b of the first resistor; determine the first acquisition signal based on the voltage difference Vs, and transmit the first acquisition signal to the first input terminal in1 of the detection circuit 102.

[0072] For example, the acquisition circuit determines the first acquisition signal based on the voltage difference, which may include: performing a filtering operation on the voltage difference; and superimposing a common-mode voltage on the filtered voltage difference to obtain the first acquisition signal.

[0073] The common-mode voltage is a DC voltage signal that can be set as needed. For example, the common-mode voltage can be set to 2V, 3V, etc. After superimposing the common-mode voltage, the polarity of the first acquired signal is positive, which avoids the need for a charge pump in the comparator to provide the negative power rail, thus reducing circuit area.

[0074] For example, in some other embodiments, the voltage difference can be used directly as the first acquisition signal. In abnormal states, such as current backflow, the voltage difference is negative. In this case, a charge pump is needed to provide a negative power rail for the comparator.

[0075] Figure 2 This is a schematic diagram of a signal provided for at least one embodiment of the present disclosure.

[0076] For example, such as Figure 2 As shown, due to high-frequency noise and disturbances at the high-voltage bus, the acquisition circuit can perform a filtering operation on the acquired voltage difference Vs to remove high-frequency noise and other interference signals. Furthermore, a common-mode voltage is superimposed on the filtered voltage difference to obtain the first acquisition signal, ensuring that the value of the first acquisition signal is within the normal operating range of the detection circuit and remains positive. The first acquisition signal is transmitted to the first input terminal in1 of the detection circuit 102, providing a stable and reliable signal basis for subsequent abnormal state detection.

[0077] Continue to refer to Figure 1The input terminals of the detection circuit 102 also include a second input terminal in2 and a third input terminal in3. The second input terminal in2 is used to receive the first threshold voltage Vrth1, and the third input terminal in3 is used to receive the second threshold voltage Vrth2. The detection circuit 102 is configured to output a detection signal indicating whether there is an abnormal state of the power line based on the first acquisition signal, the first threshold voltage Vrth1 and the second threshold voltage Vrth2.

[0078] For example, abnormal conditions include reverse current flowing through the power line and overcurrent flowing through the power line, where the first threshold voltage is less than the second threshold voltage. For instance, the first threshold voltage is used to determine whether reverse current is flowing through the power line, and the second threshold voltage is used to determine whether overcurrent is flowing through the power line.

[0079] For example, the detection circuit outputs a detection signal indicating whether there is an abnormal state in the power line based on the magnitude relationship between the first acquisition signal, the first threshold voltage, and the second threshold voltage. This may include: outputting a detection signal indicating that the power line has reverse current in response to the voltage value of the first acquisition signal being less than the first threshold voltage; outputting a detection signal indicating that the power line has not experienced an abnormal state in response to the voltage value of the first acquisition signal being greater than or equal to the first threshold voltage and less than or equal to the second threshold voltage; and outputting a detection signal indicating that the power line has experienced overcurrent in response to the voltage value of the first acquisition signal being greater than the second threshold voltage.

[0080] For example, taking a scenario where the first acquired signal is a voltage difference superimposed with a common-mode voltage, under normal circumstances, the voltage difference across the first resistor is relatively small, and the voltage at the first end of the power line is greater than the voltage at the second end. In this case, the voltage difference Vs across the first resistor is positive, and after superimposing the common-mode voltage, it is greater than or equal to the first threshold voltage. When current reverse current or backflow occurs, such as a decrease in the capacity or damage of the power supply to the power line, the voltage at the first end of the power line drops, the voltage difference Vs across the first resistor becomes negative, and as the voltage at the first end decreases, the absolute value of Vs increases, causing the voltage value of the first acquired signal to decrease. When the first acquired signal drops below the first threshold voltage, the detection circuit outputs a detection signal indicating that current reverse current has occurred in the power line.

[0081] When an overcurrent occurs, such as when the current is too large, the voltage difference across the first resistor is large and exceeds the second threshold voltage. The detection circuit then outputs a detection signal indicating that an overcurrent has occurred in the power supply line.

[0082] For example, if the second input terminal in2 is directly connected to the reference ground, then the first threshold voltage Vrth1 can be 0.

[0083] For example, taking the voltage difference Vs directly as the first acquisition signal, under normal circumstances, the voltage difference Vs across the first resistor is greater than or equal to the first threshold voltage and less than the second threshold voltage. When current reverse flow or backflow occurs, the voltage difference Vs across the first resistor is negative and less than the first threshold voltage, and the detection circuit outputs a detection signal indicating that current reverse flow has occurred in the power line. When overcurrent occurs, the voltage difference Vs across the first resistor is positive and relatively large, greater than the second threshold voltage, and the detection circuit outputs a detection signal indicating that overcurrent has occurred in the power line.

[0084] The settings for the first and second threshold voltages can be found in the following text, and will not be repeated here.

[0085] The logic processing circuit 103 is electrically connected to the detection circuit 102 and the gate driving circuit 104, and is configured to output an enable signal or a disable signal to the gate driving circuit based on the received detection signal.

[0086] For example, in response to receiving a detection signal indicating an abnormal state, the logic processing circuit 103 outputs a de-enabled signal to the gate driver circuit; in response to receiving a detection signal indicating no abnormal state, it outputs an enabled signal to the gate driver circuit.

[0087] The gate drive circuit 104 is also electrically connected to the gate of transistor Q1 and is configured to output a drive voltage signal Vg to the gate of transistor Q1 in response to receiving an enable signal to turn on transistor Q1, and to stop outputting the drive voltage signal Vg supplied to the gate of transistor Q1 in response to receiving a de-enable signal to quickly turn off transistor Q1 and disconnect the power line.

[0088] For example, in some embodiments, turning off the power cord can directly disconnect the power circuit connected to the power cord, thereby achieving backflow protection and overcurrent protection.

[0089] For example, the power controller 100 can be integrated into a single chip and provide, for example, Figure 1 The interface circled on the boundary is used for connection to external signals. For example, the chip includes a gate drive port connected to the gate of transistor Q1 of the peripheral device to provide a drive voltage signal Vg. The chip also includes two voltage detection ports, connected to the first terminal a and the second terminal b of the first resistor Rs, respectively. During operation, connecting the first terminal a and the second terminal b of the first resistor Rs to the two voltage detection ports allows the detection of the voltage drop (voltage difference) Vs across the first resistor Rs. The chip also includes a reference ground receiving port, which receives the voltage at the first terminal of the power supply line and uses this voltage as a reference ground to align the common-mode voltage of the internal circuitry of the chip with the voltage at the first terminal of the power supply line, reducing the device's withstand voltage requirement and improving its anti-interference capability.

[0090] In addition, the chip provides two threshold voltage receiving ports for receiving a first threshold voltage and a second threshold voltage. The chip also provides a power signal input port for receiving the power signal VDD. Of course, as mentioned before, the power signal VDD can also come from the power signal integrated on the chip; no specific restrictions are placed here.

[0091] Unlike board-level discrete designs, this disclosure integrates all functional modules of the power controller onto a single chip. The packaged chip size is significantly smaller than the total footprint of discrete components, reducing layout complexity and simplifying upper-level system design. The power controller's functionality can be achieved simply by inserting the chip and connecting signals. Furthermore, the chip design offers high reliability, strong signal synchronization, and reduced cost. This approach achieves a triple improvement in performance, reliability, and cost, and simplifies debugging.

[0092] Figure 3 This is a schematic structural diagram of a power controller provided for at least one embodiment of the present disclosure.

[0093] like Figure 3 As shown, the acquisition circuit 101 acquires the voltage signal across the first resistor Rs and transmits the first acquisition signal to the detection circuit.

[0094] Figure 3 The acquisition circuit 101 can be implemented by a circuit or by a controller, etc. This disclosure does not impose any specific restrictions on it.

[0095] like Figure 3 As shown, the detection circuit 102 includes a first comparator 201 and a second comparator 202.

[0096] The first input terminal of the first comparator 201 is electrically connected to the first input terminal in1 of the detection circuit, and the second input terminal of the first comparator 201 is electrically connected to the second input terminal in2 of the detection circuit.

[0097] The first comparator 201 is configured to: output a first signal indicating that current backflow has occurred in the power line in response to the voltage value of the first acquisition signal at the first input terminal in1 of the first comparator 201 being less than the first threshold voltage Vrth1 received at the second input terminal in2; and output a second signal indicating that current backflow has not occurred in the power line in response to the voltage value of the first acquisition signal at the first input terminal in1 of the first comparator 201 being greater than or equal to the first threshold voltage Vrth1 received at the second input terminal in2.

[0098] The first input terminal of the second comparator 202 is electrically connected to the third input terminal in3 of the detection circuit, and the second input terminal of the second comparator 202 is electrically connected to the first input terminal in1 of the detection circuit.

[0099] The second comparator 202 is configured to: output a third signal indicating that an overcurrent has occurred in the power line in response to the voltage value of the first acquisition signal at the second input terminal in1 of the second comparator 202 being greater than the second threshold voltage Vrth2 received at the first input terminal in3; and output a fourth signal indicating that no overcurrent has occurred in the power line in response to the voltage value of the first acquisition signal at the second input terminal in1 of the second comparator 202 being less than or equal to the second threshold voltage Vrth2 received at the first input terminal in3.

[0100] exist Figure 3 In the example, for the first comparator 201 and the second comparator 202, the first input terminal of the comparator is a positive input terminal, and the second input terminal of the comparator is a negative input terminal. At this time, the first signal output by the first comparator is a low-level signal, and the second signal is a high-level signal; the third signal output by the second comparator is a low-level signal, and the fourth signal is a high-level signal. When the power line is not in an abnormal state, that is, when there is no reverse current flow and no overcurrent in the power line, the detection circuit outputs the second and fourth signals, both of which are high-level signals. Of course, it should be noted that the comparator can also have its negative input terminal electrically connected to its first input terminal and its positive input terminal electrically connected to its second input terminal; this disclosure does not impose specific limitations on this.

[0101] The first and second comparators are used to implement backflow prevention and overcurrent detection, which can detect abnormal states of the power line in real time, with fast response speed and effective protection of circuit components.

[0102] In at least one embodiment of this disclosure, the detection circuit may also be implemented by software or a controller, and this disclosure does not limit the implementation of such circuitry.

[0103] For example, the first threshold voltage Vrth1 and the second threshold voltage Vrth2 can be set as needed.

[0104] For example, in some embodiments, the first threshold voltage Vrth1 is 0 when the second input terminal in2 is directly connected to the reference ground.

[0105] For example, in some embodiments, the first threshold voltage Vrth1 and the second threshold voltage Vrth2 can also be adjusted by an external current source. The detection circuit further includes a first reference current source and a second reference current source. The first reference current source is electrically connected to the second input terminal of the detection circuit and is configured to provide a first reference current, which is used as a reference current to adjust the first threshold voltage. The second reference current source is electrically connected to the third input terminal of the detection circuit and is configured to provide a second reference current, which is used as a reference current to adjust the second threshold voltage.

[0106] For example, in other embodiments, the first threshold voltage Vrth1 and the second threshold voltage Vrth2 can also be adjusted by an external voltage source. For example, a specified voltage signal can be received as the first threshold voltage Vrth1 and the second threshold voltage Vrth2 as needed. This disclosure does not limit this aspect.

[0107] Figure 4 This is a schematic structural diagram of a detection circuit provided in at least one embodiment of the present disclosure.

[0108] like Figure 4 As shown, the detection circuit 102 also includes a first reference current source Ib1 and a second reference current source Ib2. The first reference current source Ib1 is electrically connected to the second input terminal in2 of the detection circuit 102 and is configured to provide a first reference current for adjusting the first threshold voltage Vrth1. The second reference current source Ib2 is electrically connected to the third input terminal in3 of the detection circuit 102 and is configured to provide a second reference current for adjusting the second threshold voltage Vrth2.

[0109] For example, such as Figure 4 As shown, a second resistor Rth1 is connected externally to the second input terminal in2 of the detection circuit 102. The resistance value of the second resistor Rth1 can be adjusted as needed, for example, it can be a variable-value resistor, or different resistors can be replaced as needed. When the resistance value of the second resistor Rth1 changes, the first threshold voltage Vrth1 received by the second input terminal in2 of the detection circuit 102 also changes accordingly. That is to say, the first threshold voltage received by the second input terminal of the detection circuit can be adjusted in combination with the second resistor and the first reference current. The first threshold voltage is determined based on the external resistor and the reference current.

[0110] For example, in one example, an on-chip high-precision first reference current flows into a second resistor Rth1. The user can adjust the first threshold voltage Vrth1 entering the second input terminal in2 of the detection circuit 102 by changing the resistance value of the second resistor Rth1. The first threshold voltage Vrth1 of the first comparator 201 can be set by the second resistor (Rth1).

[0111] For example, a third resistor Rth2 is connected to the third input terminal in3 of the detection circuit 102, and an on-chip high-precision second reference current flows into the third resistor Rth2. The second threshold voltage Vrth2 of the second comparator 202 can be set by the third resistor (Rth2). The specific setting method is the same as the setting method of the first threshold voltage Vrth1 mentioned above, and will not be repeated here.

[0112] Therefore, in at least one embodiment of this disclosure, the first threshold voltage and the first threshold voltage are variable, and external protection threshold settings are supported, increasing application flexibility. Furthermore, the adjustment of the external resistor is easy to implement and low in cost. The reference current source embedded in the detection circuit provides a stable reference current, and the threshold voltage can be adjusted by changing the resistance value of the external resistor, reducing the adjustment cost of the threshold voltage, making it easier to implement, and allowing different users to flexibly adjust it according to their actual needs.

[0113] For example, the comparator itself may have an offset, so the effect of the offset can be offset by adjusting the threshold voltage, thereby improving the control accuracy of the power controller.

[0114] As mentioned earlier, in some cases, the voltage at the first end of the power line may fluctuate, causing the voltage at the first end of the first resistor to be slightly lower than the voltage at the second end. In this case, it is not necessary to turn off the power. In this disclosure, the first threshold voltage can be adjusted according to the actual situation, thereby adjusting the margin for turning off the power line. For example, in some cases, even if the voltage at the first end of the first resistor is less than the voltage at the second end, as long as the voltage difference between the two does not reach a certain level (less than the first threshold voltage), the comparator will not be triggered to jump. This avoids unnecessary power line shutdown under slight voltage fluctuations, significantly improves the stability and anti-interference capability of the system, prevents frequent malfunctions of the circuit when the voltage fluctuates slightly, ensures continuous and reliable power supply, reduces losses caused by equipment shutdown and restart, and extends the service life of the power supply and load.

[0115] The working principles of the first and second comparators are explained below.

[0116] refer to Figure 3 Taking the scenario where the first acquired signal is a voltage difference superimposed with a common-mode voltage as an example, under normal circumstances, no reverse current or overcurrent occurs. The voltage difference across the first resistor is relatively small, and the voltage at the first terminal a of the first resistor is slightly greater than the voltage at the second terminal b. At this time, the voltage difference Vs of the first resistor is positive. After superimposing the common-mode voltage, it is greater than or equal to the first threshold voltage. The input signal at the first input terminal of the first comparator is greater than the input signal at the second input terminal. At this time, the first comparator outputs a second signal, indicating that no reverse current has occurred. The first input terminal of the second comparator is the second threshold voltage, and the second input terminal of the second comparator is the first acquired signal after the voltage difference Vs of the first resistor is superimposed with the common-mode voltage. It is less than the second threshold voltage. At this time, the second comparator outputs a fourth signal, indicating that no overcurrent has occurred.

[0117] For example, when a signal disturbance occurs, the voltage Vin at the first end of the power line is slightly less than the voltage Vbus at the second end of the power line. At this time, the voltage at the first end a of the first resistor is also slightly less than the voltage at the second end b of the first resistor. The voltage difference Vs of the first resistor is a small negative value. After the common-mode voltage is superimposed, it is still greater than the first threshold voltage. The input signal at the first input terminal of the first comparator is greater than the input signal at the second input terminal. The first comparator still outputs the second signal, indicating that no abnormal state has occurred.

[0118] like Figure 3 As shown, the logic processing circuit 103 receives the detection signals output by the first comparator 201 and the second comparator 202, and outputs an enable signal or a disable signal to the gate drive circuit 104.

[0119] For example, when the first input of the comparator is a positive input and the second input is a negative input, when the logic processing circuit 103 receives a high-level second signal indicating no current backflow from the first comparator 201 and a high-level fourth signal indicating no overcurrent from the second comparator 202, the logic processing circuit 103 outputs an enable signal to the gate driver circuit 104. When the logic processing circuit 103 receives a low-level first signal indicating current backflow from the first comparator 201 or a low-level third signal indicating overcurrent from the second comparator 202, the logic processing circuit 103 outputs a disable signal to the gate driver circuit 104.

[0120] For example, in some embodiments, the logic processing circuit 103 may include logic devices such as NOR gates, and this disclosure does not impose specific limitations on it.

[0121] For example, in some embodiments, the logic processing circuit may also be implemented based on a controller, etc., and the embodiments disclosed herein do not limit this.

[0122] like Figure 3 As shown, the gate driver circuit 104 includes a charge pump to provide a drive voltage signal Vg. This drive voltage signal has a voltage value greater than the power supply line voltage and is sufficient to turn on transistor Q1. Upon receiving an enable signal, the gate driver circuit charges transistor Q1 to turn it on, ensuring that the on-resistance is sufficiently low. When the power supply line is a high-voltage line, a higher drive voltage is required to reduce the on-resistance because transistor Q1 uses a high-voltage process. Therefore, a charge pump is used in the gate driver circuit to provide a drive voltage higher than the power supply rail, ensuring that transistor Q1 not only turns on but also has a sufficiently low on-resistance.

[0123] In some embodiments, the power controller can be regarded as a solid-state relay, receiving control signals, such as those sent by a microcontroller (MCU), to control the on / off state of the power line.

[0124] For example, when the power supply line operates in a high-voltage environment, the microcontroller and other components need to operate in a low-voltage environment. Therefore, the high-voltage side and the low-voltage side must be completely separated electrically to effectively block the transmission of dangerous voltage from the high-voltage side to the low-voltage side, ensuring the safety of operators and downstream loads. At the same time, it can suppress the transmission of noise and interference signals from the high-voltage side to the primary side, improve the stability of the circuit operation, and avoid system malfunctions caused by common-mode interference, voltage fluctuations, and other factors, thus meeting the safety specifications and reliable operation requirements of the power supply circuit.

[0125] Figure 5A A schematic architecture diagram of a power controller provided for at least one embodiment of this disclosure.

[0126] like Figure 5A As shown, the power controller further integrates a digital isolator 105 and an isolated power supply 106.

[0127] For example, such as Figure 5A As shown, the power controller 100 includes a primary side section and a secondary side section, as well as a digital isolator 105 for transmitting control signals between the primary side section and the secondary side section, and an isolated power supply 106 for transmitting power signals.

[0128] The primary and secondary sides operate in different voltage domains: the primary side operates in a low-voltage domain, and the secondary side operates in a high-voltage domain. The secondary side uses the input power supply (PGISO=Vin) as a reference ground to ensure sufficient drive voltage for transistor Q1. The aforementioned acquisition circuit, detection circuit, logic processing circuit, and gate driver circuit are located in the secondary side.

[0129] The primary side is configured to receive control signals sent by the microcontroller, which are used to indicate whether the power line is disconnected.

[0130] The power controller is also configured to disconnect the power supply line based on a control signal when there is no abnormality in the power supply line. In other words, the power controller can be implemented as a solid-state relay.

[0131] For example, a digital isolator is electrically connected between the logic processing circuit 103 and the microcontroller, and the control signal is transmitted from the primary side to the logic processing circuit 103 through the digital isolator 105.

[0132] The logic processing circuit is also configured to receive control signals and, based on the received detection and control signals, output an enable or disable signal to the gate driver circuit.

[0133] For example, in some embodiments, the logic processing circuit outputs the enable signal or the disable signal to the gate driver circuit based on the received detection signal and the control signal, including: in response to receiving a detection signal output by the detection circuit indicating that the abnormal state has not occurred, outputting the enable signal when the control signal indicates that the power line is turned on, and outputting the disable signal when the control signal indicates that the power line is turned off; and outputting the disable signal in response to receiving a detection signal output by the detection circuit indicating that the abnormal state has occurred.

[0134] In other words, under normal operating conditions, i.e., when the first comparator outputs a second signal indicating no abnormal state and the second comparator outputs a fourth signal indicating no abnormal state, the microcontroller sends a control signal Vctrl, which is transmitted to the secondary logic processing circuit 103 via the digital isolator 105. The logic processing circuit 103 outputs an enable signal or a disable signal based on the control signal Vctrl. For example, upon receiving the second and fourth signals, if the control signal indicates that the signal is on, an enable signal is output; if the control signal indicates that the signal is off, a disable signal is output (or no enable signal is output).

[0135] When an abnormal state is detected, such as the first comparator outputting a first signal indicating an abnormal state (current backflow), or the second comparator outputting a third signal indicating an abnormal state (overcurrent), the enable output is canceled regardless of whether the microcontroller's control signal is on or off. For example, an enable signal is output (or no enable signal is output). Subsequently, the gate drive circuit 104 rapidly discharges transistor Q1, turning off the branch.

[0136] The microcontroller (MCU) controls the opening and closing of the relays on the primary side, while an isolated power supply transmits the low-voltage power (VDD) input from the primary side to the secondary side to power the various circuit modules on the secondary side.

[0137] Figure 5B This is a schematic architecture diagram of another power controller provided for at least one embodiment of the present disclosure.

[0138] like Figure 5B As shown, the power controller further integrates an isolation operational amplifier circuit 107.

[0139] For example, such as Figure 5B As shown, in at least one embodiment of this disclosure, the power controller 100 further includes an isolation operational amplifier circuit 107 for transmitting a second acquisition signal between the primary side portion and the secondary side portion, the isolation operational amplifier circuit 107 being electrically connected to the acquisition circuit 101.

[0140] For example, in at least one embodiment of this disclosure, the acquisition circuit is further configured to determine a second acquisition signal based on the first acquisition signal and transmit the second acquisition signal to the isolation operational amplifier circuit 107.

[0141] Figure 6 This is a schematic diagram of a signal provided for at least one embodiment of the present disclosure.

[0142] For example, a filtering operation is performed on the voltage difference Vs. Based on the filtered voltage difference, a first differential signal and a second differential signal are determined. A common-mode voltage is then superimposed on the first and second differential signals to obtain a second acquisition signal. Thus, since the input requirement of an isolation operational amplifier is usually a differential signal, a second acquisition signal that meets the input requirements of the isolation operational amplifier can be obtained.

[0143] For example, a filtering operation is performed on the voltage difference Vs, and a common-mode voltage is superimposed on the filtered voltage difference to obtain the first differential signal and the second differential signal. Alternatively, the first and second differential signals can be determined directly based on the first acquired signal to obtain the second acquired signal. Thus, only one filtering operation and one common-mode voltage superposition operation are needed, eliminating the need to perform separate filtering and common-mode voltage superposition operations for the first and second acquired signals, or to design separate corresponding modules. This avoids redundant processing, simplifies circuit design, and saves hardware resources.

[0144] For example, assuming the voltage difference is 0.5V, after filtering, the first differential signal and the second differential signal are 0.25V and -0.25V, respectively. After superimposing a common-mode voltage (e.g., a 2V DC signal), the second acquisition signal is obtained, which includes two common-mode differential signals of 2.25V and 1.75V.

[0145] For example, the second acquisition signal is transmitted to the primary side via an isolation operational amplifier circuit.

[0146] For example, when transmitting signals to the microcontroller, the isolated operational amplifier circuit can directly transmit the second acquired signal to the microcontroller. Users can configure the isolated operational amplifier circuit as needed. For instance, the second acquired signal can be transmitted to the primary side via the isolated operational amplifier circuit, and thus to the microcontroller. Alternatively, the result of superimposing the voltage difference Vs with a common-mode voltage (e.g., the voltage signal of 0.5V + 2V = 2.5V in the above embodiment) can be output to the microcontroller. Users can configure the isolated operational amplifier circuit as needed.

[0147] For example, in at least one embodiment of this disclosure, the primary side is further configured to transmit the second acquisition signal to a microcontroller for processing. For instance, the second acquisition signal may be a voltage signal, which can be used to calculate the current value on the power line according to Ohm's law and display the voltage or current value on the power line. This allows for real-time acquisition of the power line's status and reporting to the microcontroller while controlling the power line, increasing application flexibility. Furthermore, the microcontroller can perform further processing and calculations based on the second acquisition signal, which will not be elaborated further here.

[0148] One current detection method involves sampling the current in a power line using techniques such as current clamps. However, in this method, the power line under test and the current clamp at the measuring end are not from the same source, resulting in low accuracy and significant errors in the sampled current value. At least one embodiment of this disclosure provides a power controller that acquires the voltage difference across a first resistor on the power line and transmits this voltage difference to a microcontroller, which then determines the voltage or current on the power line.

[0149] For example, a microcontroller can determine the voltage value on the power line based on a real-time acquired second acquisition signal, and can also determine the current value on the power line based on the second acquisition signal and the resistance value of the first resistor Rs. Currently, current detection on power lines typically uses a current clamp method, which detects current through coil induction, resulting in low accuracy, especially with large errors when the current is small. This disclosure acquires the voltage difference and processes it into a second acquisition signal, which is then transmitted to the microcontroller. Based on Ohm's law, the microcontroller can accurately obtain the current on the current line, thereby enabling real-time and accurate detection of the power line's current state and avoiding the low accuracy and large errors associated with current clamp detection. Based on the real-time acquired voltage or current values ​​on the power line, the microcontroller can monitor the power line's operating condition in real time and control whether the power line is disconnected via control signals.

[0150] Figure 7 This is a schematic structural diagram of a power controller provided in an embodiment of the present disclosure.

[0151] like Figure 7 As shown, the power controller can be regarded as a solid-state relay. The microcontroller inputs the control signal Vctrl to remotely control the on / off state of the power line.

[0152] For example, an isolated power supply is configured to isolate the primary and secondary sides via a transformer, transferring power from the primary side to the secondary side to power it. Since the secondary circuit requires low-voltage power, the primary side's power input is connected to an isolated power supply, which then transfers power to the secondary side to provide low-voltage power to each module. This eliminates the need for a separate low-voltage power supply for the secondary side.

[0153] like Figure 7As shown, an isolated power supply uses a transformer to isolate the primary and secondary sides. For example, a DC power supply VDD is input to the primary side. In the primary side, a switching converter (e.g., an H-bridge circuit) converts the DC power to AC power, which is then driven by the power stage of the transformer to induce a current in the secondary side coil. The rectifier in the secondary side converts the AC power back to DC power VISO, which then powers the various circuit modules in the secondary side.

[0154] For example, the power line transmits a first voltage signal, which may be a high-voltage signal. The acquisition circuit, detection circuit, logic processing circuit, and gate driving circuit are powered by a second voltage signal, VISO, which is a low-voltage signal, meaning the first voltage signal is greater than or much greater than the second voltage signal. This high- and low-voltage separation power supply architecture ensures that the internal detection circuits of the chip always operate in a safe low-voltage environment (the second voltage signal), solving the problems of easy chip breakdown, short lifespan, and susceptibility to interference in high-voltage applications.

[0155] Figure 8 This is a schematic structural diagram of a digital isolator provided in one embodiment of the present disclosure.

[0156] like Figure 8 As shown, DC isolation between the primary and secondary sides is achieved using voltage-resistant isolation devices. The control signal Vctrl, which is a digital input signal, is conditioned by the transmitter and then passes through the isolator. After receiving the conditioned signal, the receiver recovers the digital code stream and transmits the control signal Vctrl to the secondary side.

[0157] Figure 9 This is a schematic structural diagram of an isolated operational amplifier circuit provided in an embodiment of the present disclosure.

[0158] like Figure 9 As shown, the isolation operational amplifier circuit adds a binarization modulator and a demodulator to the digital isolator. The modulator modulates the second acquisition signal, which is in the form of an analog signal, into a binary signal. After signal conditioning by the transmitter, the signal passes through the isolator. The receiver recovers the binary signal after receiving the conditioned signal, and the demodulator demodulates the binary signal back into analog signal form and transmits it to the primary side. The gain of the operational amplifier can be changed by adjusting the design parameters of the modulator and demodulator; this embodiment does not limit this.

[0159] For example, Figure 7 The power controller shown is integrated on a chip. For example, the power controller may include a system on chip (SOC) or similar form. The SOC can integrate circuit modules such as digital isolators, isolated power supplies, charge pumps, and detection circuits into a single chip, forming a highly integrated hardware architecture.

[0160] The following is combined Figure 7 The structure of the power controller will be described in detail.

[0161] For example, the chip includes a gate drive port, a reference ground port, two voltage detection ports, and two threshold voltage receiving ports. The gate drive port is used to output a drive voltage signal, the reference ground port is used to receive the voltage at the first end of the power line as a reference ground, the two voltage detection ports are electrically connected to the first end and the second end of the first resistor, respectively, and are used to receive the voltage signals at the first end and the second end of the first resistor, respectively, and the two threshold voltage receiving ports are used to receive the first threshold voltage and the second threshold voltage, respectively.

[0162] like Figure 7 As shown, the chip also includes a control signal receiving port, a data acquisition signal output port, and a drive voltage receiving port. The control signal receiving port is used to receive control signals sent by the microcontroller. The data acquisition signal output port is used to output data acquisition signals, such as outputting a second data acquisition signal to the microcontroller. The drive voltage receiving port is used to receive the power supply signal VDD to power each module in the primary side and to transmit it to the secondary side through an isolated power supply to power each circuit in the secondary side.

[0163] like Figure 7 As shown, the acquisition circuit 101 acquires the voltage signal across the first resistor Rs, determines the first acquisition signal and the second acquisition signal, and transmits the first acquisition signal to the detection circuit and the second acquisition signal to the primary side. The specific connection relationships and working principles can be found in the description of the aforementioned embodiments, and will not be repeated here.

[0164] like Figure 7 As shown, the detection circuit 102 includes a first comparator 201 and a second comparator 202. Their connection relationship and working principle can be referred to the description of the foregoing embodiment, and will not be repeated here.

[0165] like Figure 7 As shown, the second input terminal of the detection circuit 102, i.e., the negative input terminal of the first comparator 201, is connected to a first reference current source Ib1 to provide a first reference current. The chip also provides a first threshold voltage receiving port, which is connected to the second input terminal of the detection circuit. The first threshold voltage receiving port is electrically connected to a second resistor Rth1, the other end of which is connected to a reference ground. The first threshold voltage receiving port is used to receive the first threshold voltage. For example, the first threshold voltage can be adjusted by adjusting the resistance value of the second resistor Rth1; the specific process can be referred to the description in the foregoing embodiments, and will not be repeated here.

[0166] like Figure 7As shown, the third input terminal of the detection circuit, i.e., the positive input terminal of the second comparator 202, is connected to a second reference current source Ib2 to provide a second reference current. The chip also provides a second threshold voltage receiving port, which is connected to the third input terminal of the detection circuit. The second threshold voltage receiving port is electrically connected to a third resistor Rth2, the other end of which is connected to reference ground. The second threshold voltage receiving port is used to receive the second threshold voltage. For example, the second threshold voltage can be adjusted by adjusting the resistance value of the third resistor Rth2; the specific process can be referred to the description in the foregoing embodiment, and will not be repeated here.

[0167] The output terminals of the detection circuit, namely the output terminals of the first comparator 201 and the second comparator 202, are connected to the logic processing circuit 103 to transmit the detection results (e.g., the first signal, the second signal, the third signal, and the fourth signal) to the logic processing circuit 103.

[0168] For more details about the detection circuit 102, please refer to the description of the foregoing embodiments, which will not be repeated here.

[0169] The primary side receives the second acquisition signal through an isolation operational amplifier circuit and transmits it to the microcontroller. The primary side also receives the control signal Vctrl sent by the microcontroller, which is transmitted to the logic processing circuit 103 through a digital isolator.

[0170] The logic processing circuit 103 generates an enable signal or a disable signal based on the control signal Vctrl and the detection result of the detection circuit, and transmits it to the gate drive circuit 104.

[0171] In response to receiving an enable signal, the gate driver circuit 104 outputs a drive voltage signal Vg to turn on transistor Q1, and in response to receiving a disable signal, stops outputting the drive voltage signal Vg to turn off transistor Q1.

[0172] For example, under normal circumstances, the current direction on the power line is from Vin to Vbus, and the current value on the power line is within the normal range. At this time, the voltage difference Vs across the first resistor acquired by the acquisition circuit 101 is a positive value within the normal range. Based on the voltage difference Vs, the first acquisition signal and the second acquisition signal are output. The method for determining the first acquisition signal and the second acquisition signal is the same as the relevant content of the aforementioned acquisition circuit, and will not be repeated here.

[0173] In the detection circuit 102, when the voltage at the positive input terminal of the first comparator is greater than the first threshold voltage, the first comparator outputs a second signal indicating that no current backflow has occurred; when the voltage at the negative input terminal of the second comparator is less than the second threshold voltage, the second comparator outputs a fourth signal indicating that no overcurrent has occurred.

[0174] When the logic processing circuit 103 receives the second and fourth signals, it selects whether to output an enable signal based on the control signal. For example, when the control signal indicates that the signal is on, it outputs an enable signal to the gate driver circuit. The gate driver circuit uses a charge pump to output a higher drive voltage signal Vg to the gate of transistor Q1, turning on transistor Q1 to turn on the power line.

[0175] For example, taking the scenario where the first acquisition signal is a voltage difference superimposed with a common-mode voltage, under an abnormal state, such as reverse current or current backflow in the power line, the voltage difference Vs acquired by the acquisition circuit is negative and may be larger in absolute value than that under voltage disturbance. After superimposing the common-mode voltage, it will be less than the first threshold voltage. The voltage at the positive input terminal of the first comparator is less than the voltage at the negative input terminal. At this time, the first comparator outputs the first signal to indicate that current backflow has occurred under an abnormal state.

[0176] For example, in another abnormal state, such as overcurrent, the voltage value Vs collected by the acquisition circuit is large. After being superimposed with the common-mode voltage, it is greater than the second threshold voltage. The voltage at the negative input terminal of the second comparator is greater than the voltage at the positive input terminal. At this time, the second comparator outputs a third signal to indicate that an abnormal overcurrent state has occurred.

[0177] When the logic processing circuit 103 receives the first or third signal, regardless of whether the control signal indicates on or off, it cancels the enable output, for example, by outputting a de-enabled signal. When the gate drive circuit receives the de-enabled signal, it stops outputting the drive voltage signal Vg, and the transistor Q1 is turned off, thereby cutting off the power supply line, preventing backflow and overcurrent, and achieving backflow protection and overcurrent protection.

[0178] This chip integrates on-chip digital isolators, isolated power supplies, isolated operational amplifier circuits, charge pumps, acquisition circuits, detection circuits, logic processing circuits, and gate driver circuits. It enables electrical isolation control for systems such as high-voltage redundant power supplies, providing reverse current protection and overcurrent protection, simplifying the design of upstream systems and improving reliability. It also supports external protection threshold settings, increasing application flexibility.

[0179] At least one embodiment of this disclosure also provides a power control system. Figure 10 This is a schematic structural diagram of a power control system provided in at least one embodiment of the present disclosure.

[0180] like Figure 10 As shown, the power control system 200 includes a power line and a power controller 100 as described in any embodiment of this disclosure.

[0181] like Figure 10As shown, a first resistor Rs and a transistor Q1 are connected in series between the first and second ends of the power supply line. For example, the first end of the power supply line is electrically connected to the first end of the first resistor Rs, the second end of the first resistor Rs is electrically connected to the first end of the transistor Q1, and the second end of the transistor Q1 is electrically connected to the second end of the power supply line.

[0182] The power controller 100 is electrically connected to the first end and the second end of the first resistor Rs. For example, the two voltage detection ports of the power controller 100 are electrically connected to the first end and the second end of the first resistor Rs, respectively, to receive the voltage signals across the first resistor Rs.

[0183] The power controller 100 is also electrically connected to the gate of transistor Q1. For example, the gate drive port of the power controller 100 is electrically connected to the gate of transistor Q1 to provide a drive voltage signal to the gate of transistor Q1.

[0184] like Figure 10 As shown, the power control system also includes a microcontroller configured to provide control signals to the power controller 100, for example, to a control signal receiving port of the power controller 100, wherein the control signals are used to indicate whether the power line is disconnected. The microcontroller is also configured to receive acquisition signals output by the power controller 100, for example, through an acquisition signal output port of the power controller 100, and based on the acquisition signals, determine the voltage or current value of the power line, thereby monitoring the operating condition of the power line in real time. For example, the acquisition signal is a second acquisition signal.

[0185] like Figure 10 As shown, the power control system also includes a second resistor Rth1. The first end of the second resistor is electrically connected to the second input terminal of the detection circuit, for example, via the first threshold voltage receiving port of the power controller 100. The second end of the second resistor is electrically connected to a reference ground. The second input terminal of the detection circuit is also electrically connected to a first reference current source Ib1 to provide a first reference current. The first threshold voltage is generated based on the first reference current and the second resistor. For example, the first reference current passes through the second resistor to the reference ground, thereby generating the first threshold voltage at the first end of the second resistor.

[0186] The second resistor is used to adjust the first threshold voltage, which changes in response to changes in the second resistor. For example, users can change, replace, or adjust the value of the second resistor as needed to adjust the first threshold voltage, providing a more flexible control method.

[0187] like Figure 10As shown, the power control system also includes a third resistor Rth2, and the third input terminal of the detection circuit is electrically connected to a second reference current source Ib2 to provide the second reference current. The connection method and working principle of the third resistor are the same as those of the second resistor Rth1, and will not be described again here.

[0188] For more detailed information about the power controller (such as its structure and working principle), please refer to the relevant descriptions in the foregoing embodiments. Repeated descriptions will not be repeated here.

[0189] For example, the power cord can be a high-voltage power bus, with one end connected to the high-voltage power supply and the other end connected to the load.

[0190] For example, a power controller can monitor circuit conditions in real time, block reverse current flow, prevent excessive current, isolate faulty power sources, and ensure power supply continuity. This system can be used in any scenario with high requirements for power supply reliability and safety.

[0191] For example, this system can be a multi-power redundant power supply system. In scenarios such as servers, data centers, communication base stations, and industrial control equipment, dual or multiple power supply parallel redundancy designs are commonly used. Backflow protection prevents current from flowing back to the faulty branch when one power supply fails (e.g., battery depletion, module failure), preventing the fault from escalating and burning out the power module, while ensuring continuous power supply to downstream loads, achieving the reliability of "N+1" redundant power supply.

[0192] For example, this system could be a battery power supply and charging system. In new energy vehicles, energy storage systems, portable electronic devices (such as laptops and power banks), and UPS uninterruptible power supplies, backflow protection is a core safety module. It prevents backflow of grid / charger current during charging from damaging the battery, and also prevents backflow of battery current into the charging circuit under abnormal operating conditions (such as short circuits or reverse polarity). Furthermore, when multiple batteries are connected in parallel or the battery pack is connected to the bus, it blocks circulating current and backflow between batteries, improving the safety and lifespan of the battery pack.

[0193] For example, this system can be a high-voltage DC power supply system. In scenarios such as 800V high-voltage vehicle power supplies, photovoltaic grid-connected systems, and industrial high-voltage busbars, backflow protection can isolate faulty branches, preventing high-voltage busbar current from flowing back to the faulty unit when a photovoltaic string or vehicle power supply module fails. At the same time, it prevents current backflow between power modules of different voltage levels, ensuring the insulation safety and stable operation of the high-voltage system.

[0194] For example, the system can be a system with hot-swapping and redundant power supply switching. For example, in the hot-swappable power modules of server power supplies and communication equipment, backflow protection can enable online plugging and unplugging of power modules and seamless switching, avoiding voltage fluctuations and current backflow at the moment of plugging and unplugging from impacting downstream loads, and ensuring that the system can switch without stopping or faults.

[0195] This disclosure does not limit the function, form, or use of the system, as long as the system includes the power controller of any embodiment of this disclosure.

[0196] This system can produce the same technical effect as the aforementioned power controller. For more details on the technical effect, please refer to the relevant description of the aforementioned power controller, which will not be repeated here.

[0197] Figure 11 A schematic structural diagram of a redundant power supply system provided for at least one embodiment of this disclosure.

[0198] Redundant power supply systems primarily employ a dual-battery or multi-power-source parallel redundant power supply architecture. This architecture provides stable and reliable power input to communication equipment, network equipment, servers, or other loads requiring uninterrupted power supply. It ensures that the system continues to operate even when a single power source is disconnected, experiences a voltage drop, or a fault, thus preventing power outages. In applications with high power supply reliability requirements, a redundant design with multiple power sources in parallel is often used. Isolation devices are needed between these parallel power sources to prevent backflow of bus current into the batteries and subsequent damage if one power source fails.

[0199] like Figure 11 As shown, the redundant power supply system includes power supply lines, multiple power supplies, and multiple power supply lines corresponding to the multiple power supplies. The multiple power supplies are respectively... Figure 11 The power supply consists of power supply 1 to power supply N. N DC power supplies are connected in parallel, and each power supply group corresponds to an independent DC input port.

[0200] The power supply line provides multiple DC input ports. Each DC input port is connected to a corresponding power supply through a power line. For example, DC input port 1 is connected to power supply 1 through a power line, and DC input port N is connected to power supply N through another power line.

[0201] The load is connected to the power supply line, and multiple power supplies are used to power the load.

[0202] like Figure 11As shown, a first resistor Rs and a transistor Q1 are connected between the first and second ends of each power line. The voltage signal across the first resistor is acquired by a power controller as described in the foregoing embodiments of this disclosure, and the transistor is controlled to turn on and off by the power controller as described in the foregoing embodiments of this disclosure. For example, the power controller can be understood as an OR-ing controller (or controller). When the power supply and power circuit are normal, the power line is turned on. When an abnormal situation such as power supply failure occurs, the power line is immediately cut off to prevent current from other normal power supplies from flowing back to the damaged power supply.

[0203] For example, the power line could be a high-voltage power bus.

[0204] For example, such as Figure 11 As shown, the power input path includes a first resistor Rs for detecting circuit status, and a transistor Q1 for cutting off the circuit in case of an abnormality. A power controller is configured with the first resistor and transistor to monitor the abnormal state of the power line in real time through the voltage difference across the first resistor. When the voltage difference meets a certain condition, an abnormal state is considered to have occurred. The power controller can control the transistor to turn on or off based on the control signal from the microcontroller and the detection result of whether an abnormal state has occurred in the power line.

[0205] Under normal operating conditions, the voltage of each power supply is basically balanced, the current is within the normal range, the transistor remains on, the power supply supplies power to the load normally, the return current of each circuit is balanced, and there is basically no current in the common ground and vertical cables.

[0206] When a power supply is disconnected, the voltage is too low, or it fails, the corresponding power controller recognizes the abnormal state and quickly controls the transistor to disconnect, thereby cutting off the return path of the faulty port, preventing current from flowing back into the faulty power port, and avoiding excessive circulating current, overheating, or safety hazards on the common ground or vertical bus.

[0207] When a load experiences a short circuit, overload, or other fault, the corresponding power controller can identify the abnormal state and quickly control the transistor to disconnect, thereby cutting off the current path of the load circuit and power line, and preventing equipment burnout or other faults caused by excessive current.

[0208] This redundant power supply system is particularly suitable for scenarios with extremely high requirements for power supply continuity, such as communication base stations, data centers, industrial control equipment, and dual-battery backup network equipment. It can achieve power fault isolation without shutting down or interrupting power supply, improve the system's redundancy, security, and long-term operational reliability, while simplifying maintenance and hot-swapping operations.

[0209] Furthermore, it should be noted that the redundant power supply system may also include other circuit elements or structures, and this disclosure does not impose specific limitations on them. For example, the power line may be a power supply bus, and the redundant power supply system may also include load interface units, system grounding structures, etc., to achieve parallel access of multiple power sources, stable power output, and reliable electrical connection, ensuring that when one power source fails or disconnects, the remaining power sources can still maintain uninterrupted power supply to the load.

[0210] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of this disclosure. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.

[0211] The units described in the embodiments of this disclosure can be implemented in software or hardware. The names of the units are not, in some cases, intended to limit the specific unit.

[0212] The functions described above in this document can be performed at least in part by one or more hardware logic components. For example, exemplary types of hardware logic components that can be used, without limitation, include: field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), system-on-a-chip (SoCs), complex programmable logic devices (CPLDs), and so on.

[0213] The above description is merely a preferred embodiment of this disclosure and an explanation of the technical principles employed. Those skilled in the art should understand that the scope of this disclosure is not limited to technical solutions formed by specific combinations of the above-described technical features, but should also cover other technical solutions formed by arbitrary combinations of the above-described technical features or their equivalents without departing from the above-described concept. For example, technical solutions formed by substituting the above features with (but not limited to) technical features disclosed in this disclosure that have similar functions.

[0214] Furthermore, while the operations are described in a specific order, this should not be construed as requiring these operations to be performed in the specific order shown or in a sequential order. In certain environments, multitasking and parallel processing may be advantageous. Similarly, while several specific implementation details are included in the above discussion, these should not be construed as limiting the scope of this disclosure. Certain features described in the context of individual embodiments may also be implemented in combination in a single embodiment. Conversely, various features described in the context of a single embodiment may also be implemented individually or in any suitable sub-combination in multiple embodiments.

[0215] Although the subject matter has been described using language specific to structural features and / or methodological logic, it should be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or actions described above. Rather, the specific features and actions described above are merely illustrative examples of implementing the claims.

[0216] The following points should be noted regarding this disclosure:

[0217] (1) The accompanying drawings of the embodiments of this disclosure only involve the structures involved in the embodiments of this disclosure. Other structures can be referred to the general design.

[0218] (2) Where there is no conflict, the embodiments of this disclosure and the features in the embodiments can be combined with each other to obtain new embodiments.

[0219] The above are merely specific embodiments of this disclosure, but the scope of protection of this disclosure is not limited thereto. The scope of protection of this disclosure shall be determined by the scope of the claims.

Claims

1. A power controller for controlling a power cord, wherein, A first resistor and a transistor are connected in series between the first and second ends of the power line. The power controller includes a data acquisition circuit, a detection circuit, a logic processing circuit, and a gate driving circuit. The power controller uses the voltage at the first end of the power line as a reference ground. When there is no abnormal state in the power line, the voltage at the first end of the power line is greater than the voltage at the second end. The acquisition circuit is electrically connected to the first and second ends of the first resistor and to the first input terminal of the detection circuit. The acquisition circuit is configured to acquire the voltage difference across the first resistor, determine a first acquisition signal based on the voltage difference, and transmit the first acquisition signal to the first input terminal of the detection circuit. The second input terminal of the detection circuit is used to receive a first threshold voltage, and the third input terminal of the detection circuit is used to receive a second threshold voltage. The detection circuit is configured to output a detection signal indicating whether the power line has the abnormal state based on the first acquisition signal, the first threshold voltage, and the second threshold voltage. The logic processing circuit is electrically connected to the detection circuit and the gate driving circuit, and is configured to output an enable signal or a disable signal to the gate driving circuit based on the received detection signal. The gate drive circuit is also electrically connected to the gate of the transistor and is configured to output a drive voltage signal to the gate of the transistor in response to receiving the enable signal to turn on the transistor, and to stop outputting the drive voltage signal in response to receiving the disable signal to turn off the transistor and disconnect the power line.

2. The power controller according to claim 1, wherein, The acquisition circuit determines the first acquisition signal based on the voltage difference, including: Perform a filtering operation on the voltage difference; A common-mode voltage is superimposed on the filtered voltage difference to obtain the first acquired signal.

3. The power controller according to claim 1, wherein, The abnormal state includes current backflow or overcurrent in the power line, and the first threshold voltage being less than the second threshold voltage. The detection circuit, based on the first acquired signal, the first threshold voltage, and the second threshold voltage, outputs a detection signal indicating whether the power line exhibits the abnormal state, including: In response to the voltage value of the first acquired signal being less than the first threshold voltage, a detection signal indicating that the power line is experiencing reverse current flow is output. In response to the voltage value of the first acquired signal being greater than or equal to the first threshold voltage and less than or equal to the second threshold voltage, a detection signal indicating that the power line has not experienced the abnormal state is output. In response to the voltage value of the first acquired signal being greater than the second threshold voltage, a detection signal indicating that the power line has experienced overcurrent is output.

4. The power controller according to claim 3, wherein, The detection circuit includes a first comparator and a second comparator. The first input terminal of the first comparator is electrically connected to the first input terminal of the detection circuit, the second input terminal of the first comparator is electrically connected to the second input terminal of the detection circuit, the first input terminal of the second comparator is electrically connected to the third input terminal of the detection circuit, and the second input terminal of the second comparator is electrically connected to the first input terminal of the detection circuit. The first comparator is configured as follows: In response to the voltage value of the first acquired signal being less than the first threshold voltage, a first signal indicating that the current backflow has occurred in the power line is output; in response to the voltage value of the first acquired signal being greater than or equal to the first threshold voltage, a second signal indicating that the current backflow has not occurred is output. The second comparator is configured as follows: In response to the voltage value of the first acquired signal being greater than the second threshold voltage, a third signal indicating that the overcurrent has occurred in the power line is output; in response to the voltage value of the first acquired signal being less than or equal to the second threshold voltage, a fourth signal indicating that the overcurrent has not occurred is output.

5. The power controller according to claim 1, wherein, The detection circuit also includes a first reference current source and a second reference current source. The first reference current source is electrically connected to the second input terminal of the detection circuit and is configured to provide a first reference current, which is used to adjust the first threshold voltage. The second reference current source is electrically connected to the third input terminal of the detection circuit and is configured to provide a second reference current, which is used to adjust the second threshold voltage.

6. The power controller according to claim 1, wherein, The logic processing circuit outputs an enable signal or a disable signal to the gate driving circuit based on the received detection signal, including: In response to receiving a detection signal indicating that the abnormal state has occurred, the disabled signal is output to the gate driver circuit. In response to receiving a detection signal indicating that the abnormal state has not occurred, the enable signal is output to the gate drive circuit.

7. The power controller according to claim 1, wherein, The gate drive circuit includes a charge pump that provides the drive voltage signal, the voltage value of which is greater than the voltage value of the power supply line.

8. The power controller according to claim 1, wherein, The power controller includes a primary side section and a secondary side section, as well as a digital isolator for transmitting control signals between the primary side section and the secondary side section, and an isolated power supply for transmitting power signals. The primary side and the secondary side operate in different voltage domains. The acquisition circuit, the detection circuit, the logic processing circuit, and the gate driving circuit are disposed in the secondary side portion. The primary side is configured to receive control signals sent by the microcontroller, wherein the control signals are used to indicate whether to disconnect the power line. The power controller is further configured to, when the power line does not exhibit the abnormal state, control whether to disconnect the power line according to the control signal.

9. The power controller according to claim 8, wherein, The digital isolator is electrically connected between the logic processing circuit and the microcontroller. The control signal is transmitted from the primary side to the logic processing circuit through the digital isolator. The logic processing circuit is further configured to receive the control signal and, based on the received detection signal and the control signal, output the enable signal or the disable signal to the gate driving circuit.

10. The power controller according to claim 9, wherein, The logic processing circuit, based on the received detection signal and the control signal, outputs the enable signal or the disable signal to the gate driving circuit, including: In response to receiving a detection signal indicating that the abnormal state has not occurred, the enable signal is output when the control signal indicates that the power line is turned on, and the disable signal is output when the control signal indicates that the power line is turned off. In response to receiving a detection signal indicating that the abnormal state has occurred, the disable signal is output.

11. The power controller according to claim 8, wherein, The isolated power supply is configured to isolate the primary side and the secondary side through a transformer, and to transmit the power of the power source located in the primary side to the secondary side to supply power to the secondary side.

12. The power controller according to claim 8, wherein, The acquisition circuit is also configured to determine a second acquisition signal based on the voltage difference. The power controller further includes an isolation operational amplifier circuit for transmitting the second acquisition signal between the primary side portion and the secondary side portion. The isolation operational amplifier circuit is electrically connected to the acquisition circuit, and the second acquisition signal is transmitted to the primary side portion through the isolation operational amplifier circuit.

13. The power controller according to claim 12, wherein, The primary side is also configured to transmit the second acquisition signal to the microcontroller.

14. The power controller according to claim 12, wherein, The acquisition circuit is further configured to determine a second acquisition signal based on the voltage difference, including: Perform a filtering operation on the voltage difference; Based on the filtered voltage difference, the first differential signal and the second differential signal are determined; The second acquired signal is obtained by superimposing a common-mode voltage onto the first differential signal and the second differential signal, respectively.

15. The power controller according to any one of claims 1-14, wherein, The power controller is integrated on a chip, which includes a gate drive port, a reference ground port, two voltage detection ports, and two threshold voltage receiving ports. The gate drive port is used to output the drive voltage signal; The reference ground port is used to receive the voltage at the first end of the power line; The two voltage detection ports are respectively used to receive voltage signals from the first end and the second end of the first resistor; The two threshold voltage receiving ports are used to receive the first threshold voltage and the second threshold voltage, respectively.

16. The power controller according to claim 15, wherein, The chip also includes a control signal receiving port, a data acquisition signal output port, and a drive voltage receiving port. The control signal receiving port is used to receive control signals sent by the microcontroller; The acquisition signal output port is used to output the acquisition signal; The drive voltage receiving port is used to receive power signals.

17. The power controller according to any one of claims 1-14, wherein, The power line transmits a first voltage signal, and the acquisition circuit, the detection circuit, the logic processing circuit, and the gate driving circuit are powered by a second voltage signal. The voltage value of the first voltage signal is greater than the voltage value of the second voltage signal.

18. A power control system, comprising a power cord and a power controller as described in any one of claims 1-17. in, A first resistor and a transistor are connected in series between the first and second ends of the power line.

19. The power control system of claim 18, further comprising a microcontroller configured to provide control signals to the power controller, wherein, The control signal is used to indicate whether the power line is disconnected.

20. The power control system of claim 19, wherein, The microcontroller is also configured to receive the acquisition signal output by the power controller and determine the current value or voltage value of the power line based on the acquisition signal.

21. The power control system according to claim 18, further comprising a second resistor and a third resistor, The first end of the second resistor is electrically connected to the second input terminal of the detection circuit, and the second end of the second resistor is electrically connected to the reference ground. The second resistor is used to adjust the first threshold voltage. The second input terminal of the detection circuit is also electrically connected to a first reference current source for providing a first reference current. The first threshold voltage is determined based on the first reference current and the second resistance, and the first threshold voltage changes in response to changes in the second resistance; The first end of the third resistor is electrically connected to the third input terminal of the detection circuit, and the second end of the third resistor is electrically connected to the reference ground. The third resistor is used to adjust the second threshold voltage. The third input terminal of the detection circuit is also electrically connected to a second reference current source used to provide a second reference current. The second threshold voltage is determined based on the second reference current and the third resistor, and the second threshold voltage changes in response to changes in the third resistor.

22. A redundant power supply system, comprising power supply lines, multiple power supplies, and multiple power supply lines corresponding to each of the multiple power supplies. The power supply line provides multiple DC input ports, each of which is connected to a corresponding power source via a corresponding power supply line. The power supply line is connected to the load, and the plurality of power supplies are used to supply power to the load. A first resistor and a transistor are connected in series between the first and second ends of each of the power lines, wherein each of the power lines is controlled by a power controller as described in any one of claims 1-17.

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