Bipolar dc power distribution network cross-scale coordinated optimization method considering power electronic physics-embedded modeling

Abstract

The application discloses a bipolar direct-current power distribution network cross-scale coordinated optimization method considering power electronic physical embedded modeling, comprising the following steps: 1, constructing a fine loss and life evaluation model of power electronic equipment at a micro level; 2, constructing a quasi-steady-state thermal resistance network and a segmented linear life cost function based on time scale reduction and sensitivity fitting; 3, constructing a cross-scale coordinated optimization model of the bipolar direct-current power distribution network, comprising dynamic operation constraints of the bipolar direct-current power distribution network and a comprehensive cost objective function; 4, solving the objective function after converting the nonlinear constraints into a mixed integer second-order cone programming model through linearization and second-order cone relaxation, and obtaining an optimal scheduling scheme of the bipolar direct-current power distribution network. The application can effectively avoid extreme thermal stress of equipment under heavy load, realize the optimal compromise between system operation economy and equipment life, and significantly improve the reliability and flexibility of the active power distribution network under extreme operating conditions.

Description

TECHNICAL FIELD

[0001] The application belongs to the field of power distribution system operation and optimization, in particular to a bipolar DC distribution network cross-scale coordinated optimization method considering power electronic physical embedded modeling. BACKGROUND

[0002] The existing bipolar DC distribution network mainly relies on advanced power electronic devices such as DC-DC soft switching (DC-SOP) for voltage regulation and inter-pole power flow control. However, the existing system-level optimization scheduling method has obvious theoretical limitations in device loss evaluation and life management, mainly reflected in: first, the traditional optimal power flow model mostly uses constant efficiency or simple quadratic curve to evaluate the loss of power electronic devices, ignoring the microscopic physical dynamic characteristics of semiconductor nonlinear electro-thermal coupling and zero voltage switching (ZVS) boundary shift, resulting in serious distortion of device temperature rise and life evaluation; second, the existing strategy mostly relies on a single centralized device for network voltage management, which easily forces the device to deviate from the optimal working zone under heavy load, aggravates local thermal stress and greatly shortens the device life; finally, the existing microscopic refined electro-thermal and aging model often has high dimension and non-convexity, which makes it difficult to solve if directly embedded into the macroscopic scheduling framework. The above defects of disconnection between macroscopic scheduling and microscopic device physical state limit the safe and reliable operation of bipolar DC distribution network. SUMMARY

[0003] The present application is to solve the above-mentioned deficiencies of the prior art, and proposes a bipolar DC distribution network cross-scale coordinated optimization method considering power electronic physical embedded modeling, in order to realize the dynamic decision-making of the economic efficiency of the distribution network system and the reliability of the underlying physical device by embedding the microscopic refined electro-thermal and life model into the system-level optimal power flow scheduling, so as to effectively avoid the extreme thermal stress of the device under heavy load, realize the optimal compromise between system operation economy and device life, and significantly improve the reliability and flexibility of the active power distribution network under extreme operating conditions.

[0004] In order to achieve the above-mentioned application purposes, the technical scheme adopted by the present application is as follows: The bipolar DC distribution network cross-scale coordinated optimization method considering power electronic physical embedded modeling of the present application is characterized by comprising the following steps: Step 1, considering the dynamic thermal drift characteristics of the on-resistance of the semiconductor switch tube with the junction temperature and the nonlinear shift of the zero voltage switching boundary, a refined loss model and a life evaluation model of the power electronic device are constructed; the power electronic device includes: semiconductor switch tube, high-frequency transformer and thin film capacitor; Step 2, based on time scale reduction and sensitivity fitting, a quasi-steady thermal resistance network of the power electronic equipment is constructed for temperature mapping of the power electronic equipment, so as to be substituted into the life evaluation model to obtain an equipment life index, and then, the equipment life index with an exponential non-convex characteristic is converted into a segmented linearized life cost function constrained by an ordered set; Step 3, a cross-scale coordinated optimization model of the bipolar DC power distribution network is constructed, including dynamic operation constraints of the bipolar DC power distribution network, and a comprehensive cost objective function f (x) that fuses network loss, voltage out-of-limit penalty, load fluctuation penalty of the bipolar DC power distribution network and the life cost function; Step 4, after the nonlinear constraints in the dynamic operation constraints are converted into second-order cone constraints through linearization and second-order cone relaxation, the comprehensive cost objective function is solved to obtain an optimal scheduling scheme of the bipolar DC power distribution network.

[0005] The bipolar DC power distribution network cross-scale coordinated optimization method considering the power electronic physical embedded modeling has the characteristics that step 1 includes: Step 1.1, a refined loss model of all semiconductor switching tubes and high-frequency transformers is constructed by formula (1)-(7): (1) (2) (3) (4) (5) (6) (7) In formula (1)-(7), denotes the high-frequency effective value current of the series inductance in the pole port at the moment on the node ; denotes the input voltage of the pole port at the moment on the node ; denotes an equivalent voltage ratio; denotes the asymmetric phase-shifting angle of the pole port at the moment on the node ; denotes the actual turns ratio of the high-frequency transformer; denotes the switching frequency; denotes the equivalent inductance; denotes the high-frequency effective value current of the series inductance in the pole port at the moment On the node The effective value of the current of the full-bridge switch transistor on the left side of the terminal. express time On the node The effective current values ​​of the switching transistors S1, S2, S5, and S6 at the terminal. express time On the node The effective values ​​of the currents of the switching transistors S3 and S4 at the terminal ports; express Time of the first The junction temperature of a semiconductor switching transistor; express The temperature at any time is Time The on-resistance of a semiconductor switch; Indicates reference temperature; Indicates reference temperature The standard on-resistance of the next semiconductor switching transistor; Indicates the temperature drift coefficient; express time On the node The total conduction loss of the semiconductor switch at the terminal; express The temperature at any time is The on-resistance of the corresponding full-bridge switch transistor is given. express The temperature at any time is The on-resistance of the corresponding switching transistors S1, S2, S5, and S6 is given. The temperature at any time is The on-resistance of the corresponding switching transistors S3 and S4; express time On the node Hard switching losses at the terminal; Indicates the switching frequency of power electronic equipment; express time On the node The voltage of the power electronic devices at the terminal; and These represent the voltage rise time and voltage fall time, respectively. express time On the node Core losses of high-frequency transformers at the pole ports; denotes denotes at the node the base core loss of the high-frequency transformer of the pole port; denotes the temperature correction coefficient of the ferrite material; denotes denotes at the node the core temperature of the high-frequency transformer of the pole port; denotes denotes at the node the total loss of the high-frequency transformer of the pole port; denotes denotes at the node the winding loss of the high-frequency transformer of the pole port; denotes the port polarity, , denotes the positive pole port and the negative pole port, respectively; Step 1.2, constructing a life assessment model of power electronic equipment from formula (8) to formula (13): (8) (9) (10) (11) (12) (13) In formula (8) to formula (13), denotes the expected thermal cycle failure times of any one device in the power electronic equipment; and denote two different aging index factors; denotes the device The amplitude of the junction temperature fluctuation within a single fatigue cycle; denotes the activation energy; denotes the Boltzmann constant; denotes the average junction temperature of the device within a single fatigue cycle; denotes the total cumulative fatigue damage degree of the semiconductor based on the Miner theory; denotes the total number of thermal cycle distributions; denotes the actual number of occurrences of the th thermal cycle distribution within the assessment period; denotes the expected life of the insulation of the high-frequency transformer; and These represent the two Arrhenius constants determined by the heat resistance class of the insulation system; Indicates the hot spot temperature of the high-frequency transformer; This indicates the cumulative damage level of the high-frequency transformer during the evaluation period; Indicates the total number of running segments; Indicates the high-frequency transformer The execution time of each running segment; Indicates the operating life of the film capacitor; Indicates the rated life of the film capacitor; Indicates the rated temperature of the film capacitor; This indicates the core temperature of the thin-film capacitor; Indicates the rated operating voltage of the film capacitor; This indicates the actual operating voltage of the film capacitor; This represents the acceleration factor caused by the operating voltage; This indicates the equivalent capacitance loss of a film capacitor. Indicates the first film capacitor The execution time of each running segment; This indicates the rated capacitance value of the film capacitor.

[0006] Furthermore, step 2 includes: Step 2.1: Based on the quasi-steady-state thermal resistance network model, calculate the junction temperature of the semiconductor switching transistors and the operating temperature of the high-frequency transformer in the power electronic equipment under each scheduling period using equations (14) and (15): (14) (15) In equations (14)-(15), express Time of the first The junction temperature of a semiconductor switching transistor; Indicates ambient temperature; Represents the steady-state thermal resistance of a single semiconductor switch in the fit; express Time of the first Power loss of a single semiconductor switch; express Time of the first The junction temperature of a high-frequency transformer; The fitted steady-state thermal resistance of a single high-frequency transformer; express Time of the first Power loss of a high-frequency transformer; Step 2.2, based on the power loss of each device in the refined loss model, extract the maximum loss ratio of the power electronic equipment in the bipolar DC power distribution network in the complete scheduling period: Firstly, the complete scheduling period is divided into multiple discrete scheduling periods; in any single scheduling period, the power loss of all semiconductor switches inside the power electronic equipment and the power loss of all high-frequency transformers are added up to calculate the overall active loss of the power electronic equipment in the single scheduling period; Secondly, traverse all discrete scheduling periods in the complete scheduling period, compare the overall active loss of the power electronic equipment in each period, and extract the global peak active loss in the complete scheduling period; Finally, after the peak active loss is compared with the system rated reference power of the power electronic equipment, the peak loss reduction rate under the full load operating condition is output after the standardization and normalization processing ; Step 2.3, construct the piecewise linearization life cost function of the power electronic equipment using formula (16)-(19) : (16) (17) (18) (19) In formula (16)-(19), represents the 5 polynomial fitting coefficients of the life cost function; represents the total number of breakpoints; represents the weight variable in the special ordered set SOS2 constraint; represents the life cost value corresponding to the breakpoint in piecewise linearization; represents the peak loss reduction rate coordinate value corresponding to the breakpoint in piecewise linearization; SOS2 represents the special ordered set constraint with only two adjacent weight variables being non-zero.

[0007] Further, step 3 includes: Step 3.1, construct the comprehensive cost objective function using formula (20)-(23) : (20) (21) (22) (23) In equations (20)-(23), These are the total loss cost of the bipolar DC distribution network, the penalty cost of the bipolar DC distribution network due to voltage exceeding limits, and the load fluctuation cost of the bipolar DC distribution network due to the operation of the power spring. The unit operating loss cost of a bipolar DC distribution network; Cost per unit voltage limit exceedance; Cost of power spring load fluctuation loss; express t bipolar DC distribution network at all times Supreme i Nodes and j The resistance of branch ij between nodes; express t bipolar DC distribution network at all times The square of the current in the uppermost branch ij; Indicate t bipolar DC distribution network at all times Supreme i Voltage over-limit penalty factor for nodes; These represent the positive, neutral, and negative terminals of the circuit, respectively. Total number of moments; It is a collection of branches in a bipolar DC distribution network; It is the set of nodes connecting bipolar DC distribution networks and power electronic equipment; This refers to the set of nodes in a bipolar DC distribution network where electric springs are connected; This represents the set of port polarities for power electronic devices and power springs connected to a bipolar DC distribution network. ; It is a collection of different port polarities of a bipolar DC distribution network; for Time Node superior Losses of power electronic equipment at the terminal ports; for time On the node Power fluctuations caused by the movement of the electric spring at the terminal; Indicates the interval between adjacent moments; Step 3.2: Define the dynamic operating constraints of power electronic equipment in a bipolar DC distribution network using equations (24)-(26): (twenty four) (25) (26) In formula (24) to formula (26), is the time on the node active power transmitted by the power electronic device at the pole port; and respectively represent on the node the active power lower limit and the active power upper limit of the pole port.

[0008] Further, step 4 includes: Step 4.1, linearization conversion is carried out on the voltage out-of-limit penalty term, so as to obtain formula (27) to formula (30): (27) (28) (29) (30) In formula (27) to formula (30), is the time on the node the voltage out-of-limit penalty function value of the pole port; is the time on the node the voltage out-of-limit non-negative auxiliary variable of the pole port; is on the node the square of the voltage safety upper limit of the pole port; and respectively represent on the node the square of the voltage optimization upper limit and the lower limit of the pole port; is the time on the node the actual voltage square value of the pole port; Step 4.2, second-order cone relaxation is carried out on the quadratic nonlinear relationship in formula (24), so as to obtain the standard second-order cone form shown in formula (31): (31) In formula (27) to formula (31), and represent 2 equivalent coefficients.

[0009] The electronic equipment comprises a memory and a processor, and is characterized in that the memory is used for storing a program supporting the processor to execute a bipolar direct-current power distribution network cross-scale coordinated optimization method considering power electronic physical embedded modeling, and the processor is configured to execute the program stored in the memory.

[0010] The computer readable storage medium stores a computer program, and the computer program is characterized in that when the computer program is run by a processor, the steps of the bipolar direct-current power distribution network cross-scale coordinated optimization method considering power electronic physical embedded modeling are executed.

[0011] Compared with the prior art, the present application has the following beneficial effects: 1、The present application embeds a micro-fine electrical and thermal and life evaluation model of power electronic equipment in macro-scheduling of a power distribution network, can accurately depict nonlinear dynamic soft switching boundaries and loss changes under extreme operating conditions, realizes accurate physical mapping from an electrical state to thermal accumulation to expected life, and overcomes the defects of the prior art, such as scheduling instruction deviation and unmodeled thermal failure risk, caused by using a fixed or simplified loss model.

[0012] 2、The present application constructs a multi-resource (such as a direct-current spring DC-ES and an inter-pole switching energy storage Ips-ESS) coordinated regulation mechanism, actively guides core power electronic equipment to avoid a high-loss and high-thermal-stress operating area, reduces total system loss, and improves the life of a direct-current soft switch under the premise of ensuring that the power quality and voltage of the macro power distribution network do not exceed the limit.

[0013] 3、The present application proposes time scale-based time reduction and second-order cone relaxation technology for high-dimensional non-convex micro-physical models, converts complex nonlinear life constraints into a mixed integer second-order cone programming (MISOCP) model that can be efficiently solved, retains real physical boundaries, and ensures the global optimality and computational efficiency of macro-scheduling. BRIEF DESCRIPTION OF DRAWINGS

[0014] Figure 1 is an improved IEEE 33-node bipolar direct-current power distribution network topology graph adopted by the embodiment of the present application; Figure 2 is a circuit topology structure diagram of a direct-current soft switch (DC-SOP) in the present application; Figure 3 is a comparison diagram of a net power difference and equipment operating state between an independent scheduling strategy and a physical embedded scheduling strategy in the embodiment of the present application; Figure 4 is a comparison diagram of positive and negative electrode space-time voltage distribution before and after the cooperative strategy in the embodiment of the present application; Figure 5This is a diagram showing the operation of the multi-resource coordination device and the internal loss of the DC soft switch in an embodiment of the present invention; Figure 6 This is a comparison diagram of the positive and negative extreme voltages before and after multi-resource coordination in an embodiment of the present invention; Figure 7 This is a distribution diagram of the actual operating area of ​​the DC soft switch in the embodiments of the present invention.

[0015] Figure 8 This is a flowchart illustrating the overall implementation process of the method of this invention. Detailed Implementation

[0016] In this embodiment, a cross-scale coordinated optimization method for bipolar DC distribution networks that considers embedded modeling of power electronics physics is applied to, for example, Figure 1 The bipolar DC distribution network architecture shown includes key power electronic devices such as DC soft-switching (DC-SOP), as well as distributed resources such as DC electric springs (DC-ES) and inter-pole switching energy storage systems (IPS-ESS). The DC soft-switching topology is as follows: Figure 2 As shown. Compared to traditional scheduling methods that ignore the physical state of underlying devices, this invention accurately characterizes the nonlinear loss boundary under complex operating environments through order reduction and second-order cone relaxation techniques, and directly embeds device lifetime assessment into system-level scheduling. Specifically, as Figure 8 As shown, the steps of this method are as follows: Step 1: Construct a refined loss and lifespan assessment model for power electronic devices at the micro level: Taking into account the dynamic thermal drift characteristics of the on-resistance of semiconductor switching transistors with junction temperature and the nonlinear shift of the zero-voltage turn-on boundary, a refined loss model and lifetime assessment model for power electronic devices are constructed; the power electronic devices include: semiconductor switching transistors, high-frequency transformers, and thin-film capacitors.

[0017] Step 1.1: Construct a refined loss model for all semiconductor switches and high-frequency transformers using equations (1)-(7): (1) (2) (3) (4) (5) (6) (7) In equations (1)-(7), express time On the node The high-frequency effective current of the series inductor inside the terminal; express time On the node Input voltage at the terminal; Indicates the equivalent voltage ratio; express time On the node Asymmetric phase shift angle at the pole ports; This indicates the actual turns ratio of a high-frequency transformer; Indicates the switching frequency; Indicates the equivalent inductance; express time On the node The effective value of the current of the full-bridge switch transistor on the left side of the terminal. express time On the node The effective current values ​​of the switching transistors S1, S2, S5, and S6 at the terminal. express time On the node The effective values ​​of the currents of the switching transistors S3 and S4 at the terminal ports; express Time of the first The junction temperature of a semiconductor switching transistor; express The temperature at any time is Time The on-resistance of a semiconductor switch; Indicates reference temperature; Indicates reference temperature The standard on-resistance of the next semiconductor switching transistor; Indicates the temperature drift coefficient; express time On the node The total conduction loss of the semiconductor switch at the terminal; express The temperature at any time is The on-resistance of the corresponding full-bridge switch transistor is given. express The temperature at any time is The on-resistance of the corresponding switching transistors S1, S2, S5, and S6 is given. The temperature at any time is The on-resistance of the corresponding switching transistors S3 and S4; express time On the node Hard switching losses at the terminal; Indicates the switching frequency of power electronic equipment; express time On the node The voltage of the power electronic devices at the terminal; and These represent the voltage rise time and voltage fall time, respectively. express time On the node Core losses of high-frequency transformers at the pole ports; express time On the node The core loss of the high-frequency transformer at the pole port; This represents the temperature correction factor for ferrite materials; express time On the node The core temperature of the high-frequency transformer at the pole port; express time On the node The total loss of the high-frequency transformer at the pole port; express time On the node The winding losses of the high-frequency transformer at the pole port; Indicates port polarity. , These represent the positive and negative terminals, respectively.

[0018] Step 1.2: Construct a life assessment model for power electronic equipment using equations (8)-(13): (8) (9) (10) (11) (12) (13) In equations (8)-(13), Represents any type of device in power electronic equipment. The expected number of thermal cycle failures; and This represents two different aging index factors; Device The amplitude of junction temperature fluctuation within a single fatigue cycle; Indicates activation energy; Represents the Boltzmann constant; Device The average junction temperature during a single fatigue cycle; This represents the total cumulative fatigue damage of a semiconductor based on Miner's theory. This represents the total number of heat cycles distributed; Indicates the first The actual number of thermal cycles occurring within the evaluation period; This indicates the expected lifespan of the insulation of a high-frequency transformer; and These represent the two Arrhenius constants determined by the heat resistance class of the insulation system; Indicates the hot spot temperature of the high-frequency transformer; This indicates the cumulative damage level of the high-frequency transformer during the evaluation period; Indicates the total number of running segments; Indicates the high-frequency transformer The execution time of each running segment; Indicates the operating life of the film capacitor; Indicates the rated life of the film capacitor; Indicates the rated temperature of the film capacitor; This indicates the core temperature of the thin-film capacitor; Indicates the rated operating voltage of the film capacitor; This indicates the actual operating voltage of the film capacitor; This represents the acceleration factor caused by the operating voltage; This indicates the equivalent capacitance loss of a film capacitor. Indicates the first film capacitor The execution time of each running segment; This indicates the rated capacitance value of the film capacitor.

[0019] Step 2: Based on time scale reduction and sensitivity fitting, a quasi-steady-state thermal resistance network for power electronic equipment is constructed to perform temperature mapping on the power electronic equipment. This network is then substituted into the life assessment model to obtain the equipment life index. The equipment life index, which has exponential non-convex characteristics, is then transformed into a piecewise linearized life cost function constrained by an ordered set. Directly embedding microscopic nonlinear physical equations into the macroscopic model would result in extremely high computational complexity. Therefore, physical reduction is used to ensure the solvability of the optimization model.

[0020] Step 2.1: Based on the quasi-steady-state thermal resistance network model, calculate the junction temperature of the semiconductor switching transistors and the operating temperature of the high-frequency transformer in the power electronic equipment under each scheduling period using equations (14) and (15): (14) (15) In equations (14)-(15), express Time of the first The junction temperature of a semiconductor switching transistor; Indicates ambient temperature; Represents the steady-state thermal resistance of a single semiconductor switch in the fit; express Time of the first Power loss of a single semiconductor switch; express Time of the first The junction temperature of a high-frequency transformer; The fitted steady-state thermal resistance of a single high-frequency transformer; express Time of the first Power loss of a high-frequency transformer.

[0021] Step 2.2: Based on the power loss of each device in the refined loss model, extract the maximum loss ratio of power electronic equipment during the complete dispatch cycle of the bipolar DC distribution network. First, the complete scheduling cycle is divided into multiple discrete scheduling periods. Within any single scheduling period, the power losses of all semiconductor switches inside the power electronic equipment are summed with the power losses of all high-frequency transformers to calculate the overall active power loss of the power electronic equipment during that scheduling period. Secondly, traverse all discrete scheduling periods within the scheduling cycle, compare the overall active power loss of power electronic equipment in each period, and extract the global peak active power loss in the entire cycle. Finally, the peak active power loss is compared with the system rated reference power of the power electronic equipment, and then normalized to output the peak loss reduction rate relative to the full-load operating condition. .

[0022] Step 2.3: Based on Step 2.2, construct the piecewise linearized lifetime cost function of power electronic equipment using equations (16)-(19). : (16) (17) (18) (19) In equations (16)-(19), Five polynomial fit coefficients representing the lifetime cost function; Indicates the total number of breakpoints; The first element in the SOS2 constraint of the special ordered set represents the first element. One weighted variable; In piecewise linearization, the first... The life cost value corresponding to each breakpoint; In piecewise linearization, the first... The peak loss reduction rate coordinates corresponding to each breakpoint; SOS2 represents a special ordered set constraint with only two adjacent non-zero weight variables.

[0023] Step 3: Construct a cross-scale coordinated optimization model for the bipolar DC distribution network, including: dynamic operation constraints of the bipolar DC distribution network, and a comprehensive cost objective function that integrates network loss, voltage over-limit penalty, load fluctuation penalty of the bipolar DC distribution network with the lifetime cost function.

[0024] Step 3.1: Construct the comprehensive cost objective function using equations (20)-(23). : (20) (twenty one) (twenty two) (twenty three) In equations (20)-(23), These are the total loss cost of the bipolar DC distribution network, the penalty cost of the bipolar DC distribution network due to voltage exceeding limits, and the load fluctuation cost of the bipolar DC distribution network due to the operation of the power spring. The unit operating loss cost of a bipolar DC distribution network; Cost per unit voltage limit exceedance; Cost of power spring load fluctuation loss; express t bipolar DC distribution network at all times Supreme i Nodes and j The resistance of branch ij between nodes; express t bipolar DC distribution network at all times The square of the current in the uppermost branch ij; Indicate t bipolar DC distribution network at all times Supreme iVoltage over-limit penalty factor for nodes; These represent the positive, neutral, and negative terminals of the circuit, respectively. Total number of moments; It is a collection of branches in a bipolar DC distribution network; It is the set of nodes connecting bipolar DC distribution networks and power electronic equipment; This refers to the set of nodes in a bipolar DC distribution network where electric springs are connected; This represents the set of port polarities for power electronic devices and power springs connected to a bipolar DC distribution network. ; It is a collection of different port polarities of a bipolar DC distribution network; for Time Node superior Losses of power electronic equipment at the terminal ports; for time On the node Power fluctuations caused by the movement of the electric spring at the terminal; It indicates the interval between adjacent moments.

[0025] Step 3.2: Define the dynamic operating constraints of power electronic equipment in a bipolar DC distribution network using equations (24)-(26): (twenty four) (25) (26) In equations (24)-(26), for time On the node The active power transmitted by the power electronic equipment at the terminal; and They represent On the node The lower limit and upper limit of active power at the pole port.

[0026] Step 4: After transforming the nonlinear constraints in the dynamic operation constraints into second-order cone constraints through linearization and second-order cone relaxation, the comprehensive cost objective function is solved to obtain the optimal scheduling scheme of the bipolar DC distribution network. Step 4.1: Perform a linearization transformation on the voltage over-limit penalty term to obtain equations (27)-(30): (27) (28) (29) (30) In equations (27)-(30), for time On the node The voltage over-limit penalty function value at the terminal; for time On the node Voltage over-limit non-negative auxiliary variable at the pole port; for On the node The square of the safe upper limit of voltage at the terminal; and They are respectively On the node The squares of the upper and lower limits of the voltage optimization at the terminal; for time On the node The actual squared value of the voltage at the terminal.

[0027] Step 4.2: Perform second-order cone relaxation on the quadratic nonlinear relationship in equation (24) to obtain the standard second-order cone form shown in equation (31): (31) In equations (27)-(31), and This represents two equivalent coefficients.

[0028] Through the above model transformation, the original mixed-integer nonlinear programming (MINLP) problem is transformed into a mixed-integer second-order cone programming (MISOCP) model, which can directly use commercial solvers such as Gurobi to obtain the global optimal solution and obtain the optimal scheduling scheme for distributed resources and DC soft switching.

[0029] In this embodiment, an electronic device includes a memory and a processor. The memory stores a program that supports the processor in executing the methods described above, and the processor is configured to execute the program stored in the memory.

[0030] In this embodiment, a computer-readable storage medium stores a computer program, which is executed by a processor to perform the steps of the above method.

[0031] To enable those skilled in the art to better understand the present invention, the numerical example analysis includes the following components: I. Example Description and Simulation Result Analysis: In such Figure 1Numerical simulation tests were conducted on an improved IEEE 33-node bipolar DC distribution network system with a rated voltage of ±10kV. The network polarity of the system was set to include positive, negative, and neutral, and the safe range constraint of the node voltage was set to [0.95, 1.05]pu.

[0032] The DC soft switch adopts a multi-port dual-active full-bridge submodule cascade structure, and the topology of each submodule is as follows: Figure 2 As shown, it is installed between nodes 12 and 22. The underlying micro-hardware parameters are set as follows: the semiconductor switching transistor is an SCT3040KR (40mΩ / 3.2V), the DC-side film capacitor is 12μF, and the high-frequency transformer uses a 40kHz ferrite core. A photovoltaic power generation system is connected to nodes 7, 10, 13, 24, 27, and 30. A DC charging station is configured at node 14, containing 8 AC / DC slow charging piles with a total capacity of 0.4MWh and a maximum charging power of 0.2MW. An inter-polarity switching energy storage system (Ips-ESS) is configured at node 5 with a total capacity of 1MWh and a maximum throughput power of 0.5MW. DC electric springs (DC-ES) are installed at nodes 17 and 18 to form smart loads, with a maximum operating amplitude set to 0.2. Scheduling time step Set it to 1h.

[0033] Figure 3 This indicates the start-up and shutdown strategies of DC soft switching in Case I and Case II, and the net power difference between each port. Figure 3 It can be seen that under typical intraday load fluctuations, when independent scheduling is performed without considering the underlying nonlinear losses, DC soft switching is very likely to be in a heavy-load operation state during the midday solar power generation period; however, under the action of the physical embedded model, the strategy can accurately perceive the nonlinear loss mutation, actively compress the operating window during non-heavy-load periods, and avoid high-loss areas, which confirms the profound impact of micro-physical modeling on macro-control commands.

[0034] Figure 4 (a) and Figure 4 (b) in the diagram represents the three-dimensional diagrams of the positive and negative voltages of the bipolar DC distribution network in Case II and Case III, respectively. Figure 6 This represents the extreme values ​​of the positive and negative voltages in the bipolar DC distribution network in Case III and Case IV. Figure 4 and Figure 6 It can be seen that by coordinating the inter-polar switching energy storage system and the DC electric spring, the multi-resource coordination significantly alleviates the full-load operation pressure of DC soft switching. The overall voltage distribution of the bipolar DC distribution network is more stable, and the extreme over-limit voltages of the positive and negative poles are basically strictly constrained between 0.97 pu and 1.03 pu, achieving an efficient trade-off between underlying thermal stress constraints and system-level voltage regulation.

[0035] Figure 5 Figure (a) shows the transmission power and corresponding losses of DC soft switching under typical daily operating conditions. Figure 5 (b) shows the positive and negative electrode charging and discharging power and the overall SoC change of the inter-electrode switchable energy storage. Figure 5 (c) in the figure shows the range of motion of the positive and negative terminals of the electric springs at nodes 17 and 18. Figure 7 The operating trajectory of DC soft switching is shown. (By...) Figure 5 and Figure 7 It can be seen that after introducing the life cost function of the equipment, the operating trajectory of DC soft switching is strictly limited to the high-efficiency operating region of global zero voltage turn-on (ZVS). Under heavy load, the system actively triggers thermal peak reduction, strictly clamping extreme internal losses and temperature rise below the safety threshold, thereby effectively avoiding unmodeled accelerated aging behavior.

[0036] II. Verification of the proposed algorithm: This invention designs and compares four typical cases, which are specifically defined as follows: Case I: A benchmark case for independent scheduling of DC soft switching using a traditional fixed-loss model.

[0037] Case II: An optimization method for independent scheduling of DC soft switching using the physical embedded refined loss model proposed in this invention.

[0038] Case III: An optimization method for the joint operation of DC soft switching, DC electric spring, and inter-pole switching energy storage under a physically embedded loss model.

[0039] Case IV: The method proposed in this invention.

[0040] Table 1 Results of Case I-Case IV As shown in Table 1, the framework proposed in Case IV demonstrates significant advantages in reducing system network losses, minimizing converter internal losses, eliminating voltage violation penalties, and extending equipment lifespan, fully reflecting the superiority of the method proposed in this invention.

[0041] The results of the numerical examples show that the cross-scale coordinated optimization method for bipolar DC distribution networks proposed in this invention, which incorporates embedded modeling of power electronics physics, enhances the system's ability to perceive nonlinear thermal stress in equipment through refined modeling of losses and lifespan at the underlying level, eliminating the risk of unmodeled thermal failures. The coordinated optimization of multiple resources alleviates the burden of centralized voltage regulation. By reducing the order of micro-constraints, the high-power output window of DC soft switching is reasonably limited, achieving an optimal balance between the operational economy of the bipolar DC distribution network system and the full life-cycle reliability of core equipment.

Claims

1. A cross-scale coordinated optimization method for bipolar DC distribution networks considering embedded power electronics physics modeling, characterized in that, Includes the following steps: Step 1: Taking into account the dynamic thermal drift characteristics of the on-resistance of semiconductor switching transistors with junction temperature and the nonlinear shift of the zero-voltage turn-on boundary, a refined loss model and lifetime assessment model for power electronic devices are constructed; the power electronic devices include: semiconductor switching transistors, high-frequency transformers, and thin-film capacitors. Step 2: Based on time scale reduction and sensitivity fitting, construct a quasi-steady-state thermal resistance network for power electronic equipment to perform temperature mapping on power electronic equipment, and then substitute it into the life assessment model to obtain the equipment life index. Then, transform the equipment life index with exponential non-convex characteristics into a piecewise linearized life cost function constrained by an ordered set. Step 3: Construct a cross-scale coordinated optimization model for the bipolar DC distribution network, including: dynamic operation constraints of the bipolar DC distribution network, and a comprehensive cost objective function that integrates network loss, voltage over-limit penalty, load fluctuation penalty of the bipolar DC distribution network with the lifetime cost function. Step 4: After transforming the nonlinear constraints in the dynamic operation constraints into second-order cone constraints through linearization and second-order cone relaxation, the comprehensive cost objective function is solved to obtain the optimal scheduling scheme of the bipolar DC distribution network.

2. The method for cross-scale coordinated optimization of bipolar DC distribution networks considering embedded power electronic physics modeling as described in claim 1, characterized in that, Step 1 includes: Step 1.1: Construct a refined loss model for all semiconductor switches and high-frequency transformers using equations (1)-(7): (1) (2) (3) (4) (5) (6) (7) In equations (1)-(7), express time On the node The high-frequency effective current of the series inductor inside the terminal; express time On the node Input voltage at the terminal; Indicates the equivalent voltage ratio; express time On the node Asymmetric phase shift angle at the pole ports; This indicates the actual turns ratio of a high-frequency transformer; Indicates the switching frequency; Indicates the equivalent inductance; express time On the node The effective value of the current of the full-bridge switch transistor on the left side of the terminal. express time On the node The effective current values ​​of the switching transistors S1, S2, S5, and S6 at the terminal. express time On the node The effective values ​​of the currents of the switching transistors S3 and S4 at the terminal ports; express Time of the first The junction temperature of a semiconductor switching transistor; express The temperature at any time is Time The on-resistance of a semiconductor switch; Indicates reference temperature; Indicates reference temperature The standard on-resistance of the next semiconductor switching transistor; Indicates the temperature drift coefficient; express time On the node The total conduction loss of the semiconductor switch at the terminal; express The temperature at any time is The on-resistance of the corresponding full-bridge switch transistor is given. express The temperature at any time is The on-resistance of the corresponding switching transistors S1, S2, S5, and S6 is given. The temperature at any time is The on-resistance of the corresponding switching transistors S3 and S4; express time On the node Hard switching losses at the terminal; Indicates the switching frequency of power electronic equipment; express time On the node The voltage of the power electronic devices at the terminal; and These represent the voltage rise time and voltage fall time, respectively. express time On the node Core losses of high-frequency transformers at the pole ports; express time On the node The core loss of the high-frequency transformer at the pole port; This represents the temperature correction factor for ferrite materials; express time On the node The core temperature of the high-frequency transformer at the pole port; express time On the node The total loss of the high-frequency transformer at the pole port; express time On the node The winding losses of the high-frequency transformer at the pole port; Indicates port polarity. , These represent the positive and negative terminals, respectively. Step 1.2: Construct a life assessment model for power electronic equipment using equations (8)-(13): (8) (9) (10) (11) (12) (13) In equations (8)-(13), Represents any type of device in power electronic equipment. The expected number of thermal cycle failures; and This represents two different aging index factors; Device The amplitude of junction temperature fluctuation within a single fatigue cycle; Indicates activation energy; Represents the Boltzmann constant; Device The average junction temperature during a single fatigue cycle; This represents the total cumulative fatigue damage of a semiconductor based on Miner's theory. This represents the total number of heat cycles distributed; Indicates the first The actual number of thermal cycles occurring within the evaluation period; This indicates the expected lifespan of the insulation of a high-frequency transformer; and These represent the two Arrhenius constants determined by the heat resistance class of the insulation system; Indicates the hot spot temperature of the high-frequency transformer; This indicates the cumulative damage level of the high-frequency transformer during the evaluation period; Indicates the total number of running segments; Indicates the high-frequency transformer The execution time of each running segment; Indicates the operating life of the film capacitor; Indicates the rated life of the film capacitor; Indicates the rated temperature of the film capacitor; This indicates the core temperature of the thin-film capacitor; Indicates the rated operating voltage of the film capacitor; This indicates the actual operating voltage of the film capacitor; This represents the acceleration factor caused by the operating voltage; This indicates the equivalent capacitance loss of a film capacitor. Indicates the first film capacitor The execution time of each running segment; This indicates the rated capacitance value of the film capacitor.

3. The method for cross-scale coordinated optimization of bipolar DC distribution networks considering embedded power electronic physics modeling as described in claim 2, characterized in that, Step 2 includes: Step 2.1: Based on the quasi-steady-state thermal resistance network model, calculate the junction temperature of the semiconductor switching transistors and the operating temperature of the high-frequency transformer in the power electronic equipment under each scheduling period using equations (14) and (15): (14) (15) In equations (14)-(15), express Time of the first The junction temperature of a semiconductor switching transistor; Indicates ambient temperature; Represents the steady-state thermal resistance of a single semiconductor switch in the fit; express Time of the first Power loss of a single semiconductor switch; express Time of the first The junction temperature of a high-frequency transformer; The fitted steady-state thermal resistance of a single high-frequency transformer; express Time of the first Power loss of a high-frequency transformer; Step 2.2: Based on the power loss of each device in the refined loss model, extract the maximum loss ratio of power electronic equipment in the bipolar DC distribution network during the complete dispatch cycle. First, the complete scheduling cycle is divided into multiple discrete scheduling periods. Within any single scheduling period, the power losses of all semiconductor switching transistors inside the power electronic equipment and the power losses of all high-frequency transformers are summed to calculate the overall active power loss of the power electronic equipment under a single scheduling period. Secondly, by traversing all discrete scheduling periods within the complete scheduling cycle, comparing the overall active power loss of power electronic equipment in each period, the global peak active power loss within the complete scheduling cycle is extracted. Finally, the peak active power loss is compared with the system rated reference power of the power electronic equipment, and then normalized to output the peak loss reduction rate relative to the full-load operating condition. ; Step 2.3: Construct a piecewise linearized lifetime cost function for power electronic equipment using equations (16)-(19). : (16) (17) (18) (19) In equations (16)-(19), Five polynomial fit coefficients representing the lifetime cost function; Indicates the total number of breakpoints; The first element in the SOS2 constraint of the special ordered set represents the first element. One weighted variable; In piecewise linearization, the first... The life cost value corresponding to each breakpoint; In piecewise linearization, the first... The peak loss reduction rate coordinates corresponding to each breakpoint; SOS2 represents a special ordered set constraint with only two adjacent non-zero weight variables.

4. The method for cross-scale coordinated optimization of bipolar DC distribution networks considering embedded power electronic physics modeling as described in claim 3, characterized in that, Step 3 includes: Step 3.1: Construct the comprehensive cost objective function using equations (20)-(23). : (20) (21) (22) (23) In equations (20)-(23), These are the total loss cost of the bipolar DC distribution network, the penalty cost of the bipolar DC distribution network due to voltage exceeding limits, and the load fluctuation cost of the bipolar DC distribution network due to the operation of the power spring. The unit operating loss cost of a bipolar DC distribution network; Cost per unit voltage limit exceedance; Cost of power spring load fluctuation loss; express t bipolar DC distribution network at all times Supreme i Nodes and j The resistance of branch ij between nodes; express t bipolar DC distribution network at all times The square of the current in the uppermost branch ij; Indicate t bipolar DC distribution network at all times Supreme i Voltage over-limit penalty factor for nodes; These represent the positive, neutral, and negative terminals of the circuit, respectively. Total number of moments; It is a collection of branches in a bipolar DC distribution network; It is the set of nodes connecting bipolar DC distribution networks and power electronic equipment; This refers to the set of nodes in a bipolar DC distribution network where electric springs are connected; This represents the set of port polarities for power electronic devices and power springs connected to a bipolar DC distribution network. ; It is a collection of different port polarities of a bipolar DC distribution network; for Time Node superior Losses of power electronic equipment at the terminal ports; for time On the node Power fluctuations caused by the movement of the electric spring at the terminal; Indicates the interval between adjacent moments; Step 3.2: Define the dynamic operating constraints of power electronic equipment in a bipolar DC distribution network using equations (24)-(26): (24) (25) (26) In equations (24)-(26), for time On the node The active power transmitted by the power electronic equipment at the terminal; and They represent On the node The lower limit and upper limit of active power at the pole port.

5. The method for cross-scale coordinated optimization of bipolar DC distribution networks considering embedded power electronic physics modeling as described in claim 4, characterized in that, Step 4 includes: Step 4.1: Perform a linearization transformation on the voltage over-limit penalty term to obtain equations (27)-(30): (27) (28) (29) (30) In equations (27)-(30), for time On the node The voltage over-limit penalty function value at the terminal; for time On the node Voltage over-limit non-negative auxiliary variable at the pole port; for On the node The square of the safe upper limit of voltage at the terminal; and They are respectively On the node The squares of the upper and lower limits of the voltage optimization at the terminal; for time On the node The actual squared value of the voltage at the terminal; Step 4.2: Perform second-order cone relaxation on the quadratic nonlinear relationship in equation (24) to obtain the standard second-order cone form shown in equation (31): (31) In equations (27)-(31), and This represents two equivalent coefficients.

6. An electronic device, comprising a memory and a processor, characterized in that, The memory is used to store programs that support the processor in executing the cross-scale coordinated optimization method for bipolar DC distribution networks that takes into account embedded modeling of power electronic physics as described in any one of claims 1-5, and the processor is configured to execute the programs stored in the memory.

7. A computer-readable storage medium storing a computer program thereon, characterized in that, When the computer program is run by the processor, it executes the steps of the cross-scale coordinated optimization method for bipolar DC distribution networks that takes into account the embedded modeling of power electronic physics as described in any one of claims 1-5.

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